1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017 Microchip Corporation.
5 #include <linux/delay.h>
6 #include <linux/gpio/consumer.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <linux/regmap.h>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-event.h>
13 #include <media/v4l2-image-sizes.h>
14 #include <media/v4l2-subdev.h>
16 #define REG_OUTSIZE_LSB 0x34
18 /* OV7740 register tables */
19 #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
20 #define REG_BGAIN 0x01 /* blue gain */
21 #define REG_RGAIN 0x02 /* red gain */
22 #define REG_GGAIN 0x03 /* green gain */
23 #define REG_REG04 0x04 /* analog setting, dont change*/
24 #define REG_BAVG 0x05 /* b channel average */
25 #define REG_GAVG 0x06 /* g channel average */
26 #define REG_RAVG 0x07 /* r channel average */
28 #define REG_REG0C 0x0C /* filp enable */
29 #define REG0C_IMG_FLIP 0x80
30 #define REG0C_IMG_MIRROR 0x40
32 #define REG_REG0E 0x0E /* blc line */
33 #define REG_HAEC 0x0F /* auto exposure cntrl */
34 #define REG_AEC 0x10 /* auto exposure cntrl */
36 #define REG_CLK 0x11 /* Clock control */
37 #define REG_REG55 0x55 /* Clock PLL DIV/PreDiv */
39 #define REG_REG12 0x12
41 #define REG_REG13 0x13 /* auto/manual AGC, AEC, Write Balance*/
42 #define REG13_AEC_EN 0x01
43 #define REG13_AGC_EN 0x04
45 #define REG_REG14 0x14
46 #define REG_CTRL15 0x15
47 #define REG15_GAIN_MSB 0x03
49 #define REG_REG16 0x16
51 #define REG_MIDH 0x1C /* manufacture id byte */
52 #define REG_MIDL 0x1D /* manufacture id byre */
53 #define REG_PIDH 0x0A /* Product ID MSB */
54 #define REG_PIDL 0x0B /* Product ID LSB */
56 #define REG_84 0x84 /* lots of stuff */
57 #define REG_REG38 0x38 /* sub-addr */
59 #define REG_AHSTART 0x17 /* Horiz start high bits */
60 #define REG_AHSIZE 0x18
61 #define REG_AVSTART 0x19 /* Vert start high bits */
62 #define REG_AVSIZE 0x1A
63 #define REG_PSHFT 0x1b /* Pixel delay after HREF */
65 #define REG_HOUTSIZE 0x31
66 #define REG_VOUTSIZE 0x32
67 #define REG_HVSIZEOFF 0x33
68 #define REG_REG34 0x34 /* DSP output size H/V LSB*/
70 #define REG_ISP_CTRL00 0x80
71 #define ISPCTRL00_AWB_EN 0x10
72 #define ISPCTRL00_AWB_GAIN_EN 0x04
74 #define REG_YGAIN 0xE2 /* ygain for contrast control */
76 #define REG_YBRIGHT 0xE3
77 #define REG_SGNSET 0xE4
78 #define SGNSET_YBRIGHT_MASK 0x08
85 struct v4l2_subdev subdev;
86 #if defined(CONFIG_MEDIA_CONTROLLER)
89 struct v4l2_mbus_framefmt format;
90 const struct ov7740_pixfmt *fmt; /* Current format */
91 const struct ov7740_framesize *frmsize;
92 struct regmap *regmap;
94 struct v4l2_ctrl_handler ctrl_handler;
97 struct v4l2_ctrl *auto_gain;
98 struct v4l2_ctrl *gain;
101 struct v4l2_ctrl *auto_wb;
102 struct v4l2_ctrl *blue_balance;
103 struct v4l2_ctrl *red_balance;
106 struct v4l2_ctrl *hflip;
107 struct v4l2_ctrl *vflip;
110 /* exposure cluster */
111 struct v4l2_ctrl *auto_exposure;
112 struct v4l2_ctrl *exposure;
115 /* saturation/hue cluster */
116 struct v4l2_ctrl *saturation;
117 struct v4l2_ctrl *hue;
119 struct v4l2_ctrl *brightness;
120 struct v4l2_ctrl *contrast;
122 struct mutex mutex; /* To serialize asynchronus callbacks */
123 bool streaming; /* Streaming on/off */
125 struct gpio_desc *resetb_gpio;
126 struct gpio_desc *pwdn_gpio;
129 struct ov7740_pixfmt {
131 enum v4l2_colorspace colorspace;
132 const struct reg_sequence *regs;
136 struct ov7740_framesize {
139 const struct reg_sequence *regs;
143 static const struct reg_sequence ov7740_vga[] = {
159 {REG_HOUTSIZE, 0xa0},
160 {REG_VOUTSIZE, 0xf0},
162 {REG_OUTSIZE_LSB, 0x0},
260 static const struct ov7740_framesize ov7740_framesizes[] = {
263 .height = VGA_HEIGHT,
265 .reg_num = ARRAY_SIZE(ov7740_vga),
269 #ifdef CONFIG_VIDEO_ADV_DEBUG
270 static int ov7740_get_register(struct v4l2_subdev *sd,
271 struct v4l2_dbg_register *reg)
273 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
274 struct regmap *regmap = ov7740->regmap;
275 unsigned int val = 0;
278 ret = regmap_read(regmap, reg->reg & 0xff, &val);
285 static int ov7740_set_register(struct v4l2_subdev *sd,
286 const struct v4l2_dbg_register *reg)
288 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
289 struct regmap *regmap = ov7740->regmap;
291 regmap_write(regmap, reg->reg & 0xff, reg->val & 0xff);
297 static int ov7740_set_power(struct ov7740 *ov7740, int on)
302 ret = clk_prepare_enable(ov7740->xvclk);
306 if (ov7740->pwdn_gpio)
307 gpiod_direction_output(ov7740->pwdn_gpio, 0);
309 if (ov7740->resetb_gpio) {
310 gpiod_set_value(ov7740->resetb_gpio, 1);
311 usleep_range(500, 1000);
312 gpiod_set_value(ov7740->resetb_gpio, 0);
313 usleep_range(3000, 5000);
316 clk_disable_unprepare(ov7740->xvclk);
318 if (ov7740->pwdn_gpio)
319 gpiod_direction_output(ov7740->pwdn_gpio, 0);
325 static struct v4l2_subdev_core_ops ov7740_subdev_core_ops = {
326 .log_status = v4l2_ctrl_subdev_log_status,
327 #ifdef CONFIG_VIDEO_ADV_DEBUG
328 .g_register = ov7740_get_register,
329 .s_register = ov7740_set_register,
331 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
332 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
335 static int ov7740_set_white_balance(struct ov7740 *ov7740, int awb)
337 struct regmap *regmap = ov7740->regmap;
341 ret = regmap_read(regmap, REG_ISP_CTRL00, &value);
344 value |= (ISPCTRL00_AWB_EN | ISPCTRL00_AWB_GAIN_EN);
346 value &= ~(ISPCTRL00_AWB_EN | ISPCTRL00_AWB_GAIN_EN);
347 ret = regmap_write(regmap, REG_ISP_CTRL00, value);
353 ret = regmap_write(regmap, REG_BGAIN,
354 ov7740->blue_balance->val);
358 ret = regmap_write(regmap, REG_RGAIN, ov7740->red_balance->val);
366 static int ov7740_set_saturation(struct regmap *regmap, int value)
370 ret = regmap_write(regmap, REG_USAT, (unsigned char)value);
374 return regmap_write(regmap, REG_VSAT, (unsigned char)value);
377 static int ov7740_set_gain(struct regmap *regmap, int value)
381 ret = regmap_write(regmap, REG_GAIN, value & 0xff);
385 ret = regmap_update_bits(regmap, REG_CTRL15,
386 REG15_GAIN_MSB, (value >> 8) & 0x3);
388 ret = regmap_update_bits(regmap, REG_REG13, REG13_AGC_EN, 0);
393 static int ov7740_set_autogain(struct regmap *regmap, int value)
398 ret = regmap_read(regmap, REG_REG13, ®);
404 reg &= ~REG13_AGC_EN;
405 return regmap_write(regmap, REG_REG13, reg);
408 static int ov7740_set_brightness(struct regmap *regmap, int value)
410 /* Turn off AEC/AGC */
411 regmap_update_bits(regmap, REG_REG13, REG13_AEC_EN, 0);
412 regmap_update_bits(regmap, REG_REG13, REG13_AGC_EN, 0);
415 regmap_write(regmap, REG_YBRIGHT, (unsigned char)value);
416 regmap_update_bits(regmap, REG_SGNSET, SGNSET_YBRIGHT_MASK, 0);
418 regmap_write(regmap, REG_YBRIGHT, (unsigned char)(-value));
419 regmap_update_bits(regmap, REG_SGNSET, SGNSET_YBRIGHT_MASK, 1);
425 static int ov7740_set_contrast(struct regmap *regmap, int value)
427 return regmap_write(regmap, REG_YGAIN, (unsigned char)value);
430 static int ov7740_get_gain(struct ov7740 *ov7740, struct v4l2_ctrl *ctrl)
432 struct regmap *regmap = ov7740->regmap;
433 unsigned int value0, value1;
439 ret = regmap_read(regmap, REG_GAIN, &value0);
442 ret = regmap_read(regmap, REG_CTRL15, &value1);
446 ov7740->gain->val = (value1 << 8) | (value0 & 0xff);
451 static int ov7740_set_exp(struct regmap *regmap, int value)
455 /* Turn off AEC/AGC */
456 ret = regmap_update_bits(regmap, REG_REG13,
457 REG13_AEC_EN | REG13_AGC_EN, 0);
461 ret = regmap_write(regmap, REG_AEC, (unsigned char)value);
465 return regmap_write(regmap, REG_HAEC, (unsigned char)(value >> 8));
468 static int ov7740_set_autoexp(struct regmap *regmap,
469 enum v4l2_exposure_auto_type value)
474 ret = regmap_read(regmap, REG_REG13, ®);
476 if (value == V4L2_EXPOSURE_AUTO)
477 reg |= (REG13_AEC_EN | REG13_AGC_EN);
479 reg &= ~(REG13_AEC_EN | REG13_AGC_EN);
480 ret = regmap_write(regmap, REG_REG13, reg);
487 static int ov7740_get_volatile_ctrl(struct v4l2_ctrl *ctrl)
489 struct ov7740 *ov7740 = container_of(ctrl->handler,
490 struct ov7740, ctrl_handler);
494 case V4L2_CID_AUTOGAIN:
495 ret = ov7740_get_gain(ov7740, ctrl);
504 static int ov7740_set_ctrl(struct v4l2_ctrl *ctrl)
506 struct ov7740 *ov7740 = container_of(ctrl->handler,
507 struct ov7740, ctrl_handler);
508 struct i2c_client *client = v4l2_get_subdevdata(&ov7740->subdev);
509 struct regmap *regmap = ov7740->regmap;
513 if (pm_runtime_get_if_in_use(&client->dev) <= 0)
517 case V4L2_CID_AUTO_WHITE_BALANCE:
518 ret = ov7740_set_white_balance(ov7740, ctrl->val);
520 case V4L2_CID_SATURATION:
521 ret = ov7740_set_saturation(regmap, ctrl->val);
523 case V4L2_CID_BRIGHTNESS:
524 ret = ov7740_set_brightness(regmap, ctrl->val);
526 case V4L2_CID_CONTRAST:
527 ret = ov7740_set_contrast(regmap, ctrl->val);
530 ret = regmap_update_bits(regmap, REG_REG0C,
531 REG0C_IMG_FLIP, val);
534 val = ctrl->val ? REG0C_IMG_MIRROR : 0x00;
535 ret = regmap_update_bits(regmap, REG_REG0C,
536 REG0C_IMG_MIRROR, val);
538 case V4L2_CID_AUTOGAIN:
540 return ov7740_set_gain(regmap, ov7740->gain->val);
542 ret = ov7740_set_autogain(regmap, ctrl->val);
545 case V4L2_CID_EXPOSURE_AUTO:
546 if (ctrl->val == V4L2_EXPOSURE_MANUAL)
547 return ov7740_set_exp(regmap, ov7740->exposure->val);
549 ret = ov7740_set_autoexp(regmap, ctrl->val);
556 pm_runtime_put(&client->dev);
561 static const struct v4l2_ctrl_ops ov7740_ctrl_ops = {
562 .g_volatile_ctrl = ov7740_get_volatile_ctrl,
563 .s_ctrl = ov7740_set_ctrl,
566 static int ov7740_start_streaming(struct ov7740 *ov7740)
571 ret = regmap_multi_reg_write(ov7740->regmap,
573 ov7740->fmt->reg_num);
578 if (ov7740->frmsize) {
579 ret = regmap_multi_reg_write(ov7740->regmap,
580 ov7740->frmsize->regs,
581 ov7740->frmsize->reg_num);
586 return __v4l2_ctrl_handler_setup(ov7740->subdev.ctrl_handler);
589 static int ov7740_set_stream(struct v4l2_subdev *sd, int enable)
591 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
592 struct i2c_client *client = v4l2_get_subdevdata(sd);
595 mutex_lock(&ov7740->mutex);
596 if (ov7740->streaming == enable) {
597 mutex_unlock(&ov7740->mutex);
602 ret = pm_runtime_get_sync(&client->dev);
604 pm_runtime_put_noidle(&client->dev);
608 ret = ov7740_start_streaming(ov7740);
612 pm_runtime_put(&client->dev);
615 ov7740->streaming = enable;
617 mutex_unlock(&ov7740->mutex);
621 pm_runtime_put(&client->dev);
623 mutex_unlock(&ov7740->mutex);
627 static int ov7740_g_frame_interval(struct v4l2_subdev *sd,
628 struct v4l2_subdev_frame_interval *ival)
630 struct v4l2_fract *tpf = &ival->interval;
634 tpf->denominator = 60;
639 static int ov7740_s_frame_interval(struct v4l2_subdev *sd,
640 struct v4l2_subdev_frame_interval *ival)
642 struct v4l2_fract *tpf = &ival->interval;
646 tpf->denominator = 60;
651 static struct v4l2_subdev_video_ops ov7740_subdev_video_ops = {
652 .s_stream = ov7740_set_stream,
653 .s_frame_interval = ov7740_s_frame_interval,
654 .g_frame_interval = ov7740_g_frame_interval,
657 static const struct reg_sequence ov7740_format_yuyv[] = {
664 static const struct reg_sequence ov7740_format_bggr8[] = {
670 static const struct ov7740_pixfmt ov7740_formats[] = {
672 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
673 .colorspace = V4L2_COLORSPACE_SRGB,
674 .regs = ov7740_format_yuyv,
675 .reg_num = ARRAY_SIZE(ov7740_format_yuyv),
678 .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
679 .colorspace = V4L2_COLORSPACE_SRGB,
680 .regs = ov7740_format_bggr8,
681 .reg_num = ARRAY_SIZE(ov7740_format_bggr8),
684 #define N_OV7740_FMTS ARRAY_SIZE(ov7740_formats)
686 static int ov7740_enum_mbus_code(struct v4l2_subdev *sd,
687 struct v4l2_subdev_pad_config *cfg,
688 struct v4l2_subdev_mbus_code_enum *code)
690 if (code->pad || code->index >= N_OV7740_FMTS)
693 code->code = ov7740_formats[code->index].mbus_code;
698 static int ov7740_enum_frame_interval(struct v4l2_subdev *sd,
699 struct v4l2_subdev_pad_config *cfg,
700 struct v4l2_subdev_frame_interval_enum *fie)
708 if ((fie->width != VGA_WIDTH) || (fie->height != VGA_HEIGHT))
711 fie->interval.numerator = 1;
712 fie->interval.denominator = 60;
717 static int ov7740_enum_frame_size(struct v4l2_subdev *sd,
718 struct v4l2_subdev_pad_config *cfg,
719 struct v4l2_subdev_frame_size_enum *fse)
727 fse->min_width = fse->max_width = VGA_WIDTH;
728 fse->min_height = fse->max_height = VGA_HEIGHT;
733 static int ov7740_try_fmt_internal(struct v4l2_subdev *sd,
734 struct v4l2_mbus_framefmt *fmt,
735 const struct ov7740_pixfmt **ret_fmt,
736 const struct ov7740_framesize **ret_frmsize)
738 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
739 const struct ov7740_framesize *fsize = &ov7740_framesizes[0];
742 for (index = 0; index < N_OV7740_FMTS; index++) {
743 if (ov7740_formats[index].mbus_code == fmt->code)
746 if (index >= N_OV7740_FMTS) {
747 /* default to first format */
749 fmt->code = ov7740_formats[0].mbus_code;
752 *ret_fmt = ov7740_formats + index;
754 for (i = 0; i < ARRAY_SIZE(ov7740_framesizes); i++) {
755 if ((fsize->width >= fmt->width) &&
756 (fsize->height >= fmt->height)) {
757 fmt->width = fsize->width;
758 fmt->height = fsize->height;
765 if (ret_frmsize != NULL)
766 *ret_frmsize = fsize;
768 fmt->field = V4L2_FIELD_NONE;
769 fmt->colorspace = ov7740_formats[index].colorspace;
771 ov7740->format = *fmt;
776 static int ov7740_set_fmt(struct v4l2_subdev *sd,
777 struct v4l2_subdev_pad_config *cfg,
778 struct v4l2_subdev_format *format)
780 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
781 const struct ov7740_pixfmt *ovfmt;
782 const struct ov7740_framesize *fsize;
783 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
784 struct v4l2_mbus_framefmt *mbus_fmt;
788 mutex_lock(&ov7740->mutex);
794 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
795 ret = ov7740_try_fmt_internal(sd, &format->format, NULL, NULL);
798 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
799 mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
800 *mbus_fmt = format->format;
802 mutex_unlock(&ov7740->mutex);
810 ret = ov7740_try_fmt_internal(sd, &format->format, &ovfmt, &fsize);
815 ov7740->frmsize = fsize;
817 mutex_unlock(&ov7740->mutex);
821 mutex_unlock(&ov7740->mutex);
825 static int ov7740_get_fmt(struct v4l2_subdev *sd,
826 struct v4l2_subdev_pad_config *cfg,
827 struct v4l2_subdev_format *format)
829 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
830 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
831 struct v4l2_mbus_framefmt *mbus_fmt;
835 mutex_lock(&ov7740->mutex);
836 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
837 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
838 mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
839 format->format = *mbus_fmt;
845 format->format = ov7740->format;
847 mutex_unlock(&ov7740->mutex);
852 static const struct v4l2_subdev_pad_ops ov7740_subdev_pad_ops = {
853 .enum_frame_interval = ov7740_enum_frame_interval,
854 .enum_frame_size = ov7740_enum_frame_size,
855 .enum_mbus_code = ov7740_enum_mbus_code,
856 .get_fmt = ov7740_get_fmt,
857 .set_fmt = ov7740_set_fmt,
860 static const struct v4l2_subdev_ops ov7740_subdev_ops = {
861 .core = &ov7740_subdev_core_ops,
862 .video = &ov7740_subdev_video_ops,
863 .pad = &ov7740_subdev_pad_ops,
866 static void ov7740_get_default_format(struct v4l2_subdev *sd,
867 struct v4l2_mbus_framefmt *format)
869 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
871 format->width = ov7740->frmsize->width;
872 format->height = ov7740->frmsize->height;
873 format->colorspace = ov7740->fmt->colorspace;
874 format->code = ov7740->fmt->mbus_code;
875 format->field = V4L2_FIELD_NONE;
878 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
879 static int ov7740_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
881 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
882 struct v4l2_mbus_framefmt *format =
883 v4l2_subdev_get_try_format(sd, fh->pad, 0);
885 mutex_lock(&ov7740->mutex);
886 ov7740_get_default_format(sd, format);
887 mutex_unlock(&ov7740->mutex);
892 static const struct v4l2_subdev_internal_ops ov7740_subdev_internal_ops = {
897 static int ov7740_probe_dt(struct i2c_client *client,
898 struct ov7740 *ov7740)
900 ov7740->resetb_gpio = devm_gpiod_get_optional(&client->dev, "reset",
902 if (IS_ERR(ov7740->resetb_gpio)) {
903 dev_info(&client->dev, "can't get %s GPIO\n", "reset");
904 return PTR_ERR(ov7740->resetb_gpio);
907 ov7740->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
909 if (IS_ERR(ov7740->pwdn_gpio)) {
910 dev_info(&client->dev, "can't get %s GPIO\n", "powerdown");
911 return PTR_ERR(ov7740->pwdn_gpio);
917 static int ov7740_detect(struct ov7740 *ov7740)
919 struct regmap *regmap = ov7740->regmap;
920 unsigned int midh, midl, pidh, pidl;
923 ret = regmap_read(regmap, REG_MIDH, &midh);
929 ret = regmap_read(regmap, REG_MIDL, &midl);
935 ret = regmap_read(regmap, REG_PIDH, &pidh);
941 ret = regmap_read(regmap, REG_PIDL, &pidl);
944 if ((pidl != 0x40) && (pidl != 0x41) && (pidl != 0x42))
950 static int ov7740_init_controls(struct ov7740 *ov7740)
952 struct i2c_client *client = v4l2_get_subdevdata(&ov7740->subdev);
953 struct v4l2_ctrl_handler *ctrl_hdlr = &ov7740->ctrl_handler;
956 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
960 ctrl_hdlr->lock = &ov7740->mutex;
961 ov7740->auto_wb = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
962 V4L2_CID_AUTO_WHITE_BALANCE,
964 ov7740->blue_balance = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
965 V4L2_CID_BLUE_BALANCE,
967 ov7740->red_balance = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
968 V4L2_CID_RED_BALANCE,
971 ov7740->brightness = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
974 ov7740->contrast = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
977 ov7740->saturation = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
978 V4L2_CID_SATURATION, 0, 256, 1, 0x80);
979 ov7740->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
980 V4L2_CID_HFLIP, 0, 1, 1, 0);
981 ov7740->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
982 V4L2_CID_VFLIP, 0, 1, 1, 0);
984 ov7740->gain = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
985 V4L2_CID_GAIN, 0, 1023, 1, 500);
987 ov7740->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
989 ov7740->auto_gain = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
990 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
992 ov7740->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov7740_ctrl_ops,
993 V4L2_CID_EXPOSURE, 0, 65535, 1, 500);
994 if (ov7740->exposure)
995 ov7740->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
997 ov7740->auto_exposure = v4l2_ctrl_new_std_menu(ctrl_hdlr,
999 V4L2_CID_EXPOSURE_AUTO,
1000 V4L2_EXPOSURE_MANUAL, 0,
1001 V4L2_EXPOSURE_AUTO);
1003 v4l2_ctrl_auto_cluster(3, &ov7740->auto_wb, 0, false);
1004 v4l2_ctrl_auto_cluster(2, &ov7740->auto_gain, 0, true);
1005 v4l2_ctrl_auto_cluster(2, &ov7740->auto_exposure,
1006 V4L2_EXPOSURE_MANUAL, false);
1007 v4l2_ctrl_cluster(2, &ov7740->hflip);
1009 if (ctrl_hdlr->error) {
1010 ret = ctrl_hdlr->error;
1011 dev_err(&client->dev, "controls initialisation failed (%d)\n",
1016 ret = v4l2_ctrl_handler_setup(ctrl_hdlr);
1018 dev_err(&client->dev, "%s control init failed (%d)\n",
1023 ov7740->subdev.ctrl_handler = ctrl_hdlr;
1027 v4l2_ctrl_handler_free(ctrl_hdlr);
1028 mutex_destroy(&ov7740->mutex);
1032 static void ov7740_free_controls(struct ov7740 *ov7740)
1034 v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
1035 mutex_destroy(&ov7740->mutex);
1038 #define OV7740_MAX_REGISTER 0xff
1039 static const struct regmap_config ov7740_regmap_config = {
1042 .max_register = OV7740_MAX_REGISTER,
1045 static int ov7740_probe(struct i2c_client *client,
1046 const struct i2c_device_id *id)
1048 struct ov7740 *ov7740;
1049 struct v4l2_subdev *sd;
1052 if (!i2c_check_functionality(client->adapter,
1053 I2C_FUNC_SMBUS_BYTE_DATA)) {
1054 dev_err(&client->dev,
1055 "OV7740: I2C-Adapter doesn't support SMBUS\n");
1059 ov7740 = devm_kzalloc(&client->dev, sizeof(*ov7740), GFP_KERNEL);
1063 ov7740->xvclk = devm_clk_get(&client->dev, "xvclk");
1064 if (IS_ERR(ov7740->xvclk)) {
1065 ret = PTR_ERR(ov7740->xvclk);
1066 dev_err(&client->dev,
1067 "OV7740: fail to get xvclk: %d\n", ret);
1071 ret = ov7740_probe_dt(client, ov7740);
1075 ov7740->regmap = devm_regmap_init_i2c(client, &ov7740_regmap_config);
1076 if (IS_ERR(ov7740->regmap)) {
1077 ret = PTR_ERR(ov7740->regmap);
1078 dev_err(&client->dev, "Failed to allocate register map: %d\n",
1083 sd = &ov7740->subdev;
1084 client->flags |= I2C_CLIENT_SCCB;
1085 v4l2_i2c_subdev_init(sd, client, &ov7740_subdev_ops);
1087 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1088 sd->internal_ops = &ov7740_subdev_internal_ops;
1089 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
1092 #if defined(CONFIG_MEDIA_CONTROLLER)
1093 ov7740->pad.flags = MEDIA_PAD_FL_SOURCE;
1094 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1095 ret = media_entity_pads_init(&sd->entity, 1, &ov7740->pad);
1100 ret = ov7740_set_power(ov7740, 1);
1104 ret = ov7740_detect(ov7740);
1108 mutex_init(&ov7740->mutex);
1110 ret = ov7740_init_controls(ov7740);
1112 goto error_init_controls;
1114 v4l_info(client, "chip found @ 0x%02x (%s)\n",
1115 client->addr << 1, client->adapter->name);
1117 ov7740->fmt = &ov7740_formats[0];
1118 ov7740->frmsize = &ov7740_framesizes[0];
1120 ov7740_get_default_format(sd, &ov7740->format);
1122 ret = v4l2_async_register_subdev(sd);
1124 goto error_async_register;
1126 pm_runtime_set_active(&client->dev);
1127 pm_runtime_enable(&client->dev);
1128 pm_runtime_idle(&client->dev);
1132 error_async_register:
1133 v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
1134 error_init_controls:
1135 ov7740_free_controls(ov7740);
1137 ov7740_set_power(ov7740, 0);
1138 media_entity_cleanup(&ov7740->subdev.entity);
1143 static int ov7740_remove(struct i2c_client *client)
1145 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1146 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
1148 mutex_destroy(&ov7740->mutex);
1149 v4l2_ctrl_handler_free(ov7740->subdev.ctrl_handler);
1150 media_entity_cleanup(&ov7740->subdev.entity);
1151 v4l2_async_unregister_subdev(sd);
1152 ov7740_free_controls(ov7740);
1154 pm_runtime_get_sync(&client->dev);
1155 pm_runtime_disable(&client->dev);
1156 pm_runtime_set_suspended(&client->dev);
1157 pm_runtime_put_noidle(&client->dev);
1159 ov7740_set_power(ov7740, 0);
1163 static int __maybe_unused ov7740_runtime_suspend(struct device *dev)
1165 struct i2c_client *client = to_i2c_client(dev);
1166 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1167 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
1169 ov7740_set_power(ov7740, 0);
1174 static int __maybe_unused ov7740_runtime_resume(struct device *dev)
1176 struct i2c_client *client = to_i2c_client(dev);
1177 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1178 struct ov7740 *ov7740 = container_of(sd, struct ov7740, subdev);
1180 return ov7740_set_power(ov7740, 1);
1183 static const struct i2c_device_id ov7740_id[] = {
1187 MODULE_DEVICE_TABLE(i2c, ov7740_id);
1189 static const struct dev_pm_ops ov7740_pm_ops = {
1190 SET_RUNTIME_PM_OPS(ov7740_runtime_suspend, ov7740_runtime_resume, NULL)
1193 static const struct of_device_id ov7740_of_match[] = {
1194 {.compatible = "ovti,ov7740", },
1197 MODULE_DEVICE_TABLE(of, ov7740_of_match);
1199 static struct i2c_driver ov7740_i2c_driver = {
1202 .pm = &ov7740_pm_ops,
1203 .of_match_table = of_match_ptr(ov7740_of_match),
1205 .probe = ov7740_probe,
1206 .remove = ov7740_remove,
1207 .id_table = ov7740_id,
1209 module_i2c_driver(ov7740_i2c_driver);
1211 MODULE_DESCRIPTION("The V4L2 driver for Omnivision 7740 sensor");
1212 MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
1213 MODULE_LICENSE("GPL v2");