1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
8 #include <linux/clk-provider.h>
9 #include <linux/clkdev.h>
10 #include <linux/ctype.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-fwnode.h>
26 #include <media/v4l2-subdev.h>
28 /* min/typical/max system clock (xclk) frequencies */
29 #define OV5640_XCLK_MIN 6000000
30 #define OV5640_XCLK_MAX 54000000
32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
34 #define OV5640_REG_SYS_RESET02 0x3002
35 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
36 #define OV5640_REG_SYS_CTRL0 0x3008
37 #define OV5640_REG_CHIP_ID 0x300a
38 #define OV5640_REG_IO_MIPI_CTRL00 0x300e
39 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
40 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
41 #define OV5640_REG_PAD_OUTPUT00 0x3019
42 #define OV5640_REG_SYSTEM_CONTROL1 0x302e
43 #define OV5640_REG_SC_PLL_CTRL0 0x3034
44 #define OV5640_REG_SC_PLL_CTRL1 0x3035
45 #define OV5640_REG_SC_PLL_CTRL2 0x3036
46 #define OV5640_REG_SC_PLL_CTRL3 0x3037
47 #define OV5640_REG_SLAVE_ID 0x3100
48 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103
49 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
50 #define OV5640_REG_AWB_R_GAIN 0x3400
51 #define OV5640_REG_AWB_G_GAIN 0x3402
52 #define OV5640_REG_AWB_B_GAIN 0x3404
53 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406
54 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
55 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
56 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
57 #define OV5640_REG_AEC_PK_MANUAL 0x3503
58 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
59 #define OV5640_REG_AEC_PK_VTS 0x350c
60 #define OV5640_REG_TIMING_DVPHO 0x3808
61 #define OV5640_REG_TIMING_DVPVO 0x380a
62 #define OV5640_REG_TIMING_HTS 0x380c
63 #define OV5640_REG_TIMING_VTS 0x380e
64 #define OV5640_REG_TIMING_TC_REG20 0x3820
65 #define OV5640_REG_TIMING_TC_REG21 0x3821
66 #define OV5640_REG_AEC_CTRL00 0x3a00
67 #define OV5640_REG_AEC_B50_STEP 0x3a08
68 #define OV5640_REG_AEC_B60_STEP 0x3a0a
69 #define OV5640_REG_AEC_CTRL0D 0x3a0d
70 #define OV5640_REG_AEC_CTRL0E 0x3a0e
71 #define OV5640_REG_AEC_CTRL0F 0x3a0f
72 #define OV5640_REG_AEC_CTRL10 0x3a10
73 #define OV5640_REG_AEC_CTRL11 0x3a11
74 #define OV5640_REG_AEC_CTRL1B 0x3a1b
75 #define OV5640_REG_AEC_CTRL1E 0x3a1e
76 #define OV5640_REG_AEC_CTRL1F 0x3a1f
77 #define OV5640_REG_HZ5060_CTRL00 0x3c00
78 #define OV5640_REG_HZ5060_CTRL01 0x3c01
79 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
80 #define OV5640_REG_FRAME_CTRL01 0x4202
81 #define OV5640_REG_FORMAT_CONTROL00 0x4300
82 #define OV5640_REG_VFIFO_HSIZE 0x4602
83 #define OV5640_REG_VFIFO_VSIZE 0x4604
84 #define OV5640_REG_JPG_MODE_SELECT 0x4713
85 #define OV5640_REG_POLARITY_CTRL00 0x4740
86 #define OV5640_REG_MIPI_CTRL00 0x4800
87 #define OV5640_REG_DEBUG_MODE 0x4814
88 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
89 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
90 #define OV5640_REG_SDE_CTRL0 0x5580
91 #define OV5640_REG_SDE_CTRL1 0x5581
92 #define OV5640_REG_SDE_CTRL3 0x5583
93 #define OV5640_REG_SDE_CTRL4 0x5584
94 #define OV5640_REG_SDE_CTRL5 0x5585
95 #define OV5640_REG_AVG_READOUT 0x56a1
98 OV5640_MODE_QCIF_176_144 = 0,
99 OV5640_MODE_QVGA_320_240,
100 OV5640_MODE_VGA_640_480,
101 OV5640_MODE_NTSC_720_480,
102 OV5640_MODE_PAL_720_576,
103 OV5640_MODE_XGA_1024_768,
104 OV5640_MODE_720P_1280_720,
105 OV5640_MODE_1080P_1920_1080,
106 OV5640_MODE_QSXGA_2592_1944,
110 enum ov5640_frame_rate {
114 OV5640_NUM_FRAMERATES,
117 enum ov5640_format_mux {
118 OV5640_FMT_MUX_YUV422 = 0,
120 OV5640_FMT_MUX_DITHER,
121 OV5640_FMT_MUX_RAW_DPC,
122 OV5640_FMT_MUX_SNR_RAW,
123 OV5640_FMT_MUX_RAW_CIP,
126 struct ov5640_pixfmt {
131 static const struct ov5640_pixfmt ov5640_formats[] = {
132 { MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, },
133 { MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, },
134 { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, },
135 { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, },
136 { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, },
137 { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, },
138 { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, },
139 { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, },
140 { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, },
144 * FIXME: remove this when a subdev API becomes available
145 * to set the MIPI CSI-2 virtual channel.
147 static unsigned int virtual_channel;
148 module_param(virtual_channel, uint, 0444);
149 MODULE_PARM_DESC(virtual_channel,
150 "MIPI CSI-2 virtual channel (0..3), default 0");
152 static const int ov5640_framerates[] = {
153 [OV5640_15_FPS] = 15,
154 [OV5640_30_FPS] = 30,
155 [OV5640_60_FPS] = 60,
158 /* regulator supplies */
159 static const char * const ov5640_supply_name[] = {
160 "DOVDD", /* Digital I/O (1.8V) supply */
161 "DVDD", /* Digital Core (1.5V) supply */
162 "AVDD", /* Analog (2.8V) supply */
165 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
168 * Image size under 1280 * 960 are SUBSAMPLING
169 * Image size upper 1280 * 960 are SCALING
171 enum ov5640_downsize_mode {
183 struct ov5640_mode_info {
184 enum ov5640_mode_id id;
185 enum ov5640_downsize_mode dn_mode;
190 const struct reg_value *reg_data;
194 struct ov5640_ctrls {
195 struct v4l2_ctrl_handler handler;
197 struct v4l2_ctrl *auto_exp;
198 struct v4l2_ctrl *exposure;
201 struct v4l2_ctrl *auto_wb;
202 struct v4l2_ctrl *blue_balance;
203 struct v4l2_ctrl *red_balance;
206 struct v4l2_ctrl *auto_gain;
207 struct v4l2_ctrl *gain;
209 struct v4l2_ctrl *brightness;
210 struct v4l2_ctrl *light_freq;
211 struct v4l2_ctrl *saturation;
212 struct v4l2_ctrl *contrast;
213 struct v4l2_ctrl *hue;
214 struct v4l2_ctrl *test_pattern;
215 struct v4l2_ctrl *hflip;
216 struct v4l2_ctrl *vflip;
220 struct i2c_client *i2c_client;
221 struct v4l2_subdev sd;
222 struct media_pad pad;
223 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
224 struct clk *xclk; /* system clock to OV5640 */
227 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
228 struct gpio_desc *reset_gpio;
229 struct gpio_desc *pwdn_gpio;
232 /* lock to protect all members below */
237 struct v4l2_mbus_framefmt fmt;
238 bool pending_fmt_change;
240 const struct ov5640_mode_info *current_mode;
241 const struct ov5640_mode_info *last_mode;
242 enum ov5640_frame_rate current_fr;
243 struct v4l2_fract frame_interval;
245 struct ov5640_ctrls ctrls;
247 u32 prev_sysclk, prev_hts;
248 u32 ae_low, ae_high, ae_target;
250 bool pending_mode_change;
254 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
256 return container_of(sd, struct ov5640_dev, sd);
259 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
261 return &container_of(ctrl->handler, struct ov5640_dev,
266 * FIXME: all of these register tables are likely filled with
267 * entries that set the register to their power-on default values,
268 * and which are otherwise not touched by this driver. Those entries
269 * should be identified and removed to speed register load time
272 /* YUV422 UYVY VGA@30fps */
273 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
274 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
275 {0x3103, 0x03, 0, 0}, {0x3017, 0x00, 0, 0}, {0x3018, 0x00, 0, 0},
276 {0x3630, 0x36, 0, 0},
277 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
278 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
279 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
280 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
281 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
282 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
283 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
284 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
285 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
286 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
287 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
288 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
289 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
290 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
291 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
292 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
293 {0x3810, 0x00, 0, 0},
294 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
295 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
296 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
297 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
298 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
299 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
300 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
301 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
302 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
303 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
304 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
305 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
306 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
307 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
308 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
309 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
310 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
311 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
312 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
313 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
314 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
315 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
316 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
317 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
318 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
319 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
320 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
321 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
322 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
323 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
324 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
325 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
326 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
327 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
328 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
329 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
330 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
331 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
332 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
333 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
334 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
335 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
336 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
337 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
338 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
339 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
340 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
341 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
342 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
343 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
344 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
345 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
346 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
347 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
348 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
349 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
350 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
351 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
352 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
353 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
354 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
355 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
358 static const struct reg_value ov5640_setting_VGA_640_480[] = {
359 {0x3c07, 0x08, 0, 0},
360 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
361 {0x3814, 0x31, 0, 0},
362 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
363 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
364 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
365 {0x3810, 0x00, 0, 0},
366 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
367 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
368 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
369 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
370 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
371 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
372 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
373 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
374 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
377 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
378 {0x3c07, 0x08, 0, 0},
379 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
380 {0x3814, 0x31, 0, 0},
381 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
382 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
383 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
384 {0x3810, 0x00, 0, 0},
385 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
386 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
387 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
388 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
389 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
390 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
391 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
392 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
393 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
396 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
397 {0x3c07, 0x08, 0, 0},
398 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
399 {0x3814, 0x31, 0, 0},
400 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
401 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
402 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
403 {0x3810, 0x00, 0, 0},
404 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
405 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
406 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
407 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
408 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
409 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
410 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
411 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
412 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
415 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
416 {0x3c07, 0x08, 0, 0},
417 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
418 {0x3814, 0x31, 0, 0},
419 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
420 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
421 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
422 {0x3810, 0x00, 0, 0},
423 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
424 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
425 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
426 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
427 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
428 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
429 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
430 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
431 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
434 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
435 {0x3c07, 0x08, 0, 0},
436 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
437 {0x3814, 0x31, 0, 0},
438 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
439 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
440 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
441 {0x3810, 0x00, 0, 0},
442 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
443 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
444 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
445 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
446 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
447 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
448 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
449 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
450 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
453 static const struct reg_value ov5640_setting_PAL_720_576[] = {
454 {0x3c07, 0x08, 0, 0},
455 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
456 {0x3814, 0x31, 0, 0},
457 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
458 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
459 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
460 {0x3810, 0x00, 0, 0},
461 {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
462 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
463 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
464 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
465 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
466 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
467 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
468 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
469 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
472 static const struct reg_value ov5640_setting_720P_1280_720[] = {
473 {0x3c07, 0x07, 0, 0},
474 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
475 {0x3814, 0x31, 0, 0},
476 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
477 {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
478 {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
479 {0x3810, 0x00, 0, 0},
480 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
481 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
482 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
483 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
484 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
485 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
486 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
487 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
488 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
491 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
492 {0x3008, 0x42, 0, 0},
493 {0x3c07, 0x08, 0, 0},
494 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
495 {0x3814, 0x11, 0, 0},
496 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
497 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
498 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
499 {0x3810, 0x00, 0, 0},
500 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
501 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
502 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
503 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
504 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
505 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
506 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
507 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
508 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
509 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
510 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
511 {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
512 {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
513 {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
514 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
515 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
516 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
517 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
518 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
519 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
520 {0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0},
523 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
524 {0x3c07, 0x08, 0, 0},
525 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
526 {0x3814, 0x11, 0, 0},
527 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
528 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
529 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
530 {0x3810, 0x00, 0, 0},
531 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
532 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
533 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
534 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
535 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
536 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
537 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
538 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
539 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
542 /* power-on sensor init reg table */
543 static const struct ov5640_mode_info ov5640_mode_init_data = {
544 0, SUBSAMPLING, 640, 1896, 480, 984,
545 ov5640_init_setting_30fps_VGA,
546 ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
549 static const struct ov5640_mode_info
550 ov5640_mode_data[OV5640_NUM_MODES] = {
551 {OV5640_MODE_QCIF_176_144, SUBSAMPLING,
553 ov5640_setting_QCIF_176_144,
554 ARRAY_SIZE(ov5640_setting_QCIF_176_144)},
555 {OV5640_MODE_QVGA_320_240, SUBSAMPLING,
557 ov5640_setting_QVGA_320_240,
558 ARRAY_SIZE(ov5640_setting_QVGA_320_240)},
559 {OV5640_MODE_VGA_640_480, SUBSAMPLING,
560 640, 1896, 480, 1080,
561 ov5640_setting_VGA_640_480,
562 ARRAY_SIZE(ov5640_setting_VGA_640_480)},
563 {OV5640_MODE_NTSC_720_480, SUBSAMPLING,
565 ov5640_setting_NTSC_720_480,
566 ARRAY_SIZE(ov5640_setting_NTSC_720_480)},
567 {OV5640_MODE_PAL_720_576, SUBSAMPLING,
569 ov5640_setting_PAL_720_576,
570 ARRAY_SIZE(ov5640_setting_PAL_720_576)},
571 {OV5640_MODE_XGA_1024_768, SUBSAMPLING,
572 1024, 1896, 768, 1080,
573 ov5640_setting_XGA_1024_768,
574 ARRAY_SIZE(ov5640_setting_XGA_1024_768)},
575 {OV5640_MODE_720P_1280_720, SUBSAMPLING,
576 1280, 1892, 720, 740,
577 ov5640_setting_720P_1280_720,
578 ARRAY_SIZE(ov5640_setting_720P_1280_720)},
579 {OV5640_MODE_1080P_1920_1080, SCALING,
580 1920, 2500, 1080, 1120,
581 ov5640_setting_1080P_1920_1080,
582 ARRAY_SIZE(ov5640_setting_1080P_1920_1080)},
583 {OV5640_MODE_QSXGA_2592_1944, SCALING,
584 2592, 2844, 1944, 1968,
585 ov5640_setting_QSXGA_2592_1944,
586 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944)},
589 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
591 struct i2c_client *client = sensor->i2c_client;
596 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
599 buf[0] = OV5640_REG_SLAVE_ID >> 8;
600 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
601 buf[2] = client->addr << 1;
603 msg.addr = OV5640_DEFAULT_SLAVE_ID;
606 msg.len = sizeof(buf);
608 ret = i2c_transfer(client->adapter, &msg, 1);
610 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
617 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
619 struct i2c_client *client = sensor->i2c_client;
628 msg.addr = client->addr;
629 msg.flags = client->flags;
631 msg.len = sizeof(buf);
633 ret = i2c_transfer(client->adapter, &msg, 1);
635 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
643 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
645 struct i2c_client *client = sensor->i2c_client;
646 struct i2c_msg msg[2];
653 msg[0].addr = client->addr;
654 msg[0].flags = client->flags;
656 msg[0].len = sizeof(buf);
658 msg[1].addr = client->addr;
659 msg[1].flags = client->flags | I2C_M_RD;
663 ret = i2c_transfer(client->adapter, msg, 2);
665 dev_err(&client->dev, "%s: error: reg=%x\n",
674 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
679 ret = ov5640_read_reg(sensor, reg, &hi);
682 ret = ov5640_read_reg(sensor, reg + 1, &lo);
686 *val = ((u16)hi << 8) | (u16)lo;
690 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
694 ret = ov5640_write_reg(sensor, reg, val >> 8);
698 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
701 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
707 ret = ov5640_read_reg(sensor, reg, &readval);
715 return ov5640_write_reg(sensor, reg, val);
719 * After trying the various combinations, reading various
720 * documentations spread around the net, and from the various
721 * feedback, the clock tree is probably as follows:
727 * +->| PLL1 | - reg 0x3036, for the multiplier
728 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
730 * +->| System Clock | - reg 0x3035, bits 4-7
733 * +->| MIPI Divider | - reg 0x3035, bits 0-3
735 * | +----------------> MIPI SCLK
737 * | +->| / 2 |-------> MIPI BIT CLK
740 * +->| PLL Root Div | - reg 0x3037, bit 4
743 * +->| Bit Div | - reg 0x3035, bits 0-3
746 * +->| SCLK Div | - reg 0x3108, bits 0-1
748 * | +---------------> SCLK
750 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
752 * | +---------------> SCLK 2X
754 * +->| PCLK Div | - reg 0x3108, bits 4-5
757 * +->| P_DIV | - reg 0x3035, bits 0-3
759 * +------------> PCLK
761 * This is deviating from the datasheet at least for the register
762 * 0x3108, since it's said here that the PCLK would be clocked from
765 * There seems to be also (unverified) constraints:
766 * - the PLL pre-divider output rate should be in the 4-27MHz range
767 * - the PLL multiplier output rate should be in the 500-1000MHz range
768 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
770 * In the two latter cases, these constraints are met since our
771 * factors are hardcoded. If we were to change that, we would need to
772 * take this into account. The only varying parts are the PLL
773 * multiplier and the system clock divider, which are shared between
774 * all these clocks so won't cause any issue.
778 * This is supposed to be ranging from 1 to 8, but the value is always
779 * set to 3 in the vendor kernels.
781 #define OV5640_PLL_PREDIV 3
783 #define OV5640_PLL_MULT_MIN 4
784 #define OV5640_PLL_MULT_MAX 252
787 * This is supposed to be ranging from 1 to 16, but the value is
788 * always set to either 1 or 2 in the vendor kernels.
790 #define OV5640_SYSDIV_MIN 1
791 #define OV5640_SYSDIV_MAX 16
794 * Hardcode these values for scaler and non-scaler modes.
795 * FIXME: to be re-calcualted for 1 data lanes setups
797 #define OV5640_MIPI_DIV_PCLK 2
798 #define OV5640_MIPI_DIV_SCLK 1
801 * This is supposed to be ranging from 1 to 2, but the value is always
802 * set to 2 in the vendor kernels.
804 #define OV5640_PLL_ROOT_DIV 2
805 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
808 * We only supports 8-bit formats at the moment
810 #define OV5640_BIT_DIV 2
811 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
814 * This is supposed to be ranging from 1 to 8, but the value is always
815 * set to 2 in the vendor kernels.
817 #define OV5640_SCLK_ROOT_DIV 2
820 * This is hardcoded so that the consistency is maintained between SCLK and
823 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
826 * This is supposed to be ranging from 1 to 8, but the value is always
827 * set to 1 in the vendor kernels.
829 #define OV5640_PCLK_ROOT_DIV 1
830 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
832 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
833 u8 pll_prediv, u8 pll_mult,
836 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
838 /* PLL1 output cannot exceed 1GHz. */
839 if (sysclk / 1000000 > 1000)
842 return sysclk / sysdiv;
845 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
847 u8 *pll_prediv, u8 *pll_mult,
850 unsigned long best = ~0;
851 u8 best_sysdiv = 1, best_mult = 1;
852 u8 _sysdiv, _pll_mult;
854 for (_sysdiv = OV5640_SYSDIV_MIN;
855 _sysdiv <= OV5640_SYSDIV_MAX;
857 for (_pll_mult = OV5640_PLL_MULT_MIN;
858 _pll_mult <= OV5640_PLL_MULT_MAX;
863 * The PLL multiplier cannot be odd if above
866 if (_pll_mult > 127 && (_pll_mult % 2))
869 _rate = ov5640_compute_sys_clk(sensor,
874 * We have reached the maximum allowed PLL1 output,
881 * Prefer rates above the expected clock rate than
882 * below, even if that means being less precise.
887 if (abs(rate - _rate) < abs(rate - best)) {
889 best_sysdiv = _sysdiv;
890 best_mult = _pll_mult;
899 *sysdiv = best_sysdiv;
900 *pll_prediv = OV5640_PLL_PREDIV;
901 *pll_mult = best_mult;
907 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
908 * for the MIPI CSI-2 output.
910 * @rate: The requested bandwidth per lane in bytes per second.
911 * 'Bandwidth Per Lane' is calculated as:
912 * bpl = HTOT * VTOT * FPS * bpp / num_lanes;
914 * This function use the requested bandwidth to calculate:
915 * - sample_rate = bpl / (bpp / num_lanes);
916 * = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes);
918 * - mipi_sclk = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR)
920 * with these fixed parameters:
922 * BIT_DIVIDER = 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5);
925 * The MIPI clock generation differs for modes that use the scaler and modes
926 * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI
929 * - mipi_sclk = bpl / MIPI_DIV / 2;
932 * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated
933 * from the pixel clock, and thus:
935 * - sample_rate = bpl / (bpp / num_lanes);
936 * = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes);
937 * = bpl / (4 * MIPI_DIV / num_lanes);
938 * - MIPI_DIV = bpp / (4 * num_lanes);
940 * FIXME: this have been tested with 16bpp and 2 lanes setup only.
941 * MIPI_DIV is fixed to value 2, but it -might- be changed according to the
942 * above formula for setups with 1 lane or image formats with different bpp.
944 * FIXME: this deviates from the sensor manual documentation which is quite
945 * thin on the MIPI clock tree generation part.
947 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor,
950 const struct ov5640_mode_info *mode = sensor->current_mode;
951 u8 prediv, mult, sysdiv;
956 * 1280x720 is reported to use 'SUBSAMPLING' only,
957 * but according to the sensor manual it goes through the
958 * scaler before subsampling.
960 if (mode->dn_mode == SCALING ||
961 (mode->id == OV5640_MODE_720P_1280_720))
962 mipi_div = OV5640_MIPI_DIV_SCLK;
964 mipi_div = OV5640_MIPI_DIV_PCLK;
966 ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv);
968 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
969 0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT);
971 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
972 0xff, sysdiv << 4 | mipi_div);
976 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
980 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
981 0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv);
985 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER,
986 0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS);
989 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
991 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
992 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
994 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
995 OV5640_PCLK_ROOT_DIV;
997 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
999 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1000 *bit_div = OV5640_BIT_DIV;
1001 *pclk_div = OV5640_PCLK_ROOT_DIV;
1003 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1006 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate)
1008 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1011 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1012 &bit_div, &pclk_div);
1017 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1023 * We need to set sysdiv according to the clock, and to clear
1026 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1031 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1036 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1037 0x1f, prediv | ((pll_rdiv - 1) << 4));
1041 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1042 (ilog2(pclk_div) << 4));
1045 /* set JPEG framing sizes */
1046 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1047 const struct ov5640_mode_info *mode)
1052 * compression mode 3 timing
1054 * Data is transmitted with programmable width (VFIFO_HSIZE).
1055 * No padding done. Last line may have less data. Varying
1056 * number of lines per frame, depending on amount of data.
1058 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1062 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact);
1066 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact);
1069 /* download ov5640 settings to sensor through i2c */
1070 static int ov5640_set_timings(struct ov5640_dev *sensor,
1071 const struct ov5640_mode_info *mode)
1075 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1076 ret = ov5640_set_jpeg_timings(sensor, mode);
1081 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1085 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1089 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1093 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1096 static int ov5640_load_regs(struct ov5640_dev *sensor,
1097 const struct ov5640_mode_info *mode)
1099 const struct reg_value *regs = mode->reg_data;
1106 for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1107 delay_ms = regs->delay_ms;
1108 reg_addr = regs->reg_addr;
1113 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1115 ret = ov5640_write_reg(sensor, reg_addr, val);
1120 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1123 return ov5640_set_timings(sensor, mode);
1126 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1128 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1129 BIT(0), on ? 0 : BIT(0));
1132 /* read exposure, in number of line periods */
1133 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1138 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1141 exp = ((int)temp & 0x0f) << 16;
1142 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1145 exp |= ((int)temp << 8);
1146 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1154 /* write exposure, given number of line periods */
1155 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1161 ret = ov5640_write_reg(sensor,
1162 OV5640_REG_AEC_PK_EXPOSURE_LO,
1166 ret = ov5640_write_reg(sensor,
1167 OV5640_REG_AEC_PK_EXPOSURE_MED,
1168 (exposure >> 8) & 0xff);
1171 return ov5640_write_reg(sensor,
1172 OV5640_REG_AEC_PK_EXPOSURE_HI,
1173 (exposure >> 16) & 0x0f);
1176 static int ov5640_get_gain(struct ov5640_dev *sensor)
1181 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1185 return gain & 0x3ff;
1188 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1190 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1194 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1196 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1197 BIT(1), on ? 0 : BIT(1));
1200 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1203 unsigned int flags = sensor->ep.bus.parallel.flags;
1209 * Note about parallel port configuration.
1211 * When configured in parallel mode, the OV5640 will
1212 * output 10 bits data on DVP data lines [9:0].
1213 * If only 8 bits data are wanted, the 8 bits data lines
1214 * of the camera interface must be physically connected
1215 * on the DVP data lines [9:2].
1217 * Control lines polarity can be configured through
1218 * devicetree endpoint control lines properties.
1219 * If no endpoint control lines properties are set,
1220 * polarity will be as below:
1221 * - VSYNC: active high
1222 * - HREF: active low
1223 * - PCLK: active low
1228 * configure parallel port control lines polarity
1231 * - [5]: PCLK polarity (0: active low, 1: active high)
1232 * - [1]: HREF polarity (0: active low, 1: active high)
1233 * - [0]: VSYNC polarity (mismatch here between
1234 * datasheet and hardware, 0 is active high
1235 * and 1 is active low...)
1237 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1239 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1241 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1244 ret = ov5640_write_reg(sensor,
1245 OV5640_REG_POLARITY_CTRL00,
1255 * powerdown MIPI TX/RX PHY & disable MIPI
1262 ret = ov5640_write_reg(sensor,
1263 OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
1268 * enable VSYNC/HREF/PCLK DVP control lines
1269 * & D[9:6] DVP data lines
1271 * PAD OUTPUT ENABLE 01
1272 * - 6: VSYNC output enable
1273 * - 5: HREF output enable
1274 * - 4: PCLK output enable
1275 * - [3:0]: D[9:6] output enable
1277 ret = ov5640_write_reg(sensor,
1278 OV5640_REG_PAD_OUTPUT_ENABLE01,
1284 * enable D[5:0] DVP data lines
1286 * PAD OUTPUT ENABLE 02
1287 * - [7:2]: D[5:0] output enable
1289 return ov5640_write_reg(sensor,
1290 OV5640_REG_PAD_OUTPUT_ENABLE02,
1294 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1299 * Enable/disable the MIPI interface
1301 * 0x300e = on ? 0x45 : 0x40
1303 * FIXME: the sensor manual (version 2.03) reports
1304 * [7:5] = 000 : 1 data lane mode
1305 * [7:5] = 001 : 2 data lanes mode
1306 * But this settings do not work, while the following ones
1307 * have been validated for 2 data lanes mode.
1309 * [7:5] = 010 : 2 data lanes mode
1310 * [4] = 0 : Power up MIPI HS Tx
1311 * [3] = 0 : Power up MIPI LS Rx
1312 * [2] = 1/0 : MIPI interface enable/disable
1313 * [1:0] = 01/00: FIXME: 'debug'
1315 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1320 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1324 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1326 /* calculate sysclk */
1327 u32 xvclk = sensor->xclk_freq / 10000;
1328 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1329 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1330 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1334 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1337 temp2 = temp1 & 0x0f;
1338 if (temp2 == 8 || temp2 == 10)
1339 bit_div2x = temp2 / 2;
1341 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1344 sysdiv = temp1 >> 4;
1348 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1353 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1356 prediv = temp1 & 0x0f;
1357 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1359 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1362 temp2 = temp1 & 0x03;
1363 sclk_rdiv = sclk_rdiv_map[temp2];
1365 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1368 VCO = xvclk * multiplier / prediv;
1370 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1375 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1377 /* read HTS from register settings */
1381 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1385 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1388 static int ov5640_get_hts(struct ov5640_dev *sensor)
1390 /* read HTS from register settings */
1394 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1400 static int ov5640_get_vts(struct ov5640_dev *sensor)
1405 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1411 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1413 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1416 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1418 /* get banding filter value */
1419 int ret, light_freq = 0;
1422 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1428 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1441 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1457 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1459 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1462 /* read preview PCLK */
1463 ret = ov5640_get_sysclk(sensor);
1468 sensor->prev_sysclk = ret;
1469 /* read preview HTS */
1470 ret = ov5640_get_hts(sensor);
1475 sensor->prev_hts = ret;
1477 /* read preview VTS */
1478 ret = ov5640_get_vts(sensor);
1483 /* calculate banding filter */
1485 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1486 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1491 max_band60 = (int)((prev_vts - 4) / band_step60);
1492 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1497 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1498 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1503 max_band50 = (int)((prev_vts - 4) / band_step50);
1504 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1507 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1509 /* stable in high */
1510 u32 fast_high, fast_low;
1513 sensor->ae_low = target * 23 / 25; /* 0.92 */
1514 sensor->ae_high = target * 27 / 25; /* 1.08 */
1516 fast_high = sensor->ae_high << 1;
1517 if (fast_high > 255)
1520 fast_low = sensor->ae_low >> 1;
1522 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1525 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1528 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1531 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1534 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1537 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1540 static int ov5640_get_binning(struct ov5640_dev *sensor)
1545 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1549 return temp & BIT(0);
1552 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1558 * - [0]: Horizontal binning enable
1560 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1561 BIT(0), enable ? BIT(0) : 0);
1566 * - [0]: Undocumented, but hardcoded init sequences
1567 * are always setting REG21/REG20 bit 0 to same value...
1569 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1570 BIT(0), enable ? BIT(0) : 0);
1573 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1575 struct i2c_client *client = sensor->i2c_client;
1576 u8 temp, channel = virtual_channel;
1580 dev_err(&client->dev,
1581 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1586 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1590 temp |= (channel << 6);
1591 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1594 static const struct ov5640_mode_info *
1595 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1596 int width, int height, bool nearest)
1598 const struct ov5640_mode_info *mode;
1600 mode = v4l2_find_nearest_size(ov5640_mode_data,
1601 ARRAY_SIZE(ov5640_mode_data),
1606 (!nearest && (mode->hact != width || mode->vact != height)))
1609 /* Only 640x480 can operate at 60fps (for now) */
1610 if (fr == OV5640_60_FPS &&
1611 !(mode->hact == 640 && mode->vact == 480))
1618 * sensor changes between scaling and subsampling, go through
1619 * exposure calculation
1621 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1622 const struct ov5640_mode_info *mode)
1624 u32 prev_shutter, prev_gain16;
1625 u32 cap_shutter, cap_gain16;
1626 u32 cap_sysclk, cap_hts, cap_vts;
1627 u32 light_freq, cap_bandfilt, cap_maxband;
1628 u32 cap_gain16_shutter;
1632 if (!mode->reg_data)
1635 /* read preview shutter */
1636 ret = ov5640_get_exposure(sensor);
1640 ret = ov5640_get_binning(sensor);
1643 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1644 mode->id != OV5640_MODE_1080P_1920_1080)
1647 /* read preview gain */
1648 ret = ov5640_get_gain(sensor);
1654 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1658 /* turn off night mode for capture */
1659 ret = ov5640_set_night_mode(sensor);
1663 /* Write capture setting */
1664 ret = ov5640_load_regs(sensor, mode);
1668 /* read capture VTS */
1669 ret = ov5640_get_vts(sensor);
1673 ret = ov5640_get_hts(sensor);
1680 ret = ov5640_get_sysclk(sensor);
1687 /* calculate capture banding filter */
1688 ret = ov5640_get_light_freq(sensor);
1693 if (light_freq == 60) {
1695 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1698 cap_bandfilt = cap_sysclk * 100 / cap_hts;
1701 if (!sensor->prev_sysclk) {
1702 ret = ov5640_get_sysclk(sensor);
1707 sensor->prev_sysclk = ret;
1713 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1715 /* calculate capture shutter/gain16 */
1716 if (average > sensor->ae_low && average < sensor->ae_high) {
1717 /* in stable range */
1718 cap_gain16_shutter =
1719 prev_gain16 * prev_shutter *
1720 cap_sysclk / sensor->prev_sysclk *
1721 sensor->prev_hts / cap_hts *
1722 sensor->ae_target / average;
1724 cap_gain16_shutter =
1725 prev_gain16 * prev_shutter *
1726 cap_sysclk / sensor->prev_sysclk *
1727 sensor->prev_hts / cap_hts;
1730 /* gain to shutter */
1731 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1732 /* shutter < 1/100 */
1733 cap_shutter = cap_gain16_shutter / 16;
1734 if (cap_shutter < 1)
1737 cap_gain16 = cap_gain16_shutter / cap_shutter;
1738 if (cap_gain16 < 16)
1741 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1742 /* exposure reach max */
1743 cap_shutter = cap_bandfilt * cap_maxband;
1747 cap_gain16 = cap_gain16_shutter / cap_shutter;
1749 /* 1/100 < (cap_shutter = n/100) =< max */
1751 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1756 cap_gain16 = cap_gain16_shutter / cap_shutter;
1760 /* set capture gain */
1761 ret = ov5640_set_gain(sensor, cap_gain16);
1765 /* write capture shutter */
1766 if (cap_shutter > (cap_vts - 4)) {
1767 cap_vts = cap_shutter + 4;
1768 ret = ov5640_set_vts(sensor, cap_vts);
1774 return ov5640_set_exposure(sensor, cap_shutter);
1778 * if sensor changes inside scaling or subsampling
1779 * change mode directly
1781 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1782 const struct ov5640_mode_info *mode)
1784 if (!mode->reg_data)
1787 /* Write capture setting */
1788 return ov5640_load_regs(sensor, mode);
1791 static int ov5640_set_mode(struct ov5640_dev *sensor)
1793 const struct ov5640_mode_info *mode = sensor->current_mode;
1794 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1795 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1796 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1797 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1801 dn_mode = mode->dn_mode;
1802 orig_dn_mode = orig_mode->dn_mode;
1804 /* auto gain and exposure must be turned off when changing modes */
1806 ret = ov5640_set_autogain(sensor, false);
1812 ret = ov5640_set_autoexposure(sensor, false);
1814 goto restore_auto_gain;
1818 * All the formats we support have 16 bits per pixel, seems to require
1819 * the same rate than YUV, so we can just use 16 bpp all the time.
1821 rate = mode->vtot * mode->htot * 16;
1822 rate *= ov5640_framerates[sensor->current_fr];
1823 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1824 rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
1825 ret = ov5640_set_mipi_pclk(sensor, rate);
1827 rate = rate / sensor->ep.bus.parallel.bus_width;
1828 ret = ov5640_set_dvp_pclk(sensor, rate);
1834 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1835 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1837 * change between subsampling and scaling
1838 * go through exposure calculation
1840 ret = ov5640_set_mode_exposure_calc(sensor, mode);
1843 * change inside subsampling or scaling
1844 * download firmware directly
1846 ret = ov5640_set_mode_direct(sensor, mode);
1849 goto restore_auto_exp_gain;
1851 /* restore auto gain and exposure */
1853 ov5640_set_autogain(sensor, true);
1855 ov5640_set_autoexposure(sensor, true);
1857 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1860 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1863 ret = ov5640_get_light_freq(sensor);
1866 ret = ov5640_set_bandingfilter(sensor);
1869 ret = ov5640_set_virtual_channel(sensor);
1873 sensor->pending_mode_change = false;
1874 sensor->last_mode = mode;
1878 restore_auto_exp_gain:
1880 ov5640_set_autoexposure(sensor, true);
1883 ov5640_set_autogain(sensor, true);
1888 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1889 struct v4l2_mbus_framefmt *format);
1891 /* restore the last set video mode after chip power-on */
1892 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1896 /* first load the initial register values */
1897 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1900 sensor->last_mode = &ov5640_mode_init_data;
1902 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1903 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1904 ilog2(OV5640_SCLK_ROOT_DIV));
1908 /* now restore the last capture mode */
1909 ret = ov5640_set_mode(sensor);
1913 return ov5640_set_framefmt(sensor, &sensor->fmt);
1916 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
1918 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
1921 static void ov5640_reset(struct ov5640_dev *sensor)
1923 if (!sensor->reset_gpio)
1926 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1928 /* camera power cycle */
1929 ov5640_power(sensor, false);
1930 usleep_range(5000, 10000);
1931 ov5640_power(sensor, true);
1932 usleep_range(5000, 10000);
1934 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
1935 usleep_range(1000, 2000);
1937 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1938 usleep_range(20000, 25000);
1941 static int ov5640_set_power_on(struct ov5640_dev *sensor)
1943 struct i2c_client *client = sensor->i2c_client;
1946 ret = clk_prepare_enable(sensor->xclk);
1948 dev_err(&client->dev, "%s: failed to enable clock\n",
1953 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
1956 dev_err(&client->dev, "%s: failed to enable regulators\n",
1961 ov5640_reset(sensor);
1962 ov5640_power(sensor, true);
1964 ret = ov5640_init_slave_id(sensor);
1971 ov5640_power(sensor, false);
1972 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1974 clk_disable_unprepare(sensor->xclk);
1978 static void ov5640_set_power_off(struct ov5640_dev *sensor)
1980 ov5640_power(sensor, false);
1981 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1982 clk_disable_unprepare(sensor->xclk);
1985 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
1990 ret = ov5640_set_power_on(sensor);
1994 ret = ov5640_restore_mode(sensor);
1998 /* We're done here for DVP bus, while CSI-2 needs setup. */
1999 if (sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
2003 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
2006 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
2007 * "ov5640_set_stream_mipi()")
2008 * [4] = 0 : Power up MIPI HS Tx
2009 * [3] = 0 : Power up MIPI LS Rx
2010 * [2] = 0 : MIPI interface disabled
2012 ret = ov5640_write_reg(sensor,
2013 OV5640_REG_IO_MIPI_CTRL00, 0x40);
2018 * Gate clock and set LP11 in 'no packets mode' (idle)
2021 * [5] = 1 : Gate clock when 'no packets'
2022 * [2] = 1 : MIPI bus in LP11 when 'no packets'
2024 ret = ov5640_write_reg(sensor,
2025 OV5640_REG_MIPI_CTRL00, 0x24);
2030 * Set data lanes and clock in LP11 when 'sleeping'
2033 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
2034 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
2035 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
2037 ret = ov5640_write_reg(sensor,
2038 OV5640_REG_PAD_OUTPUT00, 0x70);
2042 /* Give lanes some time to coax into LP11 state. */
2043 usleep_range(500, 1000);
2046 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
2047 /* Reset MIPI bus settings to their default values. */
2048 ov5640_write_reg(sensor,
2049 OV5640_REG_IO_MIPI_CTRL00, 0x58);
2050 ov5640_write_reg(sensor,
2051 OV5640_REG_MIPI_CTRL00, 0x04);
2052 ov5640_write_reg(sensor,
2053 OV5640_REG_PAD_OUTPUT00, 0x00);
2056 ov5640_set_power_off(sensor);
2062 ov5640_set_power_off(sensor);
2066 /* --------------- Subdev Operations --------------- */
2068 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2070 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2073 mutex_lock(&sensor->lock);
2076 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2077 * update the power state.
2079 if (sensor->power_count == !on) {
2080 ret = ov5640_set_power(sensor, !!on);
2085 /* Update the power count. */
2086 sensor->power_count += on ? 1 : -1;
2087 WARN_ON(sensor->power_count < 0);
2089 mutex_unlock(&sensor->lock);
2091 if (on && !ret && sensor->power_count == 1) {
2092 /* restore controls */
2093 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2099 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2100 struct v4l2_fract *fi,
2101 u32 width, u32 height)
2103 const struct ov5640_mode_info *mode;
2104 enum ov5640_frame_rate rate = OV5640_15_FPS;
2105 int minfps, maxfps, best_fps, fps;
2108 minfps = ov5640_framerates[OV5640_15_FPS];
2109 maxfps = ov5640_framerates[OV5640_60_FPS];
2111 if (fi->numerator == 0) {
2112 fi->denominator = maxfps;
2114 rate = OV5640_60_FPS;
2118 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2122 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2123 int curr_fps = ov5640_framerates[i];
2125 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2126 best_fps = curr_fps;
2132 fi->denominator = best_fps;
2135 mode = ov5640_find_mode(sensor, rate, width, height, false);
2136 return mode ? rate : -EINVAL;
2139 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2140 struct v4l2_subdev_pad_config *cfg,
2141 struct v4l2_subdev_format *format)
2143 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2144 struct v4l2_mbus_framefmt *fmt;
2146 if (format->pad != 0)
2149 mutex_lock(&sensor->lock);
2151 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2152 fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg,
2157 format->format = *fmt;
2159 mutex_unlock(&sensor->lock);
2164 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2165 struct v4l2_mbus_framefmt *fmt,
2166 enum ov5640_frame_rate fr,
2167 const struct ov5640_mode_info **new_mode)
2169 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2170 const struct ov5640_mode_info *mode;
2173 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2176 fmt->width = mode->hact;
2177 fmt->height = mode->vact;
2182 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2183 if (ov5640_formats[i].code == fmt->code)
2185 if (i >= ARRAY_SIZE(ov5640_formats))
2188 fmt->code = ov5640_formats[i].code;
2189 fmt->colorspace = ov5640_formats[i].colorspace;
2190 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2191 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2192 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2197 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2198 struct v4l2_subdev_pad_config *cfg,
2199 struct v4l2_subdev_format *format)
2201 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2202 const struct ov5640_mode_info *new_mode;
2203 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2204 struct v4l2_mbus_framefmt *fmt;
2207 if (format->pad != 0)
2210 mutex_lock(&sensor->lock);
2212 if (sensor->streaming) {
2217 ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2218 sensor->current_fr, &new_mode);
2222 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2223 fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
2229 if (new_mode != sensor->current_mode) {
2230 sensor->current_mode = new_mode;
2231 sensor->pending_mode_change = true;
2233 if (mbus_fmt->code != sensor->fmt.code)
2234 sensor->pending_fmt_change = true;
2237 mutex_unlock(&sensor->lock);
2241 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2242 struct v4l2_mbus_framefmt *format)
2245 bool is_jpeg = false;
2248 switch (format->code) {
2249 case MEDIA_BUS_FMT_UYVY8_2X8:
2252 mux = OV5640_FMT_MUX_YUV422;
2254 case MEDIA_BUS_FMT_YUYV8_2X8:
2257 mux = OV5640_FMT_MUX_YUV422;
2259 case MEDIA_BUS_FMT_RGB565_2X8_LE:
2260 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2262 mux = OV5640_FMT_MUX_RGB;
2264 case MEDIA_BUS_FMT_RGB565_2X8_BE:
2265 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2267 mux = OV5640_FMT_MUX_RGB;
2269 case MEDIA_BUS_FMT_JPEG_1X8:
2272 mux = OV5640_FMT_MUX_YUV422;
2275 case MEDIA_BUS_FMT_SBGGR8_1X8:
2276 /* Raw, BGBG... / GRGR... */
2278 mux = OV5640_FMT_MUX_RAW_DPC;
2280 case MEDIA_BUS_FMT_SGBRG8_1X8:
2281 /* Raw bayer, GBGB... / RGRG... */
2283 mux = OV5640_FMT_MUX_RAW_DPC;
2285 case MEDIA_BUS_FMT_SGRBG8_1X8:
2286 /* Raw bayer, GRGR... / BGBG... */
2288 mux = OV5640_FMT_MUX_RAW_DPC;
2290 case MEDIA_BUS_FMT_SRGGB8_1X8:
2291 /* Raw bayer, RGRG... / GBGB... */
2293 mux = OV5640_FMT_MUX_RAW_DPC;
2299 /* FORMAT CONTROL00: YUV and RGB formatting */
2300 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2304 /* FORMAT MUX CONTROL: ISP YUV or RGB */
2305 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2311 * - [5]: JPEG enable
2313 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2314 BIT(5), is_jpeg ? BIT(5) : 0);
2320 * - [4]: Reset JFIFO
2321 * - [3]: Reset SFIFO
2324 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2325 BIT(4) | BIT(3) | BIT(2),
2326 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2332 * - [5]: Enable JPEG 2x clock
2333 * - [3]: Enable JPEG clock
2335 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2337 is_jpeg ? (BIT(5) | BIT(3)) : 0);
2344 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2349 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2353 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2355 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2361 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2366 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2370 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2373 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2379 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2384 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2388 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2392 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2395 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2401 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2405 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2406 BIT(0), awb ? 0 : 1);
2411 u16 red = (u16)sensor->ctrls.red_balance->val;
2412 u16 blue = (u16)sensor->ctrls.blue_balance->val;
2414 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2417 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2423 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2424 enum v4l2_exposure_auto_type auto_exposure)
2426 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2427 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2430 if (ctrls->auto_exp->is_new) {
2431 ret = ov5640_set_autoexposure(sensor, auto_exp);
2436 if (!auto_exp && ctrls->exposure->is_new) {
2439 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2443 ret = ov5640_get_vts(sensor);
2449 if (ctrls->exposure->val < max_exp)
2450 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2456 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2458 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2461 if (ctrls->auto_gain->is_new) {
2462 ret = ov5640_set_autogain(sensor, auto_gain);
2467 if (!auto_gain && ctrls->gain->is_new)
2468 ret = ov5640_set_gain(sensor, ctrls->gain->val);
2473 static const char * const test_pattern_menu[] = {
2476 "Color bars w/ rolling bar",
2478 "Color squares w/ rolling bar",
2481 #define OV5640_TEST_ENABLE BIT(7)
2482 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
2483 #define OV5640_TEST_TRANSPARENT BIT(5)
2484 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
2485 #define OV5640_TEST_BAR_STANDARD (0 << 2)
2486 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
2487 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
2488 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
2489 #define OV5640_TEST_BAR (0 << 0)
2490 #define OV5640_TEST_RANDOM (1 << 0)
2491 #define OV5640_TEST_SQUARE (2 << 0)
2492 #define OV5640_TEST_BLACK (3 << 0)
2494 static const u8 test_pattern_val[] = {
2496 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
2498 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
2499 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
2500 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
2501 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
2504 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2506 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2507 test_pattern_val[value]);
2510 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2514 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2515 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2520 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2521 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2525 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2528 * If sensor is mounted upside down, mirror logic is inversed.
2530 * Sensor is a BSI (Back Side Illuminated) one,
2531 * so image captured is physically mirrored.
2532 * This is why mirror logic is inversed in
2533 * order to cancel this mirror effect.
2539 * - [1]: Sensor mirror
2541 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2543 (!(value ^ sensor->upside_down)) ?
2544 (BIT(2) | BIT(1)) : 0);
2547 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2549 /* If sensor is mounted upside down, flip logic is inversed */
2554 * - [1]: Sensor vflip
2556 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2558 (value ^ sensor->upside_down) ?
2559 (BIT(2) | BIT(1)) : 0);
2562 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2564 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2565 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2568 /* v4l2_ctrl_lock() locks our own mutex */
2571 case V4L2_CID_AUTOGAIN:
2572 val = ov5640_get_gain(sensor);
2575 sensor->ctrls.gain->val = val;
2577 case V4L2_CID_EXPOSURE_AUTO:
2578 val = ov5640_get_exposure(sensor);
2581 sensor->ctrls.exposure->val = val;
2588 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2590 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2591 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2594 /* v4l2_ctrl_lock() locks our own mutex */
2597 * If the device is not powered up by the host driver do
2598 * not apply any controls to H/W at this time. Instead
2599 * the controls will be restored right after power-up.
2601 if (sensor->power_count == 0)
2605 case V4L2_CID_AUTOGAIN:
2606 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2608 case V4L2_CID_EXPOSURE_AUTO:
2609 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2611 case V4L2_CID_AUTO_WHITE_BALANCE:
2612 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2615 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2617 case V4L2_CID_CONTRAST:
2618 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2620 case V4L2_CID_SATURATION:
2621 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2623 case V4L2_CID_TEST_PATTERN:
2624 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2626 case V4L2_CID_POWER_LINE_FREQUENCY:
2627 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2629 case V4L2_CID_HFLIP:
2630 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2632 case V4L2_CID_VFLIP:
2633 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2643 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2644 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
2645 .s_ctrl = ov5640_s_ctrl,
2648 static int ov5640_init_controls(struct ov5640_dev *sensor)
2650 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2651 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2652 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2655 v4l2_ctrl_handler_init(hdl, 32);
2657 /* we can use our own mutex for the ctrl lock */
2658 hdl->lock = &sensor->lock;
2660 /* Auto/manual white balance */
2661 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2662 V4L2_CID_AUTO_WHITE_BALANCE,
2664 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2666 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2668 /* Auto/manual exposure */
2669 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2670 V4L2_CID_EXPOSURE_AUTO,
2671 V4L2_EXPOSURE_MANUAL, 0,
2672 V4L2_EXPOSURE_AUTO);
2673 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2675 /* Auto/manual gain */
2676 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2678 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2681 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2683 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2685 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2687 ctrls->test_pattern =
2688 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2689 ARRAY_SIZE(test_pattern_menu) - 1,
2690 0, 0, test_pattern_menu);
2691 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2693 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2697 v4l2_ctrl_new_std_menu(hdl, ops,
2698 V4L2_CID_POWER_LINE_FREQUENCY,
2699 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2700 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
2707 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
2708 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
2710 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
2711 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
2712 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
2714 sensor->sd.ctrl_handler = hdl;
2718 v4l2_ctrl_handler_free(hdl);
2722 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
2723 struct v4l2_subdev_pad_config *cfg,
2724 struct v4l2_subdev_frame_size_enum *fse)
2728 if (fse->index >= OV5640_NUM_MODES)
2732 ov5640_mode_data[fse->index].hact;
2733 fse->max_width = fse->min_width;
2735 ov5640_mode_data[fse->index].vact;
2736 fse->max_height = fse->min_height;
2741 static int ov5640_enum_frame_interval(
2742 struct v4l2_subdev *sd,
2743 struct v4l2_subdev_pad_config *cfg,
2744 struct v4l2_subdev_frame_interval_enum *fie)
2746 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2747 struct v4l2_fract tpf;
2752 if (fie->index >= OV5640_NUM_FRAMERATES)
2756 tpf.denominator = ov5640_framerates[fie->index];
2758 ret = ov5640_try_frame_interval(sensor, &tpf,
2759 fie->width, fie->height);
2763 fie->interval = tpf;
2767 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
2768 struct v4l2_subdev_frame_interval *fi)
2770 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2772 mutex_lock(&sensor->lock);
2773 fi->interval = sensor->frame_interval;
2774 mutex_unlock(&sensor->lock);
2779 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
2780 struct v4l2_subdev_frame_interval *fi)
2782 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2783 const struct ov5640_mode_info *mode;
2784 int frame_rate, ret = 0;
2789 mutex_lock(&sensor->lock);
2791 if (sensor->streaming) {
2796 mode = sensor->current_mode;
2798 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
2799 mode->hact, mode->vact);
2800 if (frame_rate < 0) {
2801 /* Always return a valid frame interval value */
2802 fi->interval = sensor->frame_interval;
2806 mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
2813 if (mode != sensor->current_mode ||
2814 frame_rate != sensor->current_fr) {
2815 sensor->current_fr = frame_rate;
2816 sensor->frame_interval = fi->interval;
2817 sensor->current_mode = mode;
2818 sensor->pending_mode_change = true;
2821 mutex_unlock(&sensor->lock);
2825 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
2826 struct v4l2_subdev_pad_config *cfg,
2827 struct v4l2_subdev_mbus_code_enum *code)
2831 if (code->index >= ARRAY_SIZE(ov5640_formats))
2834 code->code = ov5640_formats[code->index].code;
2838 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
2840 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2843 mutex_lock(&sensor->lock);
2845 if (sensor->streaming == !enable) {
2846 if (enable && sensor->pending_mode_change) {
2847 ret = ov5640_set_mode(sensor);
2852 if (enable && sensor->pending_fmt_change) {
2853 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
2856 sensor->pending_fmt_change = false;
2859 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2860 ret = ov5640_set_stream_mipi(sensor, enable);
2862 ret = ov5640_set_stream_dvp(sensor, enable);
2865 sensor->streaming = enable;
2868 mutex_unlock(&sensor->lock);
2872 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2873 .s_power = ov5640_s_power,
2874 .log_status = v4l2_ctrl_subdev_log_status,
2875 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2876 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
2879 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
2880 .g_frame_interval = ov5640_g_frame_interval,
2881 .s_frame_interval = ov5640_s_frame_interval,
2882 .s_stream = ov5640_s_stream,
2885 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
2886 .enum_mbus_code = ov5640_enum_mbus_code,
2887 .get_fmt = ov5640_get_fmt,
2888 .set_fmt = ov5640_set_fmt,
2889 .enum_frame_size = ov5640_enum_frame_size,
2890 .enum_frame_interval = ov5640_enum_frame_interval,
2893 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
2894 .core = &ov5640_core_ops,
2895 .video = &ov5640_video_ops,
2896 .pad = &ov5640_pad_ops,
2899 static int ov5640_get_regulators(struct ov5640_dev *sensor)
2903 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
2904 sensor->supplies[i].supply = ov5640_supply_name[i];
2906 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
2907 OV5640_NUM_SUPPLIES,
2911 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
2913 struct i2c_client *client = sensor->i2c_client;
2917 ret = ov5640_set_power_on(sensor);
2921 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
2923 dev_err(&client->dev, "%s: failed to read chip identifier\n",
2928 if (chip_id != 0x5640) {
2929 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
2935 ov5640_set_power_off(sensor);
2939 static int ov5640_probe(struct i2c_client *client,
2940 const struct i2c_device_id *id)
2942 struct device *dev = &client->dev;
2943 struct fwnode_handle *endpoint;
2944 struct ov5640_dev *sensor;
2945 struct v4l2_mbus_framefmt *fmt;
2949 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
2953 sensor->i2c_client = client;
2956 * default init sequence initialize sensor to
2957 * YUV422 UYVY VGA@30fps
2960 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
2961 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2962 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2963 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2964 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2967 fmt->field = V4L2_FIELD_NONE;
2968 sensor->frame_interval.numerator = 1;
2969 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
2970 sensor->current_fr = OV5640_30_FPS;
2971 sensor->current_mode =
2972 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
2973 sensor->last_mode = sensor->current_mode;
2975 sensor->ae_target = 52;
2977 /* optional indication of physical rotation of sensor */
2978 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
2983 sensor->upside_down = true;
2988 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
2993 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
2996 dev_err(dev, "endpoint node not found\n");
3000 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3001 fwnode_handle_put(endpoint);
3003 dev_err(dev, "Could not parse endpoint\n");
3007 /* get system clock (xclk) */
3008 sensor->xclk = devm_clk_get(dev, "xclk");
3009 if (IS_ERR(sensor->xclk)) {
3010 dev_err(dev, "failed to get xclk\n");
3011 return PTR_ERR(sensor->xclk);
3014 sensor->xclk_freq = clk_get_rate(sensor->xclk);
3015 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3016 sensor->xclk_freq > OV5640_XCLK_MAX) {
3017 dev_err(dev, "xclk frequency out of range: %d Hz\n",
3022 /* request optional power down pin */
3023 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3025 /* request optional reset pin */
3026 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3029 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3031 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3032 V4L2_SUBDEV_FL_HAS_EVENTS;
3033 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3034 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3035 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3039 ret = ov5640_get_regulators(sensor);
3043 mutex_init(&sensor->lock);
3045 ret = ov5640_check_chip_id(sensor);
3047 goto entity_cleanup;
3049 ret = ov5640_init_controls(sensor);
3051 goto entity_cleanup;
3053 ret = v4l2_async_register_subdev(&sensor->sd);
3060 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3062 mutex_destroy(&sensor->lock);
3063 media_entity_cleanup(&sensor->sd.entity);
3067 static int ov5640_remove(struct i2c_client *client)
3069 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3070 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3072 v4l2_async_unregister_subdev(&sensor->sd);
3073 mutex_destroy(&sensor->lock);
3074 media_entity_cleanup(&sensor->sd.entity);
3075 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3080 static const struct i2c_device_id ov5640_id[] = {
3084 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3086 static const struct of_device_id ov5640_dt_ids[] = {
3087 { .compatible = "ovti,ov5640" },
3090 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3092 static struct i2c_driver ov5640_i2c_driver = {
3095 .of_match_table = ov5640_dt_ids,
3097 .id_table = ov5640_id,
3098 .probe = ov5640_probe,
3099 .remove = ov5640_remove,
3102 module_i2c_driver(ov5640_i2c_driver);
3104 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3105 MODULE_LICENSE("GPL");