Merge branch 'pm-opp'
[linux-2.6-microblaze.git] / drivers / media / i2c / ov2685.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * ov2685 driver
4  *
5  * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6  */
7
8 #include <linux/clk.h>
9 #include <linux/device.h>
10 #include <linux/delay.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/i2c.h>
13 #include <linux/module.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/sysfs.h>
17 #include <media/media-entity.h>
18 #include <media/v4l2-async.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-subdev.h>
21
22 #define CHIP_ID                         0x2685
23 #define OV2685_REG_CHIP_ID              0x300a
24
25 #define OV2685_XVCLK_FREQ               24000000
26
27 #define REG_SC_CTRL_MODE                0x0100
28 #define     SC_CTRL_MODE_STANDBY        0x0
29 #define     SC_CTRL_MODE_STREAMING      BIT(0)
30
31 #define OV2685_REG_EXPOSURE             0x3500
32 #define OV2685_EXPOSURE_MIN             4
33 #define OV2685_EXPOSURE_STEP            1
34
35 #define OV2685_REG_VTS                  0x380e
36 #define OV2685_VTS_MAX                  0x7fff
37
38 #define OV2685_REG_GAIN                 0x350a
39 #define OV2685_GAIN_MIN                 0
40 #define OV2685_GAIN_MAX                 0x07ff
41 #define OV2685_GAIN_STEP                0x1
42 #define OV2685_GAIN_DEFAULT             0x0036
43
44 #define OV2685_REG_TEST_PATTERN         0x5080
45 #define OV2685_TEST_PATTERN_DISABLED            0x00
46 #define OV2685_TEST_PATTERN_COLOR_BAR           0x80
47 #define OV2685_TEST_PATTERN_RANDOM              0x81
48 #define OV2685_TEST_PATTERN_COLOR_BAR_FADE      0x88
49 #define OV2685_TEST_PATTERN_BW_SQUARE           0x92
50 #define OV2685_TEST_PATTERN_COLOR_SQUARE        0x82
51
52 #define REG_NULL                        0xFFFF
53
54 #define OV2685_REG_VALUE_08BIT          1
55 #define OV2685_REG_VALUE_16BIT          2
56 #define OV2685_REG_VALUE_24BIT          3
57
58 #define OV2685_LANES                    1
59 #define OV2685_BITS_PER_SAMPLE          10
60
61 static const char * const ov2685_supply_names[] = {
62         "avdd",         /* Analog power */
63         "dovdd",        /* Digital I/O power */
64         "dvdd",         /* Digital core power */
65 };
66
67 #define OV2685_NUM_SUPPLIES ARRAY_SIZE(ov2685_supply_names)
68
69 struct regval {
70         u16 addr;
71         u8 val;
72 };
73
74 struct ov2685_mode {
75         u32 width;
76         u32 height;
77         u32 exp_def;
78         u32 hts_def;
79         u32 vts_def;
80         const struct regval *reg_list;
81 };
82
83 struct ov2685 {
84         struct i2c_client       *client;
85         struct clk              *xvclk;
86         struct gpio_desc        *reset_gpio;
87         struct regulator_bulk_data supplies[OV2685_NUM_SUPPLIES];
88
89         bool                    streaming;
90         struct mutex            mutex;
91         struct v4l2_subdev      subdev;
92         struct media_pad        pad;
93         struct v4l2_ctrl        *anal_gain;
94         struct v4l2_ctrl        *exposure;
95         struct v4l2_ctrl        *hblank;
96         struct v4l2_ctrl        *vblank;
97         struct v4l2_ctrl        *test_pattern;
98         struct v4l2_ctrl_handler ctrl_handler;
99
100         const struct ov2685_mode *cur_mode;
101 };
102
103 #define to_ov2685(sd) container_of(sd, struct ov2685, subdev)
104
105 /* PLL settings bases on 24M xvclk */
106 static struct regval ov2685_1600x1200_regs[] = {
107         {0x0103, 0x01},
108         {0x0100, 0x00},
109         {0x3002, 0x00},
110         {0x3016, 0x1c},
111         {0x3018, 0x44},
112         {0x301d, 0xf0},
113         {0x3020, 0x00},
114         {0x3082, 0x37},
115         {0x3083, 0x03},
116         {0x3084, 0x09},
117         {0x3085, 0x04},
118         {0x3086, 0x00},
119         {0x3087, 0x00},
120         {0x3501, 0x4e},
121         {0x3502, 0xe0},
122         {0x3503, 0x27},
123         {0x350b, 0x36},
124         {0x3600, 0xb4},
125         {0x3603, 0x35},
126         {0x3604, 0x24},
127         {0x3605, 0x00},
128         {0x3620, 0x24},
129         {0x3621, 0x34},
130         {0x3622, 0x03},
131         {0x3628, 0x10},
132         {0x3705, 0x3c},
133         {0x370a, 0x21},
134         {0x370c, 0x50},
135         {0x370d, 0xc0},
136         {0x3717, 0x58},
137         {0x3718, 0x80},
138         {0x3720, 0x00},
139         {0x3721, 0x09},
140         {0x3722, 0x06},
141         {0x3723, 0x59},
142         {0x3738, 0x99},
143         {0x3781, 0x80},
144         {0x3784, 0x0c},
145         {0x3789, 0x60},
146         {0x3800, 0x00},
147         {0x3801, 0x00},
148         {0x3802, 0x00},
149         {0x3803, 0x00},
150         {0x3804, 0x06},
151         {0x3805, 0x4f},
152         {0x3806, 0x04},
153         {0x3807, 0xbf},
154         {0x3808, 0x06},
155         {0x3809, 0x40},
156         {0x380a, 0x04},
157         {0x380b, 0xb0},
158         {0x380c, 0x06},
159         {0x380d, 0xa4},
160         {0x380e, 0x05},
161         {0x380f, 0x0e},
162         {0x3810, 0x00},
163         {0x3811, 0x08},
164         {0x3812, 0x00},
165         {0x3813, 0x08},
166         {0x3814, 0x11},
167         {0x3815, 0x11},
168         {0x3819, 0x04},
169         {0x3820, 0xc0},
170         {0x3821, 0x00},
171         {0x3a06, 0x01},
172         {0x3a07, 0x84},
173         {0x3a08, 0x01},
174         {0x3a09, 0x43},
175         {0x3a0a, 0x24},
176         {0x3a0b, 0x60},
177         {0x3a0c, 0x28},
178         {0x3a0d, 0x60},
179         {0x3a0e, 0x04},
180         {0x3a0f, 0x8c},
181         {0x3a10, 0x05},
182         {0x3a11, 0x0c},
183         {0x4000, 0x81},
184         {0x4001, 0x40},
185         {0x4008, 0x02},
186         {0x4009, 0x09},
187         {0x4300, 0x00},
188         {0x430e, 0x00},
189         {0x4602, 0x02},
190         {0x481b, 0x40},
191         {0x481f, 0x40},
192         {0x4837, 0x18},
193         {0x5000, 0x1f},
194         {0x5001, 0x05},
195         {0x5002, 0x30},
196         {0x5003, 0x04},
197         {0x5004, 0x00},
198         {0x5005, 0x0c},
199         {0x5280, 0x15},
200         {0x5281, 0x06},
201         {0x5282, 0x06},
202         {0x5283, 0x08},
203         {0x5284, 0x1c},
204         {0x5285, 0x1c},
205         {0x5286, 0x20},
206         {0x5287, 0x10},
207         {REG_NULL, 0x00}
208 };
209
210 #define OV2685_LINK_FREQ_330MHZ         330000000
211 static const s64 link_freq_menu_items[] = {
212         OV2685_LINK_FREQ_330MHZ
213 };
214
215 static const char * const ov2685_test_pattern_menu[] = {
216         "Disabled",
217         "Color Bar",
218         "Color Bar FADE",
219         "Random Data",
220         "Black White Square",
221         "Color Square"
222 };
223
224 static const int ov2685_test_pattern_val[] = {
225         OV2685_TEST_PATTERN_DISABLED,
226         OV2685_TEST_PATTERN_COLOR_BAR,
227         OV2685_TEST_PATTERN_COLOR_BAR_FADE,
228         OV2685_TEST_PATTERN_RANDOM,
229         OV2685_TEST_PATTERN_BW_SQUARE,
230         OV2685_TEST_PATTERN_COLOR_SQUARE,
231 };
232
233 static const struct ov2685_mode supported_modes[] = {
234         {
235                 .width = 1600,
236                 .height = 1200,
237                 .exp_def = 0x04ee,
238                 .hts_def = 0x06a4,
239                 .vts_def = 0x050e,
240                 .reg_list = ov2685_1600x1200_regs,
241         },
242 };
243
244 /* Write registers up to 4 at a time */
245 static int ov2685_write_reg(struct i2c_client *client, u16 reg,
246                             u32 len, u32 val)
247 {
248         u32 val_i, buf_i;
249         u8 buf[6];
250         u8 *val_p;
251         __be32 val_be;
252
253         if (len > 4)
254                 return -EINVAL;
255
256         buf[0] = reg >> 8;
257         buf[1] = reg & 0xff;
258
259         val_be = cpu_to_be32(val);
260         val_p = (u8 *)&val_be;
261         buf_i = 2;
262         val_i = 4 - len;
263
264         while (val_i < 4)
265                 buf[buf_i++] = val_p[val_i++];
266
267         if (i2c_master_send(client, buf, len + 2) != len + 2)
268                 return -EIO;
269
270         return 0;
271 }
272
273 static int ov2685_write_array(struct i2c_client *client,
274                               const struct regval *regs)
275 {
276         int ret = 0;
277         u32 i;
278
279         for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
280                 ret = ov2685_write_reg(client, regs[i].addr,
281                                        OV2685_REG_VALUE_08BIT, regs[i].val);
282
283         return ret;
284 }
285
286 /* Read registers up to 4 at a time */
287 static int ov2685_read_reg(struct i2c_client *client, u16 reg,
288                            u32 len, u32 *val)
289 {
290         struct i2c_msg msgs[2];
291         u8 *data_be_p;
292         __be32 data_be = 0;
293         __be16 reg_addr_be = cpu_to_be16(reg);
294         int ret;
295
296         if (len > 4)
297                 return -EINVAL;
298
299         data_be_p = (u8 *)&data_be;
300         /* Write register address */
301         msgs[0].addr = client->addr;
302         msgs[0].flags = 0;
303         msgs[0].len = 2;
304         msgs[0].buf = (u8 *)&reg_addr_be;
305
306         /* Read data from register */
307         msgs[1].addr = client->addr;
308         msgs[1].flags = I2C_M_RD;
309         msgs[1].len = len;
310         msgs[1].buf = &data_be_p[4 - len];
311
312         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
313         if (ret != ARRAY_SIZE(msgs))
314                 return -EIO;
315
316         *val = be32_to_cpu(data_be);
317
318         return 0;
319 }
320
321 static void ov2685_fill_fmt(const struct ov2685_mode *mode,
322                             struct v4l2_mbus_framefmt *fmt)
323 {
324         fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
325         fmt->width = mode->width;
326         fmt->height = mode->height;
327         fmt->field = V4L2_FIELD_NONE;
328 }
329
330 static int ov2685_set_fmt(struct v4l2_subdev *sd,
331                           struct v4l2_subdev_state *sd_state,
332                           struct v4l2_subdev_format *fmt)
333 {
334         struct ov2685 *ov2685 = to_ov2685(sd);
335         struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
336
337         /* only one mode supported for now */
338         ov2685_fill_fmt(ov2685->cur_mode, mbus_fmt);
339
340         return 0;
341 }
342
343 static int ov2685_get_fmt(struct v4l2_subdev *sd,
344                           struct v4l2_subdev_state *sd_state,
345                           struct v4l2_subdev_format *fmt)
346 {
347         struct ov2685 *ov2685 = to_ov2685(sd);
348         struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
349
350         ov2685_fill_fmt(ov2685->cur_mode, mbus_fmt);
351
352         return 0;
353 }
354
355 static int ov2685_enum_mbus_code(struct v4l2_subdev *sd,
356                                  struct v4l2_subdev_state *sd_state,
357                                  struct v4l2_subdev_mbus_code_enum *code)
358 {
359         if (code->index >= ARRAY_SIZE(supported_modes))
360                 return -EINVAL;
361
362         code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
363
364         return 0;
365 }
366
367 static int ov2685_enum_frame_sizes(struct v4l2_subdev *sd,
368                                    struct v4l2_subdev_state *sd_state,
369                                    struct v4l2_subdev_frame_size_enum *fse)
370 {
371         int index = fse->index;
372
373         if (index >= ARRAY_SIZE(supported_modes))
374                 return -EINVAL;
375
376         fse->code = MEDIA_BUS_FMT_SBGGR10_1X10;
377
378         fse->min_width  = supported_modes[index].width;
379         fse->max_width  = supported_modes[index].width;
380         fse->max_height = supported_modes[index].height;
381         fse->min_height = supported_modes[index].height;
382
383         return 0;
384 }
385
386 /* Calculate the delay in us by clock rate and clock cycles */
387 static inline u32 ov2685_cal_delay(u32 cycles)
388 {
389         return DIV_ROUND_UP(cycles, OV2685_XVCLK_FREQ / 1000 / 1000);
390 }
391
392 static int __ov2685_power_on(struct ov2685 *ov2685)
393 {
394         int ret;
395         u32 delay_us;
396         struct device *dev = &ov2685->client->dev;
397
398         ret = clk_prepare_enable(ov2685->xvclk);
399         if (ret < 0) {
400                 dev_err(dev, "Failed to enable xvclk\n");
401                 return ret;
402         }
403
404         gpiod_set_value_cansleep(ov2685->reset_gpio, 1);
405
406         ret = regulator_bulk_enable(OV2685_NUM_SUPPLIES, ov2685->supplies);
407         if (ret < 0) {
408                 dev_err(dev, "Failed to enable regulators\n");
409                 goto disable_clk;
410         }
411
412         /* The minimum delay between power supplies and reset rising can be 0 */
413         gpiod_set_value_cansleep(ov2685->reset_gpio, 0);
414         /* 8192 xvclk cycles prior to the first SCCB transaction */
415         delay_us = ov2685_cal_delay(8192);
416         usleep_range(delay_us, delay_us * 2);
417
418         /* HACK: ov2685 would output messy data after reset(R0103),
419          * writing register before .s_stream() as a workaround
420          */
421         ret = ov2685_write_array(ov2685->client, ov2685->cur_mode->reg_list);
422         if (ret)
423                 goto disable_supplies;
424
425         return 0;
426
427 disable_supplies:
428         regulator_bulk_disable(OV2685_NUM_SUPPLIES, ov2685->supplies);
429 disable_clk:
430         clk_disable_unprepare(ov2685->xvclk);
431
432         return ret;
433 }
434
435 static void __ov2685_power_off(struct ov2685 *ov2685)
436 {
437         /* 512 xvclk cycles after the last SCCB transaction or MIPI frame end */
438         u32 delay_us = ov2685_cal_delay(512);
439
440         usleep_range(delay_us, delay_us * 2);
441         clk_disable_unprepare(ov2685->xvclk);
442         gpiod_set_value_cansleep(ov2685->reset_gpio, 1);
443         regulator_bulk_disable(OV2685_NUM_SUPPLIES, ov2685->supplies);
444 }
445
446 static int ov2685_s_stream(struct v4l2_subdev *sd, int on)
447 {
448         struct ov2685 *ov2685 = to_ov2685(sd);
449         struct i2c_client *client = ov2685->client;
450         int ret = 0;
451
452         mutex_lock(&ov2685->mutex);
453
454         on = !!on;
455         if (on == ov2685->streaming)
456                 goto unlock_and_return;
457
458         if (on) {
459                 ret = pm_runtime_resume_and_get(&ov2685->client->dev);
460                 if (ret < 0)
461                         goto unlock_and_return;
462
463                 ret = __v4l2_ctrl_handler_setup(&ov2685->ctrl_handler);
464                 if (ret) {
465                         pm_runtime_put(&client->dev);
466                         goto unlock_and_return;
467                 }
468                 ret = ov2685_write_reg(client, REG_SC_CTRL_MODE,
469                                 OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STREAMING);
470                 if (ret) {
471                         pm_runtime_put(&client->dev);
472                         goto unlock_and_return;
473                 }
474         } else {
475                 ov2685_write_reg(client, REG_SC_CTRL_MODE,
476                                 OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STANDBY);
477                 pm_runtime_put(&ov2685->client->dev);
478         }
479
480         ov2685->streaming = on;
481
482 unlock_and_return:
483         mutex_unlock(&ov2685->mutex);
484
485         return ret;
486 }
487
488 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
489 static int ov2685_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
490 {
491         struct ov2685 *ov2685 = to_ov2685(sd);
492         struct v4l2_mbus_framefmt *try_fmt;
493
494         mutex_lock(&ov2685->mutex);
495
496         try_fmt = v4l2_subdev_get_try_format(sd, fh->state, 0);
497         /* Initialize try_fmt */
498         ov2685_fill_fmt(&supported_modes[0], try_fmt);
499
500         mutex_unlock(&ov2685->mutex);
501
502         return 0;
503 }
504 #endif
505
506 static int __maybe_unused ov2685_runtime_resume(struct device *dev)
507 {
508         struct v4l2_subdev *sd = dev_get_drvdata(dev);
509         struct ov2685 *ov2685 = to_ov2685(sd);
510
511         return __ov2685_power_on(ov2685);
512 }
513
514 static int __maybe_unused ov2685_runtime_suspend(struct device *dev)
515 {
516         struct v4l2_subdev *sd = dev_get_drvdata(dev);
517         struct ov2685 *ov2685 = to_ov2685(sd);
518
519         __ov2685_power_off(ov2685);
520
521         return 0;
522 }
523
524 static const struct dev_pm_ops ov2685_pm_ops = {
525         SET_RUNTIME_PM_OPS(ov2685_runtime_suspend,
526                            ov2685_runtime_resume, NULL)
527 };
528
529 static int ov2685_set_ctrl(struct v4l2_ctrl *ctrl)
530 {
531         struct ov2685 *ov2685 = container_of(ctrl->handler,
532                                              struct ov2685, ctrl_handler);
533         struct i2c_client *client = ov2685->client;
534         s64 max_expo;
535         int ret;
536
537         /* Propagate change of current control to all related controls */
538         switch (ctrl->id) {
539         case V4L2_CID_VBLANK:
540                 /* Update max exposure while meeting expected vblanking */
541                 max_expo = ov2685->cur_mode->height + ctrl->val - 4;
542                 __v4l2_ctrl_modify_range(ov2685->exposure,
543                                          ov2685->exposure->minimum, max_expo,
544                                          ov2685->exposure->step,
545                                          ov2685->exposure->default_value);
546                 break;
547         }
548
549         if (!pm_runtime_get_if_in_use(&client->dev))
550                 return 0;
551
552         switch (ctrl->id) {
553         case V4L2_CID_EXPOSURE:
554                 ret = ov2685_write_reg(ov2685->client, OV2685_REG_EXPOSURE,
555                                        OV2685_REG_VALUE_24BIT, ctrl->val << 4);
556                 break;
557         case V4L2_CID_ANALOGUE_GAIN:
558                 ret = ov2685_write_reg(ov2685->client, OV2685_REG_GAIN,
559                                        OV2685_REG_VALUE_16BIT, ctrl->val);
560                 break;
561         case V4L2_CID_VBLANK:
562                 ret = ov2685_write_reg(ov2685->client, OV2685_REG_VTS,
563                                        OV2685_REG_VALUE_16BIT,
564                                        ctrl->val + ov2685->cur_mode->height);
565                 break;
566         case V4L2_CID_TEST_PATTERN:
567                 ret = ov2685_write_reg(ov2685->client, OV2685_REG_TEST_PATTERN,
568                                        OV2685_REG_VALUE_08BIT,
569                                        ov2685_test_pattern_val[ctrl->val]);
570                 break;
571         default:
572                 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
573                          __func__, ctrl->id, ctrl->val);
574                 ret = -EINVAL;
575                 break;
576         }
577
578         pm_runtime_put(&client->dev);
579
580         return ret;
581 }
582
583 static const struct v4l2_subdev_video_ops ov2685_video_ops = {
584         .s_stream = ov2685_s_stream,
585 };
586
587 static const struct v4l2_subdev_pad_ops ov2685_pad_ops = {
588         .enum_mbus_code = ov2685_enum_mbus_code,
589         .enum_frame_size = ov2685_enum_frame_sizes,
590         .get_fmt = ov2685_get_fmt,
591         .set_fmt = ov2685_set_fmt,
592 };
593
594 static const struct v4l2_subdev_ops ov2685_subdev_ops = {
595         .video  = &ov2685_video_ops,
596         .pad    = &ov2685_pad_ops,
597 };
598
599 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
600 static const struct v4l2_subdev_internal_ops ov2685_internal_ops = {
601         .open = ov2685_open,
602 };
603 #endif
604
605 static const struct v4l2_ctrl_ops ov2685_ctrl_ops = {
606         .s_ctrl = ov2685_set_ctrl,
607 };
608
609 static int ov2685_initialize_controls(struct ov2685 *ov2685)
610 {
611         const struct ov2685_mode *mode;
612         struct v4l2_ctrl_handler *handler;
613         struct v4l2_ctrl *ctrl;
614         u64 exposure_max;
615         u32 pixel_rate, h_blank;
616         int ret;
617
618         handler = &ov2685->ctrl_handler;
619         mode = ov2685->cur_mode;
620         ret = v4l2_ctrl_handler_init(handler, 8);
621         if (ret)
622                 return ret;
623         handler->lock = &ov2685->mutex;
624
625         ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
626                                       0, 0, link_freq_menu_items);
627         if (ctrl)
628                 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
629
630         pixel_rate = (link_freq_menu_items[0] * 2 * OV2685_LANES) /
631                      OV2685_BITS_PER_SAMPLE;
632         v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
633                           0, pixel_rate, 1, pixel_rate);
634
635         h_blank = mode->hts_def - mode->width;
636         ov2685->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
637                                 h_blank, h_blank, 1, h_blank);
638         if (ov2685->hblank)
639                 ov2685->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
640
641         ov2685->vblank = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
642                                 V4L2_CID_VBLANK, mode->vts_def - mode->height,
643                                 OV2685_VTS_MAX - mode->height, 1,
644                                 mode->vts_def - mode->height);
645
646         exposure_max = mode->vts_def - 4;
647         ov2685->exposure = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
648                                 V4L2_CID_EXPOSURE, OV2685_EXPOSURE_MIN,
649                                 exposure_max, OV2685_EXPOSURE_STEP,
650                                 mode->exp_def);
651
652         ov2685->anal_gain = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
653                                 V4L2_CID_ANALOGUE_GAIN, OV2685_GAIN_MIN,
654                                 OV2685_GAIN_MAX, OV2685_GAIN_STEP,
655                                 OV2685_GAIN_DEFAULT);
656
657         ov2685->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
658                                 &ov2685_ctrl_ops, V4L2_CID_TEST_PATTERN,
659                                 ARRAY_SIZE(ov2685_test_pattern_menu) - 1,
660                                 0, 0, ov2685_test_pattern_menu);
661
662         if (handler->error) {
663                 ret = handler->error;
664                 dev_err(&ov2685->client->dev,
665                         "Failed to init controls(%d)\n", ret);
666                 goto err_free_handler;
667         }
668
669         ov2685->subdev.ctrl_handler = handler;
670
671         return 0;
672
673 err_free_handler:
674         v4l2_ctrl_handler_free(handler);
675
676         return ret;
677 }
678
679 static int ov2685_check_sensor_id(struct ov2685 *ov2685,
680                                   struct i2c_client *client)
681 {
682         struct device *dev = &ov2685->client->dev;
683         int ret;
684         u32 id = 0;
685
686         ret = ov2685_read_reg(client, OV2685_REG_CHIP_ID,
687                               OV2685_REG_VALUE_16BIT, &id);
688         if (id != CHIP_ID) {
689                 dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret);
690                 return ret;
691         }
692
693         dev_info(dev, "Detected OV%04x sensor\n", CHIP_ID);
694
695         return 0;
696 }
697
698 static int ov2685_configure_regulators(struct ov2685 *ov2685)
699 {
700         int i;
701
702         for (i = 0; i < OV2685_NUM_SUPPLIES; i++)
703                 ov2685->supplies[i].supply = ov2685_supply_names[i];
704
705         return devm_regulator_bulk_get(&ov2685->client->dev,
706                                        OV2685_NUM_SUPPLIES,
707                                        ov2685->supplies);
708 }
709
710 static int ov2685_probe(struct i2c_client *client,
711                         const struct i2c_device_id *id)
712 {
713         struct device *dev = &client->dev;
714         struct ov2685 *ov2685;
715         int ret;
716
717         ov2685 = devm_kzalloc(dev, sizeof(*ov2685), GFP_KERNEL);
718         if (!ov2685)
719                 return -ENOMEM;
720
721         ov2685->client = client;
722         ov2685->cur_mode = &supported_modes[0];
723
724         ov2685->xvclk = devm_clk_get(dev, "xvclk");
725         if (IS_ERR(ov2685->xvclk)) {
726                 dev_err(dev, "Failed to get xvclk\n");
727                 return -EINVAL;
728         }
729         ret = clk_set_rate(ov2685->xvclk, OV2685_XVCLK_FREQ);
730         if (ret < 0) {
731                 dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
732                 return ret;
733         }
734         if (clk_get_rate(ov2685->xvclk) != OV2685_XVCLK_FREQ)
735                 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
736
737         ov2685->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
738         if (IS_ERR(ov2685->reset_gpio)) {
739                 dev_err(dev, "Failed to get reset-gpios\n");
740                 return -EINVAL;
741         }
742
743         ret = ov2685_configure_regulators(ov2685);
744         if (ret) {
745                 dev_err(dev, "Failed to get power regulators\n");
746                 return ret;
747         }
748
749         mutex_init(&ov2685->mutex);
750         v4l2_i2c_subdev_init(&ov2685->subdev, client, &ov2685_subdev_ops);
751         ret = ov2685_initialize_controls(ov2685);
752         if (ret)
753                 goto err_destroy_mutex;
754
755         ret = __ov2685_power_on(ov2685);
756         if (ret)
757                 goto err_free_handler;
758
759         ret = ov2685_check_sensor_id(ov2685, client);
760         if (ret)
761                 goto err_power_off;
762
763 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
764         ov2685->subdev.internal_ops = &ov2685_internal_ops;
765         ov2685->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
766 #endif
767 #if defined(CONFIG_MEDIA_CONTROLLER)
768         ov2685->pad.flags = MEDIA_PAD_FL_SOURCE;
769         ov2685->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
770         ret = media_entity_pads_init(&ov2685->subdev.entity, 1, &ov2685->pad);
771         if (ret < 0)
772                 goto err_power_off;
773 #endif
774
775         ret = v4l2_async_register_subdev(&ov2685->subdev);
776         if (ret) {
777                 dev_err(dev, "v4l2 async register subdev failed\n");
778                 goto err_clean_entity;
779         }
780
781         pm_runtime_set_active(dev);
782         pm_runtime_enable(dev);
783         pm_runtime_idle(dev);
784
785         return 0;
786
787 err_clean_entity:
788 #if defined(CONFIG_MEDIA_CONTROLLER)
789         media_entity_cleanup(&ov2685->subdev.entity);
790 #endif
791 err_power_off:
792         __ov2685_power_off(ov2685);
793 err_free_handler:
794         v4l2_ctrl_handler_free(&ov2685->ctrl_handler);
795 err_destroy_mutex:
796         mutex_destroy(&ov2685->mutex);
797
798         return ret;
799 }
800
801 static int ov2685_remove(struct i2c_client *client)
802 {
803         struct v4l2_subdev *sd = i2c_get_clientdata(client);
804         struct ov2685 *ov2685 = to_ov2685(sd);
805
806         v4l2_async_unregister_subdev(sd);
807 #if defined(CONFIG_MEDIA_CONTROLLER)
808         media_entity_cleanup(&sd->entity);
809 #endif
810         v4l2_ctrl_handler_free(&ov2685->ctrl_handler);
811         mutex_destroy(&ov2685->mutex);
812
813         pm_runtime_disable(&client->dev);
814         if (!pm_runtime_status_suspended(&client->dev))
815                 __ov2685_power_off(ov2685);
816         pm_runtime_set_suspended(&client->dev);
817
818         return 0;
819 }
820
821 #if IS_ENABLED(CONFIG_OF)
822 static const struct of_device_id ov2685_of_match[] = {
823         { .compatible = "ovti,ov2685" },
824         {},
825 };
826 MODULE_DEVICE_TABLE(of, ov2685_of_match);
827 #endif
828
829 static struct i2c_driver ov2685_i2c_driver = {
830         .driver = {
831                 .name = "ov2685",
832                 .pm = &ov2685_pm_ops,
833                 .of_match_table = of_match_ptr(ov2685_of_match),
834         },
835         .probe          = &ov2685_probe,
836         .remove         = &ov2685_remove,
837 };
838
839 module_i2c_driver(ov2685_i2c_driver);
840
841 MODULE_DESCRIPTION("OmniVision ov2685 sensor driver");
842 MODULE_LICENSE("GPL v2");