drivers/media/i2c/ov13b10.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (c) 2021 Intel Corporation.
   3
   4 #include <linux/acpi.h>
   5 #include <linux/i2c.h>
   6 #include <linux/module.h>
   7 #include <linux/pm_runtime.h>
   8 #include <media/v4l2-ctrls.h>
   9 #include <media/v4l2-device.h>
  10 #include <media/v4l2-fwnode.h>
  11
  12 #define OV13B10_REG_VALUE_08BIT         1
  13 #define OV13B10_REG_VALUE_16BIT         2
  14 #define OV13B10_REG_VALUE_24BIT         3
  15
  16 #define OV13B10_REG_MODE_SELECT         0x0100
  17 #define OV13B10_MODE_STANDBY            0x00
  18 #define OV13B10_MODE_STREAMING          0x01
  19
  20 #define OV13B10_REG_SOFTWARE_RST        0x0103
  21 #define OV13B10_SOFTWARE_RST            0x01
  22
  23 /* Chip ID */
  24 #define OV13B10_REG_CHIP_ID             0x300a
  25 #define OV13B10_CHIP_ID                 0x560d42
  26
  27 /* V_TIMING internal */
  28 #define OV13B10_REG_VTS                 0x380e
  29 #define OV13B10_VTS_30FPS               0x0c7c
  30 #define OV13B10_VTS_60FPS               0x063e
  31 #define OV13B10_VTS_MAX                 0x7fff
  32
  33 /* HBLANK control - read only */
  34 #define OV13B10_PPL_560MHZ              4704
  35
  36 /* Exposure control */
  37 #define OV13B10_REG_EXPOSURE            0x3500
  38 #define OV13B10_EXPOSURE_MIN            4
  39 #define OV13B10_EXPOSURE_STEP           1
  40 #define OV13B10_EXPOSURE_DEFAULT        0x40
  41
  42 /* Analog gain control */
  43 #define OV13B10_REG_ANALOG_GAIN         0x3508
  44 #define OV13B10_ANA_GAIN_MIN            0x80
  45 #define OV13B10_ANA_GAIN_MAX            0x07c0
  46 #define OV13B10_ANA_GAIN_STEP           1
  47 #define OV13B10_ANA_GAIN_DEFAULT        0x80
  48
  49 /* Digital gain control */
  50 #define OV13B10_REG_DGTL_GAIN_H         0x350a
  51 #define OV13B10_REG_DGTL_GAIN_M         0x350b
  52 #define OV13B10_REG_DGTL_GAIN_L         0x350c
  53
  54 #define OV13B10_DGTL_GAIN_MIN           1024         /* Min = 1 X */
  55 #define OV13B10_DGTL_GAIN_MAX           (4096 - 1)   /* Max = 4 X */
  56 #define OV13B10_DGTL_GAIN_DEFAULT       2560         /* Default gain = 2.5 X */
  57 #define OV13B10_DGTL_GAIN_STEP          1            /* Each step = 1/1024 */
  58
  59 #define OV13B10_DGTL_GAIN_L_SHIFT       6
  60 #define OV13B10_DGTL_GAIN_L_MASK        0x3
  61 #define OV13B10_DGTL_GAIN_M_SHIFT       2
  62 #define OV13B10_DGTL_GAIN_M_MASK        0xff
  63 #define OV13B10_DGTL_GAIN_H_SHIFT       10
  64 #define OV13B10_DGTL_GAIN_H_MASK        0x3
  65
  66 /* Test Pattern Control */
  67 #define OV13B10_REG_TEST_PATTERN        0x5080
  68 #define OV13B10_TEST_PATTERN_ENABLE     BIT(7)
  69 #define OV13B10_TEST_PATTERN_MASK       0xf3
  70 #define OV13B10_TEST_PATTERN_BAR_SHIFT  2
  71
  72 /* Flip Control */
  73 #define OV13B10_REG_FORMAT1             0x3820
  74 #define OV13B10_REG_FORMAT2             0x3821
  75
  76 /* Horizontal Window Offset */
  77 #define OV13B10_REG_H_WIN_OFFSET        0x3811
  78
  79 /* Vertical Window Offset */
  80 #define OV13B10_REG_V_WIN_OFFSET        0x3813
  81
  82 struct ov13b10_reg {
  83         u16 address;
  84         u8 val;
  85 };
  86
  87 struct ov13b10_reg_list {
  88         u32 num_of_regs;
  89         const struct ov13b10_reg *regs;
  90 };
  91
  92 /* Link frequency config */
  93 struct ov13b10_link_freq_config {
  94         u32 pixels_per_line;
  95
  96         /* registers for this link frequency */
  97         struct ov13b10_reg_list reg_list;
  98 };
  99
 100 /* Mode : resolution and related config&values */
 101 struct ov13b10_mode {
 102         /* Frame width */
 103         u32 width;
 104         /* Frame height */
 105         u32 height;
 106
 107         /* V-timing */
 108         u32 vts_def;
 109         u32 vts_min;
 110
 111         /* Index of Link frequency config to be used */
 112         u32 link_freq_index;
 113         /* Default register values */
 114         struct ov13b10_reg_list reg_list;
 115 };
 116
 117 /* 4208x3120 needs 1120Mbps/lane, 4 lanes */
 118 static const struct ov13b10_reg mipi_data_rate_1120mbps[] = {
 119         {0x0103, 0x01},
 120         {0x0303, 0x04},
 121         {0x0305, 0xaf},
 122         {0x0321, 0x00},
 123         {0x0323, 0x04},
 124         {0x0324, 0x01},
 125         {0x0325, 0xa4},
 126         {0x0326, 0x81},
 127         {0x0327, 0x04},
 128         {0x3012, 0x07},
 129         {0x3013, 0x32},
 130         {0x3107, 0x23},
 131         {0x3501, 0x0c},
 132         {0x3502, 0x10},
 133         {0x3504, 0x08},
 134         {0x3508, 0x07},
 135         {0x3509, 0xc0},
 136         {0x3600, 0x16},
 137         {0x3601, 0x54},
 138         {0x3612, 0x4e},
 139         {0x3620, 0x00},
 140         {0x3621, 0x68},
 141         {0x3622, 0x66},
 142         {0x3623, 0x03},
 143         {0x3662, 0x92},
 144         {0x3666, 0xbb},
 145         {0x3667, 0x44},
 146         {0x366e, 0xff},
 147         {0x366f, 0xf3},
 148         {0x3675, 0x44},
 149         {0x3676, 0x00},
 150         {0x367f, 0xe9},
 151         {0x3681, 0x32},
 152         {0x3682, 0x1f},
 153         {0x3683, 0x0b},
 154         {0x3684, 0x0b},
 155         {0x3704, 0x0f},
 156         {0x3706, 0x40},
 157         {0x3708, 0x3b},
 158         {0x3709, 0x72},
 159         {0x370b, 0xa2},
 160         {0x3714, 0x24},
 161         {0x371a, 0x3e},
 162         {0x3725, 0x42},
 163         {0x3739, 0x12},
 164         {0x3767, 0x00},
 165         {0x377a, 0x0d},
 166         {0x3789, 0x18},
 167         {0x3790, 0x40},
 168         {0x3791, 0xa2},
 169         {0x37c2, 0x04},
 170         {0x37c3, 0xf1},
 171         {0x37d9, 0x0c},
 172         {0x37da, 0x02},
 173         {0x37dc, 0x02},
 174         {0x37e1, 0x04},
 175         {0x37e2, 0x0a},
 176         {0x3800, 0x00},
 177         {0x3801, 0x00},
 178         {0x3802, 0x00},
 179         {0x3803, 0x08},
 180         {0x3804, 0x10},
 181         {0x3805, 0x8f},
 182         {0x3806, 0x0c},
 183         {0x3807, 0x47},
 184         {0x3808, 0x10},
 185         {0x3809, 0x70},
 186         {0x380a, 0x0c},
 187         {0x380b, 0x30},
 188         {0x380c, 0x04},
 189         {0x380d, 0x98},
 190         {0x380e, 0x0c},
 191         {0x380f, 0x7c},
 192         {0x3811, 0x0f},
 193         {0x3813, 0x09},
 194         {0x3814, 0x01},
 195         {0x3815, 0x01},
 196         {0x3816, 0x01},
 197         {0x3817, 0x01},
 198         {0x381f, 0x08},
 199         {0x3820, 0x88},
 200         {0x3821, 0x00},
 201         {0x3822, 0x14},
 202         {0x382e, 0xe6},
 203         {0x3c80, 0x00},
 204         {0x3c87, 0x01},
 205         {0x3c8c, 0x19},
 206         {0x3c8d, 0x1c},
 207         {0x3ca0, 0x00},
 208         {0x3ca1, 0x00},
 209         {0x3ca2, 0x00},
 210         {0x3ca3, 0x00},
 211         {0x3ca4, 0x50},
 212         {0x3ca5, 0x11},
 213         {0x3ca6, 0x01},
 214         {0x3ca7, 0x00},
 215         {0x3ca8, 0x00},
 216         {0x4008, 0x02},
 217         {0x4009, 0x0f},
 218         {0x400a, 0x01},
 219         {0x400b, 0x19},
 220         {0x4011, 0x21},
 221         {0x4017, 0x08},
 222         {0x4019, 0x04},
 223         {0x401a, 0x58},
 224         {0x4032, 0x1e},
 225         {0x4050, 0x02},
 226         {0x4051, 0x09},
 227         {0x405e, 0x00},
 228         {0x4066, 0x02},
 229         {0x4501, 0x00},
 230         {0x4502, 0x10},
 231         {0x4505, 0x00},
 232         {0x4800, 0x64},
 233         {0x481b, 0x3e},
 234         {0x481f, 0x30},
 235         {0x4825, 0x34},
 236         {0x4837, 0x0e},
 237         {0x484b, 0x01},
 238         {0x4883, 0x02},
 239         {0x5000, 0xff},
 240         {0x5001, 0x0f},
 241         {0x5045, 0x20},
 242         {0x5046, 0x20},
 243         {0x5047, 0xa4},
 244         {0x5048, 0x20},
 245         {0x5049, 0xa4},
 246 };
 247
 248 static const struct ov13b10_reg mode_4208x3120_regs[] = {
 249         {0x0305, 0xaf},
 250         {0x3501, 0x0c},
 251         {0x3662, 0x92},
 252         {0x3714, 0x24},
 253         {0x3739, 0x12},
 254         {0x37c2, 0x04},
 255         {0x37d9, 0x0c},
 256         {0x37e2, 0x0a},
 257         {0x3800, 0x00},
 258         {0x3801, 0x00},
 259         {0x3802, 0x00},
 260         {0x3803, 0x08},
 261         {0x3804, 0x10},
 262         {0x3805, 0x8f},
 263         {0x3806, 0x0c},
 264         {0x3807, 0x47},
 265         {0x3808, 0x10},
 266         {0x3809, 0x70},
 267         {0x380a, 0x0c},
 268         {0x380b, 0x30},
 269         {0x380c, 0x04},
 270         {0x380d, 0x98},
 271         {0x380e, 0x0c},
 272         {0x380f, 0x7c},
 273         {0x3810, 0x00},
 274         {0x3811, 0x0f},
 275         {0x3812, 0x00},
 276         {0x3813, 0x09},
 277         {0x3814, 0x01},
 278         {0x3816, 0x01},
 279         {0x3820, 0x88},
 280         {0x3c8c, 0x19},
 281         {0x4008, 0x02},
 282         {0x4009, 0x0f},
 283         {0x4050, 0x02},
 284         {0x4051, 0x09},
 285         {0x4501, 0x00},
 286         {0x4505, 0x00},
 287         {0x4837, 0x0e},
 288         {0x5000, 0xff},
 289         {0x5001, 0x0f},
 290 };
 291
 292 static const struct ov13b10_reg mode_4160x3120_regs[] = {
 293         {0x0305, 0xaf},
 294         {0x3501, 0x0c},
 295         {0x3662, 0x92},
 296         {0x3714, 0x24},
 297         {0x3739, 0x12},
 298         {0x37c2, 0x04},
 299         {0x37d9, 0x0c},
 300         {0x37e2, 0x0a},
 301         {0x3800, 0x00},
 302         {0x3801, 0x00},
 303         {0x3802, 0x00},
 304         {0x3803, 0x08},
 305         {0x3804, 0x10},
 306         {0x3805, 0x8f},
 307         {0x3806, 0x0c},
 308         {0x3807, 0x47},
 309         {0x3808, 0x10},
 310         {0x3809, 0x40},
 311         {0x380a, 0x0c},
 312         {0x380b, 0x30},
 313         {0x380c, 0x04},
 314         {0x380d, 0x98},
 315         {0x380e, 0x0c},
 316         {0x380f, 0x7c},
 317         {0x3810, 0x00},
 318         {0x3811, 0x27},
 319         {0x3812, 0x00},
 320         {0x3813, 0x09},
 321         {0x3814, 0x01},
 322         {0x3816, 0x01},
 323         {0x3820, 0x88},
 324         {0x3c8c, 0x19},
 325         {0x4008, 0x02},
 326         {0x4009, 0x0f},
 327         {0x4050, 0x02},
 328         {0x4051, 0x09},
 329         {0x4501, 0x00},
 330         {0x4505, 0x00},
 331         {0x4837, 0x0e},
 332         {0x5000, 0xff},
 333         {0x5001, 0x0f},
 334 };
 335
 336 static const struct ov13b10_reg mode_4160x2340_regs[] = {
 337         {0x0305, 0xaf},
 338         {0x3501, 0x0c},
 339         {0x3662, 0x92},
 340         {0x3714, 0x24},
 341         {0x3739, 0x12},
 342         {0x37c2, 0x04},
 343         {0x37d9, 0x0c},
 344         {0x37e2, 0x0a},
 345         {0x3800, 0x00},
 346         {0x3801, 0x00},
 347         {0x3802, 0x00},
 348         {0x3803, 0x08},
 349         {0x3804, 0x10},
 350         {0x3805, 0x8f},
 351         {0x3806, 0x0c},
 352         {0x3807, 0x47},
 353         {0x3808, 0x10},
 354         {0x3809, 0x40},
 355         {0x380a, 0x09},
 356         {0x380b, 0x24},
 357         {0x380c, 0x04},
 358         {0x380d, 0x98},
 359         {0x380e, 0x0c},
 360         {0x380f, 0x7c},
 361         {0x3810, 0x00},
 362         {0x3811, 0x27},
 363         {0x3812, 0x01},
 364         {0x3813, 0x8f},
 365         {0x3814, 0x01},
 366         {0x3816, 0x01},
 367         {0x3820, 0x88},
 368         {0x3c8c, 0x19},
 369         {0x4008, 0x02},
 370         {0x4009, 0x0f},
 371         {0x4050, 0x02},
 372         {0x4051, 0x09},
 373         {0x4501, 0x00},
 374         {0x4505, 0x00},
 375         {0x4837, 0x0e},
 376         {0x5000, 0xff},
 377         {0x5001, 0x0f},
 378 };
 379
 380 static const struct ov13b10_reg mode_2104x1560_regs[] = {
 381         {0x0305, 0xaf},
 382         {0x3501, 0x06},
 383         {0x3662, 0x88},
 384         {0x3714, 0x28},
 385         {0x3739, 0x10},
 386         {0x37c2, 0x14},
 387         {0x37d9, 0x06},
 388         {0x37e2, 0x0c},
 389         {0x3800, 0x00},
 390         {0x3801, 0x00},
 391         {0x3802, 0x00},
 392         {0x3803, 0x08},
 393         {0x3804, 0x10},
 394         {0x3805, 0x8f},
 395         {0x3806, 0x0c},
 396         {0x3807, 0x47},
 397         {0x3808, 0x08},
 398         {0x3809, 0x38},
 399         {0x380a, 0x06},
 400         {0x380b, 0x18},
 401         {0x380c, 0x04},
 402         {0x380d, 0x98},
 403         {0x380e, 0x06},
 404         {0x380f, 0x3e},
 405         {0x3810, 0x00},
 406         {0x3811, 0x07},
 407         {0x3812, 0x00},
 408         {0x3813, 0x05},
 409         {0x3814, 0x03},
 410         {0x3816, 0x03},
 411         {0x3820, 0x8b},
 412         {0x3c8c, 0x18},
 413         {0x4008, 0x00},
 414         {0x4009, 0x05},
 415         {0x4050, 0x00},
 416         {0x4051, 0x05},
 417         {0x4501, 0x08},
 418         {0x4505, 0x00},
 419         {0x4837, 0x0e},
 420         {0x5000, 0xfd},
 421         {0x5001, 0x0d},
 422 };
 423
 424 static const struct ov13b10_reg mode_2080x1170_regs[] = {
 425         {0x0305, 0xaf},
 426         {0x3501, 0x06},
 427         {0x3662, 0x88},
 428         {0x3714, 0x28},
 429         {0x3739, 0x10},
 430         {0x37c2, 0x14},
 431         {0x37d9, 0x06},
 432         {0x37e2, 0x0c},
 433         {0x3800, 0x00},
 434         {0x3801, 0x00},
 435         {0x3802, 0x00},
 436         {0x3803, 0x08},
 437         {0x3804, 0x10},
 438         {0x3805, 0x8f},
 439         {0x3806, 0x0c},
 440         {0x3807, 0x47},
 441         {0x3808, 0x08},
 442         {0x3809, 0x20},
 443         {0x380a, 0x04},
 444         {0x380b, 0x92},
 445         {0x380c, 0x04},
 446         {0x380d, 0x98},
 447         {0x380e, 0x06},
 448         {0x380f, 0x3e},
 449         {0x3810, 0x00},
 450         {0x3811, 0x13},
 451         {0x3812, 0x00},
 452         {0x3813, 0xc9},
 453         {0x3814, 0x03},
 454         {0x3816, 0x03},
 455         {0x3820, 0x8b},
 456         {0x3c8c, 0x18},
 457         {0x4008, 0x00},
 458         {0x4009, 0x05},
 459         {0x4050, 0x00},
 460         {0x4051, 0x05},
 461         {0x4501, 0x08},
 462         {0x4505, 0x00},
 463         {0x4837, 0x0e},
 464         {0x5000, 0xfd},
 465         {0x5001, 0x0d},
 466 };
 467
 468 static const char * const ov13b10_test_pattern_menu[] = {
 469         "Disabled",
 470         "Vertical Color Bar Type 1",
 471         "Vertical Color Bar Type 2",
 472         "Vertical Color Bar Type 3",
 473         "Vertical Color Bar Type 4"
 474 };
 475
 476 /* Configurations for supported link frequencies */
 477 #define OV13B10_LINK_FREQ_560MHZ        560000000ULL
 478 #define OV13B10_LINK_FREQ_INDEX_0       0
 479
 480 #define OV13B10_EXT_CLK                 19200000
 481 #define OV13B10_DATA_LANES              4
 482
 483 /*
 484  * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample
 485  * data rate => double data rate; number of lanes => 4; bits per pixel => 10
 486  */
 487 static u64 link_freq_to_pixel_rate(u64 f)
 488 {
 489         f *= 2 * OV13B10_DATA_LANES;
 490         do_div(f, 10);
 491
 492         return f;
 493 }
 494
 495 /* Menu items for LINK_FREQ V4L2 control */
 496 static const s64 link_freq_menu_items[] = {
 497         OV13B10_LINK_FREQ_560MHZ
 498 };
 499
 500 /* Link frequency configs */
 501 static const struct ov13b10_link_freq_config
 502                         link_freq_configs[] = {
 503         {
 504                 .pixels_per_line = OV13B10_PPL_560MHZ,
 505                 .reg_list = {
 506                         .num_of_regs = ARRAY_SIZE(mipi_data_rate_1120mbps),
 507                         .regs = mipi_data_rate_1120mbps,
 508                 }
 509         }
 510 };
 511
 512 /* Mode configs */
 513 static const struct ov13b10_mode supported_modes[] = {
 514         {
 515                 .width = 4208,
 516                 .height = 3120,
 517                 .vts_def = OV13B10_VTS_30FPS,
 518                 .vts_min = OV13B10_VTS_30FPS,
 519                 .reg_list = {
 520                         .num_of_regs = ARRAY_SIZE(mode_4208x3120_regs),
 521                         .regs = mode_4208x3120_regs,
 522                 },
 523                 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
 524         },
 525         {
 526                 .width = 4160,
 527                 .height = 3120,
 528                 .vts_def = OV13B10_VTS_30FPS,
 529                 .vts_min = OV13B10_VTS_30FPS,
 530                 .reg_list = {
 531                         .num_of_regs = ARRAY_SIZE(mode_4160x3120_regs),
 532                         .regs = mode_4160x3120_regs,
 533                 },
 534                 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
 535         },
 536         {
 537                 .width = 4160,
 538                 .height = 2340,
 539                 .vts_def = OV13B10_VTS_30FPS,
 540                 .vts_min = OV13B10_VTS_30FPS,
 541                 .reg_list = {
 542                         .num_of_regs = ARRAY_SIZE(mode_4160x2340_regs),
 543                         .regs = mode_4160x2340_regs,
 544                 },
 545                 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
 546         },
 547         {
 548                 .width = 2104,
 549                 .height = 1560,
 550                 .vts_def = OV13B10_VTS_60FPS,
 551                 .vts_min = OV13B10_VTS_60FPS,
 552                 .reg_list = {
 553                         .num_of_regs = ARRAY_SIZE(mode_2104x1560_regs),
 554                         .regs = mode_2104x1560_regs,
 555                 },
 556                 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
 557         },
 558         {
 559                 .width = 2080,
 560                 .height = 1170,
 561                 .vts_def = OV13B10_VTS_60FPS,
 562                 .vts_min = OV13B10_VTS_60FPS,
 563                 .reg_list = {
 564                         .num_of_regs = ARRAY_SIZE(mode_2080x1170_regs),
 565                         .regs = mode_2080x1170_regs,
 566                 },
 567                 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
 568         }
 569 };
 570
 571 struct ov13b10 {
 572         struct v4l2_subdev sd;
 573         struct media_pad pad;
 574
 575         struct v4l2_ctrl_handler ctrl_handler;
 576         /* V4L2 Controls */
 577         struct v4l2_ctrl *link_freq;
 578         struct v4l2_ctrl *pixel_rate;
 579         struct v4l2_ctrl *vblank;
 580         struct v4l2_ctrl *hblank;
 581         struct v4l2_ctrl *exposure;
 582
 583         /* Current mode */
 584         const struct ov13b10_mode *cur_mode;
 585
 586         /* Mutex for serialized access */
 587         struct mutex mutex;
 588
 589         /* Streaming on/off */
 590         bool streaming;
 591
 592         /* True if the device has been identified */
 593         bool identified;
 594 };
 595
 596 #define to_ov13b10(_sd) container_of(_sd, struct ov13b10, sd)
 597
 598 /* Read registers up to 4 at a time */
 599 static int ov13b10_read_reg(struct ov13b10 *ov13b,
 600                             u16 reg, u32 len, u32 *val)
 601 {
 602         struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
 603         struct i2c_msg msgs[2];
 604         u8 *data_be_p;
 605         int ret;
 606         __be32 data_be = 0;
 607         __be16 reg_addr_be = cpu_to_be16(reg);
 608
 609         if (len > 4)
 610                 return -EINVAL;
 611
 612         data_be_p = (u8 *)&data_be;
 613         /* Write register address */
 614         msgs[0].addr = client->addr;
 615         msgs[0].flags = 0;
 616         msgs[0].len = 2;
 617         msgs[0].buf = (u8 *)&reg_addr_be;
 618
 619         /* Read data from register */
 620         msgs[1].addr = client->addr;
 621         msgs[1].flags = I2C_M_RD;
 622         msgs[1].len = len;
 623         msgs[1].buf = &data_be_p[4 - len];
 624
 625         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 626         if (ret != ARRAY_SIZE(msgs))
 627                 return -EIO;
 628
 629         *val = be32_to_cpu(data_be);
 630
 631         return 0;
 632 }
 633
 634 /* Write registers up to 4 at a time */
 635 static int ov13b10_write_reg(struct ov13b10 *ov13b,
 636                              u16 reg, u32 len, u32 __val)
 637 {
 638         struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
 639         int buf_i, val_i;
 640         u8 buf[6], *val_p;
 641         __be32 val;
 642
 643         if (len > 4)
 644                 return -EINVAL;
 645
 646         buf[0] = reg >> 8;
 647         buf[1] = reg & 0xff;
 648
 649         val = cpu_to_be32(__val);
 650         val_p = (u8 *)&val;
 651         buf_i = 2;
 652         val_i = 4 - len;
 653
 654         while (val_i < 4)
 655                 buf[buf_i++] = val_p[val_i++];
 656
 657         if (i2c_master_send(client, buf, len + 2) != len + 2)
 658                 return -EIO;
 659
 660         return 0;
 661 }
 662
 663 /* Write a list of registers */
 664 static int ov13b10_write_regs(struct ov13b10 *ov13b,
 665                               const struct ov13b10_reg *regs, u32 len)
 666 {
 667         struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
 668         int ret;
 669         u32 i;
 670
 671         for (i = 0; i < len; i++) {
 672                 ret = ov13b10_write_reg(ov13b, regs[i].address, 1,
 673                                         regs[i].val);
 674                 if (ret) {
 675                         dev_err_ratelimited(&client->dev,
 676                                             "Failed to write reg 0x%4.4x. error = %d\n",
 677                                             regs[i].address, ret);
 678
 679                         return ret;
 680                 }
 681         }
 682
 683         return 0;
 684 }
 685
 686 static int ov13b10_write_reg_list(struct ov13b10 *ov13b,
 687                                   const struct ov13b10_reg_list *r_list)
 688 {
 689         return ov13b10_write_regs(ov13b, r_list->regs, r_list->num_of_regs);
 690 }
 691
 692 /* Open sub-device */
 693 static int ov13b10_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
 694 {
 695         const struct ov13b10_mode *default_mode = &supported_modes[0];
 696         struct ov13b10 *ov13b = to_ov13b10(sd);
 697         struct v4l2_mbus_framefmt *try_fmt = v4l2_subdev_get_try_format(sd,
 698                                                                         fh->state,
 699                                                                         0);
 700
 701         mutex_lock(&ov13b->mutex);
 702
 703         /* Initialize try_fmt */
 704         try_fmt->width = default_mode->width;
 705         try_fmt->height = default_mode->height;
 706         try_fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
 707         try_fmt->field = V4L2_FIELD_NONE;
 708
 709         /* No crop or compose */
 710         mutex_unlock(&ov13b->mutex);
 711
 712         return 0;
 713 }
 714
 715 static int ov13b10_update_digital_gain(struct ov13b10 *ov13b, u32 d_gain)
 716 {
 717         int ret;
 718         u32 val;
 719
 720         /*
 721          * 0x350C[7:6], 0x350B[7:0], 0x350A[1:0]
 722          */
 723
 724         val = (d_gain & OV13B10_DGTL_GAIN_L_MASK) << OV13B10_DGTL_GAIN_L_SHIFT;
 725         ret = ov13b10_write_reg(ov13b, OV13B10_REG_DGTL_GAIN_L,
 726                                 OV13B10_REG_VALUE_08BIT, val);
 727         if (ret)
 728                 return ret;
 729
 730         val = (d_gain >> OV13B10_DGTL_GAIN_M_SHIFT) & OV13B10_DGTL_GAIN_M_MASK;
 731         ret = ov13b10_write_reg(ov13b, OV13B10_REG_DGTL_GAIN_M,
 732                                 OV13B10_REG_VALUE_08BIT, val);
 733         if (ret)
 734                 return ret;
 735
 736         val = (d_gain >> OV13B10_DGTL_GAIN_H_SHIFT) & OV13B10_DGTL_GAIN_H_MASK;
 737         ret = ov13b10_write_reg(ov13b, OV13B10_REG_DGTL_GAIN_H,
 738                                 OV13B10_REG_VALUE_08BIT, val);
 739
 740         return ret;
 741 }
 742
 743 static int ov13b10_enable_test_pattern(struct ov13b10 *ov13b, u32 pattern)
 744 {
 745         int ret;
 746         u32 val;
 747
 748         ret = ov13b10_read_reg(ov13b, OV13B10_REG_TEST_PATTERN,
 749                                OV13B10_REG_VALUE_08BIT, &val);
 750         if (ret)
 751                 return ret;
 752
 753         if (pattern) {
 754                 val &= OV13B10_TEST_PATTERN_MASK;
 755                 val |= ((pattern - 1) << OV13B10_TEST_PATTERN_BAR_SHIFT) |
 756                      OV13B10_TEST_PATTERN_ENABLE;
 757         } else {
 758                 val &= ~OV13B10_TEST_PATTERN_ENABLE;
 759         }
 760
 761         return ov13b10_write_reg(ov13b, OV13B10_REG_TEST_PATTERN,
 762                                  OV13B10_REG_VALUE_08BIT, val);
 763 }
 764
 765 static int ov13b10_set_ctrl_hflip(struct ov13b10 *ov13b, u32 ctrl_val)
 766 {
 767         int ret;
 768         u32 val;
 769
 770         ret = ov13b10_read_reg(ov13b, OV13B10_REG_FORMAT1,
 771                                OV13B10_REG_VALUE_08BIT, &val);
 772         if (ret)
 773                 return ret;
 774
 775         ret = ov13b10_write_reg(ov13b, OV13B10_REG_FORMAT1,
 776                                 OV13B10_REG_VALUE_08BIT,
 777                                 ctrl_val ? val & ~BIT(3) : val);
 778
 779         if (ret)
 780                 return ret;
 781
 782         ret = ov13b10_read_reg(ov13b, OV13B10_REG_H_WIN_OFFSET,
 783                                OV13B10_REG_VALUE_08BIT, &val);
 784         if (ret)
 785                 return ret;
 786
 787         /*
 788          * Applying cropping offset to reverse the change of Bayer order
 789          * after mirroring image
 790          */
 791         return ov13b10_write_reg(ov13b, OV13B10_REG_H_WIN_OFFSET,
 792                                  OV13B10_REG_VALUE_08BIT,
 793                                  ctrl_val ? ++val : val);
 794 }
 795
 796 static int ov13b10_set_ctrl_vflip(struct ov13b10 *ov13b, u32 ctrl_val)
 797 {
 798         int ret;
 799         u32 val;
 800
 801         ret = ov13b10_read_reg(ov13b, OV13B10_REG_FORMAT1,
 802                                OV13B10_REG_VALUE_08BIT, &val);
 803         if (ret)
 804                 return ret;
 805
 806         ret = ov13b10_write_reg(ov13b, OV13B10_REG_FORMAT1,
 807                                 OV13B10_REG_VALUE_08BIT,
 808                                 ctrl_val ? val | BIT(4) | BIT(5)  : val);
 809
 810         if (ret)
 811                 return ret;
 812
 813         ret = ov13b10_read_reg(ov13b, OV13B10_REG_V_WIN_OFFSET,
 814                                OV13B10_REG_VALUE_08BIT, &val);
 815         if (ret)
 816                 return ret;
 817
 818         /*
 819          * Applying cropping offset to reverse the change of Bayer order
 820          * after flipping image
 821          */
 822         return ov13b10_write_reg(ov13b, OV13B10_REG_V_WIN_OFFSET,
 823                                  OV13B10_REG_VALUE_08BIT,
 824                                  ctrl_val ? --val : val);
 825 }
 826
 827 static int ov13b10_set_ctrl(struct v4l2_ctrl *ctrl)
 828 {
 829         struct ov13b10 *ov13b = container_of(ctrl->handler,
 830                                              struct ov13b10, ctrl_handler);
 831         struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
 832         s64 max;
 833         int ret;
 834
 835         /* Propagate change of current control to all related controls */
 836         switch (ctrl->id) {
 837         case V4L2_CID_VBLANK:
 838                 /* Update max exposure while meeting expected vblanking */
 839                 max = ov13b->cur_mode->height + ctrl->val - 8;
 840                 __v4l2_ctrl_modify_range(ov13b->exposure,
 841                                          ov13b->exposure->minimum,
 842                                          max, ov13b->exposure->step, max);
 843                 break;
 844         }
 845
 846         /*
 847          * Applying V4L2 control value only happens
 848          * when power is up for streaming
 849          */
 850         if (!pm_runtime_get_if_in_use(&client->dev))
 851                 return 0;
 852
 853         ret = 0;
 854         switch (ctrl->id) {
 855         case V4L2_CID_ANALOGUE_GAIN:
 856                 ret = ov13b10_write_reg(ov13b, OV13B10_REG_ANALOG_GAIN,
 857                                         OV13B10_REG_VALUE_16BIT,
 858                                         ctrl->val << 1);
 859                 break;
 860         case V4L2_CID_DIGITAL_GAIN:
 861                 ret = ov13b10_update_digital_gain(ov13b, ctrl->val);
 862                 break;
 863         case V4L2_CID_EXPOSURE:
 864                 ret = ov13b10_write_reg(ov13b, OV13B10_REG_EXPOSURE,
 865                                         OV13B10_REG_VALUE_24BIT,
 866                                         ctrl->val);
 867                 break;
 868         case V4L2_CID_VBLANK:
 869                 ret = ov13b10_write_reg(ov13b, OV13B10_REG_VTS,
 870                                         OV13B10_REG_VALUE_16BIT,
 871                                         ov13b->cur_mode->height
 872                                         + ctrl->val);
 873                 break;
 874         case V4L2_CID_TEST_PATTERN:
 875                 ret = ov13b10_enable_test_pattern(ov13b, ctrl->val);
 876                 break;
 877         case V4L2_CID_HFLIP:
 878                 ov13b10_set_ctrl_hflip(ov13b, ctrl->val);
 879                 break;
 880         case V4L2_CID_VFLIP:
 881                 ov13b10_set_ctrl_vflip(ov13b, ctrl->val);
 882                 break;
 883         default:
 884                 dev_info(&client->dev,
 885                          "ctrl(id:0x%x,val:0x%x) is not handled\n",
 886                          ctrl->id, ctrl->val);
 887                 break;
 888         }
 889
 890         pm_runtime_put(&client->dev);
 891
 892         return ret;
 893 }
 894
 895 static const struct v4l2_ctrl_ops ov13b10_ctrl_ops = {
 896         .s_ctrl = ov13b10_set_ctrl,
 897 };
 898
 899 static int ov13b10_enum_mbus_code(struct v4l2_subdev *sd,
 900                                   struct v4l2_subdev_state *sd_state,
 901                                   struct v4l2_subdev_mbus_code_enum *code)
 902 {
 903         /* Only one bayer order(GRBG) is supported */
 904         if (code->index > 0)
 905                 return -EINVAL;
 906
 907         code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
 908
 909         return 0;
 910 }
 911
 912 static int ov13b10_enum_frame_size(struct v4l2_subdev *sd,
 913                                    struct v4l2_subdev_state *sd_state,
 914                                    struct v4l2_subdev_frame_size_enum *fse)
 915 {
 916         if (fse->index >= ARRAY_SIZE(supported_modes))
 917                 return -EINVAL;
 918
 919         if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
 920                 return -EINVAL;
 921
 922         fse->min_width = supported_modes[fse->index].width;
 923         fse->max_width = fse->min_width;
 924         fse->min_height = supported_modes[fse->index].height;
 925         fse->max_height = fse->min_height;
 926
 927         return 0;
 928 }
 929
 930 static void ov13b10_update_pad_format(const struct ov13b10_mode *mode,
 931                                       struct v4l2_subdev_format *fmt)
 932 {
 933         fmt->format.width = mode->width;
 934         fmt->format.height = mode->height;
 935         fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
 936         fmt->format.field = V4L2_FIELD_NONE;
 937 }
 938
 939 static int ov13b10_do_get_pad_format(struct ov13b10 *ov13b,
 940                                      struct v4l2_subdev_state *sd_state,
 941                                      struct v4l2_subdev_format *fmt)
 942 {
 943         struct v4l2_mbus_framefmt *framefmt;
 944         struct v4l2_subdev *sd = &ov13b->sd;
 945
 946         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 947                 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
 948                 fmt->format = *framefmt;
 949         } else {
 950                 ov13b10_update_pad_format(ov13b->cur_mode, fmt);
 951         }
 952
 953         return 0;
 954 }
 955
 956 static int ov13b10_get_pad_format(struct v4l2_subdev *sd,
 957                                   struct v4l2_subdev_state *sd_state,
 958                                   struct v4l2_subdev_format *fmt)
 959 {
 960         struct ov13b10 *ov13b = to_ov13b10(sd);
 961         int ret;
 962
 963         mutex_lock(&ov13b->mutex);
 964         ret = ov13b10_do_get_pad_format(ov13b, sd_state, fmt);
 965         mutex_unlock(&ov13b->mutex);
 966
 967         return ret;
 968 }
 969
 970 static int
 971 ov13b10_set_pad_format(struct v4l2_subdev *sd,
 972                        struct v4l2_subdev_state *sd_state,
 973                        struct v4l2_subdev_format *fmt)
 974 {
 975         struct ov13b10 *ov13b = to_ov13b10(sd);
 976         const struct ov13b10_mode *mode;
 977         struct v4l2_mbus_framefmt *framefmt;
 978         s32 vblank_def;
 979         s32 vblank_min;
 980         s64 h_blank;
 981         s64 pixel_rate;
 982         s64 link_freq;
 983
 984         mutex_lock(&ov13b->mutex);
 985
 986         /* Only one raw bayer(GRBG) order is supported */
 987         if (fmt->format.code != MEDIA_BUS_FMT_SGRBG10_1X10)
 988                 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
 989
 990         mode = v4l2_find_nearest_size(supported_modes,
 991                                       ARRAY_SIZE(supported_modes),
 992                                       width, height,
 993                                       fmt->format.width, fmt->format.height);
 994         ov13b10_update_pad_format(mode, fmt);
 995         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 996                 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
 997                 *framefmt = fmt->format;
 998         } else {
 999                 ov13b->cur_mode = mode;
1000                 __v4l2_ctrl_s_ctrl(ov13b->link_freq, mode->link_freq_index);
1001                 link_freq = link_freq_menu_items[mode->link_freq_index];
1002                 pixel_rate = link_freq_to_pixel_rate(link_freq);
1003                 __v4l2_ctrl_s_ctrl_int64(ov13b->pixel_rate, pixel_rate);
1004
1005                 /* Update limits and set FPS to default */
1006                 vblank_def = ov13b->cur_mode->vts_def -
1007                              ov13b->cur_mode->height;
1008                 vblank_min = ov13b->cur_mode->vts_min -
1009                              ov13b->cur_mode->height;
1010                 __v4l2_ctrl_modify_range(ov13b->vblank, vblank_min,
1011                                          OV13B10_VTS_MAX
1012                                          - ov13b->cur_mode->height,
1013                                          1,
1014                                          vblank_def);
1015                 __v4l2_ctrl_s_ctrl(ov13b->vblank, vblank_def);
1016                 h_blank =
1017                         link_freq_configs[mode->link_freq_index].pixels_per_line
1018                          - ov13b->cur_mode->width;
1019                 __v4l2_ctrl_modify_range(ov13b->hblank, h_blank,
1020                                          h_blank, 1, h_blank);
1021         }
1022
1023         mutex_unlock(&ov13b->mutex);
1024
1025         return 0;
1026 }
1027
1028 /* Verify chip ID */
1029 static int ov13b10_identify_module(struct ov13b10 *ov13b)
1030 {
1031         struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
1032         int ret;
1033         u32 val;
1034
1035         if (ov13b->identified)
1036                 return 0;
1037
1038         ret = ov13b10_read_reg(ov13b, OV13B10_REG_CHIP_ID,
1039                                OV13B10_REG_VALUE_24BIT, &val);
1040         if (ret)
1041                 return ret;
1042
1043         if (val != OV13B10_CHIP_ID) {
1044                 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1045                         OV13B10_CHIP_ID, val);
1046                 return -EIO;
1047         }
1048
1049         ov13b->identified = true;
1050
1051         return 0;
1052 }
1053
1054 static int ov13b10_start_streaming(struct ov13b10 *ov13b)
1055 {
1056         struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
1057         const struct ov13b10_reg_list *reg_list;
1058         int ret, link_freq_index;
1059
1060         ret = ov13b10_identify_module(ov13b);
1061         if (ret)
1062                 return ret;
1063
1064         /* Get out of from software reset */
1065         ret = ov13b10_write_reg(ov13b, OV13B10_REG_SOFTWARE_RST,
1066                                 OV13B10_REG_VALUE_08BIT, OV13B10_SOFTWARE_RST);
1067         if (ret) {
1068                 dev_err(&client->dev, "%s failed to set powerup registers\n",
1069                         __func__);
1070                 return ret;
1071         }
1072
1073         link_freq_index = ov13b->cur_mode->link_freq_index;
1074         reg_list = &link_freq_configs[link_freq_index].reg_list;
1075         ret = ov13b10_write_reg_list(ov13b, reg_list);
1076         if (ret) {
1077                 dev_err(&client->dev, "%s failed to set plls\n", __func__);
1078                 return ret;
1079         }
1080
1081         /* Apply default values of current mode */
1082         reg_list = &ov13b->cur_mode->reg_list;
1083         ret = ov13b10_write_reg_list(ov13b, reg_list);
1084         if (ret) {
1085                 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1086                 return ret;
1087         }
1088
1089         /* Apply customized values from user */
1090         ret =  __v4l2_ctrl_handler_setup(ov13b->sd.ctrl_handler);
1091         if (ret)
1092                 return ret;
1093
1094         return ov13b10_write_reg(ov13b, OV13B10_REG_MODE_SELECT,
1095                                  OV13B10_REG_VALUE_08BIT,
1096                                  OV13B10_MODE_STREAMING);
1097 }
1098
1099 /* Stop streaming */
1100 static int ov13b10_stop_streaming(struct ov13b10 *ov13b)
1101 {
1102         return ov13b10_write_reg(ov13b, OV13B10_REG_MODE_SELECT,
1103                                  OV13B10_REG_VALUE_08BIT, OV13B10_MODE_STANDBY);
1104 }
1105
1106 static int ov13b10_set_stream(struct v4l2_subdev *sd, int enable)
1107 {
1108         struct ov13b10 *ov13b = to_ov13b10(sd);
1109         struct i2c_client *client = v4l2_get_subdevdata(sd);
1110         int ret = 0;
1111
1112         mutex_lock(&ov13b->mutex);
1113         if (ov13b->streaming == enable) {
1114                 mutex_unlock(&ov13b->mutex);
1115                 return 0;
1116         }
1117
1118         if (enable) {
1119                 ret = pm_runtime_resume_and_get(&client->dev);
1120                 if (ret < 0)
1121                         goto err_unlock;
1122
1123                 /*
1124                  * Apply default & customized values
1125                  * and then start streaming.
1126                  */
1127                 ret = ov13b10_start_streaming(ov13b);
1128                 if (ret)
1129                         goto err_rpm_put;
1130         } else {
1131                 ov13b10_stop_streaming(ov13b);
1132                 pm_runtime_put(&client->dev);
1133         }
1134
1135         ov13b->streaming = enable;
1136         mutex_unlock(&ov13b->mutex);
1137
1138         return ret;
1139
1140 err_rpm_put:
1141         pm_runtime_put(&client->dev);
1142 err_unlock:
1143         mutex_unlock(&ov13b->mutex);
1144
1145         return ret;
1146 }
1147
1148 static int __maybe_unused ov13b10_suspend(struct device *dev)
1149 {
1150         struct v4l2_subdev *sd = dev_get_drvdata(dev);
1151         struct ov13b10 *ov13b = to_ov13b10(sd);
1152
1153         if (ov13b->streaming)
1154                 ov13b10_stop_streaming(ov13b);
1155
1156         return 0;
1157 }
1158
1159 static int __maybe_unused ov13b10_resume(struct device *dev)
1160 {
1161         struct v4l2_subdev *sd = dev_get_drvdata(dev);
1162         struct ov13b10 *ov13b = to_ov13b10(sd);
1163         int ret;
1164
1165         if (ov13b->streaming) {
1166                 ret = ov13b10_start_streaming(ov13b);
1167                 if (ret)
1168                         goto error;
1169         }
1170
1171         return 0;
1172
1173 error:
1174         ov13b10_stop_streaming(ov13b);
1175         ov13b->streaming = false;
1176         return ret;
1177 }
1178
1179 static const struct v4l2_subdev_video_ops ov13b10_video_ops = {
1180         .s_stream = ov13b10_set_stream,
1181 };
1182
1183 static const struct v4l2_subdev_pad_ops ov13b10_pad_ops = {
1184         .enum_mbus_code = ov13b10_enum_mbus_code,
1185         .get_fmt = ov13b10_get_pad_format,
1186         .set_fmt = ov13b10_set_pad_format,
1187         .enum_frame_size = ov13b10_enum_frame_size,
1188 };
1189
1190 static const struct v4l2_subdev_ops ov13b10_subdev_ops = {
1191         .video = &ov13b10_video_ops,
1192         .pad = &ov13b10_pad_ops,
1193 };
1194
1195 static const struct media_entity_operations ov13b10_subdev_entity_ops = {
1196         .link_validate = v4l2_subdev_link_validate,
1197 };
1198
1199 static const struct v4l2_subdev_internal_ops ov13b10_internal_ops = {
1200         .open = ov13b10_open,
1201 };
1202
1203 /* Initialize control handlers */
1204 static int ov13b10_init_controls(struct ov13b10 *ov13b)
1205 {
1206         struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
1207         struct v4l2_fwnode_device_properties props;
1208         struct v4l2_ctrl_handler *ctrl_hdlr;
1209         s64 exposure_max;
1210         s64 vblank_def;
1211         s64 vblank_min;
1212         s64 hblank;
1213         s64 pixel_rate_min;
1214         s64 pixel_rate_max;
1215         const struct ov13b10_mode *mode;
1216         u32 max;
1217         int ret;
1218
1219         ctrl_hdlr = &ov13b->ctrl_handler;
1220         ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10);
1221         if (ret)
1222                 return ret;
1223
1224         mutex_init(&ov13b->mutex);
1225         ctrl_hdlr->lock = &ov13b->mutex;
1226         max = ARRAY_SIZE(link_freq_menu_items) - 1;
1227         ov13b->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1228                                                   &ov13b10_ctrl_ops,
1229                                                   V4L2_CID_LINK_FREQ,
1230                                                   max,
1231                                                   0,
1232                                                   link_freq_menu_items);
1233         if (ov13b->link_freq)
1234                 ov13b->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1235
1236         pixel_rate_max = link_freq_to_pixel_rate(link_freq_menu_items[0]);
1237         pixel_rate_min = 0;
1238         /* By default, PIXEL_RATE is read only */
1239         ov13b->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1240                                               V4L2_CID_PIXEL_RATE,
1241                                               pixel_rate_min, pixel_rate_max,
1242                                               1, pixel_rate_max);
1243
1244         mode = ov13b->cur_mode;
1245         vblank_def = mode->vts_def - mode->height;
1246         vblank_min = mode->vts_min - mode->height;
1247         ov13b->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1248                                           V4L2_CID_VBLANK,
1249                                           vblank_min,
1250                                           OV13B10_VTS_MAX - mode->height, 1,
1251                                           vblank_def);
1252
1253         hblank = link_freq_configs[mode->link_freq_index].pixels_per_line -
1254                  mode->width;
1255         ov13b->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1256                                           V4L2_CID_HBLANK,
1257                                           hblank, hblank, 1, hblank);
1258         if (ov13b->hblank)
1259                 ov13b->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1260
1261         exposure_max = mode->vts_def - 8;
1262         ov13b->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1263                                             V4L2_CID_EXPOSURE,
1264                                             OV13B10_EXPOSURE_MIN,
1265                                             exposure_max, OV13B10_EXPOSURE_STEP,
1266                                             exposure_max);
1267
1268         v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1269                           OV13B10_ANA_GAIN_MIN, OV13B10_ANA_GAIN_MAX,
1270                           OV13B10_ANA_GAIN_STEP, OV13B10_ANA_GAIN_DEFAULT);
1271
1272         /* Digital gain */
1273         v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1274                           OV13B10_DGTL_GAIN_MIN, OV13B10_DGTL_GAIN_MAX,
1275                           OV13B10_DGTL_GAIN_STEP, OV13B10_DGTL_GAIN_DEFAULT);
1276
1277         v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov13b10_ctrl_ops,
1278                                      V4L2_CID_TEST_PATTERN,
1279                                      ARRAY_SIZE(ov13b10_test_pattern_menu) - 1,
1280                                      0, 0, ov13b10_test_pattern_menu);
1281
1282         v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1283                           V4L2_CID_HFLIP, 0, 1, 1, 0);
1284         v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1285                           V4L2_CID_VFLIP, 0, 1, 1, 0);
1286
1287         if (ctrl_hdlr->error) {
1288                 ret = ctrl_hdlr->error;
1289                 dev_err(&client->dev, "%s control init failed (%d)\n",
1290                         __func__, ret);
1291                 goto error;
1292         }
1293
1294         ret = v4l2_fwnode_device_parse(&client->dev, &props);
1295         if (ret)
1296                 goto error;
1297
1298         ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov13b10_ctrl_ops,
1299                                               &props);
1300         if (ret)
1301                 goto error;
1302
1303         ov13b->sd.ctrl_handler = ctrl_hdlr;
1304
1305         return 0;
1306
1307 error:
1308         v4l2_ctrl_handler_free(ctrl_hdlr);
1309         mutex_destroy(&ov13b->mutex);
1310
1311         return ret;
1312 }
1313
1314 static void ov13b10_free_controls(struct ov13b10 *ov13b)
1315 {
1316         v4l2_ctrl_handler_free(ov13b->sd.ctrl_handler);
1317         mutex_destroy(&ov13b->mutex);
1318 }
1319
1320 static int ov13b10_check_hwcfg(struct device *dev)
1321 {
1322         struct v4l2_fwnode_endpoint bus_cfg = {
1323                 .bus_type = V4L2_MBUS_CSI2_DPHY
1324         };
1325         struct fwnode_handle *ep;
1326         struct fwnode_handle *fwnode = dev_fwnode(dev);
1327         unsigned int i, j;
1328         int ret;
1329         u32 ext_clk;
1330
1331         if (!fwnode)
1332                 return -ENXIO;
1333
1334         ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
1335                                        &ext_clk);
1336         if (ret) {
1337                 dev_err(dev, "can't get clock frequency");
1338                 return ret;
1339         }
1340
1341         if (ext_clk != OV13B10_EXT_CLK) {
1342                 dev_err(dev, "external clock %d is not supported",
1343                         ext_clk);
1344                 return -EINVAL;
1345         }
1346
1347         ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1348         if (!ep)
1349                 return -ENXIO;
1350
1351         ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1352         fwnode_handle_put(ep);
1353         if (ret)
1354                 return ret;
1355
1356         if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV13B10_DATA_LANES) {
1357                 dev_err(dev, "number of CSI2 data lanes %d is not supported",
1358                         bus_cfg.bus.mipi_csi2.num_data_lanes);
1359                 ret = -EINVAL;
1360                 goto out_err;
1361         }
1362
1363         if (!bus_cfg.nr_of_link_frequencies) {
1364                 dev_err(dev, "no link frequencies defined");
1365                 ret = -EINVAL;
1366                 goto out_err;
1367         }
1368
1369         for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1370                 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1371                         if (link_freq_menu_items[i] ==
1372                                 bus_cfg.link_frequencies[j])
1373                                 break;
1374                 }
1375
1376                 if (j == bus_cfg.nr_of_link_frequencies) {
1377                         dev_err(dev, "no link frequency %lld supported",
1378                                 link_freq_menu_items[i]);
1379                         ret = -EINVAL;
1380                         goto out_err;
1381                 }
1382         }
1383
1384 out_err:
1385         v4l2_fwnode_endpoint_free(&bus_cfg);
1386
1387         return ret;
1388 }
1389
1390 static int ov13b10_probe(struct i2c_client *client)
1391 {
1392         struct ov13b10 *ov13b;
1393         bool full_power;
1394         int ret;
1395
1396         /* Check HW config */
1397         ret = ov13b10_check_hwcfg(&client->dev);
1398         if (ret) {
1399                 dev_err(&client->dev, "failed to check hwcfg: %d", ret);
1400                 return ret;
1401         }
1402
1403         ov13b = devm_kzalloc(&client->dev, sizeof(*ov13b), GFP_KERNEL);
1404         if (!ov13b)
1405                 return -ENOMEM;
1406
1407         /* Initialize subdev */
1408         v4l2_i2c_subdev_init(&ov13b->sd, client, &ov13b10_subdev_ops);
1409
1410         full_power = acpi_dev_state_d0(&client->dev);
1411         if (full_power) {
1412                 /* Check module identity */
1413                 ret = ov13b10_identify_module(ov13b);
1414                 if (ret) {
1415                         dev_err(&client->dev, "failed to find sensor: %d\n", ret);
1416                         return ret;
1417                 }
1418         }
1419
1420         /* Set default mode to max resolution */
1421         ov13b->cur_mode = &supported_modes[0];
1422
1423         ret = ov13b10_init_controls(ov13b);
1424         if (ret)
1425                 return ret;
1426
1427         /* Initialize subdev */
1428         ov13b->sd.internal_ops = &ov13b10_internal_ops;
1429         ov13b->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1430         ov13b->sd.entity.ops = &ov13b10_subdev_entity_ops;
1431         ov13b->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1432
1433         /* Initialize source pad */
1434         ov13b->pad.flags = MEDIA_PAD_FL_SOURCE;
1435         ret = media_entity_pads_init(&ov13b->sd.entity, 1, &ov13b->pad);
1436         if (ret) {
1437                 dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1438                 goto error_handler_free;
1439         }
1440
1441         ret = v4l2_async_register_subdev_sensor(&ov13b->sd);
1442         if (ret < 0)
1443                 goto error_media_entity;
1444
1445         /*
1446          * Device is already turned on by i2c-core with ACPI domain PM.
1447          * Enable runtime PM and turn off the device.
1448          */
1449
1450         /* Set the device's state to active if it's in D0 state. */
1451         if (full_power)
1452                 pm_runtime_set_active(&client->dev);
1453         pm_runtime_enable(&client->dev);
1454         pm_runtime_idle(&client->dev);
1455
1456         return 0;
1457
1458 error_media_entity:
1459         media_entity_cleanup(&ov13b->sd.entity);
1460
1461 error_handler_free:
1462         ov13b10_free_controls(ov13b);
1463         dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1464
1465         return ret;
1466 }
1467
1468 static void ov13b10_remove(struct i2c_client *client)
1469 {
1470         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1471         struct ov13b10 *ov13b = to_ov13b10(sd);
1472
1473         v4l2_async_unregister_subdev(sd);
1474         media_entity_cleanup(&sd->entity);
1475         ov13b10_free_controls(ov13b);
1476
1477         pm_runtime_disable(&client->dev);
1478 }
1479
1480 static const struct dev_pm_ops ov13b10_pm_ops = {
1481         SET_SYSTEM_SLEEP_PM_OPS(ov13b10_suspend, ov13b10_resume)
1482 };
1483
1484 #ifdef CONFIG_ACPI
1485 static const struct acpi_device_id ov13b10_acpi_ids[] = {
1486         {"OVTIDB10"},
1487         { /* sentinel */ }
1488 };
1489
1490 MODULE_DEVICE_TABLE(acpi, ov13b10_acpi_ids);
1491 #endif
1492
1493 static struct i2c_driver ov13b10_i2c_driver = {
1494         .driver = {
1495                 .name = "ov13b10",
1496                 .pm = &ov13b10_pm_ops,
1497                 .acpi_match_table = ACPI_PTR(ov13b10_acpi_ids),
1498         },
1499         .probe = ov13b10_probe,
1500         .remove = ov13b10_remove,
1501         .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1502 };
1503
1504 module_i2c_driver(ov13b10_i2c_driver);
1505
1506 MODULE_AUTHOR("Kao, Arec <arec.kao@intel.com>");
1507 MODULE_DESCRIPTION("Omnivision ov13b10 sensor driver");
1508 MODULE_LICENSE("GPL v2");