1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices ADV7511 HDMI Transmitter Device Driver
5 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/slab.h>
12 #include <linux/i2c.h>
13 #include <linux/delay.h>
14 #include <linux/videodev2.h>
15 #include <linux/gpio.h>
16 #include <linux/workqueue.h>
17 #include <linux/hdmi.h>
18 #include <linux/v4l2-dv-timings.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-common.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-dv-timings.h>
23 #include <media/i2c/adv7511.h>
24 #include <media/cec.h>
27 module_param(debug, int, 0644);
28 MODULE_PARM_DESC(debug, "debug level (0-2)");
30 MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver");
31 MODULE_AUTHOR("Hans Verkuil");
32 MODULE_LICENSE("GPL v2");
34 #define MASK_ADV7511_EDID_RDY_INT 0x04
35 #define MASK_ADV7511_MSEN_INT 0x40
36 #define MASK_ADV7511_HPD_INT 0x80
38 #define MASK_ADV7511_HPD_DETECT 0x40
39 #define MASK_ADV7511_MSEN_DETECT 0x20
40 #define MASK_ADV7511_EDID_RDY 0x10
42 #define EDID_MAX_RETRIES (8)
43 #define EDID_DELAY 250
44 #define EDID_MAX_SEGM 8
46 #define ADV7511_MAX_WIDTH 1920
47 #define ADV7511_MAX_HEIGHT 1200
48 #define ADV7511_MIN_PIXELCLOCK 20000000
49 #define ADV7511_MAX_PIXELCLOCK 225000000
51 #define ADV7511_MAX_ADDRS (3)
54 **********************************************************************
56 * Arrays with configuration parameters for the ADV7511
58 **********************************************************************
61 struct i2c_reg_value {
66 struct adv7511_state_edid {
67 /* total number of blocks */
69 /* Number of segments read */
71 u8 data[EDID_MAX_SEGM * 256];
72 /* Number of EDID read retries left */
73 unsigned read_retries;
77 struct adv7511_state {
78 struct adv7511_platform_data pdata;
79 struct v4l2_subdev sd;
81 struct v4l2_ctrl_handler hdl;
87 struct i2c_client *i2c_cec;
88 struct cec_adapter *cec_adap;
89 u8 cec_addr[ADV7511_MAX_ADDRS];
91 bool cec_enabled_adap;
93 /* Is the adv7511 powered on? */
95 /* Did we receive hotplug and rx-sense signals? */
98 /* timings from s_dv_timings */
99 struct v4l2_dv_timings dv_timings;
107 struct v4l2_ctrl *hdmi_mode_ctrl;
108 struct v4l2_ctrl *hotplug_ctrl;
109 struct v4l2_ctrl *rx_sense_ctrl;
110 struct v4l2_ctrl *have_edid0_ctrl;
111 struct v4l2_ctrl *rgb_quantization_range_ctrl;
112 struct v4l2_ctrl *content_type_ctrl;
113 struct i2c_client *i2c_edid;
114 struct i2c_client *i2c_pktmem;
115 struct adv7511_state_edid edid;
116 /* Running counter of the number of detected EDIDs (for debugging) */
117 unsigned edid_detect_counter;
118 struct workqueue_struct *work_queue;
119 struct delayed_work edid_handler; /* work entry */
122 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd);
123 static bool adv7511_check_edid_status(struct v4l2_subdev *sd);
124 static void adv7511_setup(struct v4l2_subdev *sd);
125 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq);
126 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
129 static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
130 .type = V4L2_DV_BT_656_1120,
131 /* keep this initialization for compatibility with GCC < 4.4.6 */
133 V4L2_INIT_BT_TIMINGS(0, ADV7511_MAX_WIDTH, 0, ADV7511_MAX_HEIGHT,
134 ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
135 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
136 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
137 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
138 V4L2_DV_BT_CAP_CUSTOM)
141 static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd)
143 return container_of(sd, struct adv7511_state, sd);
146 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
148 return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd;
151 /* ------------------------ I2C ----------------------------------------------- */
153 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
154 u8 command, bool check)
156 union i2c_smbus_data data;
158 if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
159 I2C_SMBUS_READ, command,
160 I2C_SMBUS_BYTE_DATA, &data))
163 v4l_err(client, "error reading %02x, %02x\n",
164 client->addr, command);
168 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
171 for (i = 0; i < 3; i++) {
172 int ret = adv_smbus_read_byte_data_check(client, command, true);
175 v4l_err(client, "read ok after %d retries\n", i);
179 v4l_err(client, "read failed\n");
183 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
185 struct i2c_client *client = v4l2_get_subdevdata(sd);
187 return adv_smbus_read_byte_data(client, reg);
190 static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
192 struct i2c_client *client = v4l2_get_subdevdata(sd);
196 for (i = 0; i < 3; i++) {
197 ret = i2c_smbus_write_byte_data(client, reg, val);
201 v4l2_err(sd, "%s: i2c write error\n", __func__);
205 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
206 and then the value-mask (to be OR-ed). */
207 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
209 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
212 static int adv_smbus_read_i2c_block_data(struct i2c_client *client,
213 u8 command, unsigned length, u8 *values)
215 union i2c_smbus_data data;
218 if (length > I2C_SMBUS_BLOCK_MAX)
219 length = I2C_SMBUS_BLOCK_MAX;
220 data.block[0] = length;
222 ret = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
223 I2C_SMBUS_READ, command,
224 I2C_SMBUS_I2C_BLOCK_DATA, &data);
225 memcpy(values, data.block + 1, length);
229 static void adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
231 struct adv7511_state *state = get_adv7511_state(sd);
235 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
237 for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX)
238 err = adv_smbus_read_i2c_block_data(state->i2c_edid, i,
239 I2C_SMBUS_BLOCK_MAX, buf + i);
241 v4l2_err(sd, "%s: i2c read error\n", __func__);
244 static inline int adv7511_cec_read(struct v4l2_subdev *sd, u8 reg)
246 struct adv7511_state *state = get_adv7511_state(sd);
248 return i2c_smbus_read_byte_data(state->i2c_cec, reg);
251 static int adv7511_cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
253 struct adv7511_state *state = get_adv7511_state(sd);
257 for (i = 0; i < 3; i++) {
258 ret = i2c_smbus_write_byte_data(state->i2c_cec, reg, val);
262 v4l2_err(sd, "%s: I2C Write Problem\n", __func__);
266 static inline int adv7511_cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask,
269 return adv7511_cec_write(sd, reg, (adv7511_cec_read(sd, reg) & mask) | val);
272 static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg)
274 struct adv7511_state *state = get_adv7511_state(sd);
276 return adv_smbus_read_byte_data(state->i2c_pktmem, reg);
279 static int adv7511_pktmem_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
281 struct adv7511_state *state = get_adv7511_state(sd);
285 for (i = 0; i < 3; i++) {
286 ret = i2c_smbus_write_byte_data(state->i2c_pktmem, reg, val);
290 v4l2_err(sd, "%s: i2c write error\n", __func__);
294 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
295 and then the value-mask (to be OR-ed). */
296 static inline void adv7511_pktmem_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
298 adv7511_pktmem_wr(sd, reg, (adv7511_pktmem_rd(sd, reg) & clr_mask) | val_mask);
301 static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd)
303 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
306 static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd)
308 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
311 static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode)
313 adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
316 static void adv7511_csc_coeff(struct v4l2_subdev *sd,
317 u16 A1, u16 A2, u16 A3, u16 A4,
318 u16 B1, u16 B2, u16 B3, u16 B4,
319 u16 C1, u16 C2, u16 C3, u16 C4)
322 adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
323 adv7511_wr(sd, 0x19, A1);
324 adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
325 adv7511_wr(sd, 0x1B, A2);
326 adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
327 adv7511_wr(sd, 0x1d, A3);
328 adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
329 adv7511_wr(sd, 0x1f, A4);
332 adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
333 adv7511_wr(sd, 0x21, B1);
334 adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
335 adv7511_wr(sd, 0x23, B2);
336 adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
337 adv7511_wr(sd, 0x25, B3);
338 adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
339 adv7511_wr(sd, 0x27, B4);
342 adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
343 adv7511_wr(sd, 0x29, C1);
344 adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
345 adv7511_wr(sd, 0x2B, C2);
346 adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
347 adv7511_wr(sd, 0x2D, C3);
348 adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
349 adv7511_wr(sd, 0x2F, C4);
352 static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable)
356 adv7511_csc_conversion_mode(sd, csc_mode);
357 adv7511_csc_coeff(sd,
360 0, 0, 4096-564, 256);
362 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
363 /* AVI infoframe: Limited range RGB (16-235) */
364 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
367 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
368 /* AVI infoframe: Full range RGB (0-255) */
369 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
373 static void adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl)
375 struct adv7511_state *state = get_adv7511_state(sd);
377 /* Only makes sense for RGB formats */
378 if (state->fmt_code != MEDIA_BUS_FMT_RGB888_1X24) {
379 /* so just keep quantization */
380 adv7511_csc_rgb_full2limit(sd, false);
385 case V4L2_DV_RGB_RANGE_AUTO:
387 if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) {
388 /* CE format, RGB limited range (16-235) */
389 adv7511_csc_rgb_full2limit(sd, true);
391 /* not CE format, RGB full range (0-255) */
392 adv7511_csc_rgb_full2limit(sd, false);
395 case V4L2_DV_RGB_RANGE_LIMITED:
396 /* RGB limited range (16-235) */
397 adv7511_csc_rgb_full2limit(sd, true);
399 case V4L2_DV_RGB_RANGE_FULL:
400 /* RGB full range (0-255) */
401 adv7511_csc_rgb_full2limit(sd, false);
406 /* ------------------------------ CTRL OPS ------------------------------ */
408 static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl)
410 struct v4l2_subdev *sd = to_sd(ctrl);
411 struct adv7511_state *state = get_adv7511_state(sd);
413 v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val);
415 if (state->hdmi_mode_ctrl == ctrl) {
416 /* Set HDMI or DVI-D */
417 adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
420 if (state->rgb_quantization_range_ctrl == ctrl) {
421 adv7511_set_rgb_quantization_mode(sd, ctrl);
424 if (state->content_type_ctrl == ctrl) {
427 state->content_type = ctrl->val;
428 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
429 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
430 adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7);
431 adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4);
438 static const struct v4l2_ctrl_ops adv7511_ctrl_ops = {
439 .s_ctrl = adv7511_s_ctrl,
442 /* ---------------------------- CORE OPS ------------------------------------------- */
444 #ifdef CONFIG_VIDEO_ADV_DEBUG
445 static void adv7511_inv_register(struct v4l2_subdev *sd)
447 struct adv7511_state *state = get_adv7511_state(sd);
449 v4l2_info(sd, "0x000-0x0ff: Main Map\n");
451 v4l2_info(sd, "0x100-0x1ff: CEC Map\n");
454 static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
456 struct adv7511_state *state = get_adv7511_state(sd);
459 switch (reg->reg >> 8) {
461 reg->val = adv7511_rd(sd, reg->reg & 0xff);
464 if (state->i2c_cec) {
465 reg->val = adv7511_cec_read(sd, reg->reg & 0xff);
470 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
471 adv7511_inv_register(sd);
477 static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
479 struct adv7511_state *state = get_adv7511_state(sd);
481 switch (reg->reg >> 8) {
483 adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff);
486 if (state->i2c_cec) {
487 adv7511_cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
492 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
493 adv7511_inv_register(sd);
500 struct adv7511_cfg_read_infoframe {
508 static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
513 /* compute checksum */
514 for (i = 0; i < size; i++)
520 static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri)
522 struct i2c_client *client = v4l2_get_subdevdata(sd);
523 struct device *dev = &client->dev;
524 union hdmi_infoframe frame;
529 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
530 v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc);
534 memcpy(buffer, cri->header, sizeof(cri->header));
538 if (len + 4 > sizeof(buffer)) {
539 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len);
543 if (cri->payload_addr >= 0x100) {
544 for (i = 0; i < len; i++)
545 buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100);
547 for (i = 0; i < len; i++)
548 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
551 buffer[3] = hdmi_infoframe_checksum(buffer, len + 4);
553 if (hdmi_infoframe_unpack(&frame, buffer) < 0) {
554 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc);
558 hdmi_infoframe_log(KERN_INFO, dev, &frame);
561 static void adv7511_log_infoframes(struct v4l2_subdev *sd)
563 static const struct adv7511_cfg_read_infoframe cri[] = {
564 { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 },
565 { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 },
566 { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 },
570 for (i = 0; i < ARRAY_SIZE(cri); i++)
571 log_infoframe(sd, &cri[i]);
574 static int adv7511_log_status(struct v4l2_subdev *sd)
576 struct adv7511_state *state = get_adv7511_state(sd);
577 struct adv7511_state_edid *edid = &state->edid;
580 static const char * const states[] = {
586 "initializing HDCP repeater",
587 "6", "7", "8", "9", "A", "B", "C", "D", "E", "F"
589 static const char * const errors[] = {
596 "max repeater cascade exceeded",
599 "9", "A", "B", "C", "D", "E", "F"
602 v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off");
603 v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n",
604 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
605 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
606 edid->segments ? "found" : "no",
608 v4l2_info(sd, "%s output %s\n",
609 (adv7511_rd(sd, 0xaf) & 0x02) ?
611 (adv7511_rd(sd, 0xa1) & 0x3c) ?
612 "disabled" : "enabled");
613 v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n",
614 states[adv7511_rd(sd, 0xc8) & 0xf],
615 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
616 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
617 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
618 if (adv7511_rd(sd, 0xaf) & 0x02) {
620 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
621 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
622 adv7511_rd(sd, 0x02) << 8 |
623 adv7511_rd(sd, 0x03);
624 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
625 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
629 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
630 adv7511_rd(sd, 0x08) << 8 |
631 adv7511_rd(sd, 0x09);
633 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
634 adv7511_rd(sd, 0x05) << 8 |
635 adv7511_rd(sd, 0x06);
636 v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n",
637 manual_cts ? "manual" : "automatic", N, CTS);
638 v4l2_info(sd, "VIC: detected %d, sent %d\n",
639 vic_detect, vic_sent);
640 adv7511_log_infoframes(sd);
642 if (state->dv_timings.type == V4L2_DV_BT_656_1120)
643 v4l2_print_dv_timings(sd->name, "timings: ",
644 &state->dv_timings, false);
646 v4l2_info(sd, "no timings set\n");
647 v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr);
649 if (state->i2c_cec == NULL)
652 v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr);
654 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?
655 "enabled" : "disabled");
656 if (state->cec_enabled_adap) {
657 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
658 bool is_valid = state->cec_valid_addrs & (1 << i);
661 v4l2_info(sd, "CEC Logical Address: 0x%x\n",
665 v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr);
669 /* Power up/down adv7511 */
670 static int adv7511_s_power(struct v4l2_subdev *sd, int on)
672 struct adv7511_state *state = get_adv7511_state(sd);
673 const int retries = 20;
676 v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
678 state->power_on = on;
682 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
687 /* The adv7511 does not always come up immediately.
688 Retry multiple times. */
689 for (i = 0; i < retries; i++) {
690 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
691 if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
693 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
697 v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__);
698 adv7511_s_power(sd, 0);
702 v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i);
704 /* Reserved registers that must be set */
705 adv7511_wr(sd, 0x98, 0x03);
706 adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
707 adv7511_wr(sd, 0x9c, 0x30);
708 adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
709 adv7511_wr(sd, 0xa2, 0xa4);
710 adv7511_wr(sd, 0xa3, 0xa4);
711 adv7511_wr(sd, 0xe0, 0xd0);
712 adv7511_wr(sd, 0xf9, 0x00);
714 adv7511_wr(sd, 0x43, state->i2c_edid_addr);
715 adv7511_wr(sd, 0x45, state->i2c_pktmem_addr);
717 /* Set number of attempts to read the EDID */
718 adv7511_wr(sd, 0xc9, 0xf);
722 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
723 static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
725 struct adv7511_state *state = cec_get_drvdata(adap);
726 struct v4l2_subdev *sd = &state->sd;
728 if (state->i2c_cec == NULL)
731 if (!state->cec_enabled_adap && enable) {
732 /* power up cec section */
733 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x01);
734 /* legacy mode and clear all rx buffers */
735 adv7511_cec_write(sd, 0x4a, 0x00);
736 adv7511_cec_write(sd, 0x4a, 0x07);
737 adv7511_cec_write_and_or(sd, 0x11, 0xfe, 0); /* initially disable tx */
740 /* tx: arbitration lost */
741 /* tx: retry timeout */
743 if (state->enabled_irq)
744 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39);
745 } else if (state->cec_enabled_adap && !enable) {
746 if (state->enabled_irq)
747 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00);
748 /* disable address mask 1-3 */
749 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0x00);
750 /* power down cec section */
751 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x00);
752 state->cec_valid_addrs = 0;
754 state->cec_enabled_adap = enable;
758 static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
760 struct adv7511_state *state = cec_get_drvdata(adap);
761 struct v4l2_subdev *sd = &state->sd;
762 unsigned int i, free_idx = ADV7511_MAX_ADDRS;
764 if (!state->cec_enabled_adap)
765 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
767 if (addr == CEC_LOG_ADDR_INVALID) {
768 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0);
769 state->cec_valid_addrs = 0;
773 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
774 bool is_valid = state->cec_valid_addrs & (1 << i);
776 if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
778 if (is_valid && state->cec_addr[i] == addr)
781 if (i == ADV7511_MAX_ADDRS) {
783 if (i == ADV7511_MAX_ADDRS)
786 state->cec_addr[i] = addr;
787 state->cec_valid_addrs |= 1 << i;
791 /* enable address mask 0 */
792 adv7511_cec_write_and_or(sd, 0x4b, 0xef, 0x10);
793 /* set address for mask 0 */
794 adv7511_cec_write_and_or(sd, 0x4c, 0xf0, addr);
797 /* enable address mask 1 */
798 adv7511_cec_write_and_or(sd, 0x4b, 0xdf, 0x20);
799 /* set address for mask 1 */
800 adv7511_cec_write_and_or(sd, 0x4c, 0x0f, addr << 4);
803 /* enable address mask 2 */
804 adv7511_cec_write_and_or(sd, 0x4b, 0xbf, 0x40);
805 /* set address for mask 1 */
806 adv7511_cec_write_and_or(sd, 0x4d, 0xf0, addr);
812 static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
813 u32 signal_free_time, struct cec_msg *msg)
815 struct adv7511_state *state = cec_get_drvdata(adap);
816 struct v4l2_subdev *sd = &state->sd;
820 v4l2_dbg(1, debug, sd, "%s: len %d\n", __func__, len);
823 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);
828 * The number of retries is the number of attempts - 1, but retry
829 * at least once. It's not clear if a value of 0 is allowed, so
830 * let's do at least one retry.
832 adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
834 /* clear cec tx irq status */
835 adv7511_wr(sd, 0x97, 0x38);
838 for (i = 0; i < len; i++)
839 adv7511_cec_write(sd, i, msg->msg[i]);
841 /* set length (data + header) */
842 adv7511_cec_write(sd, 0x10, len);
843 /* start transmit, enable tx */
844 adv7511_cec_write(sd, 0x11, 0x01);
848 static void adv_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)
850 struct adv7511_state *state = get_adv7511_state(sd);
852 if ((adv7511_cec_read(sd, 0x11) & 0x01) == 0) {
853 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);
857 if (tx_raw_status & 0x10) {
858 v4l2_dbg(1, debug, sd,
859 "%s: tx raw: arbitration lost\n", __func__);
860 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST,
864 if (tx_raw_status & 0x08) {
869 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);
871 * We set this status bit since this hardware performs
874 status = CEC_TX_STATUS_MAX_RETRIES;
875 nack_cnt = adv7511_cec_read(sd, 0x14) & 0xf;
877 status |= CEC_TX_STATUS_NACK;
878 low_drive_cnt = adv7511_cec_read(sd, 0x14) >> 4;
880 status |= CEC_TX_STATUS_LOW_DRIVE;
881 cec_transmit_done(state->cec_adap, status,
882 0, nack_cnt, low_drive_cnt, 0);
885 if (tx_raw_status & 0x20) {
886 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);
887 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
892 static const struct cec_adap_ops adv7511_cec_adap_ops = {
893 .adap_enable = adv7511_cec_adap_enable,
894 .adap_log_addr = adv7511_cec_adap_log_addr,
895 .adap_transmit = adv7511_cec_adap_transmit,
899 /* Enable interrupts */
900 static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable)
902 struct adv7511_state *state = get_adv7511_state(sd);
903 u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT;
907 v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable");
909 if (state->enabled_irq == enable)
911 state->enabled_irq = enable;
913 /* The datasheet says that the EDID ready interrupt should be
914 disabled if there is no hotplug. */
917 else if (adv7511_have_hotplug(sd))
918 irqs |= MASK_ADV7511_EDID_RDY_INT;
921 * This i2c write can fail (approx. 1 in 1000 writes). But it
922 * is essential that this register is correct, so retry it
925 * Note that the i2c write does not report an error, but the readback
926 * clearly shows the wrong value.
929 adv7511_wr(sd, 0x94, irqs);
930 irqs_rd = adv7511_rd(sd, 0x94);
931 } while (retries-- && irqs_rd != irqs);
934 v4l2_err(sd, "Could not set interrupts: hw failure?\n");
936 adv7511_wr_and_or(sd, 0x95, 0xc0,
937 (state->cec_enabled_adap && enable) ? 0x39 : 0x00);
940 /* Interrupt handler */
941 static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
946 /* disable interrupts to prevent a race condition */
947 adv7511_set_isr(sd, false);
948 irq_status = adv7511_rd(sd, 0x96);
949 cec_irq = adv7511_rd(sd, 0x97);
950 /* clear detected interrupts */
951 adv7511_wr(sd, 0x96, irq_status);
952 adv7511_wr(sd, 0x97, cec_irq);
954 v4l2_dbg(1, debug, sd, "%s: irq 0x%x, cec-irq 0x%x\n", __func__,
955 irq_status, cec_irq);
957 if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT))
958 adv7511_check_monitor_present_status(sd);
959 if (irq_status & MASK_ADV7511_EDID_RDY_INT)
960 adv7511_check_edid_status(sd);
962 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
964 adv_cec_tx_raw_status(sd, cec_irq);
967 struct adv7511_state *state = get_adv7511_state(sd);
970 msg.len = adv7511_cec_read(sd, 0x25) & 0x1f;
972 v4l2_dbg(1, debug, sd, "%s: cec msg len %d\n", __func__,
981 for (i = 0; i < msg.len; i++)
982 msg.msg[i] = adv7511_cec_read(sd, i + 0x15);
984 adv7511_cec_write(sd, 0x4a, 0); /* toggle to re-enable rx 1 */
985 adv7511_cec_write(sd, 0x4a, 1);
986 cec_received_msg(state->cec_adap, &msg);
991 /* enable interrupts */
992 adv7511_set_isr(sd, true);
999 static const struct v4l2_subdev_core_ops adv7511_core_ops = {
1000 .log_status = adv7511_log_status,
1001 #ifdef CONFIG_VIDEO_ADV_DEBUG
1002 .g_register = adv7511_g_register,
1003 .s_register = adv7511_s_register,
1005 .s_power = adv7511_s_power,
1006 .interrupt_service_routine = adv7511_isr,
1009 /* ------------------------------ VIDEO OPS ------------------------------ */
1011 /* Enable/disable adv7511 output */
1012 static int adv7511_s_stream(struct v4l2_subdev *sd, int enable)
1014 struct adv7511_state *state = get_adv7511_state(sd);
1016 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1017 adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
1019 adv7511_check_monitor_present_status(sd);
1021 adv7511_s_power(sd, 0);
1022 state->have_monitor = false;
1027 static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
1028 struct v4l2_dv_timings *timings)
1030 struct adv7511_state *state = get_adv7511_state(sd);
1031 struct v4l2_bt_timings *bt = &timings->bt;
1034 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1036 /* quick sanity check */
1037 if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL))
1040 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1041 if the format is one of the CEA or DMT timings. */
1042 v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
1045 state->dv_timings = *timings;
1047 /* set h/vsync polarities */
1048 adv7511_wr_and_or(sd, 0x17, 0x9f,
1049 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
1050 ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
1052 fps = (u32)bt->pixelclock / (V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt));
1055 adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1);
1058 adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1);
1061 adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1);
1064 adv7511_wr_and_or(sd, 0xfb, 0xf9, 0);
1068 /* update quantization range based on new dv_timings */
1069 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1074 static int adv7511_g_dv_timings(struct v4l2_subdev *sd,
1075 struct v4l2_dv_timings *timings)
1077 struct adv7511_state *state = get_adv7511_state(sd);
1079 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1084 *timings = state->dv_timings;
1089 static int adv7511_enum_dv_timings(struct v4l2_subdev *sd,
1090 struct v4l2_enum_dv_timings *timings)
1092 if (timings->pad != 0)
1095 return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL);
1098 static int adv7511_dv_timings_cap(struct v4l2_subdev *sd,
1099 struct v4l2_dv_timings_cap *cap)
1104 *cap = adv7511_timings_cap;
1108 static const struct v4l2_subdev_video_ops adv7511_video_ops = {
1109 .s_stream = adv7511_s_stream,
1110 .s_dv_timings = adv7511_s_dv_timings,
1111 .g_dv_timings = adv7511_g_dv_timings,
1114 /* ------------------------------ AUDIO OPS ------------------------------ */
1115 static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable)
1117 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1120 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
1122 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
1127 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1132 case 32000: N = 4096; break;
1133 case 44100: N = 6272; break;
1134 case 48000: N = 6144; break;
1135 case 88200: N = 12544; break;
1136 case 96000: N = 12288; break;
1137 case 176400: N = 25088; break;
1138 case 192000: N = 24576; break;
1143 /* Set N (used with CTS to regenerate the audio clock) */
1144 adv7511_wr(sd, 0x01, (N >> 16) & 0xf);
1145 adv7511_wr(sd, 0x02, (N >> 8) & 0xff);
1146 adv7511_wr(sd, 0x03, N & 0xff);
1151 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1156 case 32000: i2s_sf = 0x30; break;
1157 case 44100: i2s_sf = 0x00; break;
1158 case 48000: i2s_sf = 0x20; break;
1159 case 88200: i2s_sf = 0x80; break;
1160 case 96000: i2s_sf = 0xa0; break;
1161 case 176400: i2s_sf = 0xc0; break;
1162 case 192000: i2s_sf = 0xe0; break;
1167 /* Set sampling frequency for I2S audio to 48 kHz */
1168 adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
1173 static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config)
1175 /* Only 2 channels in use for application */
1176 adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
1177 /* Speaker mapping */
1178 adv7511_wr(sd, 0x76, 0x00);
1180 /* 16 bit audio word length */
1181 adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
1186 static const struct v4l2_subdev_audio_ops adv7511_audio_ops = {
1187 .s_stream = adv7511_s_audio_stream,
1188 .s_clock_freq = adv7511_s_clock_freq,
1189 .s_i2s_clock_freq = adv7511_s_i2s_clock_freq,
1190 .s_routing = adv7511_s_routing,
1193 /* ---------------------------- PAD OPS ------------------------------------- */
1195 static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
1197 struct adv7511_state *state = get_adv7511_state(sd);
1199 memset(edid->reserved, 0, sizeof(edid->reserved));
1204 if (edid->start_block == 0 && edid->blocks == 0) {
1205 edid->blocks = state->edid.segments * 2;
1209 if (state->edid.segments == 0)
1212 if (edid->start_block >= state->edid.segments * 2)
1215 if (edid->start_block + edid->blocks > state->edid.segments * 2)
1216 edid->blocks = state->edid.segments * 2 - edid->start_block;
1218 memcpy(edid->edid, &state->edid.data[edid->start_block * 128],
1219 128 * edid->blocks);
1224 static int adv7511_enum_mbus_code(struct v4l2_subdev *sd,
1225 struct v4l2_subdev_pad_config *cfg,
1226 struct v4l2_subdev_mbus_code_enum *code)
1231 switch (code->index) {
1233 code->code = MEDIA_BUS_FMT_RGB888_1X24;
1236 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
1239 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
1247 static void adv7511_fill_format(struct adv7511_state *state,
1248 struct v4l2_mbus_framefmt *format)
1250 format->width = state->dv_timings.bt.width;
1251 format->height = state->dv_timings.bt.height;
1252 format->field = V4L2_FIELD_NONE;
1255 static int adv7511_get_fmt(struct v4l2_subdev *sd,
1256 struct v4l2_subdev_pad_config *cfg,
1257 struct v4l2_subdev_format *format)
1259 struct adv7511_state *state = get_adv7511_state(sd);
1261 if (format->pad != 0)
1264 memset(&format->format, 0, sizeof(format->format));
1265 adv7511_fill_format(state, &format->format);
1267 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1268 struct v4l2_mbus_framefmt *fmt;
1270 fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
1271 format->format.code = fmt->code;
1272 format->format.colorspace = fmt->colorspace;
1273 format->format.ycbcr_enc = fmt->ycbcr_enc;
1274 format->format.quantization = fmt->quantization;
1275 format->format.xfer_func = fmt->xfer_func;
1277 format->format.code = state->fmt_code;
1278 format->format.colorspace = state->colorspace;
1279 format->format.ycbcr_enc = state->ycbcr_enc;
1280 format->format.quantization = state->quantization;
1281 format->format.xfer_func = state->xfer_func;
1287 static int adv7511_set_fmt(struct v4l2_subdev *sd,
1288 struct v4l2_subdev_pad_config *cfg,
1289 struct v4l2_subdev_format *format)
1291 struct adv7511_state *state = get_adv7511_state(sd);
1293 * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary
1294 * Video Information (AVI) InfoFrame Format"
1297 * ec = Extended Colorimetry
1299 * q = RGB Quantization Range
1300 * yq = YCC Quantization Range
1302 u8 c = HDMI_COLORIMETRY_NONE;
1303 u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1304 u8 y = HDMI_COLORSPACE_RGB;
1305 u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT;
1306 u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1307 u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
1308 u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
1310 if (format->pad != 0)
1312 switch (format->format.code) {
1313 case MEDIA_BUS_FMT_UYVY8_1X16:
1314 case MEDIA_BUS_FMT_YUYV8_1X16:
1315 case MEDIA_BUS_FMT_RGB888_1X24:
1321 adv7511_fill_format(state, &format->format);
1322 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1323 struct v4l2_mbus_framefmt *fmt;
1325 fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
1326 fmt->code = format->format.code;
1327 fmt->colorspace = format->format.colorspace;
1328 fmt->ycbcr_enc = format->format.ycbcr_enc;
1329 fmt->quantization = format->format.quantization;
1330 fmt->xfer_func = format->format.xfer_func;
1334 switch (format->format.code) {
1335 case MEDIA_BUS_FMT_UYVY8_1X16:
1336 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1337 adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8);
1338 y = HDMI_COLORSPACE_YUV422;
1340 case MEDIA_BUS_FMT_YUYV8_1X16:
1341 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1342 adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc);
1343 y = HDMI_COLORSPACE_YUV422;
1345 case MEDIA_BUS_FMT_RGB888_1X24:
1347 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00);
1348 adv7511_wr_and_or(sd, 0x16, 0x03, 0x00);
1351 state->fmt_code = format->format.code;
1352 state->colorspace = format->format.colorspace;
1353 state->ycbcr_enc = format->format.ycbcr_enc;
1354 state->quantization = format->format.quantization;
1355 state->xfer_func = format->format.xfer_func;
1357 switch (format->format.colorspace) {
1358 case V4L2_COLORSPACE_ADOBERGB:
1359 c = HDMI_COLORIMETRY_EXTENDED;
1360 ec = y ? HDMI_EXTENDED_COLORIMETRY_ADOBE_YCC_601 :
1361 HDMI_EXTENDED_COLORIMETRY_ADOBE_RGB;
1363 case V4L2_COLORSPACE_SMPTE170M:
1364 c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE;
1365 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) {
1366 c = HDMI_COLORIMETRY_EXTENDED;
1367 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1370 case V4L2_COLORSPACE_REC709:
1371 c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE;
1372 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) {
1373 c = HDMI_COLORIMETRY_EXTENDED;
1374 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
1377 case V4L2_COLORSPACE_SRGB:
1378 c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE;
1379 ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 :
1380 HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1382 case V4L2_COLORSPACE_BT2020:
1383 c = HDMI_COLORIMETRY_EXTENDED;
1384 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM)
1385 ec = 5; /* Not yet available in hdmi.h */
1387 ec = 6; /* Not yet available in hdmi.h */
1394 * CEA-861-F says that for RGB formats the YCC range must match the
1395 * RGB range, although sources should ignore the YCC range.
1397 * The RGB quantization range shouldn't be non-zero if the EDID doesn't
1398 * have the Q bit set in the Video Capabilities Data Block, however this
1399 * isn't checked at the moment. The assumption is that the application
1400 * knows the EDID and can detect this.
1402 * The same is true for the YCC quantization range: non-standard YCC
1403 * quantization ranges should only be sent if the EDID has the YQ bit
1404 * set in the Video Capabilities Data Block.
1406 switch (format->format.quantization) {
1407 case V4L2_QUANTIZATION_FULL_RANGE:
1408 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1409 HDMI_QUANTIZATION_RANGE_FULL;
1410 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL;
1412 case V4L2_QUANTIZATION_LIM_RANGE:
1413 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1414 HDMI_QUANTIZATION_RANGE_LIMITED;
1415 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1419 adv7511_wr_and_or(sd, 0x4a, 0xbf, 0);
1420 adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5);
1421 adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6);
1422 adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7));
1423 adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4));
1424 adv7511_wr_and_or(sd, 0x4a, 0xff, 1);
1425 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1430 static const struct v4l2_subdev_pad_ops adv7511_pad_ops = {
1431 .get_edid = adv7511_get_edid,
1432 .enum_mbus_code = adv7511_enum_mbus_code,
1433 .get_fmt = adv7511_get_fmt,
1434 .set_fmt = adv7511_set_fmt,
1435 .enum_dv_timings = adv7511_enum_dv_timings,
1436 .dv_timings_cap = adv7511_dv_timings_cap,
1439 /* --------------------- SUBDEV OPS --------------------------------------- */
1441 static const struct v4l2_subdev_ops adv7511_ops = {
1442 .core = &adv7511_core_ops,
1443 .pad = &adv7511_pad_ops,
1444 .video = &adv7511_video_ops,
1445 .audio = &adv7511_audio_ops,
1448 /* ----------------------------------------------------------------------- */
1449 static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf)
1453 v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment);
1454 for (i = 0; i < 256; i += 16) {
1458 v4l2_dbg(lvl, debug, sd, "\n");
1459 for (j = i; j < i + 16; j++) {
1460 sprintf(bp, "0x%02x, ", buf[j]);
1464 v4l2_dbg(lvl, debug, sd, "%s\n", b);
1469 static void adv7511_notify_no_edid(struct v4l2_subdev *sd)
1471 struct adv7511_state *state = get_adv7511_state(sd);
1472 struct adv7511_edid_detect ed;
1474 /* We failed to read the EDID, so send an event for this. */
1476 ed.segment = adv7511_rd(sd, 0xc4);
1477 ed.phys_addr = CEC_PHYS_ADDR_INVALID;
1478 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1479 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1480 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x0);
1483 static void adv7511_edid_handler(struct work_struct *work)
1485 struct delayed_work *dwork = to_delayed_work(work);
1486 struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler);
1487 struct v4l2_subdev *sd = &state->sd;
1489 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1491 if (adv7511_check_edid_status(sd)) {
1492 /* Return if we received the EDID. */
1496 if (adv7511_have_hotplug(sd)) {
1497 /* We must retry reading the EDID several times, it is possible
1498 * that initially the EDID couldn't be read due to i2c errors
1499 * (DVI connectors are particularly prone to this problem). */
1500 if (state->edid.read_retries) {
1501 state->edid.read_retries--;
1502 v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
1503 state->have_monitor = false;
1504 adv7511_s_power(sd, false);
1505 adv7511_s_power(sd, true);
1506 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1511 /* We failed to read the EDID, so send an event for this. */
1512 adv7511_notify_no_edid(sd);
1513 v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__);
1516 static void adv7511_audio_setup(struct v4l2_subdev *sd)
1518 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1520 adv7511_s_i2s_clock_freq(sd, 48000);
1521 adv7511_s_clock_freq(sd, 48000);
1522 adv7511_s_routing(sd, 0, 0, 0);
1525 /* Configure hdmi transmitter. */
1526 static void adv7511_setup(struct v4l2_subdev *sd)
1528 struct adv7511_state *state = get_adv7511_state(sd);
1529 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1531 /* Input format: RGB 4:4:4 */
1532 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
1533 /* Output format: RGB 4:4:4 */
1534 adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
1535 /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */
1536 adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
1537 /* Disable pixel repetition */
1538 adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
1540 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
1541 /* Output format: RGB 4:4:4, Active Format Information is valid,
1543 adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
1544 /* AVI Info frame packet enable, Audio Info frame disable */
1545 adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
1546 /* Colorimetry, Active format aspect ratio: same as picure. */
1547 adv7511_wr(sd, 0x56, 0xa8);
1549 adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
1551 /* Positive clk edge capture for input video clock */
1552 adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
1554 adv7511_audio_setup(sd);
1556 v4l2_ctrl_handler_setup(&state->hdl);
1559 static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd)
1561 struct adv7511_monitor_detect mdt;
1562 struct adv7511_state *state = get_adv7511_state(sd);
1564 mdt.present = state->have_monitor;
1565 v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt);
1568 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
1570 struct adv7511_state *state = get_adv7511_state(sd);
1571 /* read hotplug and rx-sense state */
1572 u8 status = adv7511_rd(sd, 0x42);
1574 v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n",
1577 status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "",
1578 status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : "");
1580 /* update read only ctrls */
1581 v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0);
1582 v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0);
1584 if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) {
1585 v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__);
1586 if (!state->have_monitor) {
1587 v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__);
1588 state->have_monitor = true;
1589 adv7511_set_isr(sd, true);
1590 if (!adv7511_s_power(sd, true)) {
1591 v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__);
1595 adv7511_notify_monitor_detect(sd);
1596 state->edid.read_retries = EDID_MAX_RETRIES;
1597 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1599 } else if (status & MASK_ADV7511_HPD_DETECT) {
1600 v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__);
1601 state->edid.read_retries = EDID_MAX_RETRIES;
1602 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1603 } else if (!(status & MASK_ADV7511_HPD_DETECT)) {
1604 v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__);
1605 if (state->have_monitor) {
1606 v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__);
1607 state->have_monitor = false;
1608 adv7511_notify_monitor_detect(sd);
1610 adv7511_s_power(sd, false);
1611 memset(&state->edid, 0, sizeof(struct adv7511_state_edid));
1612 adv7511_notify_no_edid(sd);
1616 static bool edid_block_verify_crc(u8 *edid_block)
1621 for (i = 0; i < 128; i++)
1622 sum += edid_block[i];
1626 static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment)
1628 struct adv7511_state *state = get_adv7511_state(sd);
1629 u32 blocks = state->edid.blocks;
1630 u8 *data = state->edid.data;
1632 if (!edid_block_verify_crc(&data[segment * 256]))
1634 if ((segment + 1) * 2 <= blocks)
1635 return edid_block_verify_crc(&data[segment * 256 + 128]);
1639 static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment)
1641 static const u8 hdmi_header[] = {
1642 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1644 struct adv7511_state *state = get_adv7511_state(sd);
1645 u8 *data = state->edid.data;
1649 return !memcmp(data, hdmi_header, sizeof(hdmi_header));
1652 static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
1654 struct adv7511_state *state = get_adv7511_state(sd);
1655 u8 edidRdy = adv7511_rd(sd, 0xc5);
1657 v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n",
1658 __func__, EDID_MAX_RETRIES - state->edid.read_retries);
1660 if (state->edid.complete)
1663 if (edidRdy & MASK_ADV7511_EDID_RDY) {
1664 int segment = adv7511_rd(sd, 0xc4);
1665 struct adv7511_edid_detect ed;
1667 if (segment >= EDID_MAX_SEGM) {
1668 v4l2_err(sd, "edid segment number too big\n");
1671 v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
1672 adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]);
1673 adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]);
1675 state->edid.blocks = state->edid.data[0x7e] + 1;
1676 v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", __func__, state->edid.blocks);
1678 if (!edid_verify_crc(sd, segment) ||
1679 !edid_verify_header(sd, segment)) {
1680 /* edid crc error, force reread of edid segment */
1681 v4l2_err(sd, "%s: edid crc or header error\n", __func__);
1682 state->have_monitor = false;
1683 adv7511_s_power(sd, false);
1684 adv7511_s_power(sd, true);
1687 /* one more segment read ok */
1688 state->edid.segments = segment + 1;
1689 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x1);
1690 if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) {
1691 /* Request next EDID segment */
1692 v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments);
1693 adv7511_wr(sd, 0xc9, 0xf);
1694 adv7511_wr(sd, 0xc4, state->edid.segments);
1695 state->edid.read_retries = EDID_MAX_RETRIES;
1696 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1700 v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments);
1701 state->edid.complete = true;
1702 ed.phys_addr = cec_get_edid_phys_addr(state->edid.data,
1703 state->edid.segments * 256,
1705 /* report when we have all segments
1706 but report only for segment 0
1710 state->edid_detect_counter++;
1711 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1712 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1719 static int adv7511_registered(struct v4l2_subdev *sd)
1721 struct adv7511_state *state = get_adv7511_state(sd);
1722 struct i2c_client *client = v4l2_get_subdevdata(sd);
1725 err = cec_register_adapter(state->cec_adap, &client->dev);
1727 cec_delete_adapter(state->cec_adap);
1731 static void adv7511_unregistered(struct v4l2_subdev *sd)
1733 struct adv7511_state *state = get_adv7511_state(sd);
1735 cec_unregister_adapter(state->cec_adap);
1738 static const struct v4l2_subdev_internal_ops adv7511_int_ops = {
1739 .registered = adv7511_registered,
1740 .unregistered = adv7511_unregistered,
1743 /* ----------------------------------------------------------------------- */
1745 static void adv7511_init_setup(struct v4l2_subdev *sd)
1747 struct adv7511_state *state = get_adv7511_state(sd);
1748 struct adv7511_state_edid *edid = &state->edid;
1749 u32 cec_clk = state->pdata.cec_clk;
1752 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1754 /* clear all interrupts */
1755 adv7511_wr(sd, 0x96, 0xff);
1756 adv7511_wr(sd, 0x97, 0xff);
1758 * Stop HPD from resetting a lot of registers.
1759 * It might leave the chip in a partly un-initialized state,
1760 * in particular with regards to hotplug bounces.
1762 adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
1763 memset(edid, 0, sizeof(struct adv7511_state_edid));
1764 state->have_monitor = false;
1765 adv7511_set_isr(sd, false);
1766 adv7511_s_stream(sd, false);
1767 adv7511_s_audio_stream(sd, false);
1769 if (state->i2c_cec == NULL)
1772 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1774 /* cec soft reset */
1775 adv7511_cec_write(sd, 0x50, 0x01);
1776 adv7511_cec_write(sd, 0x50, 0x00);
1779 adv7511_cec_write(sd, 0x4a, 0x00);
1780 adv7511_cec_write(sd, 0x4a, 0x07);
1782 if (cec_clk % 750000 != 0)
1783 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1786 ratio = (cec_clk / 750000) - 1;
1787 adv7511_cec_write(sd, 0x4e, ratio << 2);
1790 static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id)
1792 struct adv7511_state *state;
1793 struct adv7511_platform_data *pdata = client->dev.platform_data;
1794 struct v4l2_ctrl_handler *hdl;
1795 struct v4l2_subdev *sd;
1799 /* Check if the adapter supports the needed features */
1800 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1803 state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL);
1809 v4l_err(client, "No platform data!\n");
1812 memcpy(&state->pdata, pdata, sizeof(state->pdata));
1813 state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24;
1814 state->colorspace = V4L2_COLORSPACE_SRGB;
1818 v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n",
1821 v4l2_i2c_subdev_init(sd, client, &adv7511_ops);
1822 sd->internal_ops = &adv7511_int_ops;
1825 v4l2_ctrl_handler_init(hdl, 10);
1826 /* add in ascending ID order */
1827 state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1828 V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
1829 0, V4L2_DV_TX_MODE_DVI_D);
1830 state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1831 V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
1832 state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1833 V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
1834 state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1835 V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
1836 state->rgb_quantization_range_ctrl =
1837 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1838 V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1839 0, V4L2_DV_RGB_RANGE_AUTO);
1840 state->content_type_ctrl =
1841 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1842 V4L2_CID_DV_TX_IT_CONTENT_TYPE, V4L2_DV_IT_CONTENT_TYPE_NO_ITC,
1843 0, V4L2_DV_IT_CONTENT_TYPE_NO_ITC);
1844 sd->ctrl_handler = hdl;
1849 state->pad.flags = MEDIA_PAD_FL_SINK;
1850 sd->entity.function = MEDIA_ENT_F_DV_ENCODER;
1851 err = media_entity_pads_init(&sd->entity, 1, &state->pad);
1855 /* EDID and CEC i2c addr */
1856 state->i2c_edid_addr = state->pdata.i2c_edid << 1;
1857 state->i2c_cec_addr = state->pdata.i2c_cec << 1;
1858 state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1;
1860 state->chip_revision = adv7511_rd(sd, 0x0);
1861 chip_id[0] = adv7511_rd(sd, 0xf5);
1862 chip_id[1] = adv7511_rd(sd, 0xf6);
1863 if (chip_id[0] != 0x75 || chip_id[1] != 0x11) {
1864 v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0],
1870 state->i2c_edid = i2c_new_dummy(client->adapter,
1871 state->i2c_edid_addr >> 1);
1872 if (state->i2c_edid == NULL) {
1873 v4l2_err(sd, "failed to register edid i2c client\n");
1878 adv7511_wr(sd, 0xe1, state->i2c_cec_addr);
1879 if (state->pdata.cec_clk < 3000000 ||
1880 state->pdata.cec_clk > 100000000) {
1881 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1882 __func__, state->pdata.cec_clk);
1883 state->pdata.cec_clk = 0;
1886 if (state->pdata.cec_clk) {
1887 state->i2c_cec = i2c_new_dummy(client->adapter,
1888 state->i2c_cec_addr >> 1);
1889 if (state->i2c_cec == NULL) {
1890 v4l2_err(sd, "failed to register cec i2c client\n");
1892 goto err_unreg_edid;
1894 adv7511_wr(sd, 0xe2, 0x00); /* power up cec section */
1896 adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */
1899 state->i2c_pktmem = i2c_new_dummy(client->adapter, state->i2c_pktmem_addr >> 1);
1900 if (state->i2c_pktmem == NULL) {
1901 v4l2_err(sd, "failed to register pktmem i2c client\n");
1906 state->work_queue = create_singlethread_workqueue(sd->name);
1907 if (state->work_queue == NULL) {
1908 v4l2_err(sd, "could not create workqueue\n");
1910 goto err_unreg_pktmem;
1913 INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler);
1915 adv7511_init_setup(sd);
1917 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
1918 state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
1919 state, dev_name(&client->dev), CEC_CAP_DEFAULTS,
1921 err = PTR_ERR_OR_ZERO(state->cec_adap);
1923 destroy_workqueue(state->work_queue);
1924 goto err_unreg_pktmem;
1928 adv7511_set_isr(sd, true);
1929 adv7511_check_monitor_present_status(sd);
1931 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1932 client->addr << 1, client->adapter->name);
1936 i2c_unregister_device(state->i2c_pktmem);
1939 i2c_unregister_device(state->i2c_cec);
1941 i2c_unregister_device(state->i2c_edid);
1943 media_entity_cleanup(&sd->entity);
1945 v4l2_ctrl_handler_free(&state->hdl);
1949 /* ----------------------------------------------------------------------- */
1951 static int adv7511_remove(struct i2c_client *client)
1953 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1954 struct adv7511_state *state = get_adv7511_state(sd);
1956 state->chip_revision = -1;
1958 v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
1959 client->addr << 1, client->adapter->name);
1961 adv7511_set_isr(sd, false);
1962 adv7511_init_setup(sd);
1963 cancel_delayed_work(&state->edid_handler);
1964 i2c_unregister_device(state->i2c_edid);
1966 i2c_unregister_device(state->i2c_cec);
1967 i2c_unregister_device(state->i2c_pktmem);
1968 destroy_workqueue(state->work_queue);
1969 v4l2_device_unregister_subdev(sd);
1970 media_entity_cleanup(&sd->entity);
1971 v4l2_ctrl_handler_free(sd->ctrl_handler);
1975 /* ----------------------------------------------------------------------- */
1977 static const struct i2c_device_id adv7511_id[] = {
1981 MODULE_DEVICE_TABLE(i2c, adv7511_id);
1983 static struct i2c_driver adv7511_driver = {
1987 .probe = adv7511_probe,
1988 .remove = adv7511_remove,
1989 .id_table = adv7511_id,
1992 module_i2c_driver(adv7511_driver);