drivers/media/i2c/adv7180.c

   1 /*
   2  * adv7180.c Analog Devices ADV7180 video decoder driver
   3  * Copyright (c) 2009 Intel Corporation
   4  * Copyright (C) 2013 Cogent Embedded, Inc.
   5  * Copyright (C) 2013 Renesas Solutions Corp.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/init.h>
  23 #include <linux/errno.h>
  24 #include <linux/kernel.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/i2c.h>
  27 #include <linux/slab.h>
  28 #include <linux/of.h>
  29 #include <linux/videodev2.h>
  30 #include <media/v4l2-ioctl.h>
  31 #include <media/v4l2-event.h>
  32 #include <media/v4l2-device.h>
  33 #include <media/v4l2-ctrls.h>
  34 #include <linux/mutex.h>
  35 #include <linux/delay.h>
  36
  37 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM              0x0
  38 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED          0x1
  39 #define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM               0x2
  40 #define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM               0x3
  41 #define ADV7180_STD_NTSC_J                              0x4
  42 #define ADV7180_STD_NTSC_M                              0x5
  43 #define ADV7180_STD_PAL60                               0x6
  44 #define ADV7180_STD_NTSC_443                            0x7
  45 #define ADV7180_STD_PAL_BG                              0x8
  46 #define ADV7180_STD_PAL_N                               0x9
  47 #define ADV7180_STD_PAL_M                               0xa
  48 #define ADV7180_STD_PAL_M_PED                           0xb
  49 #define ADV7180_STD_PAL_COMB_N                          0xc
  50 #define ADV7180_STD_PAL_COMB_N_PED                      0xd
  51 #define ADV7180_STD_PAL_SECAM                           0xe
  52 #define ADV7180_STD_PAL_SECAM_PED                       0xf
  53
  54 #define ADV7180_REG_INPUT_CONTROL                       0x0000
  55 #define ADV7180_INPUT_CONTROL_INSEL_MASK                0x0f
  56
  57 #define ADV7182_REG_INPUT_VIDSEL                        0x0002
  58
  59 #define ADV7180_REG_EXTENDED_OUTPUT_CONTROL             0x0004
  60 #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS         0xC5
  61
  62 #define ADV7180_REG_AUTODETECT_ENABLE                   0x07
  63 #define ADV7180_AUTODETECT_DEFAULT                      0x7f
  64 /* Contrast */
  65 #define ADV7180_REG_CON         0x0008  /*Unsigned */
  66 #define ADV7180_CON_MIN         0
  67 #define ADV7180_CON_DEF         128
  68 #define ADV7180_CON_MAX         255
  69 /* Brightness*/
  70 #define ADV7180_REG_BRI         0x000a  /*Signed */
  71 #define ADV7180_BRI_MIN         -128
  72 #define ADV7180_BRI_DEF         0
  73 #define ADV7180_BRI_MAX         127
  74 /* Hue */
  75 #define ADV7180_REG_HUE         0x000b  /*Signed, inverted */
  76 #define ADV7180_HUE_MIN         -127
  77 #define ADV7180_HUE_DEF         0
  78 #define ADV7180_HUE_MAX         128
  79
  80 #define ADV7180_REG_CTRL                0x000e
  81 #define ADV7180_CTRL_IRQ_SPACE          0x20
  82
  83 #define ADV7180_REG_PWR_MAN             0x0f
  84 #define ADV7180_PWR_MAN_ON              0x04
  85 #define ADV7180_PWR_MAN_OFF             0x24
  86 #define ADV7180_PWR_MAN_RES             0x80
  87
  88 #define ADV7180_REG_STATUS1             0x0010
  89 #define ADV7180_STATUS1_IN_LOCK         0x01
  90 #define ADV7180_STATUS1_AUTOD_MASK      0x70
  91 #define ADV7180_STATUS1_AUTOD_NTSM_M_J  0x00
  92 #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
  93 #define ADV7180_STATUS1_AUTOD_PAL_M     0x20
  94 #define ADV7180_STATUS1_AUTOD_PAL_60    0x30
  95 #define ADV7180_STATUS1_AUTOD_PAL_B_G   0x40
  96 #define ADV7180_STATUS1_AUTOD_SECAM     0x50
  97 #define ADV7180_STATUS1_AUTOD_PAL_COMB  0x60
  98 #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
  99
 100 #define ADV7180_REG_IDENT 0x0011
 101 #define ADV7180_ID_7180 0x18
 102
 103 #define ADV7180_REG_ICONF1              0x0040
 104 #define ADV7180_ICONF1_ACTIVE_LOW       0x01
 105 #define ADV7180_ICONF1_PSYNC_ONLY       0x10
 106 #define ADV7180_ICONF1_ACTIVE_TO_CLR    0xC0
 107 /* Saturation */
 108 #define ADV7180_REG_SD_SAT_CB   0x00e3  /*Unsigned */
 109 #define ADV7180_REG_SD_SAT_CR   0x00e4  /*Unsigned */
 110 #define ADV7180_SAT_MIN         0
 111 #define ADV7180_SAT_DEF         128
 112 #define ADV7180_SAT_MAX         255
 113
 114 #define ADV7180_IRQ1_LOCK       0x01
 115 #define ADV7180_IRQ1_UNLOCK     0x02
 116 #define ADV7180_REG_ISR1        0x0042
 117 #define ADV7180_REG_ICR1        0x0043
 118 #define ADV7180_REG_IMR1        0x0044
 119 #define ADV7180_REG_IMR2        0x0048
 120 #define ADV7180_IRQ3_AD_CHANGE  0x08
 121 #define ADV7180_REG_ISR3        0x004A
 122 #define ADV7180_REG_ICR3        0x004B
 123 #define ADV7180_REG_IMR3        0x004C
 124 #define ADV7180_REG_IMR4        0x50
 125
 126 #define ADV7180_REG_NTSC_V_BIT_END      0x00E6
 127 #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND     0x4F
 128
 129 #define ADV7180_REG_VPP_SLAVE_ADDR      0xFD
 130 #define ADV7180_REG_CSI_SLAVE_ADDR      0xFE
 131
 132 #define ADV7180_REG_FLCONTROL 0x40e0
 133 #define ADV7180_FLCONTROL_FL_ENABLE 0x1
 134
 135 #define ADV7180_CSI_REG_PWRDN   0x00
 136 #define ADV7180_CSI_PWRDN       0x80
 137
 138 #define ADV7180_INPUT_CVBS_AIN1 0x00
 139 #define ADV7180_INPUT_CVBS_AIN2 0x01
 140 #define ADV7180_INPUT_CVBS_AIN3 0x02
 141 #define ADV7180_INPUT_CVBS_AIN4 0x03
 142 #define ADV7180_INPUT_CVBS_AIN5 0x04
 143 #define ADV7180_INPUT_CVBS_AIN6 0x05
 144 #define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06
 145 #define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07
 146 #define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08
 147 #define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09
 148 #define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a
 149
 150 #define ADV7182_INPUT_CVBS_AIN1 0x00
 151 #define ADV7182_INPUT_CVBS_AIN2 0x01
 152 #define ADV7182_INPUT_CVBS_AIN3 0x02
 153 #define ADV7182_INPUT_CVBS_AIN4 0x03
 154 #define ADV7182_INPUT_CVBS_AIN5 0x04
 155 #define ADV7182_INPUT_CVBS_AIN6 0x05
 156 #define ADV7182_INPUT_CVBS_AIN7 0x06
 157 #define ADV7182_INPUT_CVBS_AIN8 0x07
 158 #define ADV7182_INPUT_SVIDEO_AIN1_AIN2 0x08
 159 #define ADV7182_INPUT_SVIDEO_AIN3_AIN4 0x09
 160 #define ADV7182_INPUT_SVIDEO_AIN5_AIN6 0x0a
 161 #define ADV7182_INPUT_SVIDEO_AIN7_AIN8 0x0b
 162 #define ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3 0x0c
 163 #define ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0d
 164 #define ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2 0x0e
 165 #define ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4 0x0f
 166 #define ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6 0x10
 167 #define ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8 0x11
 168
 169 #define ADV7180_DEFAULT_CSI_I2C_ADDR 0x44
 170 #define ADV7180_DEFAULT_VPP_I2C_ADDR 0x42
 171
 172 #define V4L2_CID_ADV_FAST_SWITCH        (V4L2_CID_USER_ADV7180_BASE + 0x00)
 173
 174 struct adv7180_state;
 175
 176 #define ADV7180_FLAG_RESET_POWERED      BIT(0)
 177 #define ADV7180_FLAG_V2                 BIT(1)
 178 #define ADV7180_FLAG_MIPI_CSI2          BIT(2)
 179 #define ADV7180_FLAG_I2P                BIT(3)
 180
 181 struct adv7180_chip_info {
 182         unsigned int flags;
 183         unsigned int valid_input_mask;
 184         int (*set_std)(struct adv7180_state *st, unsigned int std);
 185         int (*select_input)(struct adv7180_state *st, unsigned int input);
 186         int (*init)(struct adv7180_state *state);
 187 };
 188
 189 struct adv7180_state {
 190         struct v4l2_ctrl_handler ctrl_hdl;
 191         struct v4l2_subdev      sd;
 192         struct media_pad        pad;
 193         struct mutex            mutex; /* mutual excl. when accessing chip */
 194         int                     irq;
 195         v4l2_std_id             curr_norm;
 196         bool                    powered;
 197         bool                    streaming;
 198         u8                      input;
 199
 200         struct i2c_client       *client;
 201         unsigned int            register_page;
 202         struct i2c_client       *csi_client;
 203         struct i2c_client       *vpp_client;
 204         const struct adv7180_chip_info *chip_info;
 205         enum v4l2_field         field;
 206 };
 207 #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler,             \
 208                                             struct adv7180_state,       \
 209                                             ctrl_hdl)->sd)
 210
 211 static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
 212 {
 213         if (state->register_page != page) {
 214                 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
 215                         page);
 216                 state->register_page = page;
 217         }
 218
 219         return 0;
 220 }
 221
 222 static int adv7180_write(struct adv7180_state *state, unsigned int reg,
 223         unsigned int value)
 224 {
 225         lockdep_assert_held(&state->mutex);
 226         adv7180_select_page(state, reg >> 8);
 227         return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
 228 }
 229
 230 static int adv7180_read(struct adv7180_state *state, unsigned int reg)
 231 {
 232         lockdep_assert_held(&state->mutex);
 233         adv7180_select_page(state, reg >> 8);
 234         return i2c_smbus_read_byte_data(state->client, reg & 0xff);
 235 }
 236
 237 static int adv7180_csi_write(struct adv7180_state *state, unsigned int reg,
 238         unsigned int value)
 239 {
 240         return i2c_smbus_write_byte_data(state->csi_client, reg, value);
 241 }
 242
 243 static int adv7180_set_video_standard(struct adv7180_state *state,
 244         unsigned int std)
 245 {
 246         return state->chip_info->set_std(state, std);
 247 }
 248
 249 static int adv7180_vpp_write(struct adv7180_state *state, unsigned int reg,
 250         unsigned int value)
 251 {
 252         return i2c_smbus_write_byte_data(state->vpp_client, reg, value);
 253 }
 254
 255 static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
 256 {
 257         /* in case V4L2_IN_ST_NO_SIGNAL */
 258         if (!(status1 & ADV7180_STATUS1_IN_LOCK))
 259                 return V4L2_STD_UNKNOWN;
 260
 261         switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
 262         case ADV7180_STATUS1_AUTOD_NTSM_M_J:
 263                 return V4L2_STD_NTSC;
 264         case ADV7180_STATUS1_AUTOD_NTSC_4_43:
 265                 return V4L2_STD_NTSC_443;
 266         case ADV7180_STATUS1_AUTOD_PAL_M:
 267                 return V4L2_STD_PAL_M;
 268         case ADV7180_STATUS1_AUTOD_PAL_60:
 269                 return V4L2_STD_PAL_60;
 270         case ADV7180_STATUS1_AUTOD_PAL_B_G:
 271                 return V4L2_STD_PAL;
 272         case ADV7180_STATUS1_AUTOD_SECAM:
 273                 return V4L2_STD_SECAM;
 274         case ADV7180_STATUS1_AUTOD_PAL_COMB:
 275                 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
 276         case ADV7180_STATUS1_AUTOD_SECAM_525:
 277                 return V4L2_STD_SECAM;
 278         default:
 279                 return V4L2_STD_UNKNOWN;
 280         }
 281 }
 282
 283 static int v4l2_std_to_adv7180(v4l2_std_id std)
 284 {
 285         if (std == V4L2_STD_PAL_60)
 286                 return ADV7180_STD_PAL60;
 287         if (std == V4L2_STD_NTSC_443)
 288                 return ADV7180_STD_NTSC_443;
 289         if (std == V4L2_STD_PAL_N)
 290                 return ADV7180_STD_PAL_N;
 291         if (std == V4L2_STD_PAL_M)
 292                 return ADV7180_STD_PAL_M;
 293         if (std == V4L2_STD_PAL_Nc)
 294                 return ADV7180_STD_PAL_COMB_N;
 295
 296         if (std & V4L2_STD_PAL)
 297                 return ADV7180_STD_PAL_BG;
 298         if (std & V4L2_STD_NTSC)
 299                 return ADV7180_STD_NTSC_M;
 300         if (std & V4L2_STD_SECAM)
 301                 return ADV7180_STD_PAL_SECAM;
 302
 303         return -EINVAL;
 304 }
 305
 306 static u32 adv7180_status_to_v4l2(u8 status1)
 307 {
 308         if (!(status1 & ADV7180_STATUS1_IN_LOCK))
 309                 return V4L2_IN_ST_NO_SIGNAL;
 310
 311         return 0;
 312 }
 313
 314 static int __adv7180_status(struct adv7180_state *state, u32 *status,
 315                             v4l2_std_id *std)
 316 {
 317         int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
 318
 319         if (status1 < 0)
 320                 return status1;
 321
 322         if (status)
 323                 *status = adv7180_status_to_v4l2(status1);
 324         if (std)
 325                 *std = adv7180_std_to_v4l2(status1);
 326
 327         return 0;
 328 }
 329
 330 static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
 331 {
 332         return container_of(sd, struct adv7180_state, sd);
 333 }
 334
 335 static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
 336 {
 337         struct adv7180_state *state = to_state(sd);
 338         int err = mutex_lock_interruptible(&state->mutex);
 339         if (err)
 340                 return err;
 341
 342         if (state->streaming) {
 343                 err = -EBUSY;
 344                 goto unlock;
 345         }
 346
 347         err = adv7180_set_video_standard(state,
 348                         ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM);
 349         if (err)
 350                 goto unlock;
 351
 352         msleep(100);
 353         __adv7180_status(state, NULL, std);
 354
 355         err = v4l2_std_to_adv7180(state->curr_norm);
 356         if (err < 0)
 357                 goto unlock;
 358
 359         err = adv7180_set_video_standard(state, err);
 360
 361 unlock:
 362         mutex_unlock(&state->mutex);
 363         return err;
 364 }
 365
 366 static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
 367                              u32 output, u32 config)
 368 {
 369         struct adv7180_state *state = to_state(sd);
 370         int ret = mutex_lock_interruptible(&state->mutex);
 371
 372         if (ret)
 373                 return ret;
 374
 375         if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
 376                 ret = -EINVAL;
 377                 goto out;
 378         }
 379
 380         ret = state->chip_info->select_input(state, input);
 381
 382         if (ret == 0)
 383                 state->input = input;
 384 out:
 385         mutex_unlock(&state->mutex);
 386         return ret;
 387 }
 388
 389 static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
 390 {
 391         struct adv7180_state *state = to_state(sd);
 392         int ret = mutex_lock_interruptible(&state->mutex);
 393         if (ret)
 394                 return ret;
 395
 396         ret = __adv7180_status(state, status, NULL);
 397         mutex_unlock(&state->mutex);
 398         return ret;
 399 }
 400
 401 static int adv7180_program_std(struct adv7180_state *state)
 402 {
 403         int ret;
 404
 405         ret = v4l2_std_to_adv7180(state->curr_norm);
 406         if (ret < 0)
 407                 return ret;
 408
 409         ret = adv7180_set_video_standard(state, ret);
 410         if (ret < 0)
 411                 return ret;
 412         return 0;
 413 }
 414
 415 static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
 416 {
 417         struct adv7180_state *state = to_state(sd);
 418         int ret = mutex_lock_interruptible(&state->mutex);
 419
 420         if (ret)
 421                 return ret;
 422
 423         /* Make sure we can support this std */
 424         ret = v4l2_std_to_adv7180(std);
 425         if (ret < 0)
 426                 goto out;
 427
 428         state->curr_norm = std;
 429
 430         ret = adv7180_program_std(state);
 431 out:
 432         mutex_unlock(&state->mutex);
 433         return ret;
 434 }
 435
 436 static int adv7180_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm)
 437 {
 438         struct adv7180_state *state = to_state(sd);
 439
 440         *norm = state->curr_norm;
 441
 442         return 0;
 443 }
 444
 445 static int adv7180_set_power(struct adv7180_state *state, bool on)
 446 {
 447         u8 val;
 448         int ret;
 449
 450         if (on)
 451                 val = ADV7180_PWR_MAN_ON;
 452         else
 453                 val = ADV7180_PWR_MAN_OFF;
 454
 455         ret = adv7180_write(state, ADV7180_REG_PWR_MAN, val);
 456         if (ret)
 457                 return ret;
 458
 459         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 460                 if (on) {
 461                         adv7180_csi_write(state, 0xDE, 0x02);
 462                         adv7180_csi_write(state, 0xD2, 0xF7);
 463                         adv7180_csi_write(state, 0xD8, 0x65);
 464                         adv7180_csi_write(state, 0xE0, 0x09);
 465                         adv7180_csi_write(state, 0x2C, 0x00);
 466                         if (state->field == V4L2_FIELD_NONE)
 467                                 adv7180_csi_write(state, 0x1D, 0x80);
 468                         adv7180_csi_write(state, 0x00, 0x00);
 469                 } else {
 470                         adv7180_csi_write(state, 0x00, 0x80);
 471                 }
 472         }
 473
 474         return 0;
 475 }
 476
 477 static int adv7180_s_power(struct v4l2_subdev *sd, int on)
 478 {
 479         struct adv7180_state *state = to_state(sd);
 480         int ret;
 481
 482         ret = mutex_lock_interruptible(&state->mutex);
 483         if (ret)
 484                 return ret;
 485
 486         ret = adv7180_set_power(state, on);
 487         if (ret == 0)
 488                 state->powered = on;
 489
 490         mutex_unlock(&state->mutex);
 491         return ret;
 492 }
 493
 494 static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
 495 {
 496         struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
 497         struct adv7180_state *state = to_state(sd);
 498         int ret = mutex_lock_interruptible(&state->mutex);
 499         int val;
 500
 501         if (ret)
 502                 return ret;
 503         val = ctrl->val;
 504         switch (ctrl->id) {
 505         case V4L2_CID_BRIGHTNESS:
 506                 ret = adv7180_write(state, ADV7180_REG_BRI, val);
 507                 break;
 508         case V4L2_CID_HUE:
 509                 /*Hue is inverted according to HSL chart */
 510                 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
 511                 break;
 512         case V4L2_CID_CONTRAST:
 513                 ret = adv7180_write(state, ADV7180_REG_CON, val);
 514                 break;
 515         case V4L2_CID_SATURATION:
 516                 /*
 517                  *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
 518                  *Let's not confuse the user, everybody understands saturation
 519                  */
 520                 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
 521                 if (ret < 0)
 522                         break;
 523                 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
 524                 break;
 525         case V4L2_CID_ADV_FAST_SWITCH:
 526                 if (ctrl->val) {
 527                         /* ADI required write */
 528                         adv7180_write(state, 0x80d9, 0x44);
 529                         adv7180_write(state, ADV7180_REG_FLCONTROL,
 530                                 ADV7180_FLCONTROL_FL_ENABLE);
 531                 } else {
 532                         /* ADI required write */
 533                         adv7180_write(state, 0x80d9, 0xc4);
 534                         adv7180_write(state, ADV7180_REG_FLCONTROL, 0x00);
 535                 }
 536                 break;
 537         default:
 538                 ret = -EINVAL;
 539         }
 540
 541         mutex_unlock(&state->mutex);
 542         return ret;
 543 }
 544
 545 static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
 546         .s_ctrl = adv7180_s_ctrl,
 547 };
 548
 549 static const struct v4l2_ctrl_config adv7180_ctrl_fast_switch = {
 550         .ops = &adv7180_ctrl_ops,
 551         .id = V4L2_CID_ADV_FAST_SWITCH,
 552         .name = "Fast Switching",
 553         .type = V4L2_CTRL_TYPE_BOOLEAN,
 554         .min = 0,
 555         .max = 1,
 556         .step = 1,
 557 };
 558
 559 static int adv7180_init_controls(struct adv7180_state *state)
 560 {
 561         v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
 562
 563         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 564                           V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
 565                           ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
 566         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 567                           V4L2_CID_CONTRAST, ADV7180_CON_MIN,
 568                           ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
 569         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 570                           V4L2_CID_SATURATION, ADV7180_SAT_MIN,
 571                           ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
 572         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 573                           V4L2_CID_HUE, ADV7180_HUE_MIN,
 574                           ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
 575         v4l2_ctrl_new_custom(&state->ctrl_hdl, &adv7180_ctrl_fast_switch, NULL);
 576
 577         state->sd.ctrl_handler = &state->ctrl_hdl;
 578         if (state->ctrl_hdl.error) {
 579                 int err = state->ctrl_hdl.error;
 580
 581                 v4l2_ctrl_handler_free(&state->ctrl_hdl);
 582                 return err;
 583         }
 584         v4l2_ctrl_handler_setup(&state->ctrl_hdl);
 585
 586         return 0;
 587 }
 588 static void adv7180_exit_controls(struct adv7180_state *state)
 589 {
 590         v4l2_ctrl_handler_free(&state->ctrl_hdl);
 591 }
 592
 593 static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
 594                                   struct v4l2_subdev_pad_config *cfg,
 595                                   struct v4l2_subdev_mbus_code_enum *code)
 596 {
 597         if (code->index != 0)
 598                 return -EINVAL;
 599
 600         code->code = MEDIA_BUS_FMT_YUYV8_2X8;
 601
 602         return 0;
 603 }
 604
 605 static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
 606                             struct v4l2_mbus_framefmt *fmt)
 607 {
 608         struct adv7180_state *state = to_state(sd);
 609
 610         fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
 611         fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
 612         fmt->width = 720;
 613         fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
 614
 615         return 0;
 616 }
 617
 618 static int adv7180_set_field_mode(struct adv7180_state *state)
 619 {
 620         if (!(state->chip_info->flags & ADV7180_FLAG_I2P))
 621                 return 0;
 622
 623         if (state->field == V4L2_FIELD_NONE) {
 624                 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 625                         adv7180_csi_write(state, 0x01, 0x20);
 626                         adv7180_csi_write(state, 0x02, 0x28);
 627                         adv7180_csi_write(state, 0x03, 0x38);
 628                         adv7180_csi_write(state, 0x04, 0x30);
 629                         adv7180_csi_write(state, 0x05, 0x30);
 630                         adv7180_csi_write(state, 0x06, 0x80);
 631                         adv7180_csi_write(state, 0x07, 0x70);
 632                         adv7180_csi_write(state, 0x08, 0x50);
 633                 }
 634                 adv7180_vpp_write(state, 0xa3, 0x00);
 635                 adv7180_vpp_write(state, 0x5b, 0x00);
 636                 adv7180_vpp_write(state, 0x55, 0x80);
 637         } else {
 638                 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 639                         adv7180_csi_write(state, 0x01, 0x18);
 640                         adv7180_csi_write(state, 0x02, 0x18);
 641                         adv7180_csi_write(state, 0x03, 0x30);
 642                         adv7180_csi_write(state, 0x04, 0x20);
 643                         adv7180_csi_write(state, 0x05, 0x28);
 644                         adv7180_csi_write(state, 0x06, 0x40);
 645                         adv7180_csi_write(state, 0x07, 0x58);
 646                         adv7180_csi_write(state, 0x08, 0x30);
 647                 }
 648                 adv7180_vpp_write(state, 0xa3, 0x70);
 649                 adv7180_vpp_write(state, 0x5b, 0x80);
 650                 adv7180_vpp_write(state, 0x55, 0x00);
 651         }
 652
 653         return 0;
 654 }
 655
 656 static int adv7180_get_pad_format(struct v4l2_subdev *sd,
 657                                   struct v4l2_subdev_pad_config *cfg,
 658                                   struct v4l2_subdev_format *format)
 659 {
 660         struct adv7180_state *state = to_state(sd);
 661
 662         if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
 663                 format->format = *v4l2_subdev_get_try_format(sd, cfg, 0);
 664         } else {
 665                 adv7180_mbus_fmt(sd, &format->format);
 666                 format->format.field = state->field;
 667         }
 668
 669         return 0;
 670 }
 671
 672 static int adv7180_set_pad_format(struct v4l2_subdev *sd,
 673                                   struct v4l2_subdev_pad_config *cfg,
 674                                   struct v4l2_subdev_format *format)
 675 {
 676         struct adv7180_state *state = to_state(sd);
 677         struct v4l2_mbus_framefmt *framefmt;
 678
 679         switch (format->format.field) {
 680         case V4L2_FIELD_NONE:
 681                 if (!(state->chip_info->flags & ADV7180_FLAG_I2P))
 682                         format->format.field = V4L2_FIELD_INTERLACED;
 683                 break;
 684         default:
 685                 format->format.field = V4L2_FIELD_INTERLACED;
 686                 break;
 687         }
 688
 689         if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 690                 framefmt = &format->format;
 691                 if (state->field != format->format.field) {
 692                         state->field = format->format.field;
 693                         adv7180_set_power(state, false);
 694                         adv7180_set_field_mode(state);
 695                         adv7180_set_power(state, true);
 696                 }
 697         } else {
 698                 framefmt = v4l2_subdev_get_try_format(sd, cfg, 0);
 699                 *framefmt = format->format;
 700         }
 701
 702         return adv7180_mbus_fmt(sd, framefmt);
 703 }
 704
 705 static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
 706                                  struct v4l2_mbus_config *cfg)
 707 {
 708         struct adv7180_state *state = to_state(sd);
 709
 710         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 711                 cfg->type = V4L2_MBUS_CSI2;
 712                 cfg->flags = V4L2_MBUS_CSI2_1_LANE |
 713                                 V4L2_MBUS_CSI2_CHANNEL_0 |
 714                                 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
 715         } else {
 716                 /*
 717                  * The ADV7180 sensor supports BT.601/656 output modes.
 718                  * The BT.656 is default and not yet configurable by s/w.
 719                  */
 720                 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
 721                                  V4L2_MBUS_DATA_ACTIVE_HIGH;
 722                 cfg->type = V4L2_MBUS_BT656;
 723         }
 724
 725         return 0;
 726 }
 727
 728 static int adv7180_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *cropcap)
 729 {
 730         struct adv7180_state *state = to_state(sd);
 731
 732         if (state->curr_norm & V4L2_STD_525_60) {
 733                 cropcap->pixelaspect.numerator = 11;
 734                 cropcap->pixelaspect.denominator = 10;
 735         } else {
 736                 cropcap->pixelaspect.numerator = 54;
 737                 cropcap->pixelaspect.denominator = 59;
 738         }
 739
 740         return 0;
 741 }
 742
 743 static int adv7180_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm)
 744 {
 745         *norm = V4L2_STD_ALL;
 746         return 0;
 747 }
 748
 749 static int adv7180_s_stream(struct v4l2_subdev *sd, int enable)
 750 {
 751         struct adv7180_state *state = to_state(sd);
 752         int ret;
 753
 754         /* It's always safe to stop streaming, no need to take the lock */
 755         if (!enable) {
 756                 state->streaming = enable;
 757                 return 0;
 758         }
 759
 760         /* Must wait until querystd released the lock */
 761         ret = mutex_lock_interruptible(&state->mutex);
 762         if (ret)
 763                 return ret;
 764         state->streaming = enable;
 765         mutex_unlock(&state->mutex);
 766         return 0;
 767 }
 768
 769 static int adv7180_subscribe_event(struct v4l2_subdev *sd,
 770                                    struct v4l2_fh *fh,
 771                                    struct v4l2_event_subscription *sub)
 772 {
 773         switch (sub->type) {
 774         case V4L2_EVENT_SOURCE_CHANGE:
 775                 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
 776         case V4L2_EVENT_CTRL:
 777                 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
 778         default:
 779                 return -EINVAL;
 780         }
 781 }
 782
 783 static const struct v4l2_subdev_video_ops adv7180_video_ops = {
 784         .s_std = adv7180_s_std,
 785         .g_std = adv7180_g_std,
 786         .querystd = adv7180_querystd,
 787         .g_input_status = adv7180_g_input_status,
 788         .s_routing = adv7180_s_routing,
 789         .g_mbus_config = adv7180_g_mbus_config,
 790         .cropcap = adv7180_cropcap,
 791         .g_tvnorms = adv7180_g_tvnorms,
 792         .s_stream = adv7180_s_stream,
 793 };
 794
 795 static const struct v4l2_subdev_core_ops adv7180_core_ops = {
 796         .s_power = adv7180_s_power,
 797         .subscribe_event = adv7180_subscribe_event,
 798         .unsubscribe_event = v4l2_event_subdev_unsubscribe,
 799 };
 800
 801 static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
 802         .enum_mbus_code = adv7180_enum_mbus_code,
 803         .set_fmt = adv7180_set_pad_format,
 804         .get_fmt = adv7180_get_pad_format,
 805 };
 806
 807 static const struct v4l2_subdev_ops adv7180_ops = {
 808         .core = &adv7180_core_ops,
 809         .video = &adv7180_video_ops,
 810         .pad = &adv7180_pad_ops,
 811 };
 812
 813 static irqreturn_t adv7180_irq(int irq, void *devid)
 814 {
 815         struct adv7180_state *state = devid;
 816         u8 isr3;
 817
 818         mutex_lock(&state->mutex);
 819         isr3 = adv7180_read(state, ADV7180_REG_ISR3);
 820         /* clear */
 821         adv7180_write(state, ADV7180_REG_ICR3, isr3);
 822
 823         if (isr3 & ADV7180_IRQ3_AD_CHANGE) {
 824                 static const struct v4l2_event src_ch = {
 825                         .type = V4L2_EVENT_SOURCE_CHANGE,
 826                         .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
 827                 };
 828
 829                 v4l2_subdev_notify_event(&state->sd, &src_ch);
 830         }
 831         mutex_unlock(&state->mutex);
 832
 833         return IRQ_HANDLED;
 834 }
 835
 836 static int adv7180_init(struct adv7180_state *state)
 837 {
 838         int ret;
 839
 840         /* ITU-R BT.656-4 compatible */
 841         ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
 842                         ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
 843         if (ret < 0)
 844                 return ret;
 845
 846         /* Manually set V bit end position in NTSC mode */
 847         return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
 848                                         ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
 849 }
 850
 851 static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
 852 {
 853         return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
 854                 (std << 4) | state->input);
 855 }
 856
 857 static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
 858 {
 859         int ret;
 860
 861         ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
 862         if (ret < 0)
 863                 return ret;
 864
 865         ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
 866         ret |= input;
 867         return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
 868 }
 869
 870 static int adv7182_init(struct adv7180_state *state)
 871 {
 872         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
 873                 adv7180_write(state, ADV7180_REG_CSI_SLAVE_ADDR,
 874                         ADV7180_DEFAULT_CSI_I2C_ADDR << 1);
 875
 876         if (state->chip_info->flags & ADV7180_FLAG_I2P)
 877                 adv7180_write(state, ADV7180_REG_VPP_SLAVE_ADDR,
 878                         ADV7180_DEFAULT_VPP_I2C_ADDR << 1);
 879
 880         if (state->chip_info->flags & ADV7180_FLAG_V2) {
 881                 /* ADI recommended writes for improved video quality */
 882                 adv7180_write(state, 0x0080, 0x51);
 883                 adv7180_write(state, 0x0081, 0x51);
 884                 adv7180_write(state, 0x0082, 0x68);
 885         }
 886
 887         /* ADI required writes */
 888         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 889                 adv7180_write(state, 0x0003, 0x4e);
 890                 adv7180_write(state, 0x0004, 0x57);
 891                 adv7180_write(state, 0x001d, 0xc0);
 892         } else {
 893                 if (state->chip_info->flags & ADV7180_FLAG_V2)
 894                         adv7180_write(state, 0x0004, 0x17);
 895                 else
 896                         adv7180_write(state, 0x0004, 0x07);
 897                 adv7180_write(state, 0x0003, 0x0c);
 898                 adv7180_write(state, 0x001d, 0x40);
 899         }
 900
 901         adv7180_write(state, 0x0013, 0x00);
 902
 903         return 0;
 904 }
 905
 906 static int adv7182_set_std(struct adv7180_state *state, unsigned int std)
 907 {
 908         return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL, std << 4);
 909 }
 910
 911 enum adv7182_input_type {
 912         ADV7182_INPUT_TYPE_CVBS,
 913         ADV7182_INPUT_TYPE_DIFF_CVBS,
 914         ADV7182_INPUT_TYPE_SVIDEO,
 915         ADV7182_INPUT_TYPE_YPBPR,
 916 };
 917
 918 static enum adv7182_input_type adv7182_get_input_type(unsigned int input)
 919 {
 920         switch (input) {
 921         case ADV7182_INPUT_CVBS_AIN1:
 922         case ADV7182_INPUT_CVBS_AIN2:
 923         case ADV7182_INPUT_CVBS_AIN3:
 924         case ADV7182_INPUT_CVBS_AIN4:
 925         case ADV7182_INPUT_CVBS_AIN5:
 926         case ADV7182_INPUT_CVBS_AIN6:
 927         case ADV7182_INPUT_CVBS_AIN7:
 928         case ADV7182_INPUT_CVBS_AIN8:
 929                 return ADV7182_INPUT_TYPE_CVBS;
 930         case ADV7182_INPUT_SVIDEO_AIN1_AIN2:
 931         case ADV7182_INPUT_SVIDEO_AIN3_AIN4:
 932         case ADV7182_INPUT_SVIDEO_AIN5_AIN6:
 933         case ADV7182_INPUT_SVIDEO_AIN7_AIN8:
 934                 return ADV7182_INPUT_TYPE_SVIDEO;
 935         case ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3:
 936         case ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6:
 937                 return ADV7182_INPUT_TYPE_YPBPR;
 938         case ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2:
 939         case ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4:
 940         case ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6:
 941         case ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8:
 942                 return ADV7182_INPUT_TYPE_DIFF_CVBS;
 943         default: /* Will never happen */
 944                 return 0;
 945         }
 946 }
 947
 948 /* ADI recommended writes to registers 0x52, 0x53, 0x54 */
 949 static unsigned int adv7182_lbias_settings[][3] = {
 950         [ADV7182_INPUT_TYPE_CVBS] = { 0xCB, 0x4E, 0x80 },
 951         [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
 952         [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
 953         [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
 954 };
 955
 956 static unsigned int adv7280_lbias_settings[][3] = {
 957         [ADV7182_INPUT_TYPE_CVBS] = { 0xCD, 0x4E, 0x80 },
 958         [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
 959         [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
 960         [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
 961 };
 962
 963 static int adv7182_select_input(struct adv7180_state *state, unsigned int input)
 964 {
 965         enum adv7182_input_type input_type;
 966         unsigned int *lbias;
 967         unsigned int i;
 968         int ret;
 969
 970         ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input);
 971         if (ret)
 972                 return ret;
 973
 974         /* Reset clamp circuitry - ADI recommended writes */
 975         adv7180_write(state, 0x809c, 0x00);
 976         adv7180_write(state, 0x809c, 0xff);
 977
 978         input_type = adv7182_get_input_type(input);
 979
 980         switch (input_type) {
 981         case ADV7182_INPUT_TYPE_CVBS:
 982         case ADV7182_INPUT_TYPE_DIFF_CVBS:
 983                 /* ADI recommends to use the SH1 filter */
 984                 adv7180_write(state, 0x0017, 0x41);
 985                 break;
 986         default:
 987                 adv7180_write(state, 0x0017, 0x01);
 988                 break;
 989         }
 990
 991         if (state->chip_info->flags & ADV7180_FLAG_V2)
 992                 lbias = adv7280_lbias_settings[input_type];
 993         else
 994                 lbias = adv7182_lbias_settings[input_type];
 995
 996         for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++)
 997                 adv7180_write(state, 0x0052 + i, lbias[i]);
 998
 999         if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) {
1000                 /* ADI required writes to make differential CVBS work */
1001                 adv7180_write(state, 0x005f, 0xa8);
1002                 adv7180_write(state, 0x005a, 0x90);
1003                 adv7180_write(state, 0x0060, 0xb0);
1004                 adv7180_write(state, 0x80b6, 0x08);
1005                 adv7180_write(state, 0x80c0, 0xa0);
1006         } else {
1007                 adv7180_write(state, 0x005f, 0xf0);
1008                 adv7180_write(state, 0x005a, 0xd0);
1009                 adv7180_write(state, 0x0060, 0x10);
1010                 adv7180_write(state, 0x80b6, 0x9c);
1011                 adv7180_write(state, 0x80c0, 0x00);
1012         }
1013
1014         return 0;
1015 }
1016
1017 static const struct adv7180_chip_info adv7180_info = {
1018         .flags = ADV7180_FLAG_RESET_POWERED,
1019         /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
1020          * all inputs and let the card driver take care of validation
1021          */
1022         .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) |
1023                 BIT(ADV7180_INPUT_CVBS_AIN2) |
1024                 BIT(ADV7180_INPUT_CVBS_AIN3) |
1025                 BIT(ADV7180_INPUT_CVBS_AIN4) |
1026                 BIT(ADV7180_INPUT_CVBS_AIN5) |
1027                 BIT(ADV7180_INPUT_CVBS_AIN6) |
1028                 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) |
1029                 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) |
1030                 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) |
1031                 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1032                 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6),
1033         .init = adv7180_init,
1034         .set_std = adv7180_set_std,
1035         .select_input = adv7180_select_input,
1036 };
1037
1038 static const struct adv7180_chip_info adv7182_info = {
1039         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1040                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1041                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1042                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1043                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1044                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1045                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1046                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1047                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4),
1048         .init = adv7182_init,
1049         .set_std = adv7182_set_std,
1050         .select_input = adv7182_select_input,
1051 };
1052
1053 static const struct adv7180_chip_info adv7280_info = {
1054         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P,
1055         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1056                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1057                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1058                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1059                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1060                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1061                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3),
1062         .init = adv7182_init,
1063         .set_std = adv7182_set_std,
1064         .select_input = adv7182_select_input,
1065 };
1066
1067 static const struct adv7180_chip_info adv7280_m_info = {
1068         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P,
1069         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1070                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1071                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1072                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1073                 BIT(ADV7182_INPUT_CVBS_AIN5) |
1074                 BIT(ADV7182_INPUT_CVBS_AIN6) |
1075                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1076                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1077                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1078                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1079                 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
1080                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1081                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1082                 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6),
1083         .init = adv7182_init,
1084         .set_std = adv7182_set_std,
1085         .select_input = adv7182_select_input,
1086 };
1087
1088 static const struct adv7180_chip_info adv7281_info = {
1089         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1090         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1091                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1092                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1093                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1094                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1095                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1096                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1097                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1098         .init = adv7182_init,
1099         .set_std = adv7182_set_std,
1100         .select_input = adv7182_select_input,
1101 };
1102
1103 static const struct adv7180_chip_info adv7281_m_info = {
1104         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1105         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1106                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1107                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1108                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1109                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1110                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1111                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1112                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1113                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1114                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1115                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1116                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1117                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1118         .init = adv7182_init,
1119         .set_std = adv7182_set_std,
1120         .select_input = adv7182_select_input,
1121 };
1122
1123 static const struct adv7180_chip_info adv7281_ma_info = {
1124         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1125         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1126                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1127                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1128                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1129                 BIT(ADV7182_INPUT_CVBS_AIN5) |
1130                 BIT(ADV7182_INPUT_CVBS_AIN6) |
1131                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1132                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1133                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1134                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1135                 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
1136                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1137                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1138                 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6) |
1139                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1140                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1141                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6) |
1142                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1143         .init = adv7182_init,
1144         .set_std = adv7182_set_std,
1145         .select_input = adv7182_select_input,
1146 };
1147
1148 static const struct adv7180_chip_info adv7282_info = {
1149         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P,
1150         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1151                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1152                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1153                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1154                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1155                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1156                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1157                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1158         .init = adv7182_init,
1159         .set_std = adv7182_set_std,
1160         .select_input = adv7182_select_input,
1161 };
1162
1163 static const struct adv7180_chip_info adv7282_m_info = {
1164         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P,
1165         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1166                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1167                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1168                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1169                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1170                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1171                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1172                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1173                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1174                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1175                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1176                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1177         .init = adv7182_init,
1178         .set_std = adv7182_set_std,
1179         .select_input = adv7182_select_input,
1180 };
1181
1182 static int init_device(struct adv7180_state *state)
1183 {
1184         int ret;
1185
1186         mutex_lock(&state->mutex);
1187
1188         adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
1189         usleep_range(5000, 10000);
1190
1191         ret = state->chip_info->init(state);
1192         if (ret)
1193                 goto out_unlock;
1194
1195         ret = adv7180_program_std(state);
1196         if (ret)
1197                 goto out_unlock;
1198
1199         adv7180_set_field_mode(state);
1200
1201         /* register for interrupts */
1202         if (state->irq > 0) {
1203                 /* config the Interrupt pin to be active low */
1204                 ret = adv7180_write(state, ADV7180_REG_ICONF1,
1205                                                 ADV7180_ICONF1_ACTIVE_LOW |
1206                                                 ADV7180_ICONF1_PSYNC_ONLY);
1207                 if (ret < 0)
1208                         goto out_unlock;
1209
1210                 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
1211                 if (ret < 0)
1212                         goto out_unlock;
1213
1214                 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
1215                 if (ret < 0)
1216                         goto out_unlock;
1217
1218                 /* enable AD change interrupts interrupts */
1219                 ret = adv7180_write(state, ADV7180_REG_IMR3,
1220                                                 ADV7180_IRQ3_AD_CHANGE);
1221                 if (ret < 0)
1222                         goto out_unlock;
1223
1224                 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
1225                 if (ret < 0)
1226                         goto out_unlock;
1227         }
1228
1229 out_unlock:
1230         mutex_unlock(&state->mutex);
1231
1232         return ret;
1233 }
1234
1235 static int adv7180_probe(struct i2c_client *client,
1236                          const struct i2c_device_id *id)
1237 {
1238         struct adv7180_state *state;
1239         struct v4l2_subdev *sd;
1240         int ret;
1241
1242         /* Check if the adapter supports the needed features */
1243         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1244                 return -EIO;
1245
1246         v4l_info(client, "chip found @ 0x%02x (%s)\n",
1247                  client->addr, client->adapter->name);
1248
1249         state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
1250         if (state == NULL)
1251                 return -ENOMEM;
1252
1253         state->client = client;
1254         state->field = V4L2_FIELD_INTERLACED;
1255         state->chip_info = (struct adv7180_chip_info *)id->driver_data;
1256
1257         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
1258                 state->csi_client = i2c_new_dummy(client->adapter,
1259                                 ADV7180_DEFAULT_CSI_I2C_ADDR);
1260                 if (!state->csi_client)
1261                         return -ENOMEM;
1262         }
1263
1264         if (state->chip_info->flags & ADV7180_FLAG_I2P) {
1265                 state->vpp_client = i2c_new_dummy(client->adapter,
1266                                 ADV7180_DEFAULT_VPP_I2C_ADDR);
1267                 if (!state->vpp_client) {
1268                         ret = -ENOMEM;
1269                         goto err_unregister_csi_client;
1270                 }
1271         }
1272
1273         state->irq = client->irq;
1274         mutex_init(&state->mutex);
1275         state->curr_norm = V4L2_STD_NTSC;
1276         if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
1277                 state->powered = true;
1278         else
1279                 state->powered = false;
1280         state->input = 0;
1281         sd = &state->sd;
1282         v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
1283         sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
1284
1285         ret = adv7180_init_controls(state);
1286         if (ret)
1287                 goto err_unregister_vpp_client;
1288
1289         state->pad.flags = MEDIA_PAD_FL_SOURCE;
1290         sd->entity.flags |= MEDIA_ENT_F_ATV_DECODER;
1291         ret = media_entity_pads_init(&sd->entity, 1, &state->pad);
1292         if (ret)
1293                 goto err_free_ctrl;
1294
1295         ret = init_device(state);
1296         if (ret)
1297                 goto err_media_entity_cleanup;
1298
1299         if (state->irq) {
1300                 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
1301                                            IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
1302                                            KBUILD_MODNAME, state);
1303                 if (ret)
1304                         goto err_media_entity_cleanup;
1305         }
1306
1307         ret = v4l2_async_register_subdev(sd);
1308         if (ret)
1309                 goto err_free_irq;
1310
1311         return 0;
1312
1313 err_free_irq:
1314         if (state->irq > 0)
1315                 free_irq(client->irq, state);
1316 err_media_entity_cleanup:
1317         media_entity_cleanup(&sd->entity);
1318 err_free_ctrl:
1319         adv7180_exit_controls(state);
1320 err_unregister_vpp_client:
1321         if (state->chip_info->flags & ADV7180_FLAG_I2P)
1322                 i2c_unregister_device(state->vpp_client);
1323 err_unregister_csi_client:
1324         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1325                 i2c_unregister_device(state->csi_client);
1326         mutex_destroy(&state->mutex);
1327         return ret;
1328 }
1329
1330 static int adv7180_remove(struct i2c_client *client)
1331 {
1332         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1333         struct adv7180_state *state = to_state(sd);
1334
1335         v4l2_async_unregister_subdev(sd);
1336
1337         if (state->irq > 0)
1338                 free_irq(client->irq, state);
1339
1340         media_entity_cleanup(&sd->entity);
1341         adv7180_exit_controls(state);
1342
1343         if (state->chip_info->flags & ADV7180_FLAG_I2P)
1344                 i2c_unregister_device(state->vpp_client);
1345         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1346                 i2c_unregister_device(state->csi_client);
1347
1348         mutex_destroy(&state->mutex);
1349
1350         return 0;
1351 }
1352
1353 static const struct i2c_device_id adv7180_id[] = {
1354         { "adv7180", (kernel_ulong_t)&adv7180_info },
1355         { "adv7182", (kernel_ulong_t)&adv7182_info },
1356         { "adv7280", (kernel_ulong_t)&adv7280_info },
1357         { "adv7280-m", (kernel_ulong_t)&adv7280_m_info },
1358         { "adv7281", (kernel_ulong_t)&adv7281_info },
1359         { "adv7281-m", (kernel_ulong_t)&adv7281_m_info },
1360         { "adv7281-ma", (kernel_ulong_t)&adv7281_ma_info },
1361         { "adv7282", (kernel_ulong_t)&adv7282_info },
1362         { "adv7282-m", (kernel_ulong_t)&adv7282_m_info },
1363         {},
1364 };
1365 MODULE_DEVICE_TABLE(i2c, adv7180_id);
1366
1367 #ifdef CONFIG_PM_SLEEP
1368 static int adv7180_suspend(struct device *dev)
1369 {
1370         struct i2c_client *client = to_i2c_client(dev);
1371         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1372         struct adv7180_state *state = to_state(sd);
1373
1374         return adv7180_set_power(state, false);
1375 }
1376
1377 static int adv7180_resume(struct device *dev)
1378 {
1379         struct i2c_client *client = to_i2c_client(dev);
1380         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1381         struct adv7180_state *state = to_state(sd);
1382         int ret;
1383
1384         ret = init_device(state);
1385         if (ret < 0)
1386                 return ret;
1387
1388         ret = adv7180_set_power(state, state->powered);
1389         if (ret)
1390                 return ret;
1391
1392         return 0;
1393 }
1394
1395 static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
1396 #define ADV7180_PM_OPS (&adv7180_pm_ops)
1397
1398 #else
1399 #define ADV7180_PM_OPS NULL
1400 #endif
1401
1402 #ifdef CONFIG_OF
1403 static const struct of_device_id adv7180_of_id[] = {
1404         { .compatible = "adi,adv7180", },
1405         { .compatible = "adi,adv7182", },
1406         { .compatible = "adi,adv7280", },
1407         { .compatible = "adi,adv7280-m", },
1408         { .compatible = "adi,adv7281", },
1409         { .compatible = "adi,adv7281-m", },
1410         { .compatible = "adi,adv7281-ma", },
1411         { .compatible = "adi,adv7282", },
1412         { .compatible = "adi,adv7282-m", },
1413         { },
1414 };
1415
1416 MODULE_DEVICE_TABLE(of, adv7180_of_id);
1417 #endif
1418
1419 static struct i2c_driver adv7180_driver = {
1420         .driver = {
1421                    .name = KBUILD_MODNAME,
1422                    .pm = ADV7180_PM_OPS,
1423                    .of_match_table = of_match_ptr(adv7180_of_id),
1424                    },
1425         .probe = adv7180_probe,
1426         .remove = adv7180_remove,
1427         .id_table = adv7180_id,
1428 };
1429
1430 module_i2c_driver(adv7180_driver);
1431
1432 MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
1433 MODULE_AUTHOR("Mocean Laboratories");
1434 MODULE_LICENSE("GPL v2");