1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the MaxLinear MxL69x family of combo tuners/demods
5 * Copyright (C) 2020 Brad Love <brad@nextdimension.cc>
8 * Copyright (c) 2016 MaxLinear, Inc. All rights reserved
9 * which was released under GPL V2
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2, as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 #include <linux/mutex.h>
22 #include <linux/i2c-mux.h>
23 #include <linux/string.h>
24 #include <linux/firmware.h>
27 #include "mxl692_defs.h"
29 static const struct dvb_frontend_ops mxl692_ops;
32 struct dvb_frontend fe;
33 struct i2c_client *i2c_client;
34 struct mutex i2c_lock; /* i2c command mutex */
35 enum MXL_EAGLE_DEMOD_TYPE_E demod_type;
36 enum MXL_EAGLE_POWER_MODE_E power_mode;
37 u32 current_frequency;
43 static int mxl692_i2c_write(struct mxl692_dev *dev, u8 *buffer, u16 buf_len)
46 struct i2c_msg msg = {
47 .addr = dev->i2c_client->addr,
53 ret = i2c_transfer(dev->i2c_client->adapter, &msg, 1);
55 dev_dbg(&dev->i2c_client->dev, "i2c write error!\n");
60 static int mxl692_i2c_read(struct mxl692_dev *dev, u8 *buffer, u16 buf_len)
63 struct i2c_msg msg = {
64 .addr = dev->i2c_client->addr,
70 ret = i2c_transfer(dev->i2c_client->adapter, &msg, 1);
72 dev_dbg(&dev->i2c_client->dev, "i2c read error!\n");
77 static int convert_endian(u32 size, u8 *d)
81 for (i = 0; i < (size & ~3); i += 4) {
103 d[i + 0] ^= d[i + 2];
104 d[i + 2] ^= d[i + 0];
105 d[i + 0] ^= d[i + 2];
111 static int convert_endian_n(int n, u32 size, u8 *d)
115 for (i = 0; i < n; i += size)
116 count += convert_endian(size, d + i);
120 static void mxl692_tx_swap(enum MXL_EAGLE_OPCODE_E opcode, u8 *buffer)
125 buffer += MXL_EAGLE_HOST_MSG_HEADER_SIZE; /* skip API header */
128 case MXL_EAGLE_OPCODE_DEVICE_INTR_MASK_SET:
129 case MXL_EAGLE_OPCODE_TUNER_CHANNEL_TUNE_SET:
130 case MXL_EAGLE_OPCODE_SMA_TRANSMIT_SET:
131 buffer += convert_endian(sizeof(u32), buffer);
133 case MXL_EAGLE_OPCODE_QAM_PARAMS_SET:
135 buffer += convert_endian(2 * sizeof(u32), buffer);
138 /* no swapping - all get opcodes */
139 /* ATSC/OOB no swapping */
144 static void mxl692_rx_swap(enum MXL_EAGLE_OPCODE_E opcode, u8 *buffer)
149 buffer += MXL_EAGLE_HOST_MSG_HEADER_SIZE; /* skip API header */
152 case MXL_EAGLE_OPCODE_TUNER_AGC_STATUS_GET:
154 buffer += convert_endian(2 * sizeof(u16), buffer);
156 case MXL_EAGLE_OPCODE_ATSC_STATUS_GET:
157 buffer += convert_endian_n(2, sizeof(u16), buffer);
158 buffer += convert_endian(sizeof(u32), buffer);
160 case MXL_EAGLE_OPCODE_ATSC_ERROR_COUNTERS_GET:
161 buffer += convert_endian(3 * sizeof(u32), buffer);
163 case MXL_EAGLE_OPCODE_ATSC_EQUALIZER_FILTER_FFE_TAPS_GET:
164 buffer += convert_endian_n(24, sizeof(u16), buffer);
166 case MXL_EAGLE_OPCODE_QAM_STATUS_GET:
168 buffer += convert_endian_n(2, sizeof(u16), buffer);
169 buffer += convert_endian(sizeof(u32), buffer);
171 case MXL_EAGLE_OPCODE_QAM_ERROR_COUNTERS_GET:
172 buffer += convert_endian(7 * sizeof(u32), buffer);
174 case MXL_EAGLE_OPCODE_QAM_CONSTELLATION_VALUE_GET:
175 case MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_START_GET:
176 case MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_MIDDLE_GET:
177 case MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_END_GET:
178 case MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_START_GET:
179 buffer += convert_endian_n(24, sizeof(u16), buffer);
181 case MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_END_GET:
182 buffer += convert_endian_n(8, sizeof(u16), buffer);
184 case MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_FFE_GET:
185 buffer += convert_endian_n(17, sizeof(u16), buffer);
187 case MXL_EAGLE_OPCODE_OOB_ERROR_COUNTERS_GET:
188 buffer += convert_endian(3 * sizeof(u32), buffer);
190 case MXL_EAGLE_OPCODE_OOB_STATUS_GET:
191 buffer += convert_endian_n(2, sizeof(u16), buffer);
192 buffer += convert_endian(sizeof(u32), buffer);
194 case MXL_EAGLE_OPCODE_SMA_RECEIVE_GET:
195 buffer += convert_endian(sizeof(u32), buffer);
198 /* no swapping - all set opcodes */
203 static u32 mxl692_checksum(u8 *buffer, u32 size)
209 div_size = DIV_ROUND_UP(size, 4);
211 buf = (__be32 *)buffer;
212 for (ix = 0; ix < div_size; ix++)
213 cur_cksum += be32_to_cpu(buf[ix]);
215 cur_cksum ^= 0xDEADBEEF;
220 static int mxl692_validate_fw_header(struct mxl692_dev *dev,
221 const u8 *buffer, u32 buf_len)
225 __be32 *local_buf = NULL;
227 const u8 fw_hdr[] = { 0x4D, 0x31, 0x10, 0x02, 0x40, 0x00, 0x00, 0x80 };
229 if (memcmp(buffer, fw_hdr, 8) != 0) {
234 local_buf = (__be32 *)(buffer + 8);
235 temp = be32_to_cpu(*local_buf);
237 if ((buf_len - 16) != temp >> 8) {
242 for (ix = 16; ix < buf_len; ix++)
243 temp_cksum += buffer[ix];
245 if (temp_cksum != buffer[11])
250 dev_dbg(&dev->i2c_client->dev, "failed\n");
254 static int mxl692_write_fw_block(struct mxl692_dev *dev, const u8 *buffer,
255 u32 buf_len, u32 *index)
258 u32 ix = 0, total_len = 0, addr = 0, chunk_len = 0, prevchunk_len = 0;
259 u8 local_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {}, *plocal_buf = NULL;
260 int payload_max = MXL_EAGLE_MAX_I2C_PACKET_SIZE - MXL_EAGLE_I2C_MHEADER_SIZE;
264 if (buffer[ix] == 0x53) {
265 total_len = buffer[ix + 1] << 16 | buffer[ix + 2] << 8 | buffer[ix + 3];
266 total_len = (total_len + 3) & ~3;
267 addr = buffer[ix + 4] << 24 | buffer[ix + 5] << 16 |
268 buffer[ix + 6] << 8 | buffer[ix + 7];
269 ix += MXL_EAGLE_FW_SEGMENT_HEADER_SIZE;
271 while ((total_len > 0) && (status == 0)) {
272 plocal_buf = local_buf;
273 chunk_len = (total_len < payload_max) ? total_len : payload_max;
275 *plocal_buf++ = 0xFC;
276 *plocal_buf++ = chunk_len + sizeof(u32);
278 *(u32 *)plocal_buf = addr + prevchunk_len;
280 convert_endian(sizeof(u32), plocal_buf);
282 plocal_buf += sizeof(u32);
284 memcpy(plocal_buf, &buffer[ix], chunk_len);
285 convert_endian(chunk_len, plocal_buf);
286 if (mxl692_i2c_write(dev, local_buf,
287 (chunk_len + MXL_EAGLE_I2C_MHEADER_SIZE)) < 0) {
292 prevchunk_len += chunk_len;
293 total_len -= chunk_len;
302 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
307 static int mxl692_memwrite(struct mxl692_dev *dev, u32 addr,
308 u8 *buffer, u32 size)
310 int status = 0, total_len = 0;
311 u8 local_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {}, *plocal_buf = NULL;
314 total_len = (total_len + 3) & ~3; /* 4 byte alignment */
316 if (total_len > (MXL_EAGLE_MAX_I2C_PACKET_SIZE - MXL_EAGLE_I2C_MHEADER_SIZE))
317 dev_dbg(&dev->i2c_client->dev, "hrmph?\n");
319 plocal_buf = local_buf;
321 *plocal_buf++ = 0xFC;
322 *plocal_buf++ = total_len + sizeof(u32);
324 *(u32 *)plocal_buf = addr;
325 plocal_buf += sizeof(u32);
327 memcpy(plocal_buf, buffer, total_len);
329 convert_endian(sizeof(u32) + total_len, local_buf + 2);
331 if (mxl692_i2c_write(dev, local_buf,
332 (total_len + MXL_EAGLE_I2C_MHEADER_SIZE)) < 0) {
339 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
343 static int mxl692_memread(struct mxl692_dev *dev, u32 addr,
344 u8 *buffer, u32 size)
347 u8 local_buf[MXL_EAGLE_I2C_MHEADER_SIZE] = {}, *plocal_buf = NULL;
349 plocal_buf = local_buf;
351 *plocal_buf++ = 0xFB;
352 *plocal_buf++ = sizeof(u32);
353 *(u32 *)plocal_buf = addr;
355 convert_endian(sizeof(u32), plocal_buf);
357 mutex_lock(&dev->i2c_lock);
359 if (mxl692_i2c_write(dev, local_buf, MXL_EAGLE_I2C_MHEADER_SIZE) > 0) {
360 size = (size + 3) & ~3; /* 4 byte alignment */
361 status = mxl692_i2c_read(dev, buffer, (u16)size) < 0 ? -EREMOTEIO : 0;
364 convert_endian(size, buffer);
370 mutex_unlock(&dev->i2c_lock);
373 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
378 static const char *mxl692_opcode_string(u8 opcode)
380 if (opcode >= 0 && opcode <= MXL_EAGLE_OPCODE_INTERNAL)
381 return MXL_EAGLE_OPCODE_STRING[opcode];
383 return "invalid opcode";
386 static int mxl692_opwrite(struct mxl692_dev *dev, u8 *buffer,
389 int status = 0, total_len = 0;
390 u8 local_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {}, *plocal_buf = NULL;
391 struct MXL_EAGLE_HOST_MSG_HEADER_T *tx_hdr = (struct MXL_EAGLE_HOST_MSG_HEADER_T *)buffer;
394 total_len = (total_len + 3) & ~3; /* 4 byte alignment */
396 if (total_len > (MXL_EAGLE_MAX_I2C_PACKET_SIZE - MXL_EAGLE_I2C_PHEADER_SIZE))
397 dev_dbg(&dev->i2c_client->dev, "hrmph?\n");
399 plocal_buf = local_buf;
401 *plocal_buf++ = 0xFE;
402 *plocal_buf++ = (u8)total_len;
404 memcpy(plocal_buf, buffer, total_len);
405 convert_endian(total_len, plocal_buf);
407 if (mxl692_i2c_write(dev, local_buf,
408 (total_len + MXL_EAGLE_I2C_PHEADER_SIZE)) < 0) {
414 dev_dbg(&dev->i2c_client->dev, "opcode %s err %d\n",
415 mxl692_opcode_string(tx_hdr->opcode), status);
419 static int mxl692_opread(struct mxl692_dev *dev, u8 *buffer,
424 u8 local_buf[MXL_EAGLE_I2C_PHEADER_SIZE] = {};
429 if (mxl692_i2c_write(dev, local_buf, MXL_EAGLE_I2C_PHEADER_SIZE) > 0) {
430 size = (size + 3) & ~3; /* 4 byte alignment */
432 /* Read in 4 byte chunks */
433 for (ix = 0; ix < size; ix += 4) {
434 if (mxl692_i2c_read(dev, buffer + ix, 4) < 0) {
435 dev_dbg(&dev->i2c_client->dev, "ix=%d size=%d\n", ix, size);
440 convert_endian(size, buffer);
446 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
450 static int mxl692_i2c_writeread(struct mxl692_dev *dev,
455 u8 rx_payload_expected)
457 int status = 0, timeout = 40;
458 u8 tx_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {};
459 u8 rx_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {};
460 u32 resp_checksum = 0, resp_checksum_tmp = 0;
461 struct MXL_EAGLE_HOST_MSG_HEADER_T *tx_header;
462 struct MXL_EAGLE_HOST_MSG_HEADER_T *rx_header;
464 mutex_lock(&dev->i2c_lock);
466 if ((tx_payload_size + MXL_EAGLE_HOST_MSG_HEADER_SIZE) >
467 (MXL_EAGLE_MAX_I2C_PACKET_SIZE - MXL_EAGLE_I2C_PHEADER_SIZE)) {
472 tx_header = (struct MXL_EAGLE_HOST_MSG_HEADER_T *)tx_buf;
473 tx_header->opcode = opcode;
474 tx_header->seqnum = dev->seqnum++;
475 tx_header->payload_size = tx_payload_size;
476 tx_header->checksum = 0;
478 if (dev->seqnum == 0)
481 if (tx_payload && tx_payload_size > 0)
482 memcpy(&tx_buf[MXL_EAGLE_HOST_MSG_HEADER_SIZE], tx_payload, tx_payload_size);
484 mxl692_tx_swap(opcode, tx_buf);
486 tx_header->checksum = 0;
487 tx_header->checksum = mxl692_checksum(tx_buf,
488 MXL_EAGLE_HOST_MSG_HEADER_SIZE + tx_payload_size);
489 #ifdef __LITTLE_ENDIAN
490 convert_endian(4, (u8 *)&tx_header->checksum); /* cksum is big endian */
492 /* send Tx message */
493 status = mxl692_opwrite(dev, tx_buf,
494 tx_payload_size + MXL_EAGLE_HOST_MSG_HEADER_SIZE);
500 /* receive Rx message (polling) */
501 rx_header = (struct MXL_EAGLE_HOST_MSG_HEADER_T *)rx_buf;
504 status = mxl692_opread(dev, rx_buf,
505 rx_payload_expected + MXL_EAGLE_HOST_MSG_HEADER_SIZE);
506 usleep_range(1000, 2000);
508 } while ((timeout > 0) && (status == 0) &&
509 (rx_header->seqnum == 0) &&
510 (rx_header->checksum == 0));
512 if (timeout == 0 || status) {
513 dev_dbg(&dev->i2c_client->dev, "timeout=%d status=%d\n",
519 if (rx_header->status) {
520 dev_dbg(&dev->i2c_client->dev, "rx header status code: %d\n", rx_header->status);
525 if (rx_header->seqnum != tx_header->seqnum ||
526 rx_header->opcode != tx_header->opcode ||
527 rx_header->payload_size != rx_payload_expected) {
528 dev_dbg(&dev->i2c_client->dev, "Something failed seq=%s opcode=%s pSize=%s\n",
529 rx_header->seqnum != tx_header->seqnum ? "X" : "0",
530 rx_header->opcode != tx_header->opcode ? "X" : "0",
531 rx_header->payload_size != rx_payload_expected ? "X" : "0");
532 if (rx_header->payload_size != rx_payload_expected)
533 dev_dbg(&dev->i2c_client->dev,
534 "rx_header->payloadSize=%d rx_payload_expected=%d\n",
535 rx_header->payload_size, rx_payload_expected);
540 resp_checksum = rx_header->checksum;
541 rx_header->checksum = 0;
543 resp_checksum_tmp = mxl692_checksum(rx_buf,
544 MXL_EAGLE_HOST_MSG_HEADER_SIZE + rx_header->payload_size);
545 #ifdef __LITTLE_ENDIAN
546 convert_endian(4, (u8 *)&resp_checksum_tmp); /* cksum is big endian */
548 if (resp_checksum != resp_checksum_tmp) {
549 dev_dbg(&dev->i2c_client->dev, "rx checksum failure\n");
554 mxl692_rx_swap(rx_header->opcode, rx_buf);
556 if (rx_header->payload_size > 0) {
558 dev_dbg(&dev->i2c_client->dev, "no rx payload?!?\n");
562 memcpy(rx_payload, rx_buf + MXL_EAGLE_HOST_MSG_HEADER_SIZE,
563 rx_header->payload_size);
567 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
569 mutex_unlock(&dev->i2c_lock);
573 static int mxl692_fwdownload(struct mxl692_dev *dev,
574 const u8 *firmware_buf, u32 buf_len)
577 u32 ix, reg_val = 0x1;
578 u8 rx_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {};
579 struct MXL_EAGLE_DEV_STATUS_T *dev_status;
581 if (buf_len < MXL_EAGLE_FW_HEADER_SIZE ||
582 buf_len > MXL_EAGLE_FW_MAX_SIZE_IN_KB * 1000)
585 mutex_lock(&dev->i2c_lock);
587 dev_dbg(&dev->i2c_client->dev, "\n");
589 status = mxl692_validate_fw_header(dev, firmware_buf, buf_len);
594 status = mxl692_write_fw_block(dev, firmware_buf, buf_len, &ix); /* DRAM */
598 status = mxl692_write_fw_block(dev, firmware_buf, buf_len, &ix); /* IRAM */
602 /* release CPU from reset */
603 status = mxl692_memwrite(dev, 0x70000018, (u8 *)®_val, sizeof(u32));
607 mutex_unlock(&dev->i2c_lock);
610 /* verify FW is alive */
611 usleep_range(MXL_EAGLE_FW_LOAD_TIME * 1000, (MXL_EAGLE_FW_LOAD_TIME + 5) * 1000);
612 dev_status = (struct MXL_EAGLE_DEV_STATUS_T *)&rx_buf;
613 status = mxl692_i2c_writeread(dev,
614 MXL_EAGLE_OPCODE_DEVICE_STATUS_GET,
618 sizeof(struct MXL_EAGLE_DEV_STATUS_T));
623 mutex_unlock(&dev->i2c_lock);
625 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
629 static int mxl692_get_versions(struct mxl692_dev *dev)
632 struct MXL_EAGLE_DEV_VER_T dev_ver = {};
633 static const char * const chip_id[] = {"N/A", "691", "248", "692"};
635 status = mxl692_i2c_writeread(dev, MXL_EAGLE_OPCODE_DEVICE_VERSION_GET,
639 sizeof(struct MXL_EAGLE_DEV_VER_T));
643 dev_info(&dev->i2c_client->dev, "MxL692_DEMOD Chip ID: %s\n",
644 chip_id[dev_ver.chip_id]);
646 dev_info(&dev->i2c_client->dev,
647 "MxL692_DEMOD FW Version: %d.%d.%d.%d_RC%d\n",
648 dev_ver.firmware_ver[0],
649 dev_ver.firmware_ver[1],
650 dev_ver.firmware_ver[2],
651 dev_ver.firmware_ver[3],
652 dev_ver.firmware_ver[4]);
657 static int mxl692_reset(struct mxl692_dev *dev)
660 u32 dev_type = MXL_EAGLE_DEVICE_MAX, reg_val = 0x2;
662 dev_dbg(&dev->i2c_client->dev, "\n");
664 /* legacy i2c override */
665 status = mxl692_memwrite(dev, 0x80000100, (u8 *)®_val, sizeof(u32));
670 status = mxl692_memread(dev, 0x70000188, (u8 *)&dev_type, sizeof(u32));
674 if (dev_type != dev->device_type)
679 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
683 static int mxl692_config_regulators(struct mxl692_dev *dev,
684 enum MXL_EAGLE_POWER_SUPPLY_SOURCE_E power_supply)
689 dev_dbg(&dev->i2c_client->dev, "\n");
691 /* configure main regulator according to the power supply source */
692 status = mxl692_memread(dev, 0x90000000, (u8 *)®_val, sizeof(u32));
696 reg_val &= 0x00FFFFFF;
697 reg_val |= (power_supply == MXL_EAGLE_POWER_SUPPLY_SOURCE_SINGLE) ?
698 0x14000000 : 0x10000000;
700 status = mxl692_memwrite(dev, 0x90000000, (u8 *)®_val, sizeof(u32));
704 /* configure digital regulator to high current mode */
705 status = mxl692_memread(dev, 0x90000018, (u8 *)®_val, sizeof(u32));
711 status = mxl692_memwrite(dev, 0x90000018, (u8 *)®_val, sizeof(u32));
715 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
719 static int mxl692_config_xtal(struct mxl692_dev *dev,
720 struct MXL_EAGLE_DEV_XTAL_T *dev_xtal)
723 u32 reg_val, reg_val1;
725 dev_dbg(&dev->i2c_client->dev, "\n");
727 status = mxl692_memread(dev, 0x90000000, (u8 *)®_val, sizeof(u32));
731 /* set XTAL capacitance */
732 reg_val &= 0xFFFFFFE0;
733 reg_val |= dev_xtal->xtal_cap;
736 reg_val = dev_xtal->clk_out_enable ? (reg_val | 0x0100) : (reg_val & 0xFFFFFEFF);
738 status = mxl692_memwrite(dev, 0x90000000, (u8 *)®_val, sizeof(u32));
742 /* set CLK OUT divider */
743 reg_val = dev_xtal->clk_out_div_enable ? (reg_val | 0x0200) : (reg_val & 0xFFFFFDFF);
745 status = mxl692_memwrite(dev, 0x90000000, (u8 *)®_val, sizeof(u32));
749 /* set XTAL sharing */
750 reg_val = dev_xtal->xtal_sharing_enable ? (reg_val | 0x010400) : (reg_val & 0xFFFEFBFF);
752 status = mxl692_memwrite(dev, 0x90000000, (u8 *)®_val, sizeof(u32));
756 /* enable/disable XTAL calibration, based on master/slave device */
757 status = mxl692_memread(dev, 0x90000030, (u8 *)®_val1, sizeof(u32));
761 if (dev_xtal->xtal_calibration_enable) {
762 /* enable XTAL calibration and set XTAL amplitude to a higher value */
763 reg_val1 &= 0xFFFFFFFD;
766 status = mxl692_memwrite(dev, 0x90000030, (u8 *)®_val1, sizeof(u32));
770 /* disable XTAL calibration */
773 status = mxl692_memwrite(dev, 0x90000030, (u8 *)®_val1, sizeof(u32));
777 /* set XTAL bias value */
778 status = mxl692_memread(dev, 0x9000002c, (u8 *)®_val, sizeof(u32));
782 reg_val &= 0xC0FFFFFF;
783 reg_val |= 0xA000000;
785 status = mxl692_memwrite(dev, 0x9000002c, (u8 *)®_val, sizeof(u32));
790 /* start XTAL calibration */
791 status = mxl692_memread(dev, 0x70000010, (u8 *)®_val, sizeof(u32));
797 status = mxl692_memwrite(dev, 0x70000010, (u8 *)®_val, sizeof(u32));
801 status = mxl692_memread(dev, 0x70000018, (u8 *)®_val, sizeof(u32));
807 status = mxl692_memwrite(dev, 0x70000018, (u8 *)®_val, sizeof(u32));
811 status = mxl692_memread(dev, 0x9001014c, (u8 *)®_val, sizeof(u32));
815 reg_val &= 0xFFFFEFFF;
817 status = mxl692_memwrite(dev, 0x9001014c, (u8 *)®_val, sizeof(u32));
823 status = mxl692_memwrite(dev, 0x9001014c, (u8 *)®_val, sizeof(u32));
827 usleep_range(45000, 55000);
831 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
835 static int mxl692_powermode(struct mxl692_dev *dev,
836 enum MXL_EAGLE_POWER_MODE_E power_mode)
839 u8 mode = power_mode;
841 dev_dbg(&dev->i2c_client->dev, "%s\n",
842 power_mode == MXL_EAGLE_POWER_MODE_SLEEP ? "sleep" : "active");
844 status = mxl692_i2c_writeread(dev,
845 MXL_EAGLE_OPCODE_DEVICE_POWERMODE_SET,
851 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
855 dev->power_mode = power_mode;
860 static int mxl692_init(struct dvb_frontend *fe)
862 struct mxl692_dev *dev = fe->demodulator_priv;
863 struct i2c_client *client = dev->i2c_client;
864 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
866 const struct firmware *firmware;
867 struct MXL_EAGLE_DEV_XTAL_T xtal_config = {};
869 dev_dbg(&dev->i2c_client->dev, "\n");
876 status = mxl692_reset(dev);
880 usleep_range(50 * 1000, 60 * 1000); /* was 1000! */
882 status = mxl692_config_regulators(dev, MXL_EAGLE_POWER_SUPPLY_SOURCE_DUAL);
886 xtal_config.xtal_cap = 26;
887 xtal_config.clk_out_div_enable = 0;
888 xtal_config.clk_out_enable = 0;
889 xtal_config.xtal_calibration_enable = 0;
890 xtal_config.xtal_sharing_enable = 1;
891 status = mxl692_config_xtal(dev, &xtal_config);
895 status = request_firmware(&firmware, MXL692_FIRMWARE, &client->dev);
897 dev_dbg(&dev->i2c_client->dev, "firmware missing? %s\n",
902 status = mxl692_fwdownload(dev, firmware->data, firmware->size);
904 goto err_release_firmware;
906 release_firmware(firmware);
908 status = mxl692_get_versions(dev);
912 dev->power_mode = MXL_EAGLE_POWER_MODE_SLEEP;
914 /* Config Device Power Mode */
915 if (dev->power_mode != MXL_EAGLE_POWER_MODE_ACTIVE) {
916 status = mxl692_powermode(dev, MXL_EAGLE_POWER_MODE_ACTIVE);
920 usleep_range(50 * 1000, 60 * 1000); /* was 500! */
923 /* Init stats here to indicate which stats are supported */
925 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
926 c->post_bit_error.len = 1;
927 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
928 c->post_bit_count.len = 1;
929 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
930 c->block_error.len = 1;
931 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
935 err_release_firmware:
936 release_firmware(firmware);
938 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
942 static int mxl692_sleep(struct dvb_frontend *fe)
944 struct mxl692_dev *dev = fe->demodulator_priv;
946 if (dev->power_mode != MXL_EAGLE_POWER_MODE_SLEEP)
947 mxl692_powermode(dev, MXL_EAGLE_POWER_MODE_SLEEP);
952 static int mxl692_set_frontend(struct dvb_frontend *fe)
954 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
955 struct mxl692_dev *dev = fe->demodulator_priv;
958 enum MXL_EAGLE_DEMOD_TYPE_E demod_type;
959 struct MXL_EAGLE_MPEGOUT_PARAMS_T mpeg_params = {};
960 enum MXL_EAGLE_QAM_DEMOD_ANNEX_TYPE_E qam_annex = MXL_EAGLE_QAM_DEMOD_ANNEX_B;
961 struct MXL_EAGLE_QAM_DEMOD_PARAMS_T qam_params = {};
962 struct MXL_EAGLE_TUNER_CHANNEL_PARAMS_T tuner_params = {};
965 dev_dbg(&dev->i2c_client->dev, "\n");
967 switch (p->modulation) {
969 demod_type = MXL_EAGLE_DEMOD_TYPE_ATSC;
975 demod_type = MXL_EAGLE_DEMOD_TYPE_QAM;
981 if (dev->current_frequency == p->frequency && dev->demod_type == demod_type) {
982 dev_dbg(&dev->i2c_client->dev, "already set up\n");
986 dev->current_frequency = -1;
987 dev->demod_type = -1;
989 op_param = demod_type;
990 status = mxl692_i2c_writeread(dev,
991 MXL_EAGLE_OPCODE_DEVICE_DEMODULATOR_TYPE_SET,
997 dev_dbg(&dev->i2c_client->dev,
998 "DEVICE_DEMODULATOR_TYPE_SET...FAIL err 0x%x\n", status);
1002 usleep_range(20 * 1000, 30 * 1000); /* was 500! */
1004 mpeg_params.mpeg_parallel = 0;
1005 mpeg_params.msb_first = MXL_EAGLE_DATA_SERIAL_MSB_1ST;
1006 mpeg_params.mpeg_sync_pulse_width = MXL_EAGLE_DATA_SYNC_WIDTH_BIT;
1007 mpeg_params.mpeg_valid_pol = MXL_EAGLE_CLOCK_POSITIVE;
1008 mpeg_params.mpeg_sync_pol = MXL_EAGLE_CLOCK_POSITIVE;
1009 mpeg_params.mpeg_clk_pol = MXL_EAGLE_CLOCK_NEGATIVE;
1010 mpeg_params.mpeg3wire_mode_enable = 0;
1011 mpeg_params.mpeg_clk_freq = MXL_EAGLE_MPEG_CLOCK_27MHZ;
1013 switch (demod_type) {
1014 case MXL_EAGLE_DEMOD_TYPE_ATSC:
1015 status = mxl692_i2c_writeread(dev,
1016 MXL_EAGLE_OPCODE_DEVICE_MPEG_OUT_PARAMS_SET,
1018 sizeof(struct MXL_EAGLE_MPEGOUT_PARAMS_T),
1024 case MXL_EAGLE_DEMOD_TYPE_QAM:
1025 if (qam_annex == MXL_EAGLE_QAM_DEMOD_ANNEX_A)
1026 mpeg_params.msb_first = MXL_EAGLE_DATA_SERIAL_LSB_1ST;
1027 status = mxl692_i2c_writeread(dev,
1028 MXL_EAGLE_OPCODE_DEVICE_MPEG_OUT_PARAMS_SET,
1030 sizeof(struct MXL_EAGLE_MPEGOUT_PARAMS_T),
1036 qam_params.annex_type = qam_annex;
1037 qam_params.qam_type = MXL_EAGLE_QAM_DEMOD_AUTO;
1038 qam_params.iq_flip = MXL_EAGLE_DEMOD_IQ_AUTO;
1039 if (p->modulation == QAM_64)
1040 qam_params.symbol_rate_hz = 5057000;
1042 qam_params.symbol_rate_hz = 5361000;
1044 qam_params.symbol_rate_256qam_hz = 5361000;
1046 status = mxl692_i2c_writeread(dev,
1047 MXL_EAGLE_OPCODE_QAM_PARAMS_SET,
1049 sizeof(struct MXL_EAGLE_QAM_DEMOD_PARAMS_T),
1059 usleep_range(20 * 1000, 30 * 1000); /* was 500! */
1061 tuner_params.freq_hz = p->frequency;
1062 tuner_params.bandwidth = MXL_EAGLE_TUNER_BW_6MHZ;
1063 tuner_params.tune_mode = MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_VIEW;
1065 dev_dbg(&dev->i2c_client->dev, " Tuning Freq: %d %s\n", tuner_params.freq_hz,
1066 demod_type == MXL_EAGLE_DEMOD_TYPE_ATSC ? "ATSC" : "QAM");
1068 status = mxl692_i2c_writeread(dev,
1069 MXL_EAGLE_OPCODE_TUNER_CHANNEL_TUNE_SET,
1070 (u8 *)&tuner_params,
1071 sizeof(struct MXL_EAGLE_TUNER_CHANNEL_PARAMS_T),
1077 usleep_range(20 * 1000, 30 * 1000); /* was 500! */
1079 switch (demod_type) {
1080 case MXL_EAGLE_DEMOD_TYPE_ATSC:
1081 status = mxl692_i2c_writeread(dev,
1082 MXL_EAGLE_OPCODE_ATSC_INIT_SET,
1087 case MXL_EAGLE_DEMOD_TYPE_QAM:
1088 status = mxl692_i2c_writeread(dev,
1089 MXL_EAGLE_OPCODE_QAM_RESTART_SET,
1098 dev->demod_type = demod_type;
1099 dev->current_frequency = p->frequency;
1103 dev_dbg(&dev->i2c_client->dev, "err %d\n", status);
1107 static int mxl692_get_frontend(struct dvb_frontend *fe,
1108 struct dtv_frontend_properties *p)
1110 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1112 p->modulation = c->modulation;
1113 p->frequency = c->frequency;
1118 static int mxl692_read_snr(struct dvb_frontend *fe, u16 *snr)
1120 struct mxl692_dev *dev = fe->demodulator_priv;
1121 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1122 u8 rx_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {};
1123 struct MXL_EAGLE_ATSC_DEMOD_STATUS_T *atsc_status;
1124 struct MXL_EAGLE_QAM_DEMOD_STATUS_T *qam_status;
1125 enum MXL_EAGLE_DEMOD_TYPE_E demod_type = dev->demod_type;
1130 dev_dbg(&dev->i2c_client->dev, "\n");
1132 atsc_status = (struct MXL_EAGLE_ATSC_DEMOD_STATUS_T *)&rx_buf;
1133 qam_status = (struct MXL_EAGLE_QAM_DEMOD_STATUS_T *)&rx_buf;
1135 switch (demod_type) {
1136 case MXL_EAGLE_DEMOD_TYPE_ATSC:
1137 mxl_status = mxl692_i2c_writeread(dev,
1138 MXL_EAGLE_OPCODE_ATSC_STATUS_GET,
1142 sizeof(struct MXL_EAGLE_ATSC_DEMOD_STATUS_T));
1144 *snr = (u16)(atsc_status->snr_db_tenths / 10);
1145 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1146 c->cnr.stat[0].svalue = *snr;
1149 case MXL_EAGLE_DEMOD_TYPE_QAM:
1150 mxl_status = mxl692_i2c_writeread(dev,
1151 MXL_EAGLE_OPCODE_QAM_STATUS_GET,
1155 sizeof(struct MXL_EAGLE_QAM_DEMOD_STATUS_T));
1157 *snr = (u16)(qam_status->snr_db_tenths / 10);
1159 case MXL_EAGLE_DEMOD_TYPE_OOB:
1165 dev_dbg(&dev->i2c_client->dev, "err %d\n", mxl_status);
1169 static int mxl692_read_ber_ucb(struct dvb_frontend *fe)
1171 struct mxl692_dev *dev = fe->demodulator_priv;
1172 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1173 u8 rx_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {};
1174 struct MXL_EAGLE_ATSC_DEMOD_ERROR_COUNTERS_T *atsc_errors;
1175 enum MXL_EAGLE_DEMOD_TYPE_E demod_type = dev->demod_type;
1179 dev_dbg(&dev->i2c_client->dev, "\n");
1181 atsc_errors = (struct MXL_EAGLE_ATSC_DEMOD_ERROR_COUNTERS_T *)&rx_buf;
1183 switch (demod_type) {
1184 case MXL_EAGLE_DEMOD_TYPE_ATSC:
1185 mxl_status = mxl692_i2c_writeread(dev,
1186 MXL_EAGLE_OPCODE_ATSC_ERROR_COUNTERS_GET,
1190 sizeof(struct MXL_EAGLE_ATSC_DEMOD_ERROR_COUNTERS_T));
1192 if (atsc_errors->error_packets == 0)
1195 utmp = ((atsc_errors->error_bytes / atsc_errors->error_packets) *
1196 atsc_errors->total_packets);
1198 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
1199 c->post_bit_error.stat[0].uvalue += atsc_errors->error_bytes;
1200 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
1201 c->post_bit_count.stat[0].uvalue += utmp;
1203 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
1204 c->block_error.stat[0].uvalue += atsc_errors->error_packets;
1206 dev_dbg(&dev->i2c_client->dev, "%llu %llu\n",
1207 c->post_bit_count.stat[0].uvalue, c->block_error.stat[0].uvalue);
1210 case MXL_EAGLE_DEMOD_TYPE_QAM:
1211 case MXL_EAGLE_DEMOD_TYPE_OOB:
1217 dev_dbg(&dev->i2c_client->dev, "err %d\n", mxl_status);
1222 static int mxl692_read_status(struct dvb_frontend *fe,
1223 enum fe_status *status)
1225 struct mxl692_dev *dev = fe->demodulator_priv;
1226 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1227 u8 rx_buf[MXL_EAGLE_MAX_I2C_PACKET_SIZE] = {};
1228 struct MXL_EAGLE_ATSC_DEMOD_STATUS_T *atsc_status;
1229 struct MXL_EAGLE_QAM_DEMOD_STATUS_T *qam_status;
1230 enum MXL_EAGLE_DEMOD_TYPE_E demod_type = dev->demod_type;
1234 dev_dbg(&dev->i2c_client->dev, "\n");
1236 atsc_status = (struct MXL_EAGLE_ATSC_DEMOD_STATUS_T *)&rx_buf;
1237 qam_status = (struct MXL_EAGLE_QAM_DEMOD_STATUS_T *)&rx_buf;
1239 switch (demod_type) {
1240 case MXL_EAGLE_DEMOD_TYPE_ATSC:
1241 mxl_status = mxl692_i2c_writeread(dev,
1242 MXL_EAGLE_OPCODE_ATSC_STATUS_GET,
1246 sizeof(struct MXL_EAGLE_ATSC_DEMOD_STATUS_T));
1247 if (!mxl_status && atsc_status->atsc_lock) {
1248 *status |= FE_HAS_SIGNAL;
1249 *status |= FE_HAS_CARRIER;
1250 *status |= FE_HAS_VITERBI;
1251 *status |= FE_HAS_SYNC;
1252 *status |= FE_HAS_LOCK;
1254 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1255 c->cnr.stat[0].svalue = atsc_status->snr_db_tenths / 10;
1258 case MXL_EAGLE_DEMOD_TYPE_QAM:
1259 mxl_status = mxl692_i2c_writeread(dev,
1260 MXL_EAGLE_OPCODE_QAM_STATUS_GET,
1264 sizeof(struct MXL_EAGLE_QAM_DEMOD_STATUS_T));
1265 if (!mxl_status && qam_status->qam_locked) {
1266 *status |= FE_HAS_SIGNAL;
1267 *status |= FE_HAS_CARRIER;
1268 *status |= FE_HAS_VITERBI;
1269 *status |= FE_HAS_SYNC;
1270 *status |= FE_HAS_LOCK;
1272 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1273 c->cnr.stat[0].svalue = qam_status->snr_db_tenths / 10;
1276 case MXL_EAGLE_DEMOD_TYPE_OOB:
1281 if ((*status & FE_HAS_LOCK) == 0) {
1282 /* No lock, reset all statistics */
1284 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1285 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1286 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1287 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1292 dev_dbg(&dev->i2c_client->dev, "err %d\n", mxl_status);
1294 mxl_status = mxl692_read_ber_ucb(fe);
1299 static const struct dvb_frontend_ops mxl692_ops = {
1300 .delsys = { SYS_ATSC },
1302 .name = "MaxLinear MxL692 VSB tuner-demodulator",
1303 .frequency_min_hz = 54000000,
1304 .frequency_max_hz = 858000000,
1305 .frequency_stepsize_hz = 62500,
1309 .init = mxl692_init,
1310 .sleep = mxl692_sleep,
1311 .set_frontend = mxl692_set_frontend,
1312 .get_frontend = mxl692_get_frontend,
1314 .read_status = mxl692_read_status,
1315 .read_snr = mxl692_read_snr,
1318 static int mxl692_probe(struct i2c_client *client,
1319 const struct i2c_device_id *id)
1321 struct mxl692_config *config = client->dev.platform_data;
1322 struct mxl692_dev *dev;
1325 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1328 dev_dbg(&client->dev, "kzalloc() failed\n");
1332 memcpy(&dev->fe.ops, &mxl692_ops, sizeof(struct dvb_frontend_ops));
1333 dev->fe.demodulator_priv = dev;
1334 dev->i2c_client = client;
1335 *config->fe = &dev->fe;
1336 mutex_init(&dev->i2c_lock);
1337 i2c_set_clientdata(client, dev);
1339 dev_info(&client->dev, "MaxLinear mxl692 successfully attached\n");
1343 dev_dbg(&client->dev, "failed %d\n", ret);
1347 static int mxl692_remove(struct i2c_client *client)
1349 struct mxl692_dev *dev = i2c_get_clientdata(client);
1351 dev->fe.demodulator_priv = NULL;
1352 i2c_set_clientdata(client, NULL);
1358 static const struct i2c_device_id mxl692_id_table[] = {
1362 MODULE_DEVICE_TABLE(i2c, mxl692_id_table);
1364 static struct i2c_driver mxl692_driver = {
1368 .probe = mxl692_probe,
1369 .remove = mxl692_remove,
1370 .id_table = mxl692_id_table,
1373 module_i2c_driver(mxl692_driver);
1375 MODULE_AUTHOR("Brad Love <brad@nextdimension.cc>");
1376 MODULE_DESCRIPTION("MaxLinear MxL692 demodulator/tuner driver");
1377 MODULE_FIRMWARE(MXL692_FIRMWARE);
1378 MODULE_LICENSE("GPL");