1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Panasonic MN88472 DVB-T/T2/C demodulator driver
5 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
8 #include "mn88472_priv.h"
10 static int mn88472_get_tune_settings(struct dvb_frontend *fe,
11 struct dvb_frontend_tune_settings *s)
13 s->min_delay_ms = 1000;
17 static int mn88472_read_status(struct dvb_frontend *fe, enum fe_status *status)
19 struct i2c_client *client = fe->demodulator_priv;
20 struct mn88472_dev *dev = i2c_get_clientdata(client);
21 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
23 unsigned int utmp, utmp1, utmp2;
31 switch (c->delivery_system) {
33 ret = regmap_read(dev->regmap[0], 0x7f, &utmp);
36 if ((utmp & 0x0f) >= 0x09)
37 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
38 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
43 ret = regmap_read(dev->regmap[2], 0x92, &utmp);
46 if ((utmp & 0x0f) >= 0x0d)
47 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
48 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
49 else if ((utmp & 0x0f) >= 0x0a)
50 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
52 else if ((utmp & 0x0f) >= 0x07)
53 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
57 case SYS_DVBC_ANNEX_A:
58 ret = regmap_read(dev->regmap[1], 0x84, &utmp);
61 if ((utmp & 0x0f) >= 0x08)
62 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
63 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
73 if (*status & FE_HAS_SIGNAL) {
74 for (i = 0; i < 2; i++) {
75 ret = regmap_bulk_read(dev->regmap[2], 0x8e + i,
81 utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
82 dev_dbg(&client->dev, "strength=%u\n", utmp1);
84 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
85 c->strength.stat[0].uvalue = utmp1;
87 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
91 if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) {
93 ret = regmap_bulk_read(dev->regmap[0], 0x9c, buf, 2);
97 utmp = buf[0] << 8 | buf[1] << 0;
99 /* CNR[dB]: 10 * log10(65536 / value) + 2 */
100 /* log10(65536) = 80807124, 0.2 = 3355443 */
101 stmp = ((u64)80807124 - intlog10(utmp) + 3355443)
104 dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp);
109 c->cnr.stat[0].svalue = stmp;
110 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
111 } else if (*status & FE_HAS_VITERBI &&
112 c->delivery_system == SYS_DVBT2) {
114 for (i = 0; i < 3; i++) {
115 ret = regmap_bulk_read(dev->regmap[2], 0xbc + i,
121 utmp = buf[1] << 8 | buf[2] << 0;
122 utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
125 /* CNR[dB]: 10 * log10(16384 / value) - 6 */
126 /* log10(16384) = 70706234, 0.6 = 10066330 */
127 stmp = ((u64)70706234 - intlog10(utmp)
128 - 10066330) * 10000 >> 24;
129 dev_dbg(&client->dev, "cnr=%d value=%u MISO\n",
132 /* CNR[dB]: 10 * log10(65536 / value) + 2 */
133 /* log10(65536) = 80807124, 0.2 = 3355443 */
134 stmp = ((u64)80807124 - intlog10(utmp)
135 + 3355443) * 10000 >> 24;
137 dev_dbg(&client->dev, "cnr=%d value=%u SISO\n",
144 c->cnr.stat[0].svalue = stmp;
145 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
146 } else if (*status & FE_HAS_VITERBI &&
147 c->delivery_system == SYS_DVBC_ANNEX_A) {
149 ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4);
153 utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */
154 utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */
155 if (utmp1 && utmp2) {
156 /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
157 /* log10(8) = 15151336 */
158 stmp = ((u64)15151336 + intlog10(utmp1)
159 - intlog10(utmp2)) * 10000 >> 24;
161 dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n",
167 c->cnr.stat[0].svalue = stmp;
168 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
170 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
174 if (*status & FE_HAS_SYNC) {
175 ret = regmap_bulk_read(dev->regmap[0], 0xe1, buf, 4);
179 utmp1 = buf[0] << 8 | buf[1] << 0;
180 utmp2 = buf[2] << 8 | buf[3] << 0;
181 dev_dbg(&client->dev, "block_error=%u block_count=%u\n",
184 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
185 c->block_error.stat[0].uvalue += utmp1;
186 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
187 c->block_count.stat[0].uvalue += utmp2;
189 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
190 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
195 dev_dbg(&client->dev, "failed=%d\n", ret);
199 static int mn88472_set_frontend(struct dvb_frontend *fe)
201 struct i2c_client *client = fe->demodulator_priv;
202 struct mn88472_dev *dev = i2c_get_clientdata(client);
203 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
207 u8 buf[3], delivery_system_val, bandwidth_val, *bandwidth_vals_ptr;
208 u8 reg_bank0_b4_val, reg_bank0_cd_val, reg_bank0_d4_val;
211 dev_dbg(&client->dev,
212 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
213 c->delivery_system, c->modulation, c->frequency,
214 c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
221 switch (c->delivery_system) {
223 delivery_system_val = 0x02;
224 reg_bank0_b4_val = 0x00;
225 reg_bank0_cd_val = 0x1f;
226 reg_bank0_d4_val = 0x0a;
227 reg_bank0_d6_val = 0x48;
230 delivery_system_val = 0x03;
231 reg_bank0_b4_val = 0xf6;
232 reg_bank0_cd_val = 0x01;
233 reg_bank0_d4_val = 0x09;
234 reg_bank0_d6_val = 0x46;
236 case SYS_DVBC_ANNEX_A:
237 delivery_system_val = 0x04;
238 reg_bank0_b4_val = 0x00;
239 reg_bank0_cd_val = 0x17;
240 reg_bank0_d4_val = 0x09;
241 reg_bank0_d6_val = 0x48;
248 switch (c->delivery_system) {
251 switch (c->bandwidth_hz) {
253 bandwidth_vals_ptr = "\xe5\x99\x9a\x1b\xa9\x1b\xa9";
254 bandwidth_val = 0x03;
257 bandwidth_vals_ptr = "\xbf\x55\x55\x15\x6b\x15\x6b";
258 bandwidth_val = 0x02;
261 bandwidth_vals_ptr = "\xa4\x00\x00\x0f\x2c\x0f\x2c";
262 bandwidth_val = 0x01;
265 bandwidth_vals_ptr = "\x8f\x80\x00\x08\xee\x08\xee";
266 bandwidth_val = 0x00;
273 case SYS_DVBC_ANNEX_A:
274 bandwidth_vals_ptr = NULL;
275 bandwidth_val = 0x00;
282 if (fe->ops.tuner_ops.set_params) {
283 ret = fe->ops.tuner_ops.set_params(fe);
288 if (fe->ops.tuner_ops.get_if_frequency) {
289 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
293 dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency);
299 ret = regmap_write(dev->regmap[2], 0x00, 0x66);
302 ret = regmap_write(dev->regmap[2], 0x01, 0x00);
305 ret = regmap_write(dev->regmap[2], 0x02, 0x01);
308 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
311 ret = regmap_write(dev->regmap[2], 0x04, bandwidth_val);
316 utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk);
317 buf[0] = (utmp >> 16) & 0xff;
318 buf[1] = (utmp >> 8) & 0xff;
319 buf[2] = (utmp >> 0) & 0xff;
320 for (i = 0; i < 3; i++) {
321 ret = regmap_write(dev->regmap[2], 0x10 + i, buf[i]);
327 if (bandwidth_vals_ptr) {
328 for (i = 0; i < 7; i++) {
329 ret = regmap_write(dev->regmap[2], 0x13 + i,
330 bandwidth_vals_ptr[i]);
336 ret = regmap_write(dev->regmap[0], 0xb4, reg_bank0_b4_val);
339 ret = regmap_write(dev->regmap[0], 0xcd, reg_bank0_cd_val);
342 ret = regmap_write(dev->regmap[0], 0xd4, reg_bank0_d4_val);
345 ret = regmap_write(dev->regmap[0], 0xd6, reg_bank0_d6_val);
349 switch (c->delivery_system) {
351 ret = regmap_write(dev->regmap[0], 0x07, 0x26);
354 ret = regmap_write(dev->regmap[0], 0x00, 0xba);
357 ret = regmap_write(dev->regmap[0], 0x01, 0x13);
362 ret = regmap_write(dev->regmap[2], 0x2b, 0x13);
365 ret = regmap_write(dev->regmap[2], 0x4f, 0x05);
368 ret = regmap_write(dev->regmap[1], 0xf6, 0x05);
371 ret = regmap_write(dev->regmap[2], 0x32,
372 (c->stream_id == NO_STREAM_ID_FILTER) ? 0 :
377 case SYS_DVBC_ANNEX_A:
384 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
390 dev_dbg(&client->dev, "failed=%d\n", ret);
394 static int mn88472_init(struct dvb_frontend *fe)
396 struct i2c_client *client = fe->demodulator_priv;
397 struct mn88472_dev *dev = i2c_get_clientdata(client);
400 const struct firmware *firmware;
401 const char *name = MN88472_FIRMWARE;
403 dev_dbg(&client->dev, "\n");
406 ret = regmap_write(dev->regmap[2], 0x05, 0x00);
409 ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
412 ret = regmap_write(dev->regmap[2], 0x0c, 0x00);
416 /* Check if firmware is already running */
417 ret = regmap_read(dev->regmap[0], 0xf5, &utmp);
423 ret = request_firmware(&firmware, name, &client->dev);
425 dev_err(&client->dev, "firmware file '%s' not found\n", name);
429 dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
431 ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
433 goto err_release_firmware;
435 for (rem = firmware->size; rem > 0; rem -= (dev->i2c_write_max - 1)) {
436 len = min(dev->i2c_write_max - 1, rem);
437 ret = regmap_bulk_write(dev->regmap[0], 0xf6,
438 &firmware->data[firmware->size - rem],
441 dev_err(&client->dev, "firmware download failed %d\n",
443 goto err_release_firmware;
447 /* Parity check of firmware */
448 ret = regmap_read(dev->regmap[0], 0xf8, &utmp);
450 goto err_release_firmware;
453 dev_err(&client->dev, "firmware did not run\n");
454 goto err_release_firmware;
457 ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
459 goto err_release_firmware;
461 release_firmware(firmware);
464 switch (dev->ts_mode) {
468 case PARALLEL_TS_MODE:
475 ret = regmap_write(dev->regmap[2], 0x08, utmp);
479 switch (dev->ts_clk) {
480 case VARIABLE_TS_CLOCK:
490 ret = regmap_write(dev->regmap[0], 0xd9, utmp);
497 err_release_firmware:
498 release_firmware(firmware);
500 dev_dbg(&client->dev, "failed=%d\n", ret);
504 static int mn88472_sleep(struct dvb_frontend *fe)
506 struct i2c_client *client = fe->demodulator_priv;
507 struct mn88472_dev *dev = i2c_get_clientdata(client);
510 dev_dbg(&client->dev, "\n");
513 ret = regmap_write(dev->regmap[2], 0x0c, 0x30);
516 ret = regmap_write(dev->regmap[2], 0x0b, 0x30);
519 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
525 dev_dbg(&client->dev, "failed=%d\n", ret);
529 static const struct dvb_frontend_ops mn88472_ops = {
530 .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
532 .name = "Panasonic MN88472",
533 .symbol_rate_min = 1000000,
534 .symbol_rate_max = 7200000,
535 .caps = FE_CAN_FEC_1_2 |
548 FE_CAN_TRANSMISSION_MODE_AUTO |
549 FE_CAN_GUARD_INTERVAL_AUTO |
550 FE_CAN_HIERARCHY_AUTO |
552 FE_CAN_2G_MODULATION |
556 .get_tune_settings = mn88472_get_tune_settings,
558 .init = mn88472_init,
559 .sleep = mn88472_sleep,
561 .set_frontend = mn88472_set_frontend,
563 .read_status = mn88472_read_status,
566 static struct dvb_frontend *mn88472_get_dvb_frontend(struct i2c_client *client)
568 struct mn88472_dev *dev = i2c_get_clientdata(client);
570 dev_dbg(&client->dev, "\n");
575 static int mn88472_probe(struct i2c_client *client,
576 const struct i2c_device_id *id)
578 struct mn88472_config *pdata = client->dev.platform_data;
579 struct mn88472_dev *dev;
580 struct dtv_frontend_properties *c;
583 static const struct regmap_config regmap_config = {
588 dev_dbg(&client->dev, "\n");
590 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
596 dev->i2c_write_max = pdata->i2c_wr_max ? pdata->i2c_wr_max : ~0;
597 dev->clk = pdata->xtal;
598 dev->ts_mode = pdata->ts_mode;
599 dev->ts_clk = pdata->ts_clock;
600 dev->client[0] = client;
601 dev->regmap[0] = regmap_init_i2c(dev->client[0], ®map_config);
602 if (IS_ERR(dev->regmap[0])) {
603 ret = PTR_ERR(dev->regmap[0]);
608 * Chip has three I2C addresses for different register banks. Used
609 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
610 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
612 * Also, register bank 2 do not support sequential I/O. Only single
613 * register write or read is allowed to that bank.
615 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
616 if (!dev->client[1]) {
618 dev_err(&client->dev, "I2C registration failed\n");
620 goto err_regmap_0_regmap_exit;
622 dev->regmap[1] = regmap_init_i2c(dev->client[1], ®map_config);
623 if (IS_ERR(dev->regmap[1])) {
624 ret = PTR_ERR(dev->regmap[1]);
625 goto err_client_1_i2c_unregister_device;
627 i2c_set_clientdata(dev->client[1], dev);
629 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c);
630 if (!dev->client[2]) {
632 dev_err(&client->dev, "2nd I2C registration failed\n");
634 goto err_regmap_1_regmap_exit;
636 dev->regmap[2] = regmap_init_i2c(dev->client[2], ®map_config);
637 if (IS_ERR(dev->regmap[2])) {
638 ret = PTR_ERR(dev->regmap[2]);
639 goto err_client_2_i2c_unregister_device;
641 i2c_set_clientdata(dev->client[2], dev);
643 /* Check demod answers with correct chip id */
644 ret = regmap_read(dev->regmap[2], 0xff, &utmp);
646 goto err_regmap_2_regmap_exit;
648 dev_dbg(&client->dev, "chip id=%02x\n", utmp);
652 goto err_regmap_2_regmap_exit;
655 /* Sleep because chip is active by default */
656 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
658 goto err_regmap_2_regmap_exit;
660 /* Create dvb frontend */
661 memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops));
662 dev->fe.demodulator_priv = client;
663 *pdata->fe = &dev->fe;
664 i2c_set_clientdata(client, dev);
666 /* Init stats to indicate which stats are supported */
667 c = &dev->fe.dtv_property_cache;
670 c->block_error.len = 1;
671 c->block_count.len = 1;
673 /* Setup callbacks */
674 pdata->get_dvb_frontend = mn88472_get_dvb_frontend;
676 dev_info(&client->dev, "Panasonic MN88472 successfully identified\n");
679 err_regmap_2_regmap_exit:
680 regmap_exit(dev->regmap[2]);
681 err_client_2_i2c_unregister_device:
682 i2c_unregister_device(dev->client[2]);
683 err_regmap_1_regmap_exit:
684 regmap_exit(dev->regmap[1]);
685 err_client_1_i2c_unregister_device:
686 i2c_unregister_device(dev->client[1]);
687 err_regmap_0_regmap_exit:
688 regmap_exit(dev->regmap[0]);
692 dev_dbg(&client->dev, "failed=%d\n", ret);
696 static int mn88472_remove(struct i2c_client *client)
698 struct mn88472_dev *dev = i2c_get_clientdata(client);
700 dev_dbg(&client->dev, "\n");
702 regmap_exit(dev->regmap[2]);
703 i2c_unregister_device(dev->client[2]);
705 regmap_exit(dev->regmap[1]);
706 i2c_unregister_device(dev->client[1]);
708 regmap_exit(dev->regmap[0]);
715 static const struct i2c_device_id mn88472_id_table[] = {
719 MODULE_DEVICE_TABLE(i2c, mn88472_id_table);
721 static struct i2c_driver mn88472_driver = {
724 .suppress_bind_attrs = true,
726 .probe = mn88472_probe,
727 .remove = mn88472_remove,
728 .id_table = mn88472_id_table,
731 module_i2c_driver(mn88472_driver);
733 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
734 MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
735 MODULE_LICENSE("GPL");
736 MODULE_FIRMWARE(MN88472_FIRMWARE);