drivers/media/cec/cec-pin.c

   1 /*
   2  * Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
   3  *
   4  * This program is free software; you may redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
   9  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  10  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  11  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  12  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  13  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  14  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  15  * SOFTWARE.
  16  */
  17
  18 #include <linux/delay.h>
  19 #include <linux/slab.h>
  20 #include <linux/sched/types.h>
  21
  22 #include <media/cec-pin.h>
  23 #include "cec-pin-priv.h"
  24
  25 /* All timings are in microseconds */
  26
  27 /* start bit timings */
  28 #define CEC_TIM_START_BIT_LOW           3700
  29 #define CEC_TIM_START_BIT_LOW_MIN       3500
  30 #define CEC_TIM_START_BIT_LOW_MAX       3900
  31 #define CEC_TIM_START_BIT_TOTAL         4500
  32 #define CEC_TIM_START_BIT_TOTAL_MIN     4300
  33 #define CEC_TIM_START_BIT_TOTAL_MAX     4700
  34
  35 /* data bit timings */
  36 #define CEC_TIM_DATA_BIT_0_LOW          1500
  37 #define CEC_TIM_DATA_BIT_0_LOW_MIN      1300
  38 #define CEC_TIM_DATA_BIT_0_LOW_MAX      1700
  39 #define CEC_TIM_DATA_BIT_1_LOW          600
  40 #define CEC_TIM_DATA_BIT_1_LOW_MIN      400
  41 #define CEC_TIM_DATA_BIT_1_LOW_MAX      800
  42 #define CEC_TIM_DATA_BIT_TOTAL          2400
  43 #define CEC_TIM_DATA_BIT_TOTAL_MIN      2050
  44 #define CEC_TIM_DATA_BIT_TOTAL_MAX      2750
  45 /* earliest safe time to sample the bit state */
  46 #define CEC_TIM_DATA_BIT_SAMPLE         850
  47 /* earliest time the bit is back to 1 (T7 + 50) */
  48 #define CEC_TIM_DATA_BIT_HIGH           1750
  49
  50 /* when idle, sample once per millisecond */
  51 #define CEC_TIM_IDLE_SAMPLE             1000
  52 /* when processing the start bit, sample twice per millisecond */
  53 #define CEC_TIM_START_BIT_SAMPLE        500
  54 /* when polling for a state change, sample once every 50 micoseconds */
  55 #define CEC_TIM_SAMPLE                  50
  56
  57 #define CEC_TIM_LOW_DRIVE_ERROR         (1.5 * CEC_TIM_DATA_BIT_TOTAL)
  58
  59 struct cec_state {
  60         const char * const name;
  61         unsigned int usecs;
  62 };
  63
  64 static const struct cec_state states[CEC_PIN_STATES] = {
  65         { "Off",                   0 },
  66         { "Idle",                  CEC_TIM_IDLE_SAMPLE },
  67         { "Tx Wait",               CEC_TIM_SAMPLE },
  68         { "Tx Wait for High",      CEC_TIM_IDLE_SAMPLE },
  69         { "Tx Start Bit Low",      CEC_TIM_START_BIT_LOW },
  70         { "Tx Start Bit High",     CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
  71         { "Tx Data 0 Low",         CEC_TIM_DATA_BIT_0_LOW },
  72         { "Tx Data 0 High",        CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
  73         { "Tx Data 1 Low",         CEC_TIM_DATA_BIT_1_LOW },
  74         { "Tx Data 1 High",        CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_1_LOW },
  75         { "Tx Data 1 Pre Sample",  CEC_TIM_DATA_BIT_SAMPLE - CEC_TIM_DATA_BIT_1_LOW },
  76         { "Tx Data 1 Post Sample", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_SAMPLE },
  77         { "Rx Start Bit Low",      CEC_TIM_SAMPLE },
  78         { "Rx Start Bit High",     CEC_TIM_SAMPLE },
  79         { "Rx Data Sample",        CEC_TIM_DATA_BIT_SAMPLE },
  80         { "Rx Data Post Sample",   CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_SAMPLE },
  81         { "Rx Data High",          CEC_TIM_SAMPLE },
  82         { "Rx Ack Low",            CEC_TIM_DATA_BIT_0_LOW },
  83         { "Rx Ack Low Post",       CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_0_LOW },
  84         { "Rx Ack High Post",      CEC_TIM_DATA_BIT_HIGH },
  85         { "Rx Ack Finish",         CEC_TIM_DATA_BIT_TOTAL_MIN - CEC_TIM_DATA_BIT_HIGH },
  86         { "Rx Low Drive",          CEC_TIM_LOW_DRIVE_ERROR },
  87         { "Rx Irq",                0 },
  88 };
  89
  90 static void cec_pin_update(struct cec_pin *pin, bool v, bool force)
  91 {
  92         if (!force && v == pin->adap->cec_pin_is_high)
  93                 return;
  94
  95         pin->adap->cec_pin_is_high = v;
  96         if (atomic_read(&pin->work_pin_events) < CEC_NUM_PIN_EVENTS) {
  97                 pin->work_pin_is_high[pin->work_pin_events_wr] = v;
  98                 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get();
  99                 pin->work_pin_events_wr =
 100                         (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS;
 101                 atomic_inc(&pin->work_pin_events);
 102         }
 103         wake_up_interruptible(&pin->kthread_waitq);
 104 }
 105
 106 static bool cec_pin_read(struct cec_pin *pin)
 107 {
 108         bool v = pin->ops->read(pin->adap);
 109
 110         cec_pin_update(pin, v, false);
 111         return v;
 112 }
 113
 114 static void cec_pin_low(struct cec_pin *pin)
 115 {
 116         pin->ops->low(pin->adap);
 117         cec_pin_update(pin, false, false);
 118 }
 119
 120 static bool cec_pin_high(struct cec_pin *pin)
 121 {
 122         pin->ops->high(pin->adap);
 123         return cec_pin_read(pin);
 124 }
 125
 126 static void cec_pin_to_idle(struct cec_pin *pin)
 127 {
 128         /*
 129          * Reset all status fields, release the bus and
 130          * go to idle state.
 131          */
 132         pin->rx_bit = pin->tx_bit = 0;
 133         pin->rx_msg.len = 0;
 134         memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
 135         pin->state = CEC_ST_IDLE;
 136         pin->ts = ns_to_ktime(0);
 137 }
 138
 139 /*
 140  * Handle Transmit-related states
 141  *
 142  * Basic state changes when transmitting:
 143  *
 144  * Idle -> Tx Wait (waiting for the end of signal free time) ->
 145  *      Tx Start Bit Low -> Tx Start Bit High ->
 146  *
 147  *   Regular data bits + EOM:
 148  *      Tx Data 0 Low -> Tx Data 0 High ->
 149  *   or:
 150  *      Tx Data 1 Low -> Tx Data 1 High ->
 151  *
 152  *   First 4 data bits or Ack bit:
 153  *      Tx Data 0 Low -> Tx Data 0 High ->
 154  *   or:
 155  *      Tx Data 1 Low -> Tx Data 1 High -> Tx Data 1 Pre Sample ->
 156  *              Tx Data 1 Post Sample ->
 157  *
 158  *   After the last Ack go to Idle.
 159  *
 160  * If it detects a Low Drive condition then:
 161  *      Tx Wait For High -> Idle
 162  *
 163  * If it loses arbitration, then it switches to state Rx Data Post Sample.
 164  */
 165 static void cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
 166 {
 167         bool v;
 168         bool is_ack_bit, ack;
 169
 170         switch (pin->state) {
 171         case CEC_ST_TX_WAIT_FOR_HIGH:
 172                 if (cec_pin_read(pin))
 173                         cec_pin_to_idle(pin);
 174                 break;
 175
 176         case CEC_ST_TX_START_BIT_LOW:
 177                 pin->state = CEC_ST_TX_START_BIT_HIGH;
 178                 /* Generate start bit */
 179                 cec_pin_high(pin);
 180                 break;
 181
 182         case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
 183                 /* If the read value is 1, then all is OK */
 184                 if (!cec_pin_read(pin)) {
 185                         /*
 186                          * It's 0, so someone detected an error and pulled the
 187                          * line low for 1.5 times the nominal bit period.
 188                          */
 189                         pin->tx_msg.len = 0;
 190                         pin->work_tx_ts = ts;
 191                         pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
 192                         pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
 193                         wake_up_interruptible(&pin->kthread_waitq);
 194                         break;
 195                 }
 196                 if (pin->tx_nacked) {
 197                         cec_pin_to_idle(pin);
 198                         pin->tx_msg.len = 0;
 199                         pin->work_tx_ts = ts;
 200                         pin->work_tx_status = CEC_TX_STATUS_NACK;
 201                         wake_up_interruptible(&pin->kthread_waitq);
 202                         break;
 203                 }
 204                 /* fall through */
 205         case CEC_ST_TX_DATA_BIT_0_HIGH:
 206         case CEC_ST_TX_DATA_BIT_1_HIGH:
 207                 pin->tx_bit++;
 208                 /* fall through */
 209         case CEC_ST_TX_START_BIT_HIGH:
 210                 if (pin->tx_bit / 10 >= pin->tx_msg.len) {
 211                         cec_pin_to_idle(pin);
 212                         pin->tx_msg.len = 0;
 213                         pin->work_tx_ts = ts;
 214                         pin->work_tx_status = CEC_TX_STATUS_OK;
 215                         wake_up_interruptible(&pin->kthread_waitq);
 216                         break;
 217                 }
 218
 219                 switch (pin->tx_bit % 10) {
 220                 default:
 221                         v = pin->tx_msg.msg[pin->tx_bit / 10] &
 222                                 (1 << (7 - (pin->tx_bit % 10)));
 223                         pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
 224                                 CEC_ST_TX_DATA_BIT_0_LOW;
 225                         break;
 226                 case 8:
 227                         v = pin->tx_bit / 10 == pin->tx_msg.len - 1;
 228                         pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
 229                                 CEC_ST_TX_DATA_BIT_0_LOW;
 230                         break;
 231                 case 9:
 232                         pin->state = CEC_ST_TX_DATA_BIT_1_LOW;
 233                         break;
 234                 }
 235                 cec_pin_low(pin);
 236                 break;
 237
 238         case CEC_ST_TX_DATA_BIT_0_LOW:
 239         case CEC_ST_TX_DATA_BIT_1_LOW:
 240                 v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
 241                 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
 242                         CEC_ST_TX_DATA_BIT_0_HIGH;
 243                 is_ack_bit = pin->tx_bit % 10 == 9;
 244                 if (v && (pin->tx_bit < 4 || is_ack_bit))
 245                         pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
 246                 cec_pin_high(pin);
 247                 break;
 248
 249         case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
 250                 /* Read the CEC value at the sample time */
 251                 v = cec_pin_read(pin);
 252                 is_ack_bit = pin->tx_bit % 10 == 9;
 253                 /*
 254                  * If v == 0 and we're within the first 4 bits
 255                  * of the initiator, then someone else started
 256                  * transmitting and we lost the arbitration
 257                  * (i.e. the logical address of the other
 258                  * transmitter has more leading 0 bits in the
 259                  * initiator).
 260                  */
 261                 if (!v && !is_ack_bit) {
 262                         pin->tx_msg.len = 0;
 263                         pin->work_tx_ts = ts;
 264                         pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
 265                         wake_up_interruptible(&pin->kthread_waitq);
 266                         pin->rx_bit = pin->tx_bit;
 267                         pin->tx_bit = 0;
 268                         memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
 269                         pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
 270                         pin->rx_msg.msg[0] &= ~(1 << (7 - pin->rx_bit));
 271                         pin->rx_msg.len = 0;
 272                         pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
 273                         pin->rx_bit++;
 274                         break;
 275                 }
 276                 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE;
 277                 if (!is_ack_bit)
 278                         break;
 279                 /* Was the message ACKed? */
 280                 ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v;
 281                 if (!ack) {
 282                         /*
 283                          * Note: the CEC spec is ambiguous regarding
 284                          * what action to take when a NACK appears
 285                          * before the last byte of the payload was
 286                          * transmitted: either stop transmitting
 287                          * immediately, or wait until the last byte
 288                          * was transmitted.
 289                          *
 290                          * Most CEC implementations appear to stop
 291                          * immediately, and that's what we do here
 292                          * as well.
 293                          */
 294                         pin->tx_nacked = true;
 295                 }
 296                 break;
 297
 298         default:
 299                 break;
 300         }
 301 }
 302
 303 /*
 304  * Handle Receive-related states
 305  *
 306  * Basic state changes when receiving:
 307  *
 308  *      Rx Start Bit Low -> Rx Start Bit High ->
 309  *   Regular data bits + EOM:
 310  *      Rx Data Sample -> Rx Data Post Sample -> Rx Data High ->
 311  *   Ack bit 0:
 312  *      Rx Ack Low -> Rx Ack Low Post -> Rx Data High ->
 313  *   Ack bit 1:
 314  *      Rx Ack High Post -> Rx Data High ->
 315  *   Ack bit 0 && EOM:
 316  *      Rx Ack Low -> Rx Ack Low Post -> Rx Ack Finish -> Idle
 317  */
 318 static void cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
 319 {
 320         s32 delta;
 321         bool v;
 322         bool ack;
 323         bool bcast, for_us;
 324         u8 dest;
 325
 326         switch (pin->state) {
 327         /* Receive states */
 328         case CEC_ST_RX_START_BIT_LOW:
 329                 v = cec_pin_read(pin);
 330                 if (!v)
 331                         break;
 332                 pin->state = CEC_ST_RX_START_BIT_HIGH;
 333                 delta = ktime_us_delta(ts, pin->ts);
 334                 pin->ts = ts;
 335                 /* Start bit low is too short, go back to idle */
 336                 if (delta < CEC_TIM_START_BIT_LOW_MIN -
 337                             CEC_TIM_IDLE_SAMPLE) {
 338                         cec_pin_to_idle(pin);
 339                 }
 340                 break;
 341
 342         case CEC_ST_RX_START_BIT_HIGH:
 343                 v = cec_pin_read(pin);
 344                 delta = ktime_us_delta(ts, pin->ts);
 345                 if (v && delta > CEC_TIM_START_BIT_TOTAL_MAX -
 346                                  CEC_TIM_START_BIT_LOW_MIN) {
 347                         cec_pin_to_idle(pin);
 348                         break;
 349                 }
 350                 if (v)
 351                         break;
 352                 pin->state = CEC_ST_RX_DATA_SAMPLE;
 353                 pin->ts = ts;
 354                 pin->rx_eom = false;
 355                 break;
 356
 357         case CEC_ST_RX_DATA_SAMPLE:
 358                 v = cec_pin_read(pin);
 359                 pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
 360                 switch (pin->rx_bit % 10) {
 361                 default:
 362                         if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
 363                                 pin->rx_msg.msg[pin->rx_bit / 10] |=
 364                                         v << (7 - (pin->rx_bit % 10));
 365                         break;
 366                 case 8:
 367                         pin->rx_eom = v;
 368                         pin->rx_msg.len = pin->rx_bit / 10 + 1;
 369                         break;
 370                 case 9:
 371                         break;
 372                 }
 373                 pin->rx_bit++;
 374                 break;
 375
 376         case CEC_ST_RX_DATA_POST_SAMPLE:
 377                 pin->state = CEC_ST_RX_DATA_HIGH;
 378                 break;
 379
 380         case CEC_ST_RX_DATA_HIGH:
 381                 v = cec_pin_read(pin);
 382                 delta = ktime_us_delta(ts, pin->ts);
 383                 if (v && delta > CEC_TIM_DATA_BIT_TOTAL_MAX) {
 384                         cec_pin_to_idle(pin);
 385                         break;
 386                 }
 387                 if (v)
 388                         break;
 389                 /*
 390                  * Go to low drive state when the total bit time is
 391                  * too short.
 392                  */
 393                 if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN) {
 394                         cec_pin_low(pin);
 395                         pin->state = CEC_ST_LOW_DRIVE;
 396                         break;
 397                 }
 398                 pin->ts = ts;
 399                 if (pin->rx_bit % 10 != 9) {
 400                         pin->state = CEC_ST_RX_DATA_SAMPLE;
 401                         break;
 402                 }
 403
 404                 dest = cec_msg_destination(&pin->rx_msg);
 405                 bcast = dest == CEC_LOG_ADDR_BROADCAST;
 406                 /* for_us == broadcast or directed to us */
 407                 for_us = bcast || (pin->la_mask & (1 << dest));
 408                 /* ACK bit value */
 409                 ack = bcast ? 1 : !for_us;
 410
 411                 if (ack) {
 412                         /* No need to write to the bus, just wait */
 413                         pin->state = CEC_ST_RX_ACK_HIGH_POST;
 414                         break;
 415                 }
 416                 cec_pin_low(pin);
 417                 pin->state = CEC_ST_RX_ACK_LOW;
 418                 break;
 419
 420         case CEC_ST_RX_ACK_LOW:
 421                 cec_pin_high(pin);
 422                 pin->state = CEC_ST_RX_ACK_LOW_POST;
 423                 break;
 424
 425         case CEC_ST_RX_ACK_LOW_POST:
 426         case CEC_ST_RX_ACK_HIGH_POST:
 427                 v = cec_pin_read(pin);
 428                 if (v && pin->rx_eom) {
 429                         pin->work_rx_msg = pin->rx_msg;
 430                         pin->work_rx_msg.rx_ts = ktime_to_ns(ts);
 431                         wake_up_interruptible(&pin->kthread_waitq);
 432                         pin->ts = ts;
 433                         pin->state = CEC_ST_RX_ACK_FINISH;
 434                         break;
 435                 }
 436                 pin->rx_bit++;
 437                 pin->state = CEC_ST_RX_DATA_HIGH;
 438                 break;
 439
 440         case CEC_ST_RX_ACK_FINISH:
 441                 cec_pin_to_idle(pin);
 442                 break;
 443
 444         default:
 445                 break;
 446         }
 447 }
 448
 449 /*
 450  * Main timer function
 451  *
 452  */
 453 static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
 454 {
 455         struct cec_pin *pin = container_of(timer, struct cec_pin, timer);
 456         struct cec_adapter *adap = pin->adap;
 457         ktime_t ts;
 458         s32 delta;
 459
 460         ts = ktime_get();
 461         if (ktime_to_ns(pin->timer_ts)) {
 462                 delta = ktime_us_delta(ts, pin->timer_ts);
 463                 pin->timer_cnt++;
 464                 if (delta > 100 && pin->state != CEC_ST_IDLE) {
 465                         /* Keep track of timer overruns */
 466                         pin->timer_sum_overrun += delta;
 467                         pin->timer_100ms_overruns++;
 468                         if (delta > 300)
 469                                 pin->timer_300ms_overruns++;
 470                         if (delta > pin->timer_max_overrun)
 471                                 pin->timer_max_overrun = delta;
 472                 }
 473         }
 474         if (adap->monitor_pin_cnt)
 475                 cec_pin_read(pin);
 476
 477         if (pin->wait_usecs) {
 478                 /*
 479                  * If we are monitoring the pin, then we have to
 480                  * sample at regular intervals.
 481                  */
 482                 if (pin->wait_usecs > 150) {
 483                         pin->wait_usecs -= 100;
 484                         pin->timer_ts = ktime_add_us(ts, 100);
 485                         hrtimer_forward_now(timer, ns_to_ktime(100000));
 486                         return HRTIMER_RESTART;
 487                 }
 488                 if (pin->wait_usecs > 100) {
 489                         pin->wait_usecs /= 2;
 490                         pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
 491                         hrtimer_forward_now(timer,
 492                                         ns_to_ktime(pin->wait_usecs * 1000));
 493                         return HRTIMER_RESTART;
 494                 }
 495                 pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
 496                 hrtimer_forward_now(timer,
 497                                     ns_to_ktime(pin->wait_usecs * 1000));
 498                 pin->wait_usecs = 0;
 499                 return HRTIMER_RESTART;
 500         }
 501
 502         switch (pin->state) {
 503         /* Transmit states */
 504         case CEC_ST_TX_WAIT_FOR_HIGH:
 505         case CEC_ST_TX_START_BIT_LOW:
 506         case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
 507         case CEC_ST_TX_DATA_BIT_0_HIGH:
 508         case CEC_ST_TX_DATA_BIT_1_HIGH:
 509         case CEC_ST_TX_START_BIT_HIGH:
 510         case CEC_ST_TX_DATA_BIT_0_LOW:
 511         case CEC_ST_TX_DATA_BIT_1_LOW:
 512         case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
 513                 cec_pin_tx_states(pin, ts);
 514                 break;
 515
 516         /* Receive states */
 517         case CEC_ST_RX_START_BIT_LOW:
 518         case CEC_ST_RX_START_BIT_HIGH:
 519         case CEC_ST_RX_DATA_SAMPLE:
 520         case CEC_ST_RX_DATA_POST_SAMPLE:
 521         case CEC_ST_RX_DATA_HIGH:
 522         case CEC_ST_RX_ACK_LOW:
 523         case CEC_ST_RX_ACK_LOW_POST:
 524         case CEC_ST_RX_ACK_HIGH_POST:
 525         case CEC_ST_RX_ACK_FINISH:
 526                 cec_pin_rx_states(pin, ts);
 527                 break;
 528
 529         case CEC_ST_IDLE:
 530         case CEC_ST_TX_WAIT:
 531                 if (!cec_pin_high(pin)) {
 532                         /* Start bit, switch to receive state */
 533                         pin->ts = ts;
 534                         pin->state = CEC_ST_RX_START_BIT_LOW;
 535                         break;
 536                 }
 537                 if (ktime_to_ns(pin->ts) == 0)
 538                         pin->ts = ts;
 539                 if (pin->tx_msg.len) {
 540                         /*
 541                          * Check if the bus has been free for long enough
 542                          * so we can kick off the pending transmit.
 543                          */
 544                         delta = ktime_us_delta(ts, pin->ts);
 545                         if (delta / CEC_TIM_DATA_BIT_TOTAL >
 546                             pin->tx_signal_free_time) {
 547                                 pin->tx_nacked = false;
 548                                 pin->state = CEC_ST_TX_START_BIT_LOW;
 549                                 /* Generate start bit */
 550                                 cec_pin_low(pin);
 551                                 break;
 552                         }
 553                         if (delta / CEC_TIM_DATA_BIT_TOTAL >
 554                             pin->tx_signal_free_time - 1)
 555                                 pin->state = CEC_ST_TX_WAIT;
 556                         break;
 557                 }
 558                 if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
 559                     pin->enable_irq_failed || adap->is_configuring ||
 560                     adap->is_configured || adap->monitor_all_cnt)
 561                         break;
 562                 /* Switch to interrupt mode */
 563                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
 564                 pin->state = CEC_ST_RX_IRQ;
 565                 wake_up_interruptible(&pin->kthread_waitq);
 566                 return HRTIMER_NORESTART;
 567
 568         case CEC_ST_LOW_DRIVE:
 569                 cec_pin_to_idle(pin);
 570                 break;
 571
 572         default:
 573                 break;
 574         }
 575         if (!adap->monitor_pin_cnt || states[pin->state].usecs <= 150) {
 576                 pin->wait_usecs = 0;
 577                 pin->timer_ts = ktime_add_us(ts, states[pin->state].usecs);
 578                 hrtimer_forward_now(timer,
 579                                 ns_to_ktime(states[pin->state].usecs * 1000));
 580                 return HRTIMER_RESTART;
 581         }
 582         pin->wait_usecs = states[pin->state].usecs - 100;
 583         pin->timer_ts = ktime_add_us(ts, 100);
 584         hrtimer_forward_now(timer, ns_to_ktime(100000));
 585         return HRTIMER_RESTART;
 586 }
 587
 588 static int cec_pin_thread_func(void *_adap)
 589 {
 590         struct cec_adapter *adap = _adap;
 591         struct cec_pin *pin = adap->pin;
 592
 593         for (;;) {
 594                 wait_event_interruptible(pin->kthread_waitq,
 595                         kthread_should_stop() ||
 596                         pin->work_rx_msg.len ||
 597                         pin->work_tx_status ||
 598                         atomic_read(&pin->work_irq_change) ||
 599                         atomic_read(&pin->work_pin_events));
 600
 601                 if (pin->work_rx_msg.len) {
 602                         cec_received_msg_ts(adap, &pin->work_rx_msg,
 603                                 ns_to_ktime(pin->work_rx_msg.rx_ts));
 604                         pin->work_rx_msg.len = 0;
 605                 }
 606                 if (pin->work_tx_status) {
 607                         unsigned int tx_status = pin->work_tx_status;
 608
 609                         pin->work_tx_status = 0;
 610                         cec_transmit_attempt_done_ts(adap, tx_status,
 611                                                      pin->work_tx_ts);
 612                 }
 613
 614                 while (atomic_read(&pin->work_pin_events)) {
 615                         unsigned int idx = pin->work_pin_events_rd;
 616
 617                         cec_queue_pin_cec_event(adap,
 618                                                 pin->work_pin_is_high[idx],
 619                                                 pin->work_pin_ts[idx]);
 620                         pin->work_pin_events_rd = (idx + 1) % CEC_NUM_PIN_EVENTS;
 621                         atomic_dec(&pin->work_pin_events);
 622                 }
 623
 624                 switch (atomic_xchg(&pin->work_irq_change,
 625                                     CEC_PIN_IRQ_UNCHANGED)) {
 626                 case CEC_PIN_IRQ_DISABLE:
 627                         pin->ops->disable_irq(adap);
 628                         cec_pin_high(pin);
 629                         cec_pin_to_idle(pin);
 630                         hrtimer_start(&pin->timer, ns_to_ktime(0),
 631                                       HRTIMER_MODE_REL);
 632                         break;
 633                 case CEC_PIN_IRQ_ENABLE:
 634                         pin->enable_irq_failed = !pin->ops->enable_irq(adap);
 635                         if (pin->enable_irq_failed) {
 636                                 cec_pin_to_idle(pin);
 637                                 hrtimer_start(&pin->timer, ns_to_ktime(0),
 638                                               HRTIMER_MODE_REL);
 639                         }
 640                         break;
 641                 default:
 642                         break;
 643                 }
 644
 645                 if (kthread_should_stop())
 646                         break;
 647         }
 648         return 0;
 649 }
 650
 651 static int cec_pin_adap_enable(struct cec_adapter *adap, bool enable)
 652 {
 653         struct cec_pin *pin = adap->pin;
 654
 655         pin->enabled = enable;
 656         if (enable) {
 657                 atomic_set(&pin->work_pin_events, 0);
 658                 pin->work_pin_events_rd = pin->work_pin_events_wr = 0;
 659                 cec_pin_read(pin);
 660                 cec_pin_to_idle(pin);
 661                 pin->tx_msg.len = 0;
 662                 pin->timer_ts = ns_to_ktime(0);
 663                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
 664                 pin->kthread = kthread_run(cec_pin_thread_func, adap,
 665                                            "cec-pin");
 666                 if (IS_ERR(pin->kthread)) {
 667                         pr_err("cec-pin: kernel_thread() failed\n");
 668                         return PTR_ERR(pin->kthread);
 669                 }
 670                 hrtimer_start(&pin->timer, ns_to_ktime(0),
 671                               HRTIMER_MODE_REL);
 672         } else {
 673                 if (pin->ops->disable_irq)
 674                         pin->ops->disable_irq(adap);
 675                 hrtimer_cancel(&pin->timer);
 676                 kthread_stop(pin->kthread);
 677                 cec_pin_read(pin);
 678                 cec_pin_to_idle(pin);
 679                 pin->state = CEC_ST_OFF;
 680         }
 681         return 0;
 682 }
 683
 684 static int cec_pin_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
 685 {
 686         struct cec_pin *pin = adap->pin;
 687
 688         if (log_addr == CEC_LOG_ADDR_INVALID)
 689                 pin->la_mask = 0;
 690         else
 691                 pin->la_mask |= (1 << log_addr);
 692         return 0;
 693 }
 694
 695 static int cec_pin_adap_transmit(struct cec_adapter *adap, u8 attempts,
 696                                       u32 signal_free_time, struct cec_msg *msg)
 697 {
 698         struct cec_pin *pin = adap->pin;
 699
 700         pin->tx_signal_free_time = signal_free_time;
 701         pin->tx_msg = *msg;
 702         pin->work_tx_status = 0;
 703         pin->tx_bit = 0;
 704         if (pin->state == CEC_ST_RX_IRQ) {
 705                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
 706                 pin->ops->disable_irq(adap);
 707                 cec_pin_high(pin);
 708                 cec_pin_to_idle(pin);
 709                 hrtimer_start(&pin->timer, ns_to_ktime(0),
 710                               HRTIMER_MODE_REL);
 711         }
 712         return 0;
 713 }
 714
 715 static void cec_pin_adap_status(struct cec_adapter *adap,
 716                                        struct seq_file *file)
 717 {
 718         struct cec_pin *pin = adap->pin;
 719
 720         seq_printf(file, "state:   %s\n", states[pin->state].name);
 721         seq_printf(file, "tx_bit:  %d\n", pin->tx_bit);
 722         seq_printf(file, "rx_bit:  %d\n", pin->rx_bit);
 723         seq_printf(file, "cec pin: %d\n", pin->ops->read(adap));
 724         seq_printf(file, "irq failed: %d\n", pin->enable_irq_failed);
 725         if (pin->timer_100ms_overruns) {
 726                 seq_printf(file, "timer overruns > 100ms: %u of %u\n",
 727                            pin->timer_100ms_overruns, pin->timer_cnt);
 728                 seq_printf(file, "timer overruns > 300ms: %u of %u\n",
 729                            pin->timer_300ms_overruns, pin->timer_cnt);
 730                 seq_printf(file, "max timer overrun: %u usecs\n",
 731                            pin->timer_max_overrun);
 732                 seq_printf(file, "avg timer overrun: %u usecs\n",
 733                            pin->timer_sum_overrun / pin->timer_100ms_overruns);
 734         }
 735         pin->timer_cnt = 0;
 736         pin->timer_100ms_overruns = 0;
 737         pin->timer_300ms_overruns = 0;
 738         pin->timer_max_overrun = 0;
 739         pin->timer_sum_overrun = 0;
 740         if (pin->ops->status)
 741                 pin->ops->status(adap, file);
 742 }
 743
 744 static int cec_pin_adap_monitor_all_enable(struct cec_adapter *adap,
 745                                                   bool enable)
 746 {
 747         struct cec_pin *pin = adap->pin;
 748
 749         pin->monitor_all = enable;
 750         return 0;
 751 }
 752
 753 static void cec_pin_adap_free(struct cec_adapter *adap)
 754 {
 755         struct cec_pin *pin = adap->pin;
 756
 757         if (pin->ops->free)
 758                 pin->ops->free(adap);
 759         adap->pin = NULL;
 760         kfree(pin);
 761 }
 762
 763 void cec_pin_changed(struct cec_adapter *adap, bool value)
 764 {
 765         struct cec_pin *pin = adap->pin;
 766
 767         cec_pin_update(pin, value, false);
 768         if (!value && (adap->is_configuring || adap->is_configured ||
 769                        adap->monitor_all_cnt))
 770                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
 771 }
 772 EXPORT_SYMBOL_GPL(cec_pin_changed);
 773
 774 static const struct cec_adap_ops cec_pin_adap_ops = {
 775         .adap_enable = cec_pin_adap_enable,
 776         .adap_monitor_all_enable = cec_pin_adap_monitor_all_enable,
 777         .adap_log_addr = cec_pin_adap_log_addr,
 778         .adap_transmit = cec_pin_adap_transmit,
 779         .adap_status = cec_pin_adap_status,
 780         .adap_free = cec_pin_adap_free,
 781 };
 782
 783 struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,
 784                                         void *priv, const char *name, u32 caps)
 785 {
 786         struct cec_adapter *adap;
 787         struct cec_pin *pin = kzalloc(sizeof(*pin), GFP_KERNEL);
 788
 789         if (pin == NULL)
 790                 return ERR_PTR(-ENOMEM);
 791         pin->ops = pin_ops;
 792         hrtimer_init(&pin->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
 793         pin->timer.function = cec_pin_timer;
 794         init_waitqueue_head(&pin->kthread_waitq);
 795
 796         adap = cec_allocate_adapter(&cec_pin_adap_ops, priv, name,
 797                             caps | CEC_CAP_MONITOR_ALL | CEC_CAP_MONITOR_PIN,
 798                             CEC_MAX_LOG_ADDRS);
 799
 800         if (IS_ERR(adap)) {
 801                 kfree(pin);
 802                 return adap;
 803         }
 804
 805         adap->pin = pin;
 806         pin->adap = adap;
 807         cec_pin_update(pin, cec_pin_high(pin), true);
 808         return adap;
 809 }
 810 EXPORT_SYMBOL_GPL(cec_pin_allocate_adapter);