drivers/media/cec/cec-pin.c

   1 /*
   2  * Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
   3  *
   4  * This program is free software; you may redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
   9  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  10  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  11  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  12  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  13  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  14  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  15  * SOFTWARE.
  16  */
  17
  18 #include <linux/delay.h>
  19 #include <linux/slab.h>
  20 #include <linux/sched/types.h>
  21
  22 #include <media/cec-pin.h>
  23
  24 /* All timings are in microseconds */
  25
  26 /* start bit timings */
  27 #define CEC_TIM_START_BIT_LOW           3700
  28 #define CEC_TIM_START_BIT_LOW_MIN       3500
  29 #define CEC_TIM_START_BIT_LOW_MAX       3900
  30 #define CEC_TIM_START_BIT_TOTAL         4500
  31 #define CEC_TIM_START_BIT_TOTAL_MIN     4300
  32 #define CEC_TIM_START_BIT_TOTAL_MAX     4700
  33
  34 /* data bit timings */
  35 #define CEC_TIM_DATA_BIT_0_LOW          1500
  36 #define CEC_TIM_DATA_BIT_0_LOW_MIN      1300
  37 #define CEC_TIM_DATA_BIT_0_LOW_MAX      1700
  38 #define CEC_TIM_DATA_BIT_1_LOW          600
  39 #define CEC_TIM_DATA_BIT_1_LOW_MIN      400
  40 #define CEC_TIM_DATA_BIT_1_LOW_MAX      800
  41 #define CEC_TIM_DATA_BIT_TOTAL          2400
  42 #define CEC_TIM_DATA_BIT_TOTAL_MIN      2050
  43 #define CEC_TIM_DATA_BIT_TOTAL_MAX      2750
  44 /* earliest safe time to sample the bit state */
  45 #define CEC_TIM_DATA_BIT_SAMPLE         850
  46 /* earliest time the bit is back to 1 (T7 + 50) */
  47 #define CEC_TIM_DATA_BIT_HIGH           1750
  48
  49 /* when idle, sample once per millisecond */
  50 #define CEC_TIM_IDLE_SAMPLE             1000
  51 /* when processing the start bit, sample twice per millisecond */
  52 #define CEC_TIM_START_BIT_SAMPLE        500
  53 /* when polling for a state change, sample once every 50 micoseconds */
  54 #define CEC_TIM_SAMPLE                  50
  55
  56 #define CEC_TIM_LOW_DRIVE_ERROR         (1.5 * CEC_TIM_DATA_BIT_TOTAL)
  57
  58 struct cec_state {
  59         const char * const name;
  60         unsigned int usecs;
  61 };
  62
  63 static const struct cec_state states[CEC_PIN_STATES] = {
  64         { "Off",                   0 },
  65         { "Idle",                  CEC_TIM_IDLE_SAMPLE },
  66         { "Tx Wait",               CEC_TIM_SAMPLE },
  67         { "Tx Wait for High",      CEC_TIM_IDLE_SAMPLE },
  68         { "Tx Start Bit Low",      CEC_TIM_START_BIT_LOW },
  69         { "Tx Start Bit High",     CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
  70         { "Tx Data 0 Low",         CEC_TIM_DATA_BIT_0_LOW },
  71         { "Tx Data 0 High",        CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
  72         { "Tx Data 1 Low",         CEC_TIM_DATA_BIT_1_LOW },
  73         { "Tx Data 1 High",        CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_1_LOW },
  74         { "Tx Data 1 Pre Sample",  CEC_TIM_DATA_BIT_SAMPLE - CEC_TIM_DATA_BIT_1_LOW },
  75         { "Tx Data 1 Post Sample", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_SAMPLE },
  76         { "Rx Start Bit Low",      CEC_TIM_SAMPLE },
  77         { "Rx Start Bit High",     CEC_TIM_SAMPLE },
  78         { "Rx Data Sample",        CEC_TIM_DATA_BIT_SAMPLE },
  79         { "Rx Data Post Sample",   CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_SAMPLE },
  80         { "Rx Data High",          CEC_TIM_SAMPLE },
  81         { "Rx Ack Low",            CEC_TIM_DATA_BIT_0_LOW },
  82         { "Rx Ack Low Post",       CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_0_LOW },
  83         { "Rx Ack High Post",      CEC_TIM_DATA_BIT_HIGH },
  84         { "Rx Ack Finish",         CEC_TIM_DATA_BIT_TOTAL_MIN - CEC_TIM_DATA_BIT_HIGH },
  85         { "Rx Low Drive",          CEC_TIM_LOW_DRIVE_ERROR },
  86         { "Rx Irq",                0 },
  87 };
  88
  89 static void cec_pin_update(struct cec_pin *pin, bool v, bool force)
  90 {
  91         if (!force && v == pin->adap->cec_pin_is_high)
  92                 return;
  93
  94         pin->adap->cec_pin_is_high = v;
  95         if (atomic_read(&pin->work_pin_events) < CEC_NUM_PIN_EVENTS) {
  96                 pin->work_pin_is_high[pin->work_pin_events_wr] = v;
  97                 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get();
  98                 pin->work_pin_events_wr =
  99                         (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS;
 100                 atomic_inc(&pin->work_pin_events);
 101         }
 102         wake_up_interruptible(&pin->kthread_waitq);
 103 }
 104
 105 static bool cec_pin_read(struct cec_pin *pin)
 106 {
 107         bool v = pin->ops->read(pin->adap);
 108
 109         cec_pin_update(pin, v, false);
 110         return v;
 111 }
 112
 113 static void cec_pin_low(struct cec_pin *pin)
 114 {
 115         pin->ops->low(pin->adap);
 116         cec_pin_update(pin, false, false);
 117 }
 118
 119 static bool cec_pin_high(struct cec_pin *pin)
 120 {
 121         pin->ops->high(pin->adap);
 122         return cec_pin_read(pin);
 123 }
 124
 125 static void cec_pin_to_idle(struct cec_pin *pin)
 126 {
 127         /*
 128          * Reset all status fields, release the bus and
 129          * go to idle state.
 130          */
 131         pin->rx_bit = pin->tx_bit = 0;
 132         pin->rx_msg.len = 0;
 133         memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
 134         pin->state = CEC_ST_IDLE;
 135         pin->ts = 0;
 136 }
 137
 138 /*
 139  * Handle Transmit-related states
 140  *
 141  * Basic state changes when transmitting:
 142  *
 143  * Idle -> Tx Wait (waiting for the end of signal free time) ->
 144  *      Tx Start Bit Low -> Tx Start Bit High ->
 145  *
 146  *   Regular data bits + EOM:
 147  *      Tx Data 0 Low -> Tx Data 0 High ->
 148  *   or:
 149  *      Tx Data 1 Low -> Tx Data 1 High ->
 150  *
 151  *   First 4 data bits or Ack bit:
 152  *      Tx Data 0 Low -> Tx Data 0 High ->
 153  *   or:
 154  *      Tx Data 1 Low -> Tx Data 1 High -> Tx Data 1 Pre Sample ->
 155  *              Tx Data 1 Post Sample ->
 156  *
 157  *   After the last Ack go to Idle.
 158  *
 159  * If it detects a Low Drive condition then:
 160  *      Tx Wait For High -> Idle
 161  *
 162  * If it loses arbitration, then it switches to state Rx Data Post Sample.
 163  */
 164 static void cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
 165 {
 166         bool v;
 167         bool is_ack_bit, ack;
 168
 169         switch (pin->state) {
 170         case CEC_ST_TX_WAIT_FOR_HIGH:
 171                 if (cec_pin_read(pin))
 172                         cec_pin_to_idle(pin);
 173                 break;
 174
 175         case CEC_ST_TX_START_BIT_LOW:
 176                 pin->state = CEC_ST_TX_START_BIT_HIGH;
 177                 /* Generate start bit */
 178                 cec_pin_high(pin);
 179                 break;
 180
 181         case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
 182                 /* If the read value is 1, then all is OK */
 183                 if (!cec_pin_read(pin)) {
 184                         /*
 185                          * It's 0, so someone detected an error and pulled the
 186                          * line low for 1.5 times the nominal bit period.
 187                          */
 188                         pin->tx_msg.len = 0;
 189                         pin->work_tx_ts = ts;
 190                         pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
 191                         pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
 192                         wake_up_interruptible(&pin->kthread_waitq);
 193                         break;
 194                 }
 195                 if (pin->tx_nacked) {
 196                         cec_pin_to_idle(pin);
 197                         pin->tx_msg.len = 0;
 198                         pin->work_tx_ts = ts;
 199                         pin->work_tx_status = CEC_TX_STATUS_NACK;
 200                         wake_up_interruptible(&pin->kthread_waitq);
 201                         break;
 202                 }
 203                 /* fall through */
 204         case CEC_ST_TX_DATA_BIT_0_HIGH:
 205         case CEC_ST_TX_DATA_BIT_1_HIGH:
 206                 pin->tx_bit++;
 207                 /* fall through */
 208         case CEC_ST_TX_START_BIT_HIGH:
 209                 if (pin->tx_bit / 10 >= pin->tx_msg.len) {
 210                         cec_pin_to_idle(pin);
 211                         pin->tx_msg.len = 0;
 212                         pin->work_tx_ts = ts;
 213                         pin->work_tx_status = CEC_TX_STATUS_OK;
 214                         wake_up_interruptible(&pin->kthread_waitq);
 215                         break;
 216                 }
 217
 218                 switch (pin->tx_bit % 10) {
 219                 default:
 220                         v = pin->tx_msg.msg[pin->tx_bit / 10] &
 221                                 (1 << (7 - (pin->tx_bit % 10)));
 222                         pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
 223                                 CEC_ST_TX_DATA_BIT_0_LOW;
 224                         break;
 225                 case 8:
 226                         v = pin->tx_bit / 10 == pin->tx_msg.len - 1;
 227                         pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
 228                                 CEC_ST_TX_DATA_BIT_0_LOW;
 229                         break;
 230                 case 9:
 231                         pin->state = CEC_ST_TX_DATA_BIT_1_LOW;
 232                         break;
 233                 }
 234                 cec_pin_low(pin);
 235                 break;
 236
 237         case CEC_ST_TX_DATA_BIT_0_LOW:
 238         case CEC_ST_TX_DATA_BIT_1_LOW:
 239                 v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
 240                 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
 241                         CEC_ST_TX_DATA_BIT_0_HIGH;
 242                 is_ack_bit = pin->tx_bit % 10 == 9;
 243                 if (v && (pin->tx_bit < 4 || is_ack_bit))
 244                         pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
 245                 cec_pin_high(pin);
 246                 break;
 247
 248         case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
 249                 /* Read the CEC value at the sample time */
 250                 v = cec_pin_read(pin);
 251                 is_ack_bit = pin->tx_bit % 10 == 9;
 252                 /*
 253                  * If v == 0 and we're within the first 4 bits
 254                  * of the initiator, then someone else started
 255                  * transmitting and we lost the arbitration
 256                  * (i.e. the logical address of the other
 257                  * transmitter has more leading 0 bits in the
 258                  * initiator).
 259                  */
 260                 if (!v && !is_ack_bit) {
 261                         pin->tx_msg.len = 0;
 262                         pin->work_tx_ts = ts;
 263                         pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
 264                         wake_up_interruptible(&pin->kthread_waitq);
 265                         pin->rx_bit = pin->tx_bit;
 266                         pin->tx_bit = 0;
 267                         memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
 268                         pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
 269                         pin->rx_msg.msg[0] &= ~(1 << (7 - pin->rx_bit));
 270                         pin->rx_msg.len = 0;
 271                         pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
 272                         pin->rx_bit++;
 273                         break;
 274                 }
 275                 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE;
 276                 if (!is_ack_bit)
 277                         break;
 278                 /* Was the message ACKed? */
 279                 ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v;
 280                 if (!ack) {
 281                         /*
 282                          * Note: the CEC spec is ambiguous regarding
 283                          * what action to take when a NACK appears
 284                          * before the last byte of the payload was
 285                          * transmitted: either stop transmitting
 286                          * immediately, or wait until the last byte
 287                          * was transmitted.
 288                          *
 289                          * Most CEC implementations appear to stop
 290                          * immediately, and that's what we do here
 291                          * as well.
 292                          */
 293                         pin->tx_nacked = true;
 294                 }
 295                 break;
 296
 297         default:
 298                 break;
 299         }
 300 }
 301
 302 /*
 303  * Handle Receive-related states
 304  *
 305  * Basic state changes when receiving:
 306  *
 307  *      Rx Start Bit Low -> Rx Start Bit High ->
 308  *   Regular data bits + EOM:
 309  *      Rx Data Sample -> Rx Data Post Sample -> Rx Data High ->
 310  *   Ack bit 0:
 311  *      Rx Ack Low -> Rx Ack Low Post -> Rx Data High ->
 312  *   Ack bit 1:
 313  *      Rx Ack High Post -> Rx Data High ->
 314  *   Ack bit 0 && EOM:
 315  *      Rx Ack Low -> Rx Ack Low Post -> Rx Ack Finish -> Idle
 316  */
 317 static void cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
 318 {
 319         s32 delta;
 320         bool v;
 321         bool ack;
 322         bool bcast, for_us;
 323         u8 dest;
 324
 325         switch (pin->state) {
 326         /* Receive states */
 327         case CEC_ST_RX_START_BIT_LOW:
 328                 v = cec_pin_read(pin);
 329                 if (!v)
 330                         break;
 331                 pin->state = CEC_ST_RX_START_BIT_HIGH;
 332                 delta = ktime_us_delta(ts, pin->ts);
 333                 pin->ts = ts;
 334                 /* Start bit low is too short, go back to idle */
 335                 if (delta < CEC_TIM_START_BIT_LOW_MIN -
 336                             CEC_TIM_IDLE_SAMPLE) {
 337                         cec_pin_to_idle(pin);
 338                 }
 339                 break;
 340
 341         case CEC_ST_RX_START_BIT_HIGH:
 342                 v = cec_pin_read(pin);
 343                 delta = ktime_us_delta(ts, pin->ts);
 344                 if (v && delta > CEC_TIM_START_BIT_TOTAL_MAX -
 345                                  CEC_TIM_START_BIT_LOW_MIN) {
 346                         cec_pin_to_idle(pin);
 347                         break;
 348                 }
 349                 if (v)
 350                         break;
 351                 pin->state = CEC_ST_RX_DATA_SAMPLE;
 352                 pin->ts = ts;
 353                 pin->rx_eom = false;
 354                 break;
 355
 356         case CEC_ST_RX_DATA_SAMPLE:
 357                 v = cec_pin_read(pin);
 358                 pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
 359                 switch (pin->rx_bit % 10) {
 360                 default:
 361                         if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
 362                                 pin->rx_msg.msg[pin->rx_bit / 10] |=
 363                                         v << (7 - (pin->rx_bit % 10));
 364                         break;
 365                 case 8:
 366                         pin->rx_eom = v;
 367                         pin->rx_msg.len = pin->rx_bit / 10 + 1;
 368                         break;
 369                 case 9:
 370                         break;
 371                 }
 372                 pin->rx_bit++;
 373                 break;
 374
 375         case CEC_ST_RX_DATA_POST_SAMPLE:
 376                 pin->state = CEC_ST_RX_DATA_HIGH;
 377                 break;
 378
 379         case CEC_ST_RX_DATA_HIGH:
 380                 v = cec_pin_read(pin);
 381                 delta = ktime_us_delta(ts, pin->ts);
 382                 if (v && delta > CEC_TIM_DATA_BIT_TOTAL_MAX) {
 383                         cec_pin_to_idle(pin);
 384                         break;
 385                 }
 386                 if (v)
 387                         break;
 388                 /*
 389                  * Go to low drive state when the total bit time is
 390                  * too short.
 391                  */
 392                 if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN) {
 393                         cec_pin_low(pin);
 394                         pin->state = CEC_ST_LOW_DRIVE;
 395                         break;
 396                 }
 397                 pin->ts = ts;
 398                 if (pin->rx_bit % 10 != 9) {
 399                         pin->state = CEC_ST_RX_DATA_SAMPLE;
 400                         break;
 401                 }
 402
 403                 dest = cec_msg_destination(&pin->rx_msg);
 404                 bcast = dest == CEC_LOG_ADDR_BROADCAST;
 405                 /* for_us == broadcast or directed to us */
 406                 for_us = bcast || (pin->la_mask & (1 << dest));
 407                 /* ACK bit value */
 408                 ack = bcast ? 1 : !for_us;
 409
 410                 if (ack) {
 411                         /* No need to write to the bus, just wait */
 412                         pin->state = CEC_ST_RX_ACK_HIGH_POST;
 413                         break;
 414                 }
 415                 cec_pin_low(pin);
 416                 pin->state = CEC_ST_RX_ACK_LOW;
 417                 break;
 418
 419         case CEC_ST_RX_ACK_LOW:
 420                 cec_pin_high(pin);
 421                 pin->state = CEC_ST_RX_ACK_LOW_POST;
 422                 break;
 423
 424         case CEC_ST_RX_ACK_LOW_POST:
 425         case CEC_ST_RX_ACK_HIGH_POST:
 426                 v = cec_pin_read(pin);
 427                 if (v && pin->rx_eom) {
 428                         pin->work_rx_msg = pin->rx_msg;
 429                         pin->work_rx_msg.rx_ts = ts;
 430                         wake_up_interruptible(&pin->kthread_waitq);
 431                         pin->ts = ts;
 432                         pin->state = CEC_ST_RX_ACK_FINISH;
 433                         break;
 434                 }
 435                 pin->rx_bit++;
 436                 pin->state = CEC_ST_RX_DATA_HIGH;
 437                 break;
 438
 439         case CEC_ST_RX_ACK_FINISH:
 440                 cec_pin_to_idle(pin);
 441                 break;
 442
 443         default:
 444                 break;
 445         }
 446 }
 447
 448 /*
 449  * Main timer function
 450  *
 451  */
 452 static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
 453 {
 454         struct cec_pin *pin = container_of(timer, struct cec_pin, timer);
 455         struct cec_adapter *adap = pin->adap;
 456         ktime_t ts;
 457         s32 delta;
 458
 459         ts = ktime_get();
 460         if (pin->timer_ts) {
 461                 delta = ktime_us_delta(ts, pin->timer_ts);
 462                 pin->timer_cnt++;
 463                 if (delta > 100 && pin->state != CEC_ST_IDLE) {
 464                         /* Keep track of timer overruns */
 465                         pin->timer_sum_overrun += delta;
 466                         pin->timer_100ms_overruns++;
 467                         if (delta > 300)
 468                                 pin->timer_300ms_overruns++;
 469                         if (delta > pin->timer_max_overrun)
 470                                 pin->timer_max_overrun = delta;
 471                 }
 472         }
 473         if (adap->monitor_pin_cnt)
 474                 cec_pin_read(pin);
 475
 476         if (pin->wait_usecs) {
 477                 /*
 478                  * If we are monitoring the pin, then we have to
 479                  * sample at regular intervals.
 480                  */
 481                 if (pin->wait_usecs > 150) {
 482                         pin->wait_usecs -= 100;
 483                         pin->timer_ts = ktime_add_us(ts, 100);
 484                         hrtimer_forward_now(timer, 100000);
 485                         return HRTIMER_RESTART;
 486                 }
 487                 if (pin->wait_usecs > 100) {
 488                         pin->wait_usecs /= 2;
 489                         pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
 490                         hrtimer_forward_now(timer, pin->wait_usecs * 1000);
 491                         return HRTIMER_RESTART;
 492                 }
 493                 pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
 494                 hrtimer_forward_now(timer, pin->wait_usecs * 1000);
 495                 pin->wait_usecs = 0;
 496                 return HRTIMER_RESTART;
 497         }
 498
 499         switch (pin->state) {
 500         /* Transmit states */
 501         case CEC_ST_TX_WAIT_FOR_HIGH:
 502         case CEC_ST_TX_START_BIT_LOW:
 503         case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
 504         case CEC_ST_TX_DATA_BIT_0_HIGH:
 505         case CEC_ST_TX_DATA_BIT_1_HIGH:
 506         case CEC_ST_TX_START_BIT_HIGH:
 507         case CEC_ST_TX_DATA_BIT_0_LOW:
 508         case CEC_ST_TX_DATA_BIT_1_LOW:
 509         case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
 510                 cec_pin_tx_states(pin, ts);
 511                 break;
 512
 513         /* Receive states */
 514         case CEC_ST_RX_START_BIT_LOW:
 515         case CEC_ST_RX_START_BIT_HIGH:
 516         case CEC_ST_RX_DATA_SAMPLE:
 517         case CEC_ST_RX_DATA_POST_SAMPLE:
 518         case CEC_ST_RX_DATA_HIGH:
 519         case CEC_ST_RX_ACK_LOW:
 520         case CEC_ST_RX_ACK_LOW_POST:
 521         case CEC_ST_RX_ACK_HIGH_POST:
 522         case CEC_ST_RX_ACK_FINISH:
 523                 cec_pin_rx_states(pin, ts);
 524                 break;
 525
 526         case CEC_ST_IDLE:
 527         case CEC_ST_TX_WAIT:
 528                 if (!cec_pin_high(pin)) {
 529                         /* Start bit, switch to receive state */
 530                         pin->ts = ts;
 531                         pin->state = CEC_ST_RX_START_BIT_LOW;
 532                         break;
 533                 }
 534                 if (pin->ts == 0)
 535                         pin->ts = ts;
 536                 if (pin->tx_msg.len) {
 537                         /*
 538                          * Check if the bus has been free for long enough
 539                          * so we can kick off the pending transmit.
 540                          */
 541                         delta = ktime_us_delta(ts, pin->ts);
 542                         if (delta / CEC_TIM_DATA_BIT_TOTAL >
 543                             pin->tx_signal_free_time) {
 544                                 pin->tx_nacked = false;
 545                                 pin->state = CEC_ST_TX_START_BIT_LOW;
 546                                 /* Generate start bit */
 547                                 cec_pin_low(pin);
 548                                 break;
 549                         }
 550                         if (delta / CEC_TIM_DATA_BIT_TOTAL >
 551                             pin->tx_signal_free_time - 1)
 552                                 pin->state = CEC_ST_TX_WAIT;
 553                         break;
 554                 }
 555                 if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
 556                     pin->enable_irq_failed || adap->is_configuring ||
 557                     adap->is_configured || adap->monitor_all_cnt)
 558                         break;
 559                 /* Switch to interrupt mode */
 560                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
 561                 pin->state = CEC_ST_RX_IRQ;
 562                 wake_up_interruptible(&pin->kthread_waitq);
 563                 return HRTIMER_NORESTART;
 564
 565         case CEC_ST_LOW_DRIVE:
 566                 cec_pin_to_idle(pin);
 567                 break;
 568
 569         default:
 570                 break;
 571         }
 572         if (!adap->monitor_pin_cnt || states[pin->state].usecs <= 150) {
 573                 pin->wait_usecs = 0;
 574                 pin->timer_ts = ktime_add_us(ts, states[pin->state].usecs);
 575                 hrtimer_forward_now(timer, states[pin->state].usecs * 1000);
 576                 return HRTIMER_RESTART;
 577         }
 578         pin->wait_usecs = states[pin->state].usecs - 100;
 579         pin->timer_ts = ktime_add_us(ts, 100);
 580         hrtimer_forward_now(timer, 100000);
 581         return HRTIMER_RESTART;
 582 }
 583
 584 static int cec_pin_thread_func(void *_adap)
 585 {
 586         struct cec_adapter *adap = _adap;
 587         struct cec_pin *pin = adap->pin;
 588
 589         for (;;) {
 590                 wait_event_interruptible(pin->kthread_waitq,
 591                         kthread_should_stop() ||
 592                         pin->work_rx_msg.len ||
 593                         pin->work_tx_status ||
 594                         atomic_read(&pin->work_irq_change) ||
 595                         atomic_read(&pin->work_pin_events));
 596
 597                 if (pin->work_rx_msg.len) {
 598                         cec_received_msg_ts(adap, &pin->work_rx_msg,
 599                                             pin->work_rx_msg.rx_ts);
 600                         pin->work_rx_msg.len = 0;
 601                 }
 602                 if (pin->work_tx_status) {
 603                         unsigned int tx_status = pin->work_tx_status;
 604
 605                         pin->work_tx_status = 0;
 606                         cec_transmit_attempt_done_ts(adap, tx_status,
 607                                                      pin->work_tx_ts);
 608                 }
 609
 610                 while (atomic_read(&pin->work_pin_events)) {
 611                         unsigned int idx = pin->work_pin_events_rd;
 612
 613                         cec_queue_pin_cec_event(adap,
 614                                                 pin->work_pin_is_high[idx],
 615                                                 pin->work_pin_ts[idx]);
 616                         pin->work_pin_events_rd = (idx + 1) % CEC_NUM_PIN_EVENTS;
 617                         atomic_dec(&pin->work_pin_events);
 618                 }
 619
 620                 switch (atomic_xchg(&pin->work_irq_change,
 621                                     CEC_PIN_IRQ_UNCHANGED)) {
 622                 case CEC_PIN_IRQ_DISABLE:
 623                         pin->ops->disable_irq(adap);
 624                         cec_pin_high(pin);
 625                         cec_pin_to_idle(pin);
 626                         hrtimer_start(&pin->timer, 0, HRTIMER_MODE_REL);
 627                         break;
 628                 case CEC_PIN_IRQ_ENABLE:
 629                         pin->enable_irq_failed = !pin->ops->enable_irq(adap);
 630                         if (pin->enable_irq_failed) {
 631                                 cec_pin_to_idle(pin);
 632                                 hrtimer_start(&pin->timer, 0, HRTIMER_MODE_REL);
 633                         }
 634                         break;
 635                 default:
 636                         break;
 637                 }
 638
 639                 if (kthread_should_stop())
 640                         break;
 641         }
 642         return 0;
 643 }
 644
 645 static int cec_pin_adap_enable(struct cec_adapter *adap, bool enable)
 646 {
 647         struct cec_pin *pin = adap->pin;
 648
 649         pin->enabled = enable;
 650         if (enable) {
 651                 atomic_set(&pin->work_pin_events, 0);
 652                 pin->work_pin_events_rd = pin->work_pin_events_wr = 0;
 653                 cec_pin_read(pin);
 654                 cec_pin_to_idle(pin);
 655                 pin->tx_msg.len = 0;
 656                 pin->timer_ts = 0;
 657                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
 658                 pin->kthread = kthread_run(cec_pin_thread_func, adap,
 659                                            "cec-pin");
 660                 if (IS_ERR(pin->kthread)) {
 661                         pr_err("cec-pin: kernel_thread() failed\n");
 662                         return PTR_ERR(pin->kthread);
 663                 }
 664                 hrtimer_start(&pin->timer, 0, HRTIMER_MODE_REL);
 665         } else {
 666                 if (pin->ops->disable_irq)
 667                         pin->ops->disable_irq(adap);
 668                 hrtimer_cancel(&pin->timer);
 669                 kthread_stop(pin->kthread);
 670                 cec_pin_read(pin);
 671                 cec_pin_to_idle(pin);
 672                 pin->state = CEC_ST_OFF;
 673         }
 674         return 0;
 675 }
 676
 677 static int cec_pin_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
 678 {
 679         struct cec_pin *pin = adap->pin;
 680
 681         if (log_addr == CEC_LOG_ADDR_INVALID)
 682                 pin->la_mask = 0;
 683         else
 684                 pin->la_mask |= (1 << log_addr);
 685         return 0;
 686 }
 687
 688 static int cec_pin_adap_transmit(struct cec_adapter *adap, u8 attempts,
 689                                       u32 signal_free_time, struct cec_msg *msg)
 690 {
 691         struct cec_pin *pin = adap->pin;
 692
 693         pin->tx_signal_free_time = signal_free_time;
 694         pin->tx_msg = *msg;
 695         pin->work_tx_status = 0;
 696         pin->tx_bit = 0;
 697         if (pin->state == CEC_ST_RX_IRQ) {
 698                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
 699                 pin->ops->disable_irq(adap);
 700                 cec_pin_high(pin);
 701                 cec_pin_to_idle(pin);
 702                 hrtimer_start(&pin->timer, 0, HRTIMER_MODE_REL);
 703         }
 704         return 0;
 705 }
 706
 707 static void cec_pin_adap_status(struct cec_adapter *adap,
 708                                        struct seq_file *file)
 709 {
 710         struct cec_pin *pin = adap->pin;
 711
 712         seq_printf(file, "state:   %s\n", states[pin->state].name);
 713         seq_printf(file, "tx_bit:  %d\n", pin->tx_bit);
 714         seq_printf(file, "rx_bit:  %d\n", pin->rx_bit);
 715         seq_printf(file, "cec pin: %d\n", pin->ops->read(adap));
 716         seq_printf(file, "irq failed: %d\n", pin->enable_irq_failed);
 717         if (pin->timer_100ms_overruns) {
 718                 seq_printf(file, "timer overruns > 100ms: %u of %u\n",
 719                            pin->timer_100ms_overruns, pin->timer_cnt);
 720                 seq_printf(file, "timer overruns > 300ms: %u of %u\n",
 721                            pin->timer_300ms_overruns, pin->timer_cnt);
 722                 seq_printf(file, "max timer overrun: %u usecs\n",
 723                            pin->timer_max_overrun);
 724                 seq_printf(file, "avg timer overrun: %u usecs\n",
 725                            pin->timer_sum_overrun / pin->timer_100ms_overruns);
 726         }
 727         pin->timer_cnt = 0;
 728         pin->timer_100ms_overruns = 0;
 729         pin->timer_300ms_overruns = 0;
 730         pin->timer_max_overrun = 0;
 731         pin->timer_sum_overrun = 0;
 732         if (pin->ops->status)
 733                 pin->ops->status(adap, file);
 734 }
 735
 736 static int cec_pin_adap_monitor_all_enable(struct cec_adapter *adap,
 737                                                   bool enable)
 738 {
 739         struct cec_pin *pin = adap->pin;
 740
 741         pin->monitor_all = enable;
 742         return 0;
 743 }
 744
 745 static void cec_pin_adap_free(struct cec_adapter *adap)
 746 {
 747         struct cec_pin *pin = adap->pin;
 748
 749         if (pin->ops->free)
 750                 pin->ops->free(adap);
 751         adap->pin = NULL;
 752         kfree(pin);
 753 }
 754
 755 void cec_pin_changed(struct cec_adapter *adap, bool value)
 756 {
 757         struct cec_pin *pin = adap->pin;
 758
 759         cec_pin_update(pin, value, false);
 760         if (!value && (adap->is_configuring || adap->is_configured ||
 761                        adap->monitor_all_cnt))
 762                 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
 763 }
 764 EXPORT_SYMBOL_GPL(cec_pin_changed);
 765
 766 static const struct cec_adap_ops cec_pin_adap_ops = {
 767         .adap_enable = cec_pin_adap_enable,
 768         .adap_monitor_all_enable = cec_pin_adap_monitor_all_enable,
 769         .adap_log_addr = cec_pin_adap_log_addr,
 770         .adap_transmit = cec_pin_adap_transmit,
 771         .adap_status = cec_pin_adap_status,
 772         .adap_free = cec_pin_adap_free,
 773 };
 774
 775 struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,
 776                                         void *priv, const char *name, u32 caps)
 777 {
 778         struct cec_adapter *adap;
 779         struct cec_pin *pin = kzalloc(sizeof(*pin), GFP_KERNEL);
 780
 781         if (pin == NULL)
 782                 return ERR_PTR(-ENOMEM);
 783         pin->ops = pin_ops;
 784         hrtimer_init(&pin->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
 785         pin->timer.function = cec_pin_timer;
 786         init_waitqueue_head(&pin->kthread_waitq);
 787
 788         adap = cec_allocate_adapter(&cec_pin_adap_ops, priv, name,
 789                             caps | CEC_CAP_MONITOR_ALL | CEC_CAP_MONITOR_PIN,
 790                             CEC_MAX_LOG_ADDRS);
 791
 792         if (PTR_ERR_OR_ZERO(adap)) {
 793                 kfree(pin);
 794                 return adap;
 795         }
 796
 797         adap->pin = pin;
 798         pin->adap = adap;
 799         cec_pin_update(pin, cec_pin_high(pin), true);
 800         return adap;
 801 }
 802 EXPORT_SYMBOL_GPL(cec_pin_allocate_adapter);