1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020, Jiaxun Yang <jiaxun.yang@flygoat.com>
4 * Loongson HyperTransport Interrupt Vector support
7 #define pr_fmt(fmt) "htvec: " fmt
9 #include <linux/interrupt.h>
10 #include <linux/irq.h>
11 #include <linux/irqchip.h>
12 #include <linux/irqdomain.h>
13 #include <linux/irqchip/chained_irq.h>
14 #include <linux/kernel.h>
15 #include <linux/platform_device.h>
16 #include <linux/of_address.h>
17 #include <linux/of_irq.h>
18 #include <linux/of_platform.h>
21 #define HTVEC_EN_OFF 0x20
22 #define HTVEC_MAX_PARENT_IRQ 4
24 #define VEC_COUNT_PER_REG 32
25 #define VEC_REG_COUNT 4
26 #define VEC_COUNT (VEC_COUNT_PER_REG * VEC_REG_COUNT)
27 #define VEC_REG_IDX(irq_id) ((irq_id) / VEC_COUNT_PER_REG)
28 #define VEC_REG_BIT(irq_id) ((irq_id) % VEC_COUNT_PER_REG)
32 struct irq_domain *htvec_domain;
33 raw_spinlock_t htvec_lock;
36 static void htvec_irq_dispatch(struct irq_desc *desc)
41 struct irq_chip *chip = irq_desc_get_chip(desc);
42 struct htvec *priv = irq_desc_get_handler_data(desc);
44 chained_irq_enter(chip, desc);
46 for (i = 0; i < VEC_REG_COUNT; i++) {
47 pending = readl(priv->base + 4 * i);
49 int bit = __ffs(pending);
51 generic_handle_irq(irq_linear_revmap(priv->htvec_domain, bit +
52 VEC_COUNT_PER_REG * i));
61 chained_irq_exit(chip, desc);
64 static void htvec_ack_irq(struct irq_data *d)
66 struct htvec *priv = irq_data_get_irq_chip_data(d);
68 writel(BIT(VEC_REG_BIT(d->hwirq)),
69 priv->base + VEC_REG_IDX(d->hwirq) * 4);
72 static void htvec_mask_irq(struct irq_data *d)
76 struct htvec *priv = irq_data_get_irq_chip_data(d);
78 raw_spin_lock(&priv->htvec_lock);
79 addr = priv->base + HTVEC_EN_OFF;
80 addr += VEC_REG_IDX(d->hwirq) * 4;
82 reg &= ~BIT(VEC_REG_BIT(d->hwirq));
84 raw_spin_unlock(&priv->htvec_lock);
87 static void htvec_unmask_irq(struct irq_data *d)
91 struct htvec *priv = irq_data_get_irq_chip_data(d);
93 raw_spin_lock(&priv->htvec_lock);
94 addr = priv->base + HTVEC_EN_OFF;
95 addr += VEC_REG_IDX(d->hwirq) * 4;
97 reg |= BIT(VEC_REG_BIT(d->hwirq));
99 raw_spin_unlock(&priv->htvec_lock);
102 static struct irq_chip htvec_irq_chip = {
103 .name = "LOONGSON_HTVEC",
104 .irq_mask = htvec_mask_irq,
105 .irq_unmask = htvec_unmask_irq,
106 .irq_ack = htvec_ack_irq,
109 static int htvec_domain_alloc(struct irq_domain *domain, unsigned int virq,
110 unsigned int nr_irqs, void *arg)
113 unsigned int type, i;
114 struct htvec *priv = domain->host_data;
116 irq_domain_translate_onecell(domain, arg, &hwirq, &type);
118 for (i = 0; i < nr_irqs; i++) {
119 irq_domain_set_info(domain, virq + i, hwirq + i, &htvec_irq_chip,
120 priv, handle_edge_irq, NULL, NULL);
126 static void htvec_domain_free(struct irq_domain *domain, unsigned int virq,
127 unsigned int nr_irqs)
131 for (i = 0; i < nr_irqs; i++) {
132 struct irq_data *d = irq_domain_get_irq_data(domain, virq + i);
134 irq_set_handler(virq + i, NULL);
135 irq_domain_reset_irq_data(d);
139 static const struct irq_domain_ops htvec_domain_ops = {
140 .translate = irq_domain_translate_onecell,
141 .alloc = htvec_domain_alloc,
142 .free = htvec_domain_free,
145 static void htvec_reset(struct htvec *priv)
149 /* Clear IRQ cause registers, mask all interrupts */
150 for (idx = 0; idx < VEC_REG_COUNT; idx++) {
151 writel_relaxed(0x0, priv->base + HTVEC_EN_OFF + 4 * idx);
152 writel_relaxed(0xFFFFFFFF, priv->base);
156 static int htvec_of_init(struct device_node *node,
157 struct device_node *parent)
160 int err, parent_irq[4], num_parents = 0, i;
162 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
166 raw_spin_lock_init(&priv->htvec_lock);
167 priv->base = of_iomap(node, 0);
173 /* Interrupt may come from any of the 4 interrupt line */
174 for (i = 0; i < HTVEC_MAX_PARENT_IRQ; i++) {
175 parent_irq[i] = irq_of_parse_and_map(node, i);
176 if (parent_irq[i] <= 0)
183 pr_err("Failed to get parent irqs\n");
188 priv->htvec_domain = irq_domain_create_linear(of_node_to_fwnode(node),
192 if (!priv->htvec_domain) {
193 pr_err("Failed to create IRQ domain\n");
200 for (i = 0; i < num_parents; i++)
201 irq_set_chained_handler_and_data(parent_irq[i],
202 htvec_irq_dispatch, priv);
214 IRQCHIP_DECLARE(htvec, "loongson,htvec-1.0", htvec_of_init);