1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ chip support"
10 select IRQ_DOMAIN_HIERARCHY
11 select GENERIC_IRQ_MULTI_HANDLER
12 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
22 default 2 if ARCH_REALVIEW
36 select GENERIC_IRQ_MULTI_HANDLER
37 select IRQ_DOMAIN_HIERARCHY
38 select PARTITION_PERCPU
39 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
43 select GENERIC_MSI_IRQ_DOMAIN
46 config ARM_GIC_V3_ITS_PCI
48 depends on ARM_GIC_V3_ITS
51 default ARM_GIC_V3_ITS
53 config ARM_GIC_V3_ITS_FSL_MC
55 depends on ARM_GIC_V3_ITS
57 default ARM_GIC_V3_ITS
61 select IRQ_DOMAIN_HIERARCHY
62 select GENERIC_IRQ_CHIP
67 select GENERIC_IRQ_MULTI_HANDLER
71 default 4 if ARCH_S5PV210
75 The maximum number of VICs available in the system, for
78 config ARMADA_370_XP_IRQ
80 select GENERIC_IRQ_CHIP
82 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
88 select GENERIC_IRQ_CHIP
91 bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
92 depends on OF || COMPILE_TEST
93 select GENERIC_IRQ_CHIP
96 Support Amazon's Annapurna Labs Fabric Interrupt Controller.
100 select GENERIC_IRQ_CHIP
102 select GENERIC_IRQ_MULTI_HANDLER
105 config ATMEL_AIC5_IRQ
107 select GENERIC_IRQ_CHIP
109 select GENERIC_IRQ_MULTI_HANDLER
116 config BCM6345_L1_IRQ
118 select GENERIC_IRQ_CHIP
120 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
122 config BCM7038_L1_IRQ
124 select GENERIC_IRQ_CHIP
126 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
128 config BCM7120_L2_IRQ
130 select GENERIC_IRQ_CHIP
133 config BRCMSTB_L2_IRQ
135 select GENERIC_IRQ_CHIP
140 select GENERIC_IRQ_CHIP
143 config DAVINCI_CP_INTC
145 select GENERIC_IRQ_CHIP
150 select GENERIC_IRQ_CHIP
151 select IRQ_DOMAIN_HIERARCHY
153 config FARADAY_FTINTC010
156 select GENERIC_IRQ_MULTI_HANDLER
159 config HISILICON_IRQ_MBIGEN
162 select ARM_GIC_V3_ITS
166 select GENERIC_IRQ_CHIP
172 select GENERIC_IRQ_MULTI_HANDLER
180 select GENERIC_IRQ_CHIP
181 select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
183 select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
184 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
186 config CLPS711X_IRQCHIP
188 depends on ARCH_CLPS711X
190 select GENERIC_IRQ_MULTI_HANDLER
203 select GENERIC_IRQ_CHIP
209 select GENERIC_IRQ_MULTI_HANDLER
213 select GENERIC_IRQ_CHIP
217 bool "J-Core integrated AIC" if COMPILE_TEST
221 Support for the J-Core integrated AIC.
227 config RENESAS_INTC_IRQPIN
228 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
231 Enable support for the Renesas Interrupt Controller for external
232 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
235 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
236 select GENERIC_IRQ_CHIP
239 Enable support for the Renesas Interrupt Controller for external
240 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
242 config RENESAS_RZA1_IRQC
243 bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
244 select IRQ_DOMAIN_HIERARCHY
246 Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
247 to 8 external interrupts with configurable sense select.
250 bool "Kontron sl28cpld IRQ controller"
251 depends on MFD_SL28CPLD=y || COMPILE_TEST
254 Interrupt controller driver for the board management controller
255 found on the Kontron sl28 CPLD.
262 Enables SysCfg Controlled IRQs on STi based platforms.
267 select GENERIC_IRQ_CHIP
272 select GENERIC_IRQ_CHIP
275 tristate "TS-4800 IRQ controller"
278 depends on SOC_IMX51 || COMPILE_TEST
280 Support for the TS-4800 FPGA IRQ controller
282 config VERSATILE_FPGA_IRQ
286 config VERSATILE_FPGA_IRQ_NR
289 depends on VERSATILE_FPGA_IRQ
294 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
303 Support for a CROSSBAR ip that precedes the main interrupt controller.
304 The primary irqchip invokes the crossbar's callback which inturn allocates
305 a free irq and configures the IP. Thus the peripheral interrupts are
306 routed to one of the free irqchip interrupt lines.
309 tristate "Keystone 2 IRQ controller IP"
310 depends on ARCH_KEYSTONE
312 Support for Texas Instruments Keystone 2 IRQ controller IP which
313 is part of the Keystone 2 IPC mechanism
317 select GENERIC_IRQ_IPI
318 select IRQ_DOMAIN_HIERARCHY
323 depends on MACH_INGENIC
326 config INGENIC_TCU_IRQ
327 bool "Ingenic JZ47xx TCU interrupt controller"
329 depends on MIPS || COMPILE_TEST
331 select GENERIC_IRQ_CHIP
333 Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
338 config RENESAS_H8300H_INTC
342 config RENESAS_H8S_INTC
343 bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST
346 Enable support for the Renesas H8/300 Interrupt Controller, as found
353 Enables the wakeup IRQs for IMX platforms with GPCv2 block
356 def_bool y if MACH_ASM9260 || ARCH_MXS
360 config MSCC_OCELOT_IRQ
363 select GENERIC_IRQ_CHIP
373 select GENERIC_MSI_IRQ_DOMAIN
382 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
386 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
387 depends on PCI && PCI_MSI
389 config PARTITION_PERCPU
393 bool "NPS400 Global Interrupt Manager (GIM)"
394 depends on ARC || (COMPILE_TEST && !64BIT)
397 Support the EZchip NPS400 global interrupt controller
402 select GENERIC_IRQ_CHIP
404 config QCOM_IRQ_COMBINER
405 bool "QCOM IRQ combiner support"
406 depends on ARCH_QCOM && ACPI
407 select IRQ_DOMAIN_HIERARCHY
409 Say yes here to add support for the IRQ combiner devices embedded
410 in Qualcomm Technologies chips.
412 config IRQ_UNIPHIER_AIDET
413 bool "UniPhier AIDET support" if COMPILE_TEST
414 depends on ARCH_UNIPHIER || COMPILE_TEST
415 default ARCH_UNIPHIER
416 select IRQ_DOMAIN_HIERARCHY
418 Support for the UniPhier AIDET (ARM Interrupt Detector).
420 config MESON_IRQ_GPIO
421 bool "Meson GPIO Interrupt Multiplexer"
422 depends on ARCH_MESON
423 select IRQ_DOMAIN_HIERARCHY
425 Support Meson SoC Family GPIO Interrupt Multiplexer
428 bool "Goldfish programmable interrupt controller"
429 depends on MIPS && (GOLDFISH || COMPILE_TEST)
432 Say yes here to enable Goldfish interrupt controller driver used
433 for Goldfish based virtual platforms.
438 select IRQ_DOMAIN_HIERARCHY
440 Power Domain Controller driver to manage and configure wakeup
441 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
444 bool "C-SKY Multi Processor Interrupt Controller"
447 Say yes here to enable C-SKY SMP interrupt controller driver used
448 for C-SKY SMP system.
449 In fact it's not mmio map in hardware and it uses ld/st to visit the
450 controller's register inside CPU.
453 bool "C-SKY APB Interrupt Controller"
456 Say yes here to enable C-SKY APB interrupt controller driver used
457 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
458 the controller's register.
461 bool "i.MX IRQSTEER support"
462 depends on ARCH_MXC || COMPILE_TEST
466 Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
469 def_bool y if ARCH_MXC || COMPILE_TEST
472 Support for the i.MX INTMUX interrupt multiplexer.
475 bool "Loongson-1 Interrupt Controller"
476 depends on MACH_LOONGSON32
479 select GENERIC_IRQ_CHIP
481 Support for the Loongson-1 platform Interrupt Controller.
483 config TI_SCI_INTR_IRQCHIP
485 depends on TI_SCI_PROTOCOL
486 select IRQ_DOMAIN_HIERARCHY
488 This enables the irqchip driver support for K3 Interrupt router
489 over TI System Control Interface available on some new TI's SoCs.
490 If you wish to use interrupt router irq resources managed by the
491 TI System Controller, say Y here. Otherwise, say N.
493 config TI_SCI_INTA_IRQCHIP
495 depends on TI_SCI_PROTOCOL
496 select IRQ_DOMAIN_HIERARCHY
497 select TI_SCI_INTA_MSI_DOMAIN
499 This enables the irqchip driver support for K3 Interrupt aggregator
500 over TI System Control Interface available on some new TI's SoCs.
501 If you wish to use interrupt aggregator irq resources managed by the
502 TI System Controller, say Y here. Otherwise, say N.
505 tristate "TI PRU-ICSS Interrupt Controller"
506 depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3
509 This enables support for the PRU-ICSS Local Interrupt Controller
510 present within a PRU-ICSS subsystem present on various TI SoCs.
511 The PRUSS INTC enables various interrupts to be routed to multiple
512 different processors within the SoC.
515 bool "RISC-V Local Interrupt Controller"
519 This enables support for the per-HART local interrupt controller
520 found in standard RISC-V systems. The per-HART local interrupt
521 controller handles timer interrupts, software interrupts, and
522 hardware interrupts. Without a per-HART local interrupt controller,
523 a RISC-V system will be unable to handle any interrupts.
525 If you don't know what to do here, say Y.
528 bool "SiFive Platform-Level Interrupt Controller"
530 select IRQ_DOMAIN_HIERARCHY
532 This enables support for the PLIC chip found in SiFive (and
533 potentially other) RISC-V systems. The PLIC controls devices
534 interrupts and connects them to each core's local interrupt
535 controller. Aside from timer and software interrupts, all other
536 interrupt sources are subordinate to the PLIC.
538 If you don't know what to do here, say Y.
540 config EXYNOS_IRQ_COMBINER
541 bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
542 depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
544 Say yes here to add support for the IRQ combiner devices embedded
545 in Samsung Exynos chips.
547 config LOONGSON_LIOINTC
548 bool "Loongson Local I/O Interrupt Controller"
549 depends on MACH_LOONGSON64
552 select GENERIC_IRQ_CHIP
554 Support for the Loongson Local I/O Interrupt Controller.
556 config LOONGSON_HTPIC
557 bool "Loongson3 HyperTransport PIC Controller"
558 depends on MACH_LOONGSON64
561 select GENERIC_IRQ_CHIP
563 Support for the Loongson-3 HyperTransport PIC Controller.
565 config LOONGSON_HTVEC
566 bool "Loongson3 HyperTransport Interrupt Vector Controller"
567 depends on MACH_LOONGSON64
568 default MACH_LOONGSON64
569 select IRQ_DOMAIN_HIERARCHY
571 Support for the Loongson3 HyperTransport Interrupt Vector Controller.
573 config LOONGSON_PCH_PIC
574 bool "Loongson PCH PIC Controller"
575 depends on MACH_LOONGSON64 || COMPILE_TEST
576 default MACH_LOONGSON64
577 select IRQ_DOMAIN_HIERARCHY
578 select IRQ_FASTEOI_HIERARCHY_HANDLERS
580 Support for the Loongson PCH PIC Controller.
582 config LOONGSON_PCH_MSI
583 bool "Loongson PCH MSI Controller"
584 depends on MACH_LOONGSON64 || COMPILE_TEST
586 default MACH_LOONGSON64
587 select IRQ_DOMAIN_HIERARCHY
590 Support for the Loongson PCH MSI Controller.
593 bool "MStar Interrupt Controller"
594 default ARCH_MEDIATEK
596 select IRQ_DOMAIN_HIERARCHY
598 Support MStar Interrupt Controller.