1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ chip support"
10 select IRQ_DOMAIN_HIERARCHY
11 select GENERIC_IRQ_MULTI_HANDLER
12 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
22 default 2 if ARCH_REALVIEW
36 select GENERIC_IRQ_MULTI_HANDLER
37 select IRQ_DOMAIN_HIERARCHY
38 select PARTITION_PERCPU
39 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
43 select GENERIC_MSI_IRQ_DOMAIN
46 config ARM_GIC_V3_ITS_PCI
48 depends on ARM_GIC_V3_ITS
51 default ARM_GIC_V3_ITS
53 config ARM_GIC_V3_ITS_FSL_MC
55 depends on ARM_GIC_V3_ITS
57 default ARM_GIC_V3_ITS
61 select IRQ_DOMAIN_HIERARCHY
62 select GENERIC_IRQ_CHIP
67 select GENERIC_IRQ_MULTI_HANDLER
71 default 4 if ARCH_S5PV210
75 The maximum number of VICs available in the system, for
78 config ARMADA_370_XP_IRQ
80 select GENERIC_IRQ_CHIP
82 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
88 select GENERIC_IRQ_CHIP
91 bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
92 depends on OF || COMPILE_TEST
93 select GENERIC_IRQ_CHIP
96 Support Amazon's Annapurna Labs Fabric Interrupt Controller.
100 select GENERIC_IRQ_CHIP
102 select GENERIC_IRQ_MULTI_HANDLER
105 config ATMEL_AIC5_IRQ
107 select GENERIC_IRQ_CHIP
109 select GENERIC_IRQ_MULTI_HANDLER
116 config BCM6345_L1_IRQ
118 select GENERIC_IRQ_CHIP
120 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
122 config BCM7038_L1_IRQ
124 select GENERIC_IRQ_CHIP
126 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
128 config BCM7120_L2_IRQ
130 select GENERIC_IRQ_CHIP
133 config BRCMSTB_L2_IRQ
135 select GENERIC_IRQ_CHIP
140 select GENERIC_IRQ_CHIP
143 config DAVINCI_CP_INTC
145 select GENERIC_IRQ_CHIP
150 select GENERIC_IRQ_CHIP
151 select IRQ_DOMAIN_HIERARCHY
153 config FARADAY_FTINTC010
156 select GENERIC_IRQ_MULTI_HANDLER
159 config HISILICON_IRQ_MBIGEN
162 select ARM_GIC_V3_ITS
166 select GENERIC_IRQ_CHIP
172 select GENERIC_IRQ_MULTI_HANDLER
180 select GENERIC_IRQ_CHIP
181 select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
183 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
185 config CLPS711X_IRQCHIP
187 depends on ARCH_CLPS711X
189 select GENERIC_IRQ_MULTI_HANDLER
202 select GENERIC_IRQ_CHIP
208 select GENERIC_IRQ_MULTI_HANDLER
212 select GENERIC_IRQ_CHIP
216 bool "J-Core integrated AIC" if COMPILE_TEST
220 Support for the J-Core integrated AIC.
226 config RENESAS_INTC_IRQPIN
227 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
230 Enable support for the Renesas Interrupt Controller for external
231 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
234 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
235 select GENERIC_IRQ_CHIP
238 Enable support for the Renesas Interrupt Controller for external
239 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
241 config RENESAS_RZA1_IRQC
242 bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
243 select IRQ_DOMAIN_HIERARCHY
245 Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
246 to 8 external interrupts with configurable sense select.
249 bool "Kontron sl28cpld IRQ controller"
250 depends on MFD_SL28CPLD=y || COMPILE_TEST
253 Interrupt controller driver for the board management controller
254 found on the Kontron sl28 CPLD.
261 Enables SysCfg Controlled IRQs on STi based platforms.
266 select GENERIC_IRQ_CHIP
271 select GENERIC_IRQ_CHIP
274 tristate "TS-4800 IRQ controller"
277 depends on SOC_IMX51 || COMPILE_TEST
279 Support for the TS-4800 FPGA IRQ controller
281 config VERSATILE_FPGA_IRQ
285 config VERSATILE_FPGA_IRQ_NR
288 depends on VERSATILE_FPGA_IRQ
293 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
302 Support for a CROSSBAR ip that precedes the main interrupt controller.
303 The primary irqchip invokes the crossbar's callback which inturn allocates
304 a free irq and configures the IP. Thus the peripheral interrupts are
305 routed to one of the free irqchip interrupt lines.
308 tristate "Keystone 2 IRQ controller IP"
309 depends on ARCH_KEYSTONE
311 Support for Texas Instruments Keystone 2 IRQ controller IP which
312 is part of the Keystone 2 IPC mechanism
316 select GENERIC_IRQ_IPI
321 depends on MACH_INGENIC
324 config INGENIC_TCU_IRQ
325 bool "Ingenic JZ47xx TCU interrupt controller"
327 depends on MIPS || COMPILE_TEST
329 select GENERIC_IRQ_CHIP
331 Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
336 config RENESAS_H8300H_INTC
340 config RENESAS_H8S_INTC
341 bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST
344 Enable support for the Renesas H8/300 Interrupt Controller, as found
351 Enables the wakeup IRQs for IMX platforms with GPCv2 block
354 def_bool y if MACH_ASM9260 || ARCH_MXS
358 config MSCC_OCELOT_IRQ
361 select GENERIC_IRQ_CHIP
371 select GENERIC_MSI_IRQ_DOMAIN
380 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
384 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
385 depends on PCI && PCI_MSI
387 config PARTITION_PERCPU
391 bool "NPS400 Global Interrupt Manager (GIM)"
392 depends on ARC || (COMPILE_TEST && !64BIT)
395 Support the EZchip NPS400 global interrupt controller
400 select GENERIC_IRQ_CHIP
402 config QCOM_IRQ_COMBINER
403 bool "QCOM IRQ combiner support"
404 depends on ARCH_QCOM && ACPI
405 select IRQ_DOMAIN_HIERARCHY
407 Say yes here to add support for the IRQ combiner devices embedded
408 in Qualcomm Technologies chips.
410 config IRQ_UNIPHIER_AIDET
411 bool "UniPhier AIDET support" if COMPILE_TEST
412 depends on ARCH_UNIPHIER || COMPILE_TEST
413 default ARCH_UNIPHIER
414 select IRQ_DOMAIN_HIERARCHY
416 Support for the UniPhier AIDET (ARM Interrupt Detector).
418 config MESON_IRQ_GPIO
419 bool "Meson GPIO Interrupt Multiplexer"
420 depends on ARCH_MESON
421 select IRQ_DOMAIN_HIERARCHY
423 Support Meson SoC Family GPIO Interrupt Multiplexer
426 bool "Goldfish programmable interrupt controller"
427 depends on MIPS && (GOLDFISH || COMPILE_TEST)
430 Say yes here to enable Goldfish interrupt controller driver used
431 for Goldfish based virtual platforms.
436 select IRQ_DOMAIN_HIERARCHY
438 Power Domain Controller driver to manage and configure wakeup
439 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
442 bool "C-SKY Multi Processor Interrupt Controller"
445 Say yes here to enable C-SKY SMP interrupt controller driver used
446 for C-SKY SMP system.
447 In fact it's not mmio map in hardware and it uses ld/st to visit the
448 controller's register inside CPU.
451 bool "C-SKY APB Interrupt Controller"
454 Say yes here to enable C-SKY APB interrupt controller driver used
455 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
456 the controller's register.
459 bool "i.MX IRQSTEER support"
460 depends on ARCH_MXC || COMPILE_TEST
464 Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
467 def_bool y if ARCH_MXC || COMPILE_TEST
470 Support for the i.MX INTMUX interrupt multiplexer.
473 bool "Loongson-1 Interrupt Controller"
474 depends on MACH_LOONGSON32
477 select GENERIC_IRQ_CHIP
479 Support for the Loongson-1 platform Interrupt Controller.
481 config TI_SCI_INTR_IRQCHIP
483 depends on TI_SCI_PROTOCOL
484 select IRQ_DOMAIN_HIERARCHY
486 This enables the irqchip driver support for K3 Interrupt router
487 over TI System Control Interface available on some new TI's SoCs.
488 If you wish to use interrupt router irq resources managed by the
489 TI System Controller, say Y here. Otherwise, say N.
491 config TI_SCI_INTA_IRQCHIP
493 depends on TI_SCI_PROTOCOL
494 select IRQ_DOMAIN_HIERARCHY
495 select TI_SCI_INTA_MSI_DOMAIN
497 This enables the irqchip driver support for K3 Interrupt aggregator
498 over TI System Control Interface available on some new TI's SoCs.
499 If you wish to use interrupt aggregator irq resources managed by the
500 TI System Controller, say Y here. Otherwise, say N.
503 tristate "TI PRU-ICSS Interrupt Controller"
504 depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3
507 This enables support for the PRU-ICSS Local Interrupt Controller
508 present within a PRU-ICSS subsystem present on various TI SoCs.
509 The PRUSS INTC enables various interrupts to be routed to multiple
510 different processors within the SoC.
513 bool "RISC-V Local Interrupt Controller"
517 This enables support for the per-HART local interrupt controller
518 found in standard RISC-V systems. The per-HART local interrupt
519 controller handles timer interrupts, software interrupts, and
520 hardware interrupts. Without a per-HART local interrupt controller,
521 a RISC-V system will be unable to handle any interrupts.
523 If you don't know what to do here, say Y.
526 bool "SiFive Platform-Level Interrupt Controller"
528 select IRQ_DOMAIN_HIERARCHY
530 This enables support for the PLIC chip found in SiFive (and
531 potentially other) RISC-V systems. The PLIC controls devices
532 interrupts and connects them to each core's local interrupt
533 controller. Aside from timer and software interrupts, all other
534 interrupt sources are subordinate to the PLIC.
536 If you don't know what to do here, say Y.
538 config EXYNOS_IRQ_COMBINER
539 bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
540 depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
542 Say yes here to add support for the IRQ combiner devices embedded
543 in Samsung Exynos chips.
545 config LOONGSON_LIOINTC
546 bool "Loongson Local I/O Interrupt Controller"
547 depends on MACH_LOONGSON64
550 select GENERIC_IRQ_CHIP
552 Support for the Loongson Local I/O Interrupt Controller.
554 config LOONGSON_HTPIC
555 bool "Loongson3 HyperTransport PIC Controller"
556 depends on MACH_LOONGSON64
559 select GENERIC_IRQ_CHIP
561 Support for the Loongson-3 HyperTransport PIC Controller.
563 config LOONGSON_HTVEC
564 bool "Loongson3 HyperTransport Interrupt Vector Controller"
565 depends on MACH_LOONGSON64
566 default MACH_LOONGSON64
567 select IRQ_DOMAIN_HIERARCHY
569 Support for the Loongson3 HyperTransport Interrupt Vector Controller.
571 config LOONGSON_PCH_PIC
572 bool "Loongson PCH PIC Controller"
573 depends on MACH_LOONGSON64 || COMPILE_TEST
574 default MACH_LOONGSON64
575 select IRQ_DOMAIN_HIERARCHY
576 select IRQ_FASTEOI_HIERARCHY_HANDLERS
578 Support for the Loongson PCH PIC Controller.
580 config LOONGSON_PCH_MSI
581 bool "Loongson PCH MSI Controller"
582 depends on MACH_LOONGSON64 || COMPILE_TEST
584 default MACH_LOONGSON64
585 select IRQ_DOMAIN_HIERARCHY
588 Support for the Loongson PCH MSI Controller.
591 bool "MStar Interrupt Controller"
592 depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST
593 default ARCH_MEDIATEK
595 select IRQ_DOMAIN_HIERARCHY
597 Support MStar Interrupt Controller.