drivers/iommu/mtk_iommu.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2015-2016 MediaTek Inc.
   4  * Author: Honghui Zhang <honghui.zhang@mediatek.com>
   5  */
   6
   7 #ifndef _MTK_IOMMU_H_
   8 #define _MTK_IOMMU_H_
   9
  10 #include <linux/clk.h>
  11 #include <linux/component.h>
  12 #include <linux/device.h>
  13 #include <linux/io.h>
  14 #include <linux/io-pgtable.h>
  15 #include <linux/iommu.h>
  16 #include <linux/list.h>
  17 #include <linux/spinlock.h>
  18 #include <linux/dma-mapping.h>
  19 #include <soc/mediatek/smi.h>
  20
  21 #define MTK_LARB_COM_MAX        8
  22 #define MTK_LARB_SUBCOM_MAX     4
  23
  24 struct mtk_iommu_suspend_reg {
  25         union {
  26                 u32                     standard_axi_mode;/* v1 */
  27                 u32                     misc_ctrl;/* v2 */
  28         };
  29         u32                             dcm_dis;
  30         u32                             ctrl_reg;
  31         u32                             int_control0;
  32         u32                             int_main_control;
  33         u32                             ivrp_paddr;
  34         u32                             vld_pa_rng;
  35         u32                             wr_len_ctrl;
  36 };
  37
  38 enum mtk_iommu_plat {
  39         M4U_MT2701,
  40         M4U_MT2712,
  41         M4U_MT6779,
  42         M4U_MT8173,
  43         M4U_MT8183,
  44 };
  45
  46 struct mtk_iommu_plat_data {
  47         enum mtk_iommu_plat m4u_plat;
  48         u32                 flags;
  49         u32                 inv_sel_reg;
  50         unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
  51 };
  52
  53 struct mtk_iommu_domain;
  54
  55 struct mtk_iommu_data {
  56         void __iomem                    *base;
  57         int                             irq;
  58         struct device                   *dev;
  59         struct clk                      *bclk;
  60         phys_addr_t                     protect_base; /* protect memory base */
  61         struct mtk_iommu_suspend_reg    reg;
  62         struct mtk_iommu_domain         *m4u_dom;
  63         struct iommu_group              *m4u_group;
  64         bool                            enable_4GB;
  65         spinlock_t                      tlb_lock; /* lock for tlb range flush */
  66
  67         struct iommu_device             iommu;
  68         const struct mtk_iommu_plat_data *plat_data;
  69
  70         struct dma_iommu_mapping        *mapping; /* For mtk_iommu_v1.c */
  71
  72         struct list_head                list;
  73         struct mtk_smi_larb_iommu       larb_imu[MTK_LARB_NR_MAX];
  74 };
  75
  76 static inline int compare_of(struct device *dev, void *data)
  77 {
  78         return dev->of_node == data;
  79 }
  80
  81 static inline void release_of(struct device *dev, void *data)
  82 {
  83         of_node_put(data);
  84 }
  85
  86 static inline int mtk_iommu_bind(struct device *dev)
  87 {
  88         struct mtk_iommu_data *data = dev_get_drvdata(dev);
  89
  90         return component_bind_all(dev, &data->larb_imu);
  91 }
  92
  93 static inline void mtk_iommu_unbind(struct device *dev)
  94 {
  95         struct mtk_iommu_data *data = dev_get_drvdata(dev);
  96
  97         component_unbind_all(dev, &data->larb_imu);
  98 }
  99
 100 #endif