1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020 Linaro Ltd
6 #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H
7 #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H
9 #define RPM_BUS_MASTER_REQ 0x73616d62
10 #define RPM_BUS_SLAVE_REQ 0x766c7362
12 #define QCOM_MAX_LINKS 12
14 #define to_qcom_provider(_provider) \
15 container_of(_provider, struct qcom_icc_provider, provider)
18 * struct qcom_icc_provider - Qualcomm specific interconnect provider
19 * @provider: generic interconnect provider
20 * @bus_clks: the clk_bulk_data table of bus clocks
21 * @num_clks: the total number of clk_bulk_data entries
23 struct qcom_icc_provider {
24 struct icc_provider provider;
25 struct clk_bulk_data *bus_clks;
30 * struct qcom_icc_node - Qualcomm specific interconnect nodes
31 * @name: the node name used in debugfs
32 * @id: a unique node identifier
33 * @links: an array of nodes where we can go next while traversing
34 * @num_links: the total number of @links
35 * @buswidth: width of the interconnect between a node and the bus (bytes)
36 * @mas_rpm_id: RPM id for devices that are bus masters
37 * @slv_rpm_id: RPM id for devices that are bus slaves
38 * @rate: current bus clock rate in Hz
40 struct qcom_icc_node {
43 u16 links[QCOM_MAX_LINKS];
51 struct qcom_icc_desc {
52 struct qcom_icc_node **nodes;
56 #define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \
58 static struct qcom_icc_node _name = { \
61 .buswidth = _buswidth, \
62 .mas_rpm_id = _mas_rpm_id, \
63 .slv_rpm_id = _slv_rpm_id, \
64 .num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
65 .links = { __VA_ARGS__ }, \
69 int qnoc_probe(struct platform_device *pdev, size_t cd_size, int cd_num,
70 const struct clk_bulk_data *cd);
71 int qnoc_remove(struct platform_device *pdev);