1 // SPDX-License-Identifier: GPL-2.0-only
3 * i8042 keyboard and mouse controller driver for Linux
5 * Copyright (c) 1999-2004 Vojtech Pavlik
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11 #include <linux/types.h>
12 #include <linux/delay.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
16 #include <linux/init.h>
17 #include <linux/serio.h>
18 #include <linux/err.h>
19 #include <linux/rcupdate.h>
20 #include <linux/platform_device.h>
21 #include <linux/i8042.h>
22 #include <linux/slab.h>
23 #include <linux/suspend.h>
24 #include <linux/property.h>
28 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
29 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
30 MODULE_LICENSE("GPL");
32 static bool i8042_nokbd;
33 module_param_named(nokbd, i8042_nokbd, bool, 0);
34 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
36 static bool i8042_noaux;
37 module_param_named(noaux, i8042_noaux, bool, 0);
38 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
40 static bool i8042_nomux;
41 module_param_named(nomux, i8042_nomux, bool, 0);
42 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
44 static bool i8042_unlock;
45 module_param_named(unlock, i8042_unlock, bool, 0);
46 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
48 enum i8042_controller_reset_mode {
52 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
54 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
55 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
57 enum i8042_controller_reset_mode *arg = kp->arg;
62 error = kstrtobool(val, &reset);
69 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
73 static const struct kernel_param_ops param_ops_reset_param = {
74 .flags = KERNEL_PARAM_OPS_FL_NOARG,
75 .set = i8042_set_reset,
77 #define param_check_reset_param(name, p) \
78 __param_check(name, p, enum i8042_controller_reset_mode)
79 module_param_named(reset, i8042_reset, reset_param, 0);
80 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
82 static bool i8042_direct;
83 module_param_named(direct, i8042_direct, bool, 0);
84 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
86 static bool i8042_dumbkbd;
87 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
88 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
90 static bool i8042_noloop;
91 module_param_named(noloop, i8042_noloop, bool, 0);
92 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
94 static bool i8042_notimeout;
95 module_param_named(notimeout, i8042_notimeout, bool, 0);
96 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
98 static bool i8042_kbdreset;
99 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
100 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
103 static bool i8042_dritek;
104 module_param_named(dritek, i8042_dritek, bool, 0);
105 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
109 static bool i8042_nopnp;
110 module_param_named(nopnp, i8042_nopnp, bool, 0);
111 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
116 static bool i8042_debug;
117 module_param_named(debug, i8042_debug, bool, 0600);
118 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
120 static bool i8042_unmask_kbd_data;
121 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
122 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
125 static bool i8042_present;
126 static bool i8042_bypass_aux_irq_test;
127 static char i8042_kbd_firmware_id[128];
128 static char i8042_aux_firmware_id[128];
129 static struct fwnode_handle *i8042_kbd_fwnode;
134 * i8042_lock protects serialization between i8042_command and
135 * the interrupt handler.
137 static DEFINE_SPINLOCK(i8042_lock);
140 * Writers to AUX and KBD ports as well as users issuing i8042_command
141 * directly should acquire i8042_mutex (by means of calling
142 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
143 * they do not disturb each other (unfortunately in many i8042
144 * implementations write to one of the ports will immediately abort
145 * command that is being processed by another port).
147 static DEFINE_MUTEX(i8042_mutex);
157 #define I8042_KBD_PORT_NO 0
158 #define I8042_AUX_PORT_NO 1
159 #define I8042_MUX_PORT_NO 2
160 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
162 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
164 static unsigned char i8042_initial_ctr;
165 static unsigned char i8042_ctr;
166 static bool i8042_mux_present;
167 static bool i8042_kbd_irq_registered;
168 static bool i8042_aux_irq_registered;
169 static unsigned char i8042_suppress_kbd_ack;
170 static struct platform_device *i8042_platform_device;
171 static struct notifier_block i8042_kbd_bind_notifier_block;
173 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
174 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
175 struct serio *serio);
177 void i8042_lock_chip(void)
179 mutex_lock(&i8042_mutex);
181 EXPORT_SYMBOL(i8042_lock_chip);
183 void i8042_unlock_chip(void)
185 mutex_unlock(&i8042_mutex);
187 EXPORT_SYMBOL(i8042_unlock_chip);
189 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
190 struct serio *serio))
195 spin_lock_irqsave(&i8042_lock, flags);
197 if (i8042_platform_filter) {
202 i8042_platform_filter = filter;
205 spin_unlock_irqrestore(&i8042_lock, flags);
208 EXPORT_SYMBOL(i8042_install_filter);
210 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
216 spin_lock_irqsave(&i8042_lock, flags);
218 if (i8042_platform_filter != filter) {
223 i8042_platform_filter = NULL;
226 spin_unlock_irqrestore(&i8042_lock, flags);
229 EXPORT_SYMBOL(i8042_remove_filter);
232 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
233 * be ready for reading values from it / writing values to it.
234 * Called always with i8042_lock held.
237 static int i8042_wait_read(void)
241 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
245 return -(i == I8042_CTL_TIMEOUT);
248 static int i8042_wait_write(void)
252 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
256 return -(i == I8042_CTL_TIMEOUT);
260 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
261 * of the i8042 down the toilet.
264 static int i8042_flush(void)
267 unsigned char data, str;
271 spin_lock_irqsave(&i8042_lock, flags);
273 while ((str = i8042_read_status()) & I8042_STR_OBF) {
274 if (count++ < I8042_BUFFER_SIZE) {
276 data = i8042_read_data();
277 dbg("%02x <- i8042 (flush, %s)\n",
278 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
285 spin_unlock_irqrestore(&i8042_lock, flags);
291 * i8042_command() executes a command on the i8042. It also sends the input
292 * parameter(s) of the commands to it, and receives the output value(s). The
293 * parameters are to be stored in the param array, and the output is placed
294 * into the same array. The number of the parameters and output values is
295 * encoded in bits 8-11 of the command number.
298 static int __i8042_command(unsigned char *param, int command)
302 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
305 error = i8042_wait_write();
309 dbg("%02x -> i8042 (command)\n", command & 0xff);
310 i8042_write_command(command & 0xff);
312 for (i = 0; i < ((command >> 12) & 0xf); i++) {
313 error = i8042_wait_write();
315 dbg(" -- i8042 (wait write timeout)\n");
318 dbg("%02x -> i8042 (parameter)\n", param[i]);
319 i8042_write_data(param[i]);
322 for (i = 0; i < ((command >> 8) & 0xf); i++) {
323 error = i8042_wait_read();
325 dbg(" -- i8042 (wait read timeout)\n");
329 if (command == I8042_CMD_AUX_LOOP &&
330 !(i8042_read_status() & I8042_STR_AUXDATA)) {
331 dbg(" -- i8042 (auxerr)\n");
335 param[i] = i8042_read_data();
336 dbg("%02x <- i8042 (return)\n", param[i]);
342 int i8042_command(unsigned char *param, int command)
350 spin_lock_irqsave(&i8042_lock, flags);
351 retval = __i8042_command(param, command);
352 spin_unlock_irqrestore(&i8042_lock, flags);
356 EXPORT_SYMBOL(i8042_command);
359 * i8042_kbd_write() sends a byte out through the keyboard interface.
362 static int i8042_kbd_write(struct serio *port, unsigned char c)
367 spin_lock_irqsave(&i8042_lock, flags);
369 if (!(retval = i8042_wait_write())) {
370 dbg("%02x -> i8042 (kbd-data)\n", c);
374 spin_unlock_irqrestore(&i8042_lock, flags);
380 * i8042_aux_write() sends a byte out through the aux interface.
383 static int i8042_aux_write(struct serio *serio, unsigned char c)
385 struct i8042_port *port = serio->port_data;
387 return i8042_command(&c, port->mux == -1 ?
389 I8042_CMD_MUX_SEND + port->mux);
394 * i8042_port_close attempts to clear AUX or KBD port state by disabling
395 * and then re-enabling it.
398 static void i8042_port_close(struct serio *serio)
402 const char *port_name;
404 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
405 irq_bit = I8042_CTR_AUXINT;
406 disable_bit = I8042_CTR_AUXDIS;
409 irq_bit = I8042_CTR_KBDINT;
410 disable_bit = I8042_CTR_KBDDIS;
414 i8042_ctr &= ~irq_bit;
415 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
416 pr_warn("Can't write CTR while closing %s port\n", port_name);
420 i8042_ctr &= ~disable_bit;
421 i8042_ctr |= irq_bit;
422 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
423 pr_err("Can't reactivate %s port\n", port_name);
426 * See if there is any data appeared while we were messing with
429 i8042_interrupt(0, NULL);
433 * i8042_start() is called by serio core when port is about to finish
434 * registering. It will mark port as existing so i8042_interrupt can
435 * start sending data through it.
437 static int i8042_start(struct serio *serio)
439 struct i8042_port *port = serio->port_data;
441 device_set_wakeup_capable(&serio->dev, true);
444 * On platforms using suspend-to-idle, allow the keyboard to
445 * wake up the system from sleep by enabling keyboard wakeups
446 * by default. This is consistent with keyboard wakeup
447 * behavior on many platforms using suspend-to-RAM (ACPI S3)
450 if (pm_suspend_default_s2idle() &&
451 serio == i8042_ports[I8042_KBD_PORT_NO].serio) {
452 device_set_wakeup_enable(&serio->dev, true);
455 spin_lock_irq(&i8042_lock);
457 spin_unlock_irq(&i8042_lock);
463 * i8042_stop() marks serio port as non-existing so i8042_interrupt
464 * will not try to send data to the port that is about to go away.
465 * The function is called by serio core as part of unregister procedure.
467 static void i8042_stop(struct serio *serio)
469 struct i8042_port *port = serio->port_data;
471 spin_lock_irq(&i8042_lock);
472 port->exists = false;
474 spin_unlock_irq(&i8042_lock);
477 * We need to make sure that interrupt handler finishes using
478 * our serio port before we return from this function.
479 * We synchronize with both AUX and KBD IRQs because there is
480 * a (very unlikely) chance that AUX IRQ is raised for KBD port
483 synchronize_irq(I8042_AUX_IRQ);
484 synchronize_irq(I8042_KBD_IRQ);
488 * i8042_filter() filters out unwanted bytes from the input data stream.
489 * It is called from i8042_interrupt and thus is running with interrupts
490 * off and i8042_lock held.
492 static bool i8042_filter(unsigned char data, unsigned char str,
495 if (unlikely(i8042_suppress_kbd_ack)) {
496 if ((~str & I8042_STR_AUXDATA) &&
497 (data == 0xfa || data == 0xfe)) {
498 i8042_suppress_kbd_ack--;
499 dbg("Extra keyboard ACK - filtered out\n");
504 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
505 dbg("Filtered out by platform filter\n");
513 * i8042_interrupt() is the most important function in this driver -
514 * it handles the interrupts from the i8042, and sends incoming bytes
515 * to the upper layers.
518 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
520 struct i8042_port *port;
523 unsigned char str, data;
525 unsigned int port_no;
529 spin_lock_irqsave(&i8042_lock, flags);
531 str = i8042_read_status();
532 if (unlikely(~str & I8042_STR_OBF)) {
533 spin_unlock_irqrestore(&i8042_lock, flags);
535 dbg("Interrupt %d, without any data\n", irq);
540 data = i8042_read_data();
542 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
543 static unsigned long last_transmit;
544 static unsigned char last_str;
547 if (str & I8042_STR_MUXERR) {
548 dbg("MUX error, status is %02x, data is %02x\n",
551 * When MUXERR condition is signalled the data register can only contain
552 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
553 * it is not always the case. Some KBCs also report 0xfc when there is
554 * nothing connected to the port while others sometimes get confused which
555 * port the data came from and signal error leaving the data intact. They
556 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
557 * to legacy mode yet, when we see one we'll add proper handling).
558 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
559 * rest assume that the data came from the same serio last byte
560 * was transmitted (if transmission happened not too long ago).
565 if (time_before(jiffies, last_transmit + HZ/10)) {
569 fallthrough; /* report timeout */
572 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
573 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
577 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
579 last_transmit = jiffies;
582 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
583 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
585 port_no = (str & I8042_STR_AUXDATA) ?
586 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
589 port = &i8042_ports[port_no];
590 serio = port->exists ? port->serio : NULL;
592 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
594 dfl & SERIO_PARITY ? ", bad parity" : "",
595 dfl & SERIO_TIMEOUT ? ", timeout" : "");
597 filtered = i8042_filter(data, str, serio);
599 spin_unlock_irqrestore(&i8042_lock, flags);
601 if (likely(serio && !filtered))
602 serio_interrupt(serio, data, dfl);
605 return IRQ_RETVAL(ret);
609 * i8042_enable_kbd_port enables keyboard port on chip
612 static int i8042_enable_kbd_port(void)
614 i8042_ctr &= ~I8042_CTR_KBDDIS;
615 i8042_ctr |= I8042_CTR_KBDINT;
617 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
618 i8042_ctr &= ~I8042_CTR_KBDINT;
619 i8042_ctr |= I8042_CTR_KBDDIS;
620 pr_err("Failed to enable KBD port\n");
628 * i8042_enable_aux_port enables AUX (mouse) port on chip
631 static int i8042_enable_aux_port(void)
633 i8042_ctr &= ~I8042_CTR_AUXDIS;
634 i8042_ctr |= I8042_CTR_AUXINT;
636 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
637 i8042_ctr &= ~I8042_CTR_AUXINT;
638 i8042_ctr |= I8042_CTR_AUXDIS;
639 pr_err("Failed to enable AUX port\n");
647 * i8042_enable_mux_ports enables 4 individual AUX ports after
648 * the controller has been switched into Multiplexed mode
651 static int i8042_enable_mux_ports(void)
656 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
657 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
658 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
661 return i8042_enable_aux_port();
665 * i8042_set_mux_mode checks whether the controller has an
666 * active multiplexor and puts the chip into Multiplexed (true)
667 * or Legacy (false) mode.
670 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
673 unsigned char param, val;
675 * Get rid of bytes in the queue.
681 * Internal loopback test - send three bytes, they should come back from the
682 * mouse interface, the last should be version.
686 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
688 param = val = multiplex ? 0x56 : 0xf6;
689 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
691 param = val = multiplex ? 0xa4 : 0xa5;
692 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
696 * Workaround for interference with USB Legacy emulation
697 * that causes a v10.12 MUX to be found.
703 *mux_version = param;
709 * i8042_check_mux() checks whether the controller supports the PS/2 Active
710 * Multiplexing specification by Synaptics, Phoenix, Insyde and
714 static int __init i8042_check_mux(void)
716 unsigned char mux_version;
718 if (i8042_set_mux_mode(true, &mux_version))
721 pr_info("Detected active multiplexing controller, rev %d.%d\n",
722 (mux_version >> 4) & 0xf, mux_version & 0xf);
725 * Disable all muxed ports by disabling AUX.
727 i8042_ctr |= I8042_CTR_AUXDIS;
728 i8042_ctr &= ~I8042_CTR_AUXINT;
730 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
731 pr_err("Failed to disable AUX port, can't use MUX\n");
735 i8042_mux_present = true;
741 * The following is used to test AUX IRQ delivery.
743 static struct completion i8042_aux_irq_delivered __initdata;
744 static bool i8042_irq_being_tested __initdata;
746 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
749 unsigned char str, data;
752 spin_lock_irqsave(&i8042_lock, flags);
753 str = i8042_read_status();
754 if (str & I8042_STR_OBF) {
755 data = i8042_read_data();
756 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
757 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
758 if (i8042_irq_being_tested &&
759 data == 0xa5 && (str & I8042_STR_AUXDATA))
760 complete(&i8042_aux_irq_delivered);
763 spin_unlock_irqrestore(&i8042_lock, flags);
765 return IRQ_RETVAL(ret);
769 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
770 * verifies success by readinng CTR. Used when testing for presence of AUX
773 static int __init i8042_toggle_aux(bool on)
778 if (i8042_command(¶m,
779 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
782 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
783 for (i = 0; i < 100; i++) {
786 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
789 if (!(param & I8042_CTR_AUXDIS) == on)
797 * i8042_check_aux() applies as much paranoia as it can at detecting
798 * the presence of an AUX interface.
801 static int __init i8042_check_aux(void)
804 bool irq_registered = false;
805 bool aux_loop_broken = false;
810 * Get rid of bytes in the queue.
816 * Internal loopback test - filters out AT-type i8042's. Unfortunately
817 * SiS screwed up and their 5597 doesn't support the LOOP command even
818 * though it has an AUX port.
822 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
823 if (retval || param != 0x5a) {
826 * External connection test - filters out AT-soldered PS/2 i8042's
827 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
828 * 0xfa - no error on some notebooks which ignore the spec
829 * Because it's common for chipsets to return error on perfectly functioning
830 * AUX ports, we test for this only when the LOOP command failed.
833 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
834 (param && param != 0xfa && param != 0xff))
838 * If AUX_LOOP completed without error but returned unexpected data
842 aux_loop_broken = true;
846 * Bit assignment test - filters out PS/2 i8042's in AT mode
849 if (i8042_toggle_aux(false)) {
850 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
851 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
854 if (i8042_toggle_aux(true))
858 * Reset keyboard (needed on some laptops to successfully detect
859 * touchpad, e.g., some Gigabyte laptop models with Elantech
862 if (i8042_kbdreset) {
863 pr_warn("Attempting to reset device connected to KBD port\n");
864 i8042_kbd_write(NULL, (unsigned char) 0xff);
868 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
869 * used it for a PCI card or somethig else.
872 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
874 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
875 * is working and hope we are right.
881 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
882 "i8042", i8042_platform_device))
885 irq_registered = true;
887 if (i8042_enable_aux_port())
890 spin_lock_irqsave(&i8042_lock, flags);
892 init_completion(&i8042_aux_irq_delivered);
893 i8042_irq_being_tested = true;
896 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
898 spin_unlock_irqrestore(&i8042_lock, flags);
903 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
904 msecs_to_jiffies(250)) == 0) {
906 * AUX IRQ was never delivered so we need to flush the controller to
907 * get rid of the byte we put there; otherwise keyboard may not work.
909 dbg(" -- i8042 (aux irq test timeout)\n");
917 * Disable the interface.
920 i8042_ctr |= I8042_CTR_AUXDIS;
921 i8042_ctr &= ~I8042_CTR_AUXINT;
923 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
927 free_irq(I8042_AUX_IRQ, i8042_platform_device);
932 static int i8042_controller_check(void)
935 pr_info("No controller found\n");
942 static int i8042_controller_selftest(void)
948 * We try this 5 times; on some really fragile systems this does not
949 * take the first time...
953 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
954 pr_err("i8042 controller selftest timeout\n");
958 if (param == I8042_RET_CTL_TEST)
961 dbg("i8042 controller selftest: %#x != %#x\n",
962 param, I8042_RET_CTL_TEST);
968 * On x86, we don't fail entire i8042 initialization if controller
969 * reset fails in hopes that keyboard port will still be functional
970 * and user will still get a working keyboard. This is especially
971 * important on netbooks. On other arches we trust hardware more.
973 pr_info("giving up on controller selftest, continuing anyway...\n");
976 pr_err("i8042 controller selftest failed\n");
982 * i8042_controller init initializes the i8042 controller, and,
983 * most importantly, sets it into non-xlated mode if that's
987 static int i8042_controller_init(void)
991 unsigned char ctr[2];
994 * Save the CTR for restore on unload / reboot.
999 pr_err("Unable to get stable CTR read\n");
1006 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
1007 pr_err("Can't read CTR while initializing i8042\n");
1011 } while (n < 2 || ctr[0] != ctr[1]);
1013 i8042_initial_ctr = i8042_ctr = ctr[0];
1016 * Disable the keyboard interface and interrupt.
1019 i8042_ctr |= I8042_CTR_KBDDIS;
1020 i8042_ctr &= ~I8042_CTR_KBDINT;
1026 spin_lock_irqsave(&i8042_lock, flags);
1027 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1029 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1031 pr_warn("Warning: Keylock active\n");
1033 spin_unlock_irqrestore(&i8042_lock, flags);
1036 * If the chip is configured into nontranslated mode by the BIOS, don't
1037 * bother enabling translating and be happy.
1040 if (~i8042_ctr & I8042_CTR_XLATE)
1041 i8042_direct = true;
1044 * Set nontranslated mode for the kbd interface if requested by an option.
1045 * After this the kbd interface becomes a simple serial in/out, like the aux
1046 * interface is. We don't do this by default, since it can confuse notebook
1051 i8042_ctr &= ~I8042_CTR_XLATE;
1057 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1058 pr_err("Can't write CTR while initializing i8042\n");
1063 * Flush whatever accumulated while we were disabling keyboard port.
1073 * Reset the controller and reset CRT to the original value set by BIOS.
1076 static void i8042_controller_reset(bool s2r_wants_reset)
1081 * Disable both KBD and AUX interfaces so they don't get in the way
1084 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1085 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1087 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1088 pr_warn("Can't write CTR while resetting\n");
1091 * Disable MUX mode if present.
1094 if (i8042_mux_present)
1095 i8042_set_mux_mode(false, NULL);
1098 * Reset the controller if requested.
1101 if (i8042_reset == I8042_RESET_ALWAYS ||
1102 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1103 i8042_controller_selftest();
1107 * Restore the original control register setting.
1110 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1111 pr_warn("Can't restore CTR\n");
1116 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1117 * when kernel panics. Flashing LEDs is useful for users running X who may
1118 * not see the console and will help distinguishing panics from "real"
1121 * Note that DELAY has a limit of 10ms so we will not get stuck here
1122 * waiting for KBC to free up even if KBD interrupt is off
1125 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1127 static long i8042_panic_blink(int state)
1132 led = (state) ? 0x01 | 0x04 : 0;
1133 while (i8042_read_status() & I8042_STR_IBF)
1135 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1136 i8042_suppress_kbd_ack = 2;
1137 i8042_write_data(0xed); /* set leds */
1139 while (i8042_read_status() & I8042_STR_IBF)
1142 dbg("%02x -> i8042 (panic blink)\n", led);
1143 i8042_write_data(led);
1151 static void i8042_dritek_enable(void)
1153 unsigned char param = 0x90;
1156 error = i8042_command(¶m, 0x1059);
1158 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1165 * Here we try to reset everything back to a state we had
1166 * before suspending.
1169 static int i8042_controller_resume(bool s2r_wants_reset)
1173 error = i8042_controller_check();
1177 if (i8042_reset == I8042_RESET_ALWAYS ||
1178 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1179 error = i8042_controller_selftest();
1185 * Restore original CTR value and disable all ports
1188 i8042_ctr = i8042_initial_ctr;
1190 i8042_ctr &= ~I8042_CTR_XLATE;
1191 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1192 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1193 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1194 pr_warn("Can't write CTR to resume, retrying...\n");
1196 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1197 pr_err("CTR write retry failed\n");
1205 i8042_dritek_enable();
1208 if (i8042_mux_present) {
1209 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1210 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1211 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1212 i8042_enable_aux_port();
1214 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1215 i8042_enable_kbd_port();
1217 i8042_interrupt(0, NULL);
1223 * Here we try to restore the original BIOS settings to avoid
1227 static int i8042_pm_suspend(struct device *dev)
1231 if (pm_suspend_via_firmware())
1232 i8042_controller_reset(true);
1234 /* Set up serio interrupts for system wakeup. */
1235 for (i = 0; i < I8042_NUM_PORTS; i++) {
1236 struct serio *serio = i8042_ports[i].serio;
1238 if (serio && device_may_wakeup(&serio->dev))
1239 enable_irq_wake(i8042_ports[i].irq);
1245 static int i8042_pm_resume_noirq(struct device *dev)
1247 if (!pm_resume_via_firmware())
1248 i8042_interrupt(0, NULL);
1253 static int i8042_pm_resume(struct device *dev)
1258 for (i = 0; i < I8042_NUM_PORTS; i++) {
1259 struct serio *serio = i8042_ports[i].serio;
1261 if (serio && device_may_wakeup(&serio->dev))
1262 disable_irq_wake(i8042_ports[i].irq);
1266 * If platform firmware was not going to be involved in suspend, we did
1267 * not restore the controller state to whatever it had been at boot
1268 * time, so we do not need to do anything.
1270 if (!pm_suspend_via_firmware())
1274 * We only need to reset the controller if we are resuming after handing
1275 * off control to the platform firmware, otherwise we can simply restore
1278 want_reset = pm_resume_via_firmware();
1280 return i8042_controller_resume(want_reset);
1283 static int i8042_pm_thaw(struct device *dev)
1285 i8042_interrupt(0, NULL);
1290 static int i8042_pm_reset(struct device *dev)
1292 i8042_controller_reset(false);
1297 static int i8042_pm_restore(struct device *dev)
1299 return i8042_controller_resume(false);
1302 static const struct dev_pm_ops i8042_pm_ops = {
1303 .suspend = i8042_pm_suspend,
1304 .resume_noirq = i8042_pm_resume_noirq,
1305 .resume = i8042_pm_resume,
1306 .thaw = i8042_pm_thaw,
1307 .poweroff = i8042_pm_reset,
1308 .restore = i8042_pm_restore,
1311 #endif /* CONFIG_PM */
1314 * We need to reset the 8042 back to original mode on system shutdown,
1315 * because otherwise BIOSes will be confused.
1318 static void i8042_shutdown(struct platform_device *dev)
1320 i8042_controller_reset(false);
1323 static int __init i8042_create_kbd_port(void)
1325 struct serio *serio;
1326 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1328 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1332 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1333 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1334 serio->start = i8042_start;
1335 serio->stop = i8042_stop;
1336 serio->close = i8042_port_close;
1337 serio->ps2_cmd_mutex = &i8042_mutex;
1338 serio->port_data = port;
1339 serio->dev.parent = &i8042_platform_device->dev;
1340 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1341 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1342 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1343 sizeof(serio->firmware_id));
1344 set_primary_fwnode(&serio->dev, i8042_kbd_fwnode);
1346 port->serio = serio;
1347 port->irq = I8042_KBD_IRQ;
1352 static int __init i8042_create_aux_port(int idx)
1354 struct serio *serio;
1355 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1356 struct i8042_port *port = &i8042_ports[port_no];
1358 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1362 serio->id.type = SERIO_8042;
1363 serio->write = i8042_aux_write;
1364 serio->start = i8042_start;
1365 serio->stop = i8042_stop;
1366 serio->ps2_cmd_mutex = &i8042_mutex;
1367 serio->port_data = port;
1368 serio->dev.parent = &i8042_platform_device->dev;
1370 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1371 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1372 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1373 sizeof(serio->firmware_id));
1374 serio->close = i8042_port_close;
1376 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1377 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1378 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1379 sizeof(serio->firmware_id));
1382 port->serio = serio;
1384 port->irq = I8042_AUX_IRQ;
1389 static void __init i8042_free_kbd_port(void)
1391 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1392 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1395 static void __init i8042_free_aux_ports(void)
1399 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1400 kfree(i8042_ports[i].serio);
1401 i8042_ports[i].serio = NULL;
1405 static void __init i8042_register_ports(void)
1409 for (i = 0; i < I8042_NUM_PORTS; i++) {
1410 struct serio *serio = i8042_ports[i].serio;
1415 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1417 (unsigned long) I8042_DATA_REG,
1418 (unsigned long) I8042_COMMAND_REG,
1419 i8042_ports[i].irq);
1420 serio_register_port(serio);
1424 static void i8042_unregister_ports(void)
1428 for (i = 0; i < I8042_NUM_PORTS; i++) {
1429 if (i8042_ports[i].serio) {
1430 serio_unregister_port(i8042_ports[i].serio);
1431 i8042_ports[i].serio = NULL;
1436 static void i8042_free_irqs(void)
1438 if (i8042_aux_irq_registered)
1439 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1440 if (i8042_kbd_irq_registered)
1441 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1443 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1446 static int __init i8042_setup_aux(void)
1448 int (*aux_enable)(void);
1452 if (i8042_check_aux())
1455 if (i8042_nomux || i8042_check_mux()) {
1456 error = i8042_create_aux_port(-1);
1458 goto err_free_ports;
1459 aux_enable = i8042_enable_aux_port;
1461 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1462 error = i8042_create_aux_port(i);
1464 goto err_free_ports;
1466 aux_enable = i8042_enable_mux_ports;
1469 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1470 "i8042", i8042_platform_device);
1472 goto err_free_ports;
1474 error = aux_enable();
1478 i8042_aux_irq_registered = true;
1482 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1484 i8042_free_aux_ports();
1488 static int __init i8042_setup_kbd(void)
1492 error = i8042_create_kbd_port();
1496 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1497 "i8042", i8042_platform_device);
1501 error = i8042_enable_kbd_port();
1505 i8042_kbd_irq_registered = true;
1509 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1511 i8042_free_kbd_port();
1515 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1516 unsigned long action, void *data)
1518 struct device *dev = data;
1519 struct serio *serio = to_serio_port(dev);
1520 struct i8042_port *port = serio->port_data;
1522 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1526 case BUS_NOTIFY_BOUND_DRIVER:
1527 port->driver_bound = true;
1530 case BUS_NOTIFY_UNBIND_DRIVER:
1531 port->driver_bound = false;
1538 static int __init i8042_probe(struct platform_device *dev)
1542 i8042_platform_device = dev;
1544 if (i8042_reset == I8042_RESET_ALWAYS) {
1545 error = i8042_controller_selftest();
1550 error = i8042_controller_init();
1556 i8042_dritek_enable();
1560 error = i8042_setup_aux();
1561 if (error && error != -ENODEV && error != -EBUSY)
1566 error = i8042_setup_kbd();
1571 * Ok, everything is ready, let's register all serio ports
1573 i8042_register_ports();
1578 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1580 i8042_controller_reset(false);
1581 i8042_platform_device = NULL;
1586 static int i8042_remove(struct platform_device *dev)
1588 i8042_unregister_ports();
1590 i8042_controller_reset(false);
1591 i8042_platform_device = NULL;
1596 static struct platform_driver i8042_driver = {
1600 .pm = &i8042_pm_ops,
1603 .remove = i8042_remove,
1604 .shutdown = i8042_shutdown,
1607 static struct notifier_block i8042_kbd_bind_notifier_block = {
1608 .notifier_call = i8042_kbd_bind_notifier,
1611 static int __init i8042_init(void)
1613 struct platform_device *pdev;
1618 err = i8042_platform_init();
1620 return (err == -ENODEV) ? 0 : err;
1622 err = i8042_controller_check();
1624 goto err_platform_exit;
1626 /* Set this before creating the dev to allow i8042_command to work right away */
1627 i8042_present = true;
1629 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1631 err = PTR_ERR(pdev);
1632 goto err_platform_exit;
1635 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1636 panic_blink = i8042_panic_blink;
1641 i8042_platform_exit();
1645 static void __exit i8042_exit(void)
1650 platform_device_unregister(i8042_platform_device);
1651 platform_driver_unregister(&i8042_driver);
1652 i8042_platform_exit();
1654 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1658 module_init(i8042_init);
1659 module_exit(i8042_exit);