drivers/input/misc/iqs626a.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Azoteq IQS626A Capacitive Touch Controller
   4  *
   5  * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com>
   6  *
   7  * This driver registers up to 2 input devices: one representing capacitive or
   8  * inductive keys as well as Hall-effect switches, and one for a trackpad that
   9  * can express various gestures.
  10  */
  11
  12 #include <linux/bits.h>
  13 #include <linux/completion.h>
  14 #include <linux/delay.h>
  15 #include <linux/device.h>
  16 #include <linux/err.h>
  17 #include <linux/i2c.h>
  18 #include <linux/input.h>
  19 #include <linux/input/touchscreen.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/of_device.h>
  24 #include <linux/property.h>
  25 #include <linux/regmap.h>
  26 #include <linux/slab.h>
  27
  28 #define IQS626_VER_INFO                         0x00
  29 #define IQS626_VER_INFO_PROD_NUM                0x51
  30
  31 #define IQS626_SYS_FLAGS                        0x02
  32 #define IQS626_SYS_FLAGS_SHOW_RESET             BIT(15)
  33 #define IQS626_SYS_FLAGS_IN_ATI                 BIT(12)
  34 #define IQS626_SYS_FLAGS_PWR_MODE_MASK          GENMASK(9, 8)
  35 #define IQS626_SYS_FLAGS_PWR_MODE_SHIFT         8
  36
  37 #define IQS626_HALL_OUTPUT                      0x23
  38
  39 #define IQS626_SYS_SETTINGS                     0x80
  40 #define IQS626_SYS_SETTINGS_CLK_DIV             BIT(15)
  41 #define IQS626_SYS_SETTINGS_ULP_AUTO            BIT(14)
  42 #define IQS626_SYS_SETTINGS_DIS_AUTO            BIT(13)
  43 #define IQS626_SYS_SETTINGS_PWR_MODE_MASK       GENMASK(12, 11)
  44 #define IQS626_SYS_SETTINGS_PWR_MODE_SHIFT      11
  45 #define IQS626_SYS_SETTINGS_PWR_MODE_MAX        3
  46 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MASK     GENMASK(10, 8)
  47 #define IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT    8
  48 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MAX      7
  49 #define IQS626_SYS_SETTINGS_EVENT_MODE          BIT(5)
  50 #define IQS626_SYS_SETTINGS_EVENT_MODE_LP       BIT(4)
  51 #define IQS626_SYS_SETTINGS_REDO_ATI            BIT(2)
  52 #define IQS626_SYS_SETTINGS_ACK_RESET           BIT(0)
  53
  54 #define IQS626_MISC_A_ATI_BAND_DISABLE          BIT(7)
  55 #define IQS626_MISC_A_TPx_LTA_UPDATE_MASK       GENMASK(6, 4)
  56 #define IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT      4
  57 #define IQS626_MISC_A_TPx_LTA_UPDATE_MAX        7
  58 #define IQS626_MISC_A_ATI_LP_ONLY               BIT(3)
  59 #define IQS626_MISC_A_GPIO3_SELECT_MASK         GENMASK(2, 0)
  60 #define IQS626_MISC_A_GPIO3_SELECT_MAX          7
  61
  62 #define IQS626_EVENT_MASK_SYS                   BIT(6)
  63 #define IQS626_EVENT_MASK_GESTURE               BIT(3)
  64 #define IQS626_EVENT_MASK_DEEP                  BIT(2)
  65 #define IQS626_EVENT_MASK_TOUCH                 BIT(1)
  66 #define IQS626_EVENT_MASK_PROX                  BIT(0)
  67
  68 #define IQS626_RATE_NP_MS_MAX                   255
  69 #define IQS626_RATE_LP_MS_MAX                   255
  70 #define IQS626_RATE_ULP_MS_MAX                  4080
  71 #define IQS626_TIMEOUT_PWR_MS_MAX               130560
  72 #define IQS626_TIMEOUT_LTA_MS_MAX               130560
  73
  74 #define IQS626_MISC_B_RESEED_UI_SEL_MASK        GENMASK(7, 6)
  75 #define IQS626_MISC_B_RESEED_UI_SEL_SHIFT       6
  76 #define IQS626_MISC_B_RESEED_UI_SEL_MAX         3
  77 #define IQS626_MISC_B_THRESH_EXTEND             BIT(5)
  78 #define IQS626_MISC_B_TRACKING_UI_ENABLE        BIT(4)
  79 #define IQS626_MISC_B_TPx_SWIPE                 BIT(3)
  80 #define IQS626_MISC_B_RESEED_OFFSET             BIT(2)
  81 #define IQS626_MISC_B_FILT_STR_TPx              GENMASK(1, 0)
  82
  83 #define IQS626_THRESH_SWIPE_MAX                 255
  84 #define IQS626_TIMEOUT_TAP_MS_MAX               4080
  85 #define IQS626_TIMEOUT_SWIPE_MS_MAX             4080
  86
  87 #define IQS626_CHx_ENG_0_MEAS_CAP_SIZE          BIT(7)
  88 #define IQS626_CHx_ENG_0_RX_TERM_VSS            BIT(5)
  89 #define IQS626_CHx_ENG_0_LINEARIZE              BIT(4)
  90 #define IQS626_CHx_ENG_0_DUAL_DIR               BIT(3)
  91 #define IQS626_CHx_ENG_0_FILT_DISABLE           BIT(2)
  92 #define IQS626_CHx_ENG_0_ATI_MODE_MASK          GENMASK(1, 0)
  93 #define IQS626_CHx_ENG_0_ATI_MODE_MAX           3
  94
  95 #define IQS626_CHx_ENG_1_CCT_HIGH_1             BIT(7)
  96 #define IQS626_CHx_ENG_1_CCT_HIGH_0             BIT(6)
  97 #define IQS626_CHx_ENG_1_PROJ_BIAS_MASK         GENMASK(5, 4)
  98 #define IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT        4
  99 #define IQS626_CHx_ENG_1_PROJ_BIAS_MAX          3
 100 #define IQS626_CHx_ENG_1_CCT_ENABLE             BIT(3)
 101 #define IQS626_CHx_ENG_1_SENSE_FREQ_MASK        GENMASK(2, 1)
 102 #define IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT       1
 103 #define IQS626_CHx_ENG_1_SENSE_FREQ_MAX         3
 104 #define IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN       BIT(0)
 105
 106 #define IQS626_CHx_ENG_2_LOCAL_CAP_MASK         GENMASK(7, 6)
 107 #define IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT        6
 108 #define IQS626_CHx_ENG_2_LOCAL_CAP_MAX          3
 109 #define IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE       BIT(5)
 110 #define IQS626_CHx_ENG_2_SENSE_MODE_MASK        GENMASK(3, 0)
 111 #define IQS626_CHx_ENG_2_SENSE_MODE_MAX         15
 112
 113 #define IQS626_CHx_ENG_3_TX_FREQ_MASK           GENMASK(5, 4)
 114 #define IQS626_CHx_ENG_3_TX_FREQ_SHIFT          4
 115 #define IQS626_CHx_ENG_3_TX_FREQ_MAX            3
 116 #define IQS626_CHx_ENG_3_INV_LOGIC              BIT(0)
 117
 118 #define IQS626_CHx_ENG_4_RX_TERM_VREG           BIT(6)
 119 #define IQS626_CHx_ENG_4_CCT_LOW_1              BIT(5)
 120 #define IQS626_CHx_ENG_4_CCT_LOW_0              BIT(4)
 121 #define IQS626_CHx_ENG_4_COMP_DISABLE           BIT(1)
 122 #define IQS626_CHx_ENG_4_STATIC_ENABLE          BIT(0)
 123
 124 #define IQS626_TPx_ATI_BASE_MIN                 45
 125 #define IQS626_TPx_ATI_BASE_MAX                 300
 126 #define IQS626_CHx_ATI_BASE_MASK                GENMASK(7, 6)
 127 #define IQS626_CHx_ATI_BASE_75                  0x00
 128 #define IQS626_CHx_ATI_BASE_100                 0x40
 129 #define IQS626_CHx_ATI_BASE_150                 0x80
 130 #define IQS626_CHx_ATI_BASE_200                 0xC0
 131 #define IQS626_CHx_ATI_TARGET_MASK              GENMASK(5, 0)
 132 #define IQS626_CHx_ATI_TARGET_MAX               2016
 133
 134 #define IQS626_CHx_THRESH_MAX                   255
 135 #define IQS626_CHx_HYST_DEEP_MASK               GENMASK(7, 4)
 136 #define IQS626_CHx_HYST_DEEP_SHIFT              4
 137 #define IQS626_CHx_HYST_TOUCH_MASK              GENMASK(3, 0)
 138 #define IQS626_CHx_HYST_MAX                     15
 139
 140 #define IQS626_FILT_STR_NP_TPx_MASK             GENMASK(7, 6)
 141 #define IQS626_FILT_STR_NP_TPx_SHIFT            6
 142 #define IQS626_FILT_STR_LP_TPx_MASK             GENMASK(5, 4)
 143 #define IQS626_FILT_STR_LP_TPx_SHIFT            4
 144
 145 #define IQS626_FILT_STR_NP_CNT_MASK             GENMASK(7, 6)
 146 #define IQS626_FILT_STR_NP_CNT_SHIFT            6
 147 #define IQS626_FILT_STR_LP_CNT_MASK             GENMASK(5, 4)
 148 #define IQS626_FILT_STR_LP_CNT_SHIFT            4
 149 #define IQS626_FILT_STR_NP_LTA_MASK             GENMASK(3, 2)
 150 #define IQS626_FILT_STR_NP_LTA_SHIFT            2
 151 #define IQS626_FILT_STR_LP_LTA_MASK             GENMASK(1, 0)
 152 #define IQS626_FILT_STR_MAX                     3
 153
 154 #define IQS626_ULP_PROJ_ENABLE                  BIT(4)
 155 #define IQS626_GEN_WEIGHT_MAX                   255
 156
 157 #define IQS626_MAX_REG                          0xFF
 158
 159 #define IQS626_NUM_CH_TP_3                      9
 160 #define IQS626_NUM_CH_TP_2                      6
 161 #define IQS626_NUM_CH_GEN                       3
 162 #define IQS626_NUM_CRx_TX                       8
 163
 164 #define IQS626_PWR_MODE_POLL_SLEEP_US           50000
 165 #define IQS626_PWR_MODE_POLL_TIMEOUT_US         500000
 166
 167 #define iqs626_irq_wait()                       usleep_range(350, 400)
 168
 169 enum iqs626_ch_id {
 170         IQS626_CH_ULP_0,
 171         IQS626_CH_TP_2,
 172         IQS626_CH_TP_3,
 173         IQS626_CH_GEN_0,
 174         IQS626_CH_GEN_1,
 175         IQS626_CH_GEN_2,
 176         IQS626_CH_HALL,
 177 };
 178
 179 enum iqs626_rx_inactive {
 180         IQS626_RX_INACTIVE_VSS,
 181         IQS626_RX_INACTIVE_FLOAT,
 182         IQS626_RX_INACTIVE_VREG,
 183 };
 184
 185 enum iqs626_st_offs {
 186         IQS626_ST_OFFS_PROX,
 187         IQS626_ST_OFFS_DIR,
 188         IQS626_ST_OFFS_TOUCH,
 189         IQS626_ST_OFFS_DEEP,
 190 };
 191
 192 enum iqs626_th_offs {
 193         IQS626_TH_OFFS_PROX,
 194         IQS626_TH_OFFS_TOUCH,
 195         IQS626_TH_OFFS_DEEP,
 196 };
 197
 198 enum iqs626_event_id {
 199         IQS626_EVENT_PROX_DN,
 200         IQS626_EVENT_PROX_UP,
 201         IQS626_EVENT_TOUCH_DN,
 202         IQS626_EVENT_TOUCH_UP,
 203         IQS626_EVENT_DEEP_DN,
 204         IQS626_EVENT_DEEP_UP,
 205 };
 206
 207 enum iqs626_gesture_id {
 208         IQS626_GESTURE_FLICK_X_POS,
 209         IQS626_GESTURE_FLICK_X_NEG,
 210         IQS626_GESTURE_FLICK_Y_POS,
 211         IQS626_GESTURE_FLICK_Y_NEG,
 212         IQS626_GESTURE_TAP,
 213         IQS626_GESTURE_HOLD,
 214         IQS626_NUM_GESTURES,
 215 };
 216
 217 struct iqs626_event_desc {
 218         const char *name;
 219         enum iqs626_st_offs st_offs;
 220         enum iqs626_th_offs th_offs;
 221         bool dir_up;
 222         u8 mask;
 223 };
 224
 225 static const struct iqs626_event_desc iqs626_events[] = {
 226         [IQS626_EVENT_PROX_DN] = {
 227                 .name = "event-prox",
 228                 .st_offs = IQS626_ST_OFFS_PROX,
 229                 .th_offs = IQS626_TH_OFFS_PROX,
 230                 .mask = IQS626_EVENT_MASK_PROX,
 231         },
 232         [IQS626_EVENT_PROX_UP] = {
 233                 .name = "event-prox-alt",
 234                 .st_offs = IQS626_ST_OFFS_PROX,
 235                 .th_offs = IQS626_TH_OFFS_PROX,
 236                 .dir_up = true,
 237                 .mask = IQS626_EVENT_MASK_PROX,
 238         },
 239         [IQS626_EVENT_TOUCH_DN] = {
 240                 .name = "event-touch",
 241                 .st_offs = IQS626_ST_OFFS_TOUCH,
 242                 .th_offs = IQS626_TH_OFFS_TOUCH,
 243                 .mask = IQS626_EVENT_MASK_TOUCH,
 244         },
 245         [IQS626_EVENT_TOUCH_UP] = {
 246                 .name = "event-touch-alt",
 247                 .st_offs = IQS626_ST_OFFS_TOUCH,
 248                 .th_offs = IQS626_TH_OFFS_TOUCH,
 249                 .dir_up = true,
 250                 .mask = IQS626_EVENT_MASK_TOUCH,
 251         },
 252         [IQS626_EVENT_DEEP_DN] = {
 253                 .name = "event-deep",
 254                 .st_offs = IQS626_ST_OFFS_DEEP,
 255                 .th_offs = IQS626_TH_OFFS_DEEP,
 256                 .mask = IQS626_EVENT_MASK_DEEP,
 257         },
 258         [IQS626_EVENT_DEEP_UP] = {
 259                 .name = "event-deep-alt",
 260                 .st_offs = IQS626_ST_OFFS_DEEP,
 261                 .th_offs = IQS626_TH_OFFS_DEEP,
 262                 .dir_up = true,
 263                 .mask = IQS626_EVENT_MASK_DEEP,
 264         },
 265 };
 266
 267 struct iqs626_ver_info {
 268         u8 prod_num;
 269         u8 sw_num;
 270         u8 hw_num;
 271         u8 padding;
 272 } __packed;
 273
 274 struct iqs626_flags {
 275         __be16 system;
 276         u8 gesture;
 277         u8 padding_a;
 278         u8 states[4];
 279         u8 ref_active;
 280         u8 padding_b;
 281         u8 comp_min;
 282         u8 comp_max;
 283         u8 trackpad_x;
 284         u8 trackpad_y;
 285 } __packed;
 286
 287 struct iqs626_ch_reg_ulp {
 288         u8 thresh[2];
 289         u8 hyst;
 290         u8 filter;
 291         u8 engine[2];
 292         u8 ati_target;
 293         u8 padding;
 294         __be16 ati_comp;
 295         u8 rx_enable;
 296         u8 tx_enable;
 297 } __packed;
 298
 299 struct iqs626_ch_reg_tp {
 300         u8 thresh;
 301         u8 ati_base;
 302         __be16 ati_comp;
 303 } __packed;
 304
 305 struct iqs626_tp_grp_reg {
 306         u8 hyst;
 307         u8 ati_target;
 308         u8 engine[2];
 309         struct iqs626_ch_reg_tp ch_reg_tp[IQS626_NUM_CH_TP_3];
 310 } __packed;
 311
 312 struct iqs626_ch_reg_gen {
 313         u8 thresh[3];
 314         u8 padding;
 315         u8 hyst;
 316         u8 ati_target;
 317         __be16 ati_comp;
 318         u8 engine[5];
 319         u8 filter;
 320         u8 rx_enable;
 321         u8 tx_enable;
 322         u8 assoc_select;
 323         u8 assoc_weight;
 324 } __packed;
 325
 326 struct iqs626_ch_reg_hall {
 327         u8 engine;
 328         u8 thresh;
 329         u8 hyst;
 330         u8 ati_target;
 331         __be16 ati_comp;
 332 } __packed;
 333
 334 struct iqs626_sys_reg {
 335         __be16 general;
 336         u8 misc_a;
 337         u8 event_mask;
 338         u8 active;
 339         u8 reseed;
 340         u8 rate_np;
 341         u8 rate_lp;
 342         u8 rate_ulp;
 343         u8 timeout_pwr;
 344         u8 timeout_rdy;
 345         u8 timeout_lta;
 346         u8 misc_b;
 347         u8 thresh_swipe;
 348         u8 timeout_tap;
 349         u8 timeout_swipe;
 350         u8 redo_ati;
 351         u8 padding;
 352         struct iqs626_ch_reg_ulp ch_reg_ulp;
 353         struct iqs626_tp_grp_reg tp_grp_reg;
 354         struct iqs626_ch_reg_gen ch_reg_gen[IQS626_NUM_CH_GEN];
 355         struct iqs626_ch_reg_hall ch_reg_hall;
 356 } __packed;
 357
 358 struct iqs626_channel_desc {
 359         const char *name;
 360         int num_ch;
 361         u8 active;
 362         bool events[ARRAY_SIZE(iqs626_events)];
 363 };
 364
 365 static const struct iqs626_channel_desc iqs626_channels[] = {
 366         [IQS626_CH_ULP_0] = {
 367                 .name = "ulp-0",
 368                 .num_ch = 1,
 369                 .active = BIT(0),
 370                 .events = {
 371                         [IQS626_EVENT_PROX_DN] = true,
 372                         [IQS626_EVENT_PROX_UP] = true,
 373                         [IQS626_EVENT_TOUCH_DN] = true,
 374                         [IQS626_EVENT_TOUCH_UP] = true,
 375                 },
 376         },
 377         [IQS626_CH_TP_2] = {
 378                 .name = "trackpad-3x2",
 379                 .num_ch = IQS626_NUM_CH_TP_2,
 380                 .active = BIT(1),
 381                 .events = {
 382                         [IQS626_EVENT_TOUCH_DN] = true,
 383                 },
 384         },
 385         [IQS626_CH_TP_3] = {
 386                 .name = "trackpad-3x3",
 387                 .num_ch = IQS626_NUM_CH_TP_3,
 388                 .active = BIT(2) | BIT(1),
 389                 .events = {
 390                         [IQS626_EVENT_TOUCH_DN] = true,
 391                 },
 392         },
 393         [IQS626_CH_GEN_0] = {
 394                 .name = "generic-0",
 395                 .num_ch = 1,
 396                 .active = BIT(4),
 397                 .events = {
 398                         [IQS626_EVENT_PROX_DN] = true,
 399                         [IQS626_EVENT_PROX_UP] = true,
 400                         [IQS626_EVENT_TOUCH_DN] = true,
 401                         [IQS626_EVENT_TOUCH_UP] = true,
 402                         [IQS626_EVENT_DEEP_DN] = true,
 403                         [IQS626_EVENT_DEEP_UP] = true,
 404                 },
 405         },
 406         [IQS626_CH_GEN_1] = {
 407                 .name = "generic-1",
 408                 .num_ch = 1,
 409                 .active = BIT(5),
 410                 .events = {
 411                         [IQS626_EVENT_PROX_DN] = true,
 412                         [IQS626_EVENT_PROX_UP] = true,
 413                         [IQS626_EVENT_TOUCH_DN] = true,
 414                         [IQS626_EVENT_TOUCH_UP] = true,
 415                         [IQS626_EVENT_DEEP_DN] = true,
 416                         [IQS626_EVENT_DEEP_UP] = true,
 417                 },
 418         },
 419         [IQS626_CH_GEN_2] = {
 420                 .name = "generic-2",
 421                 .num_ch = 1,
 422                 .active = BIT(6),
 423                 .events = {
 424                         [IQS626_EVENT_PROX_DN] = true,
 425                         [IQS626_EVENT_PROX_UP] = true,
 426                         [IQS626_EVENT_TOUCH_DN] = true,
 427                         [IQS626_EVENT_TOUCH_UP] = true,
 428                         [IQS626_EVENT_DEEP_DN] = true,
 429                         [IQS626_EVENT_DEEP_UP] = true,
 430                 },
 431         },
 432         [IQS626_CH_HALL] = {
 433                 .name = "hall",
 434                 .num_ch = 1,
 435                 .active = BIT(7),
 436                 .events = {
 437                         [IQS626_EVENT_TOUCH_DN] = true,
 438                         [IQS626_EVENT_TOUCH_UP] = true,
 439                 },
 440         },
 441 };
 442
 443 struct iqs626_private {
 444         struct i2c_client *client;
 445         struct regmap *regmap;
 446         struct iqs626_sys_reg sys_reg;
 447         struct completion ati_done;
 448         struct input_dev *keypad;
 449         struct input_dev *trackpad;
 450         struct touchscreen_properties prop;
 451         unsigned int kp_type[ARRAY_SIZE(iqs626_channels)]
 452                             [ARRAY_SIZE(iqs626_events)];
 453         unsigned int kp_code[ARRAY_SIZE(iqs626_channels)]
 454                             [ARRAY_SIZE(iqs626_events)];
 455         unsigned int tp_code[IQS626_NUM_GESTURES];
 456         unsigned int suspend_mode;
 457 };
 458
 459 static noinline_for_stack int
 460 iqs626_parse_events(struct iqs626_private *iqs626,
 461                     const struct fwnode_handle *ch_node,
 462                     enum iqs626_ch_id ch_id)
 463 {
 464         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
 465         struct i2c_client *client = iqs626->client;
 466         const struct fwnode_handle *ev_node;
 467         const char *ev_name;
 468         u8 *thresh, *hyst;
 469         unsigned int thresh_tp[IQS626_NUM_CH_TP_3];
 470         unsigned int val;
 471         int num_ch = iqs626_channels[ch_id].num_ch;
 472         int error, i, j;
 473
 474         switch (ch_id) {
 475         case IQS626_CH_ULP_0:
 476                 thresh = sys_reg->ch_reg_ulp.thresh;
 477                 hyst = &sys_reg->ch_reg_ulp.hyst;
 478                 break;
 479
 480         case IQS626_CH_TP_2:
 481         case IQS626_CH_TP_3:
 482                 thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh;
 483                 hyst = &sys_reg->tp_grp_reg.hyst;
 484                 break;
 485
 486         case IQS626_CH_GEN_0:
 487         case IQS626_CH_GEN_1:
 488         case IQS626_CH_GEN_2:
 489                 i = ch_id - IQS626_CH_GEN_0;
 490                 thresh = sys_reg->ch_reg_gen[i].thresh;
 491                 hyst = &sys_reg->ch_reg_gen[i].hyst;
 492                 break;
 493
 494         case IQS626_CH_HALL:
 495                 thresh = &sys_reg->ch_reg_hall.thresh;
 496                 hyst = &sys_reg->ch_reg_hall.hyst;
 497                 break;
 498
 499         default:
 500                 return -EINVAL;
 501         }
 502
 503         for (i = 0; i < ARRAY_SIZE(iqs626_events); i++) {
 504                 if (!iqs626_channels[ch_id].events[i])
 505                         continue;
 506
 507                 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) {
 508                         /*
 509                          * Trackpad touch events are simply described under the
 510                          * trackpad child node.
 511                          */
 512                         ev_node = ch_node;
 513                 } else {
 514                         ev_name = iqs626_events[i].name;
 515                         ev_node = fwnode_get_named_child_node(ch_node, ev_name);
 516                         if (!ev_node)
 517                                 continue;
 518
 519                         if (!fwnode_property_read_u32(ev_node, "linux,code",
 520                                                       &val)) {
 521                                 iqs626->kp_code[ch_id][i] = val;
 522
 523                                 if (fwnode_property_read_u32(ev_node,
 524                                                              "linux,input-type",
 525                                                              &val)) {
 526                                         if (ch_id == IQS626_CH_HALL)
 527                                                 val = EV_SW;
 528                                         else
 529                                                 val = EV_KEY;
 530                                 }
 531
 532                                 if (val != EV_KEY && val != EV_SW) {
 533                                         dev_err(&client->dev,
 534                                                 "Invalid input type: %u\n",
 535                                                 val);
 536                                         return -EINVAL;
 537                                 }
 538
 539                                 iqs626->kp_type[ch_id][i] = val;
 540
 541                                 sys_reg->event_mask &= ~iqs626_events[i].mask;
 542                         }
 543                 }
 544
 545                 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
 546                         if (val > IQS626_CHx_HYST_MAX) {
 547                                 dev_err(&client->dev,
 548                                         "Invalid %s channel hysteresis: %u\n",
 549                                         fwnode_get_name(ch_node), val);
 550                                 return -EINVAL;
 551                         }
 552
 553                         if (i == IQS626_EVENT_DEEP_DN ||
 554                             i == IQS626_EVENT_DEEP_UP) {
 555                                 *hyst &= ~IQS626_CHx_HYST_DEEP_MASK;
 556                                 *hyst |= (val << IQS626_CHx_HYST_DEEP_SHIFT);
 557                         } else if (i == IQS626_EVENT_TOUCH_DN ||
 558                                    i == IQS626_EVENT_TOUCH_UP) {
 559                                 *hyst &= ~IQS626_CHx_HYST_TOUCH_MASK;
 560                                 *hyst |= val;
 561                         }
 562                 }
 563
 564                 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 &&
 565                     !fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
 566                         if (val > IQS626_CHx_THRESH_MAX) {
 567                                 dev_err(&client->dev,
 568                                         "Invalid %s channel threshold: %u\n",
 569                                         fwnode_get_name(ch_node), val);
 570                                 return -EINVAL;
 571                         }
 572
 573                         if (ch_id == IQS626_CH_HALL)
 574                                 *thresh = val;
 575                         else
 576                                 *(thresh + iqs626_events[i].th_offs) = val;
 577
 578                         continue;
 579                 }
 580
 581                 if (!fwnode_property_present(ev_node, "azoteq,thresh"))
 582                         continue;
 583
 584                 error = fwnode_property_read_u32_array(ev_node, "azoteq,thresh",
 585                                                        thresh_tp, num_ch);
 586                 if (error) {
 587                         dev_err(&client->dev,
 588                                 "Failed to read %s channel thresholds: %d\n",
 589                                 fwnode_get_name(ch_node), error);
 590                         return error;
 591                 }
 592
 593                 for (j = 0; j < num_ch; j++) {
 594                         if (thresh_tp[j] > IQS626_CHx_THRESH_MAX) {
 595                                 dev_err(&client->dev,
 596                                         "Invalid %s channel threshold: %u\n",
 597                                         fwnode_get_name(ch_node), thresh_tp[j]);
 598                                 return -EINVAL;
 599                         }
 600
 601                         sys_reg->tp_grp_reg.ch_reg_tp[j].thresh = thresh_tp[j];
 602                 }
 603         }
 604
 605         return 0;
 606 }
 607
 608 static noinline_for_stack int
 609 iqs626_parse_ati_target(struct iqs626_private *iqs626,
 610                         const struct fwnode_handle *ch_node,
 611                         enum iqs626_ch_id ch_id)
 612 {
 613         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
 614         struct i2c_client *client = iqs626->client;
 615         unsigned int ati_base[IQS626_NUM_CH_TP_3];
 616         unsigned int val;
 617         u8 *ati_target;
 618         int num_ch = iqs626_channels[ch_id].num_ch;
 619         int error, i;
 620
 621         switch (ch_id) {
 622         case IQS626_CH_ULP_0:
 623                 ati_target = &sys_reg->ch_reg_ulp.ati_target;
 624                 break;
 625
 626         case IQS626_CH_TP_2:
 627         case IQS626_CH_TP_3:
 628                 ati_target = &sys_reg->tp_grp_reg.ati_target;
 629                 break;
 630
 631         case IQS626_CH_GEN_0:
 632         case IQS626_CH_GEN_1:
 633         case IQS626_CH_GEN_2:
 634                 i = ch_id - IQS626_CH_GEN_0;
 635                 ati_target = &sys_reg->ch_reg_gen[i].ati_target;
 636                 break;
 637
 638         case IQS626_CH_HALL:
 639                 ati_target = &sys_reg->ch_reg_hall.ati_target;
 640                 break;
 641
 642         default:
 643                 return -EINVAL;
 644         }
 645
 646         if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
 647                 if (val > IQS626_CHx_ATI_TARGET_MAX) {
 648                         dev_err(&client->dev,
 649                                 "Invalid %s channel ATI target: %u\n",
 650                                 fwnode_get_name(ch_node), val);
 651                         return -EINVAL;
 652                 }
 653
 654                 *ati_target &= ~IQS626_CHx_ATI_TARGET_MASK;
 655                 *ati_target |= (val / 32);
 656         }
 657
 658         if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 &&
 659             !fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
 660                 switch (val) {
 661                 case 75:
 662                         val = IQS626_CHx_ATI_BASE_75;
 663                         break;
 664
 665                 case 100:
 666                         val = IQS626_CHx_ATI_BASE_100;
 667                         break;
 668
 669                 case 150:
 670                         val = IQS626_CHx_ATI_BASE_150;
 671                         break;
 672
 673                 case 200:
 674                         val = IQS626_CHx_ATI_BASE_200;
 675                         break;
 676
 677                 default:
 678                         dev_err(&client->dev,
 679                                 "Invalid %s channel ATI base: %u\n",
 680                                 fwnode_get_name(ch_node), val);
 681                         return -EINVAL;
 682                 }
 683
 684                 *ati_target &= ~IQS626_CHx_ATI_BASE_MASK;
 685                 *ati_target |= val;
 686
 687                 return 0;
 688         }
 689
 690         if (!fwnode_property_present(ch_node, "azoteq,ati-base"))
 691                 return 0;
 692
 693         error = fwnode_property_read_u32_array(ch_node, "azoteq,ati-base",
 694                                                ati_base, num_ch);
 695         if (error) {
 696                 dev_err(&client->dev,
 697                         "Failed to read %s channel ATI bases: %d\n",
 698                         fwnode_get_name(ch_node), error);
 699                 return error;
 700         }
 701
 702         for (i = 0; i < num_ch; i++) {
 703                 if (ati_base[i] < IQS626_TPx_ATI_BASE_MIN ||
 704                     ati_base[i] > IQS626_TPx_ATI_BASE_MAX) {
 705                         dev_err(&client->dev,
 706                                 "Invalid %s channel ATI base: %u\n",
 707                                 fwnode_get_name(ch_node), ati_base[i]);
 708                         return -EINVAL;
 709                 }
 710
 711                 ati_base[i] -= IQS626_TPx_ATI_BASE_MIN;
 712                 sys_reg->tp_grp_reg.ch_reg_tp[i].ati_base = ati_base[i];
 713         }
 714
 715         return 0;
 716 }
 717
 718 static int iqs626_parse_pins(struct iqs626_private *iqs626,
 719                              const struct fwnode_handle *ch_node,
 720                              const char *propname, u8 *enable)
 721 {
 722         struct i2c_client *client = iqs626->client;
 723         unsigned int val[IQS626_NUM_CRx_TX];
 724         int error, count, i;
 725
 726         if (!fwnode_property_present(ch_node, propname))
 727                 return 0;
 728
 729         count = fwnode_property_count_u32(ch_node, propname);
 730         if (count > IQS626_NUM_CRx_TX) {
 731                 dev_err(&client->dev,
 732                         "Too many %s channel CRX/TX pins present\n",
 733                         fwnode_get_name(ch_node));
 734                 return -EINVAL;
 735         } else if (count < 0) {
 736                 dev_err(&client->dev,
 737                         "Failed to count %s channel CRX/TX pins: %d\n",
 738                         fwnode_get_name(ch_node), count);
 739                 return count;
 740         }
 741
 742         error = fwnode_property_read_u32_array(ch_node, propname, val, count);
 743         if (error) {
 744                 dev_err(&client->dev,
 745                         "Failed to read %s channel CRX/TX pins: %d\n",
 746                         fwnode_get_name(ch_node), error);
 747                 return error;
 748         }
 749
 750         *enable = 0;
 751
 752         for (i = 0; i < count; i++) {
 753                 if (val[i] >= IQS626_NUM_CRx_TX) {
 754                         dev_err(&client->dev,
 755                                 "Invalid %s channel CRX/TX pin: %u\n",
 756                                 fwnode_get_name(ch_node), val[i]);
 757                         return -EINVAL;
 758                 }
 759
 760                 *enable |= BIT(val[i]);
 761         }
 762
 763         return 0;
 764 }
 765
 766 static int iqs626_parse_trackpad(struct iqs626_private *iqs626,
 767                                  const struct fwnode_handle *ch_node)
 768 {
 769         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
 770         struct i2c_client *client = iqs626->client;
 771         u8 *hyst = &sys_reg->tp_grp_reg.hyst;
 772         unsigned int val;
 773         int error, count;
 774
 775         if (!fwnode_property_read_u32(ch_node, "azoteq,lta-update", &val)) {
 776                 if (val > IQS626_MISC_A_TPx_LTA_UPDATE_MAX) {
 777                         dev_err(&client->dev,
 778                                 "Invalid %s channel update rate: %u\n",
 779                                 fwnode_get_name(ch_node), val);
 780                         return -EINVAL;
 781                 }
 782
 783                 sys_reg->misc_a &= ~IQS626_MISC_A_TPx_LTA_UPDATE_MASK;
 784                 sys_reg->misc_a |= (val << IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT);
 785         }
 786
 787         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-trackpad",
 788                                       &val)) {
 789                 if (val > IQS626_FILT_STR_MAX) {
 790                         dev_err(&client->dev,
 791                                 "Invalid %s channel filter strength: %u\n",
 792                                 fwnode_get_name(ch_node), val);
 793                         return -EINVAL;
 794                 }
 795
 796                 sys_reg->misc_b &= ~IQS626_MISC_B_FILT_STR_TPx;
 797                 sys_reg->misc_b |= val;
 798         }
 799
 800         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt",
 801                                       &val)) {
 802                 if (val > IQS626_FILT_STR_MAX) {
 803                         dev_err(&client->dev,
 804                                 "Invalid %s channel filter strength: %u\n",
 805                                 fwnode_get_name(ch_node), val);
 806                         return -EINVAL;
 807                 }
 808
 809                 *hyst &= ~IQS626_FILT_STR_NP_TPx_MASK;
 810                 *hyst |= (val << IQS626_FILT_STR_NP_TPx_SHIFT);
 811         }
 812
 813         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt",
 814                                       &val)) {
 815                 if (val > IQS626_FILT_STR_MAX) {
 816                         dev_err(&client->dev,
 817                                 "Invalid %s channel filter strength: %u\n",
 818                                 fwnode_get_name(ch_node), val);
 819                         return -EINVAL;
 820                 }
 821
 822                 *hyst &= ~IQS626_FILT_STR_LP_TPx_MASK;
 823                 *hyst |= (val << IQS626_FILT_STR_LP_TPx_SHIFT);
 824         }
 825
 826         if (!fwnode_property_present(ch_node, "linux,keycodes"))
 827                 return 0;
 828
 829         count = fwnode_property_count_u32(ch_node, "linux,keycodes");
 830         if (count > IQS626_NUM_GESTURES) {
 831                 dev_err(&client->dev, "Too many keycodes present\n");
 832                 return -EINVAL;
 833         } else if (count < 0) {
 834                 dev_err(&client->dev, "Failed to count keycodes: %d\n", count);
 835                 return count;
 836         }
 837
 838         error = fwnode_property_read_u32_array(ch_node, "linux,keycodes",
 839                                                iqs626->tp_code, count);
 840         if (error) {
 841                 dev_err(&client->dev, "Failed to read keycodes: %d\n", error);
 842                 return error;
 843         }
 844
 845         sys_reg->misc_b &= ~IQS626_MISC_B_TPx_SWIPE;
 846         if (fwnode_property_present(ch_node, "azoteq,gesture-swipe"))
 847                 sys_reg->misc_b |= IQS626_MISC_B_TPx_SWIPE;
 848
 849         if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-tap-ms",
 850                                       &val)) {
 851                 if (val > IQS626_TIMEOUT_TAP_MS_MAX) {
 852                         dev_err(&client->dev,
 853                                 "Invalid %s channel timeout: %u\n",
 854                                 fwnode_get_name(ch_node), val);
 855                         return -EINVAL;
 856                 }
 857
 858                 sys_reg->timeout_tap = val / 16;
 859         }
 860
 861         if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-swipe-ms",
 862                                       &val)) {
 863                 if (val > IQS626_TIMEOUT_SWIPE_MS_MAX) {
 864                         dev_err(&client->dev,
 865                                 "Invalid %s channel timeout: %u\n",
 866                                 fwnode_get_name(ch_node), val);
 867                         return -EINVAL;
 868                 }
 869
 870                 sys_reg->timeout_swipe = val / 16;
 871         }
 872
 873         if (!fwnode_property_read_u32(ch_node, "azoteq,thresh-swipe",
 874                                       &val)) {
 875                 if (val > IQS626_THRESH_SWIPE_MAX) {
 876                         dev_err(&client->dev,
 877                                 "Invalid %s channel threshold: %u\n",
 878                                 fwnode_get_name(ch_node), val);
 879                         return -EINVAL;
 880                 }
 881
 882                 sys_reg->thresh_swipe = val;
 883         }
 884
 885         sys_reg->event_mask &= ~IQS626_EVENT_MASK_GESTURE;
 886
 887         return 0;
 888 }
 889
 890 static noinline_for_stack int
 891 iqs626_parse_channel(struct iqs626_private *iqs626,
 892                      const struct fwnode_handle *ch_node,
 893                      enum iqs626_ch_id ch_id)
 894 {
 895         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
 896         struct i2c_client *client = iqs626->client;
 897         u8 *engine, *filter, *rx_enable, *tx_enable;
 898         u8 *assoc_select, *assoc_weight;
 899         unsigned int val;
 900         int error, i;
 901
 902         switch (ch_id) {
 903         case IQS626_CH_ULP_0:
 904                 engine = sys_reg->ch_reg_ulp.engine;
 905                 break;
 906
 907         case IQS626_CH_TP_2:
 908         case IQS626_CH_TP_3:
 909                 engine = sys_reg->tp_grp_reg.engine;
 910                 break;
 911
 912         case IQS626_CH_GEN_0:
 913         case IQS626_CH_GEN_1:
 914         case IQS626_CH_GEN_2:
 915                 i = ch_id - IQS626_CH_GEN_0;
 916                 engine = sys_reg->ch_reg_gen[i].engine;
 917                 break;
 918
 919         case IQS626_CH_HALL:
 920                 engine = &sys_reg->ch_reg_hall.engine;
 921                 break;
 922
 923         default:
 924                 return -EINVAL;
 925         }
 926
 927         *engine |= IQS626_CHx_ENG_0_MEAS_CAP_SIZE;
 928         if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
 929                 *engine &= ~IQS626_CHx_ENG_0_MEAS_CAP_SIZE;
 930
 931         *engine |= IQS626_CHx_ENG_0_RX_TERM_VSS;
 932         if (!fwnode_property_read_u32(ch_node, "azoteq,rx-inactive", &val)) {
 933                 switch (val) {
 934                 case IQS626_RX_INACTIVE_VSS:
 935                         break;
 936
 937                 case IQS626_RX_INACTIVE_FLOAT:
 938                         *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS;
 939                         if (ch_id == IQS626_CH_GEN_0 ||
 940                             ch_id == IQS626_CH_GEN_1 ||
 941                             ch_id == IQS626_CH_GEN_2)
 942                                 *(engine + 4) &= ~IQS626_CHx_ENG_4_RX_TERM_VREG;
 943                         break;
 944
 945                 case IQS626_RX_INACTIVE_VREG:
 946                         if (ch_id == IQS626_CH_GEN_0 ||
 947                             ch_id == IQS626_CH_GEN_1 ||
 948                             ch_id == IQS626_CH_GEN_2) {
 949                                 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS;
 950                                 *(engine + 4) |= IQS626_CHx_ENG_4_RX_TERM_VREG;
 951                                 break;
 952                         }
 953                         fallthrough;
 954
 955                 default:
 956                         dev_err(&client->dev,
 957                                 "Invalid %s channel CRX pin termination: %u\n",
 958                                 fwnode_get_name(ch_node), val);
 959                         return -EINVAL;
 960                 }
 961         }
 962
 963         *engine &= ~IQS626_CHx_ENG_0_LINEARIZE;
 964         if (fwnode_property_present(ch_node, "azoteq,linearize"))
 965                 *engine |= IQS626_CHx_ENG_0_LINEARIZE;
 966
 967         *engine &= ~IQS626_CHx_ENG_0_DUAL_DIR;
 968         if (fwnode_property_present(ch_node, "azoteq,dual-direction"))
 969                 *engine |= IQS626_CHx_ENG_0_DUAL_DIR;
 970
 971         *engine &= ~IQS626_CHx_ENG_0_FILT_DISABLE;
 972         if (fwnode_property_present(ch_node, "azoteq,filt-disable"))
 973                 *engine |= IQS626_CHx_ENG_0_FILT_DISABLE;
 974
 975         if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
 976                 if (val > IQS626_CHx_ENG_0_ATI_MODE_MAX) {
 977                         dev_err(&client->dev,
 978                                 "Invalid %s channel ATI mode: %u\n",
 979                                 fwnode_get_name(ch_node), val);
 980                         return -EINVAL;
 981                 }
 982
 983                 *engine &= ~IQS626_CHx_ENG_0_ATI_MODE_MASK;
 984                 *engine |= val;
 985         }
 986
 987         if (ch_id == IQS626_CH_HALL)
 988                 return 0;
 989
 990         *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_ENABLE;
 991         if (!fwnode_property_read_u32(ch_node, "azoteq,cct-increase",
 992                                       &val) && val) {
 993                 unsigned int orig_val = val--;
 994
 995                 /*
 996                  * In the case of the generic channels, the charge cycle time
 997                  * field doubles in size and straddles two separate registers.
 998                  */
 999                 if (ch_id == IQS626_CH_GEN_0 ||
1000                     ch_id == IQS626_CH_GEN_1 ||
1001                     ch_id == IQS626_CH_GEN_2) {
1002                         *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_1;
1003                         if (val & BIT(1))
1004                                 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_1;
1005
1006                         *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_0;
1007                         if (val & BIT(0))
1008                                 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_0;
1009
1010                         val >>= 2;
1011                 }
1012
1013                 if (val & ~GENMASK(1, 0)) {
1014                         dev_err(&client->dev,
1015                                 "Invalid %s channel charge cycle time: %u\n",
1016                                 fwnode_get_name(ch_node), orig_val);
1017                         return -EINVAL;
1018                 }
1019
1020                 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_1;
1021                 if (val & BIT(1))
1022                         *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_1;
1023
1024                 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_0;
1025                 if (val & BIT(0))
1026                         *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_0;
1027
1028                 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_ENABLE;
1029         }
1030
1031         if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
1032                 if (val > IQS626_CHx_ENG_1_PROJ_BIAS_MAX) {
1033                         dev_err(&client->dev,
1034                                 "Invalid %s channel bias current: %u\n",
1035                                 fwnode_get_name(ch_node), val);
1036                         return -EINVAL;
1037                 }
1038
1039                 *(engine + 1) &= ~IQS626_CHx_ENG_1_PROJ_BIAS_MASK;
1040                 *(engine + 1) |= (val << IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT);
1041         }
1042
1043         if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
1044                 if (val > IQS626_CHx_ENG_1_SENSE_FREQ_MAX) {
1045                         dev_err(&client->dev,
1046                                 "Invalid %s channel sensing frequency: %u\n",
1047                                 fwnode_get_name(ch_node), val);
1048                         return -EINVAL;
1049                 }
1050
1051                 *(engine + 1) &= ~IQS626_CHx_ENG_1_SENSE_FREQ_MASK;
1052                 *(engine + 1) |= (val << IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT);
1053         }
1054
1055         *(engine + 1) &= ~IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN;
1056         if (fwnode_property_present(ch_node, "azoteq,ati-band-tighten"))
1057                 *(engine + 1) |= IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN;
1058
1059         if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3)
1060                 return iqs626_parse_trackpad(iqs626, ch_node);
1061
1062         if (ch_id == IQS626_CH_ULP_0) {
1063                 sys_reg->ch_reg_ulp.hyst &= ~IQS626_ULP_PROJ_ENABLE;
1064                 if (fwnode_property_present(ch_node, "azoteq,proj-enable"))
1065                         sys_reg->ch_reg_ulp.hyst |= IQS626_ULP_PROJ_ENABLE;
1066
1067                 filter = &sys_reg->ch_reg_ulp.filter;
1068
1069                 rx_enable = &sys_reg->ch_reg_ulp.rx_enable;
1070                 tx_enable = &sys_reg->ch_reg_ulp.tx_enable;
1071         } else {
1072                 i = ch_id - IQS626_CH_GEN_0;
1073                 filter = &sys_reg->ch_reg_gen[i].filter;
1074
1075                 rx_enable = &sys_reg->ch_reg_gen[i].rx_enable;
1076                 tx_enable = &sys_reg->ch_reg_gen[i].tx_enable;
1077         }
1078
1079         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt",
1080                                       &val)) {
1081                 if (val > IQS626_FILT_STR_MAX) {
1082                         dev_err(&client->dev,
1083                                 "Invalid %s channel filter strength: %u\n",
1084                                 fwnode_get_name(ch_node), val);
1085                         return -EINVAL;
1086                 }
1087
1088                 *filter &= ~IQS626_FILT_STR_NP_CNT_MASK;
1089                 *filter |= (val << IQS626_FILT_STR_NP_CNT_SHIFT);
1090         }
1091
1092         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt",
1093                                       &val)) {
1094                 if (val > IQS626_FILT_STR_MAX) {
1095                         dev_err(&client->dev,
1096                                 "Invalid %s channel filter strength: %u\n",
1097                                 fwnode_get_name(ch_node), val);
1098                         return -EINVAL;
1099                 }
1100
1101                 *filter &= ~IQS626_FILT_STR_LP_CNT_MASK;
1102                 *filter |= (val << IQS626_FILT_STR_LP_CNT_SHIFT);
1103         }
1104
1105         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-lta",
1106                                       &val)) {
1107                 if (val > IQS626_FILT_STR_MAX) {
1108                         dev_err(&client->dev,
1109                                 "Invalid %s channel filter strength: %u\n",
1110                                 fwnode_get_name(ch_node), val);
1111                         return -EINVAL;
1112                 }
1113
1114                 *filter &= ~IQS626_FILT_STR_NP_LTA_MASK;
1115                 *filter |= (val << IQS626_FILT_STR_NP_LTA_SHIFT);
1116         }
1117
1118         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-lta",
1119                                       &val)) {
1120                 if (val > IQS626_FILT_STR_MAX) {
1121                         dev_err(&client->dev,
1122                                 "Invalid %s channel filter strength: %u\n",
1123                                 fwnode_get_name(ch_node), val);
1124                         return -EINVAL;
1125                 }
1126
1127                 *filter &= ~IQS626_FILT_STR_LP_LTA_MASK;
1128                 *filter |= val;
1129         }
1130
1131         error = iqs626_parse_pins(iqs626, ch_node, "azoteq,rx-enable",
1132                                   rx_enable);
1133         if (error)
1134                 return error;
1135
1136         error = iqs626_parse_pins(iqs626, ch_node, "azoteq,tx-enable",
1137                                   tx_enable);
1138         if (error)
1139                 return error;
1140
1141         if (ch_id == IQS626_CH_ULP_0)
1142                 return 0;
1143
1144         *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE;
1145         if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size",
1146                                       &val) && val) {
1147                 unsigned int orig_val = val--;
1148
1149                 if (val > IQS626_CHx_ENG_2_LOCAL_CAP_MAX) {
1150                         dev_err(&client->dev,
1151                                 "Invalid %s channel local cap. size: %u\n",
1152                                 fwnode_get_name(ch_node), orig_val);
1153                         return -EINVAL;
1154                 }
1155
1156                 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_MASK;
1157                 *(engine + 2) |= (val << IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT);
1158
1159                 *(engine + 2) |= IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE;
1160         }
1161
1162         if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
1163                 if (val > IQS626_CHx_ENG_2_SENSE_MODE_MAX) {
1164                         dev_err(&client->dev,
1165                                 "Invalid %s channel sensing mode: %u\n",
1166                                 fwnode_get_name(ch_node), val);
1167                         return -EINVAL;
1168                 }
1169
1170                 *(engine + 2) &= ~IQS626_CHx_ENG_2_SENSE_MODE_MASK;
1171                 *(engine + 2) |= val;
1172         }
1173
1174         if (!fwnode_property_read_u32(ch_node, "azoteq,tx-freq", &val)) {
1175                 if (val > IQS626_CHx_ENG_3_TX_FREQ_MAX) {
1176                         dev_err(&client->dev,
1177                                 "Invalid %s channel excitation frequency: %u\n",
1178                                 fwnode_get_name(ch_node), val);
1179                         return -EINVAL;
1180                 }
1181
1182                 *(engine + 3) &= ~IQS626_CHx_ENG_3_TX_FREQ_MASK;
1183                 *(engine + 3) |= (val << IQS626_CHx_ENG_3_TX_FREQ_SHIFT);
1184         }
1185
1186         *(engine + 3) &= ~IQS626_CHx_ENG_3_INV_LOGIC;
1187         if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
1188                 *(engine + 3) |= IQS626_CHx_ENG_3_INV_LOGIC;
1189
1190         *(engine + 4) &= ~IQS626_CHx_ENG_4_COMP_DISABLE;
1191         if (fwnode_property_present(ch_node, "azoteq,comp-disable"))
1192                 *(engine + 4) |= IQS626_CHx_ENG_4_COMP_DISABLE;
1193
1194         *(engine + 4) &= ~IQS626_CHx_ENG_4_STATIC_ENABLE;
1195         if (fwnode_property_present(ch_node, "azoteq,static-enable"))
1196                 *(engine + 4) |= IQS626_CHx_ENG_4_STATIC_ENABLE;
1197
1198         i = ch_id - IQS626_CH_GEN_0;
1199         assoc_select = &sys_reg->ch_reg_gen[i].assoc_select;
1200         assoc_weight = &sys_reg->ch_reg_gen[i].assoc_weight;
1201
1202         *assoc_select = 0;
1203         if (!fwnode_property_present(ch_node, "azoteq,assoc-select"))
1204                 return 0;
1205
1206         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1207                 if (fwnode_property_match_string(ch_node, "azoteq,assoc-select",
1208                                                  iqs626_channels[i].name) < 0)
1209                         continue;
1210
1211                 *assoc_select |= iqs626_channels[i].active;
1212         }
1213
1214         if (fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val))
1215                 return 0;
1216
1217         if (val > IQS626_GEN_WEIGHT_MAX) {
1218                 dev_err(&client->dev,
1219                         "Invalid %s channel associated weight: %u\n",
1220                         fwnode_get_name(ch_node), val);
1221                 return -EINVAL;
1222         }
1223
1224         *assoc_weight = val;
1225
1226         return 0;
1227 }
1228
1229 static int iqs626_parse_prop(struct iqs626_private *iqs626)
1230 {
1231         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1232         struct i2c_client *client = iqs626->client;
1233         struct fwnode_handle *ch_node;
1234         unsigned int val;
1235         int error, i;
1236         u16 general;
1237
1238         if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
1239                                       &val)) {
1240                 if (val > IQS626_SYS_SETTINGS_PWR_MODE_MAX) {
1241                         dev_err(&client->dev, "Invalid suspend mode: %u\n",
1242                                 val);
1243                         return -EINVAL;
1244                 }
1245
1246                 iqs626->suspend_mode = val;
1247         }
1248
1249         error = regmap_raw_read(iqs626->regmap, IQS626_SYS_SETTINGS, sys_reg,
1250                                 sizeof(*sys_reg));
1251         if (error)
1252                 return error;
1253
1254         general = be16_to_cpu(sys_reg->general);
1255         general &= IQS626_SYS_SETTINGS_ULP_UPDATE_MASK;
1256
1257         if (device_property_present(&client->dev, "azoteq,clk-div"))
1258                 general |= IQS626_SYS_SETTINGS_CLK_DIV;
1259
1260         if (device_property_present(&client->dev, "azoteq,ulp-enable"))
1261                 general |= IQS626_SYS_SETTINGS_ULP_AUTO;
1262
1263         if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
1264                                       &val)) {
1265                 if (val > IQS626_SYS_SETTINGS_ULP_UPDATE_MAX) {
1266                         dev_err(&client->dev, "Invalid update rate: %u\n", val);
1267                         return -EINVAL;
1268                 }
1269
1270                 general &= ~IQS626_SYS_SETTINGS_ULP_UPDATE_MASK;
1271                 general |= (val << IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT);
1272         }
1273
1274         sys_reg->misc_a &= ~IQS626_MISC_A_ATI_BAND_DISABLE;
1275         if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
1276                 sys_reg->misc_a |= IQS626_MISC_A_ATI_BAND_DISABLE;
1277
1278         sys_reg->misc_a &= ~IQS626_MISC_A_ATI_LP_ONLY;
1279         if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
1280                 sys_reg->misc_a |= IQS626_MISC_A_ATI_LP_ONLY;
1281
1282         if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
1283                                       &val)) {
1284                 if (val > IQS626_MISC_A_GPIO3_SELECT_MAX) {
1285                         dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
1286                                 val);
1287                         return -EINVAL;
1288                 }
1289
1290                 sys_reg->misc_a &= ~IQS626_MISC_A_GPIO3_SELECT_MASK;
1291                 sys_reg->misc_a |= val;
1292         }
1293
1294         if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
1295                                       &val)) {
1296                 if (val > IQS626_MISC_B_RESEED_UI_SEL_MAX) {
1297                         dev_err(&client->dev, "Invalid reseed selection: %u\n",
1298                                 val);
1299                         return -EINVAL;
1300                 }
1301
1302                 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_UI_SEL_MASK;
1303                 sys_reg->misc_b |= (val << IQS626_MISC_B_RESEED_UI_SEL_SHIFT);
1304         }
1305
1306         sys_reg->misc_b &= ~IQS626_MISC_B_THRESH_EXTEND;
1307         if (device_property_present(&client->dev, "azoteq,thresh-extend"))
1308                 sys_reg->misc_b |= IQS626_MISC_B_THRESH_EXTEND;
1309
1310         sys_reg->misc_b &= ~IQS626_MISC_B_TRACKING_UI_ENABLE;
1311         if (device_property_present(&client->dev, "azoteq,tracking-enable"))
1312                 sys_reg->misc_b |= IQS626_MISC_B_TRACKING_UI_ENABLE;
1313
1314         sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_OFFSET;
1315         if (device_property_present(&client->dev, "azoteq,reseed-offset"))
1316                 sys_reg->misc_b |= IQS626_MISC_B_RESEED_OFFSET;
1317
1318         if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
1319                                       &val)) {
1320                 if (val > IQS626_RATE_NP_MS_MAX) {
1321                         dev_err(&client->dev, "Invalid report rate: %u\n", val);
1322                         return -EINVAL;
1323                 }
1324
1325                 sys_reg->rate_np = val;
1326         }
1327
1328         if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
1329                                       &val)) {
1330                 if (val > IQS626_RATE_LP_MS_MAX) {
1331                         dev_err(&client->dev, "Invalid report rate: %u\n", val);
1332                         return -EINVAL;
1333                 }
1334
1335                 sys_reg->rate_lp = val;
1336         }
1337
1338         if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
1339                                       &val)) {
1340                 if (val > IQS626_RATE_ULP_MS_MAX) {
1341                         dev_err(&client->dev, "Invalid report rate: %u\n", val);
1342                         return -EINVAL;
1343                 }
1344
1345                 sys_reg->rate_ulp = val / 16;
1346         }
1347
1348         if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
1349                                       &val)) {
1350                 if (val > IQS626_TIMEOUT_PWR_MS_MAX) {
1351                         dev_err(&client->dev, "Invalid timeout: %u\n", val);
1352                         return -EINVAL;
1353                 }
1354
1355                 sys_reg->timeout_pwr = val / 512;
1356         }
1357
1358         if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
1359                                       &val)) {
1360                 if (val > IQS626_TIMEOUT_LTA_MS_MAX) {
1361                         dev_err(&client->dev, "Invalid timeout: %u\n", val);
1362                         return -EINVAL;
1363                 }
1364
1365                 sys_reg->timeout_lta = val / 512;
1366         }
1367
1368         sys_reg->event_mask = ~((u8)IQS626_EVENT_MASK_SYS);
1369         sys_reg->redo_ati = 0;
1370
1371         sys_reg->reseed = 0;
1372         sys_reg->active = 0;
1373
1374         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1375                 ch_node = device_get_named_child_node(&client->dev,
1376                                                       iqs626_channels[i].name);
1377                 if (!ch_node)
1378                         continue;
1379
1380                 error = iqs626_parse_channel(iqs626, ch_node, i);
1381                 if (error)
1382                         return error;
1383
1384                 error = iqs626_parse_ati_target(iqs626, ch_node, i);
1385                 if (error)
1386                         return error;
1387
1388                 error = iqs626_parse_events(iqs626, ch_node, i);
1389                 if (error)
1390                         return error;
1391
1392                 if (!fwnode_property_present(ch_node, "azoteq,ati-exclude"))
1393                         sys_reg->redo_ati |= iqs626_channels[i].active;
1394
1395                 if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
1396                         sys_reg->reseed |= iqs626_channels[i].active;
1397
1398                 sys_reg->active |= iqs626_channels[i].active;
1399         }
1400
1401         general |= IQS626_SYS_SETTINGS_EVENT_MODE;
1402
1403         /*
1404          * Enable streaming during normal-power mode if the trackpad is used to
1405          * report raw coordinates instead of gestures. In that case, the device
1406          * returns to event mode during low-power mode.
1407          */
1408         if (sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active &&
1409             sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE)
1410                 general |= IQS626_SYS_SETTINGS_EVENT_MODE_LP;
1411
1412         general |= IQS626_SYS_SETTINGS_REDO_ATI;
1413         general |= IQS626_SYS_SETTINGS_ACK_RESET;
1414
1415         sys_reg->general = cpu_to_be16(general);
1416
1417         error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS,
1418                                  &iqs626->sys_reg, sizeof(iqs626->sys_reg));
1419         if (error)
1420                 return error;
1421
1422         iqs626_irq_wait();
1423
1424         return 0;
1425 }
1426
1427 static int iqs626_input_init(struct iqs626_private *iqs626)
1428 {
1429         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1430         struct i2c_client *client = iqs626->client;
1431         int error, i, j;
1432
1433         iqs626->keypad = devm_input_allocate_device(&client->dev);
1434         if (!iqs626->keypad)
1435                 return -ENOMEM;
1436
1437         iqs626->keypad->keycodemax = ARRAY_SIZE(iqs626->kp_code);
1438         iqs626->keypad->keycode = iqs626->kp_code;
1439         iqs626->keypad->keycodesize = sizeof(**iqs626->kp_code);
1440
1441         iqs626->keypad->name = "iqs626a_keypad";
1442         iqs626->keypad->id.bustype = BUS_I2C;
1443
1444         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1445                 if (!(sys_reg->active & iqs626_channels[i].active))
1446                         continue;
1447
1448                 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) {
1449                         if (!iqs626->kp_type[i][j])
1450                                 continue;
1451
1452                         input_set_capability(iqs626->keypad,
1453                                              iqs626->kp_type[i][j],
1454                                              iqs626->kp_code[i][j]);
1455                 }
1456         }
1457
1458         if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active))
1459                 return 0;
1460
1461         iqs626->trackpad = devm_input_allocate_device(&client->dev);
1462         if (!iqs626->trackpad)
1463                 return -ENOMEM;
1464
1465         iqs626->trackpad->keycodemax = ARRAY_SIZE(iqs626->tp_code);
1466         iqs626->trackpad->keycode = iqs626->tp_code;
1467         iqs626->trackpad->keycodesize = sizeof(*iqs626->tp_code);
1468
1469         iqs626->trackpad->name = "iqs626a_trackpad";
1470         iqs626->trackpad->id.bustype = BUS_I2C;
1471
1472         /*
1473          * Present the trackpad as a traditional pointing device if no gestures
1474          * have been mapped to a keycode.
1475          */
1476         if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) {
1477                 u8 tp_mask = iqs626_channels[IQS626_CH_TP_3].active;
1478
1479                 input_set_capability(iqs626->trackpad, EV_KEY, BTN_TOUCH);
1480                 input_set_abs_params(iqs626->trackpad, ABS_Y, 0, 255, 0, 0);
1481
1482                 if ((sys_reg->active & tp_mask) == tp_mask)
1483                         input_set_abs_params(iqs626->trackpad,
1484                                              ABS_X, 0, 255, 0, 0);
1485                 else
1486                         input_set_abs_params(iqs626->trackpad,
1487                                              ABS_X, 0, 128, 0, 0);
1488
1489                 touchscreen_parse_properties(iqs626->trackpad, false,
1490                                              &iqs626->prop);
1491         } else {
1492                 for (i = 0; i < IQS626_NUM_GESTURES; i++)
1493                         if (iqs626->tp_code[i] != KEY_RESERVED)
1494                                 input_set_capability(iqs626->trackpad, EV_KEY,
1495                                                      iqs626->tp_code[i]);
1496         }
1497
1498         error = input_register_device(iqs626->trackpad);
1499         if (error)
1500                 dev_err(&client->dev, "Failed to register trackpad: %d\n",
1501                         error);
1502
1503         return error;
1504 }
1505
1506 static int iqs626_report(struct iqs626_private *iqs626)
1507 {
1508         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1509         struct i2c_client *client = iqs626->client;
1510         struct iqs626_flags flags;
1511         __le16 hall_output;
1512         int error, i, j;
1513         u8 state;
1514         u8 *dir_mask = &flags.states[IQS626_ST_OFFS_DIR];
1515
1516         error = regmap_raw_read(iqs626->regmap, IQS626_SYS_FLAGS, &flags,
1517                                 sizeof(flags));
1518         if (error) {
1519                 dev_err(&client->dev, "Failed to read device status: %d\n",
1520                         error);
1521                 return error;
1522         }
1523
1524         /*
1525          * The device resets itself if its own watchdog bites, which can happen
1526          * in the event of an I2C communication error. In this case, the device
1527          * asserts a SHOW_RESET interrupt and all registers must be restored.
1528          */
1529         if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_SHOW_RESET) {
1530                 dev_err(&client->dev, "Unexpected device reset\n");
1531
1532                 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS,
1533                                          sys_reg, sizeof(*sys_reg));
1534                 if (error)
1535                         dev_err(&client->dev,
1536                                 "Failed to re-initialize device: %d\n", error);
1537
1538                 return error;
1539         }
1540
1541         if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_IN_ATI)
1542                 return 0;
1543
1544         /*
1545          * Unlike the ULP or generic channels, the Hall channel does not have a
1546          * direction flag. Instead, the direction (i.e. magnet polarity) can be
1547          * derived based on the sign of the 2's complement differential output.
1548          */
1549         if (sys_reg->active & iqs626_channels[IQS626_CH_HALL].active) {
1550                 error = regmap_raw_read(iqs626->regmap, IQS626_HALL_OUTPUT,
1551                                         &hall_output, sizeof(hall_output));
1552                 if (error) {
1553                         dev_err(&client->dev,
1554                                 "Failed to read Hall output: %d\n", error);
1555                         return error;
1556                 }
1557
1558                 *dir_mask &= ~iqs626_channels[IQS626_CH_HALL].active;
1559                 if (le16_to_cpu(hall_output) < 0x8000)
1560                         *dir_mask |= iqs626_channels[IQS626_CH_HALL].active;
1561         }
1562
1563         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1564                 if (!(sys_reg->active & iqs626_channels[i].active))
1565                         continue;
1566
1567                 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) {
1568                         if (!iqs626->kp_type[i][j])
1569                                 continue;
1570
1571                         state = flags.states[iqs626_events[j].st_offs];
1572                         state &= iqs626_events[j].dir_up ? *dir_mask
1573                                                          : ~(*dir_mask);
1574                         state &= iqs626_channels[i].active;
1575
1576                         input_event(iqs626->keypad, iqs626->kp_type[i][j],
1577                                     iqs626->kp_code[i][j], !!state);
1578                 }
1579         }
1580
1581         input_sync(iqs626->keypad);
1582
1583         /*
1584          * The following completion signals that ATI has finished, any initial
1585          * switch states have been reported and the keypad can be registered.
1586          */
1587         complete_all(&iqs626->ati_done);
1588
1589         if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active))
1590                 return 0;
1591
1592         if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) {
1593                 state = flags.states[IQS626_ST_OFFS_TOUCH];
1594                 state &= iqs626_channels[IQS626_CH_TP_2].active;
1595
1596                 input_report_key(iqs626->trackpad, BTN_TOUCH, state);
1597
1598                 if (state)
1599                         touchscreen_report_pos(iqs626->trackpad, &iqs626->prop,
1600                                                flags.trackpad_x,
1601                                                flags.trackpad_y, false);
1602         } else {
1603                 for (i = 0; i < IQS626_NUM_GESTURES; i++)
1604                         input_report_key(iqs626->trackpad, iqs626->tp_code[i],
1605                                          flags.gesture & BIT(i));
1606
1607                 if (flags.gesture & GENMASK(IQS626_GESTURE_TAP, 0)) {
1608                         input_sync(iqs626->trackpad);
1609
1610                         /*
1611                          * Momentary gestures are followed by a complementary
1612                          * release cycle so as to emulate a full keystroke.
1613                          */
1614                         for (i = 0; i < IQS626_GESTURE_HOLD; i++)
1615                                 input_report_key(iqs626->trackpad,
1616                                                  iqs626->tp_code[i], 0);
1617                 }
1618         }
1619
1620         input_sync(iqs626->trackpad);
1621
1622         return 0;
1623 }
1624
1625 static irqreturn_t iqs626_irq(int irq, void *context)
1626 {
1627         struct iqs626_private *iqs626 = context;
1628
1629         if (iqs626_report(iqs626))
1630                 return IRQ_NONE;
1631
1632         /*
1633          * The device does not deassert its interrupt (RDY) pin until shortly
1634          * after receiving an I2C stop condition; the following delay ensures
1635          * the interrupt handler does not return before this time.
1636          */
1637         iqs626_irq_wait();
1638
1639         return IRQ_HANDLED;
1640 }
1641
1642 static const struct regmap_config iqs626_regmap_config = {
1643         .reg_bits = 8,
1644         .val_bits = 16,
1645         .max_register = IQS626_MAX_REG,
1646 };
1647
1648 static int iqs626_probe(struct i2c_client *client)
1649 {
1650         struct iqs626_ver_info ver_info;
1651         struct iqs626_private *iqs626;
1652         int error;
1653
1654         iqs626 = devm_kzalloc(&client->dev, sizeof(*iqs626), GFP_KERNEL);
1655         if (!iqs626)
1656                 return -ENOMEM;
1657
1658         i2c_set_clientdata(client, iqs626);
1659         iqs626->client = client;
1660
1661         iqs626->regmap = devm_regmap_init_i2c(client, &iqs626_regmap_config);
1662         if (IS_ERR(iqs626->regmap)) {
1663                 error = PTR_ERR(iqs626->regmap);
1664                 dev_err(&client->dev, "Failed to initialize register map: %d\n",
1665                         error);
1666                 return error;
1667         }
1668
1669         init_completion(&iqs626->ati_done);
1670
1671         error = regmap_raw_read(iqs626->regmap, IQS626_VER_INFO, &ver_info,
1672                                 sizeof(ver_info));
1673         if (error)
1674                 return error;
1675
1676         if (ver_info.prod_num != IQS626_VER_INFO_PROD_NUM) {
1677                 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
1678                         ver_info.prod_num);
1679                 return -EINVAL;
1680         }
1681
1682         error = iqs626_parse_prop(iqs626);
1683         if (error)
1684                 return error;
1685
1686         error = iqs626_input_init(iqs626);
1687         if (error)
1688                 return error;
1689
1690         error = devm_request_threaded_irq(&client->dev, client->irq,
1691                                           NULL, iqs626_irq, IRQF_ONESHOT,
1692                                           client->name, iqs626);
1693         if (error) {
1694                 dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
1695                 return error;
1696         }
1697
1698         if (!wait_for_completion_timeout(&iqs626->ati_done,
1699                                          msecs_to_jiffies(2000))) {
1700                 dev_err(&client->dev, "Failed to complete ATI\n");
1701                 return -ETIMEDOUT;
1702         }
1703
1704         /*
1705          * The keypad may include one or more switches and is not registered
1706          * until ATI is complete and the initial switch states are read.
1707          */
1708         error = input_register_device(iqs626->keypad);
1709         if (error)
1710                 dev_err(&client->dev, "Failed to register keypad: %d\n", error);
1711
1712         return error;
1713 }
1714
1715 static int __maybe_unused iqs626_suspend(struct device *dev)
1716 {
1717         struct iqs626_private *iqs626 = dev_get_drvdata(dev);
1718         struct i2c_client *client = iqs626->client;
1719         unsigned int val;
1720         int error;
1721
1722         if (!iqs626->suspend_mode)
1723                 return 0;
1724
1725         disable_irq(client->irq);
1726
1727         /*
1728          * Automatic power mode switching must be disabled before the device is
1729          * forced into any particular power mode. In this case, the device will
1730          * transition into normal-power mode.
1731          */
1732         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1733                                    IQS626_SYS_SETTINGS_DIS_AUTO, ~0);
1734         if (error)
1735                 goto err_irq;
1736
1737         /*
1738          * The following check ensures the device has completed its transition
1739          * into normal-power mode before a manual mode switch is performed.
1740          */
1741         error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1742                                         !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK),
1743                                          IQS626_PWR_MODE_POLL_SLEEP_US,
1744                                          IQS626_PWR_MODE_POLL_TIMEOUT_US);
1745         if (error)
1746                 goto err_irq;
1747
1748         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1749                                    IQS626_SYS_SETTINGS_PWR_MODE_MASK,
1750                                    iqs626->suspend_mode <<
1751                                    IQS626_SYS_SETTINGS_PWR_MODE_SHIFT);
1752         if (error)
1753                 goto err_irq;
1754
1755         /*
1756          * This last check ensures the device has completed its transition into
1757          * the desired power mode to prevent any spurious interrupts from being
1758          * triggered after iqs626_suspend has already returned.
1759          */
1760         error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1761                                          (val & IQS626_SYS_FLAGS_PWR_MODE_MASK)
1762                                          == (iqs626->suspend_mode <<
1763                                              IQS626_SYS_FLAGS_PWR_MODE_SHIFT),
1764                                          IQS626_PWR_MODE_POLL_SLEEP_US,
1765                                          IQS626_PWR_MODE_POLL_TIMEOUT_US);
1766
1767 err_irq:
1768         iqs626_irq_wait();
1769         enable_irq(client->irq);
1770
1771         return error;
1772 }
1773
1774 static int __maybe_unused iqs626_resume(struct device *dev)
1775 {
1776         struct iqs626_private *iqs626 = dev_get_drvdata(dev);
1777         struct i2c_client *client = iqs626->client;
1778         unsigned int val;
1779         int error;
1780
1781         if (!iqs626->suspend_mode)
1782                 return 0;
1783
1784         disable_irq(client->irq);
1785
1786         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1787                                    IQS626_SYS_SETTINGS_PWR_MODE_MASK, 0);
1788         if (error)
1789                 goto err_irq;
1790
1791         /*
1792          * This check ensures the device has returned to normal-power mode
1793          * before automatic power mode switching is re-enabled.
1794          */
1795         error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1796                                         !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK),
1797                                          IQS626_PWR_MODE_POLL_SLEEP_US,
1798                                          IQS626_PWR_MODE_POLL_TIMEOUT_US);
1799         if (error)
1800                 goto err_irq;
1801
1802         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1803                                    IQS626_SYS_SETTINGS_DIS_AUTO, 0);
1804         if (error)
1805                 goto err_irq;
1806
1807         /*
1808          * This step reports any events that may have been "swallowed" as a
1809          * result of polling PWR_MODE (which automatically acknowledges any
1810          * pending interrupts).
1811          */
1812         error = iqs626_report(iqs626);
1813
1814 err_irq:
1815         iqs626_irq_wait();
1816         enable_irq(client->irq);
1817
1818         return error;
1819 }
1820
1821 static SIMPLE_DEV_PM_OPS(iqs626_pm, iqs626_suspend, iqs626_resume);
1822
1823 static const struct of_device_id iqs626_of_match[] = {
1824         { .compatible = "azoteq,iqs626a" },
1825         { }
1826 };
1827 MODULE_DEVICE_TABLE(of, iqs626_of_match);
1828
1829 static struct i2c_driver iqs626_i2c_driver = {
1830         .driver = {
1831                 .name = "iqs626a",
1832                 .of_match_table = iqs626_of_match,
1833                 .pm = &iqs626_pm,
1834         },
1835         .probe_new = iqs626_probe,
1836 };
1837 module_i2c_driver(iqs626_i2c_driver);
1838
1839 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
1840 MODULE_DESCRIPTION("Azoteq IQS626A Capacitive Touch Controller");
1841 MODULE_LICENSE("GPL");