2 * Copyright (c) 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2013 Cisco Systems. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/dma-mapping.h>
37 #include <linux/sched/signal.h>
38 #include <linux/sched/mm.h>
39 #include <linux/hugetlb.h>
40 #include <linux/iommu.h>
41 #include <linux/workqueue.h>
42 #include <linux/list.h>
43 #include <linux/pci.h>
44 #include <rdma/ib_verbs.h>
46 #include "usnic_log.h"
47 #include "usnic_uiom.h"
48 #include "usnic_uiom_interval_tree.h"
50 #define USNIC_UIOM_PAGE_CHUNK \
51 ((PAGE_SIZE - offsetof(struct usnic_uiom_chunk, page_list)) /\
52 ((void *) &((struct usnic_uiom_chunk *) 0)->page_list[1] - \
53 (void *) &((struct usnic_uiom_chunk *) 0)->page_list[0]))
55 static int usnic_uiom_dma_fault(struct iommu_domain *domain,
57 unsigned long iova, int flags,
60 usnic_err("Device %s iommu fault domain 0x%pK va 0x%lx flags 0x%x\n",
66 static void usnic_uiom_put_pages(struct list_head *chunk_list, int dirty)
68 struct usnic_uiom_chunk *chunk, *tmp;
70 struct scatterlist *sg;
74 list_for_each_entry_safe(chunk, tmp, chunk_list, list) {
75 for_each_sg(chunk->page_list, sg, chunk->nents, i) {
78 if (!PageDirty(page) && dirty)
79 set_page_dirty_lock(page);
81 usnic_dbg("pa: %pa\n", &pa);
87 static int usnic_uiom_get_pages(unsigned long addr, size_t size, int writable,
88 int dmasync, struct usnic_uiom_reg *uiomr)
90 struct list_head *chunk_list = &uiomr->chunk_list;
91 struct page **page_list;
92 struct scatterlist *sg;
93 struct usnic_uiom_chunk *chunk;
95 unsigned long lock_limit;
96 unsigned long cur_base;
103 unsigned int gup_flags;
104 struct mm_struct *mm;
107 * If the combination of the addr and size requested for this memory
108 * region causes an integer overflow, return error.
110 if (((addr + size) < addr) || PAGE_ALIGN(addr + size) < (addr + size))
119 INIT_LIST_HEAD(chunk_list);
121 page_list = (struct page **) __get_free_page(GFP_KERNEL);
125 npages = PAGE_ALIGN(size + (addr & ~PAGE_MASK)) >> PAGE_SHIFT;
127 uiomr->owning_mm = mm = current->mm;
128 down_read(&mm->mmap_sem);
130 locked = atomic64_add_return(npages, ¤t->mm->pinned_vm);
131 lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
133 if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) {
138 flags = IOMMU_READ | IOMMU_CACHE;
139 flags |= (writable) ? IOMMU_WRITE : 0;
140 gup_flags = FOLL_WRITE;
141 gup_flags |= (writable) ? 0 : FOLL_FORCE;
142 cur_base = addr & PAGE_MASK;
146 ret = get_user_pages_longterm(cur_base,
147 min_t(unsigned long, npages,
148 PAGE_SIZE / sizeof(struct page *)),
149 gup_flags, page_list, NULL);
158 chunk = kmalloc(struct_size(chunk, page_list,
159 min_t(int, ret, USNIC_UIOM_PAGE_CHUNK)),
166 chunk->nents = min_t(int, ret, USNIC_UIOM_PAGE_CHUNK);
167 sg_init_table(chunk->page_list, chunk->nents);
168 for_each_sg(chunk->page_list, sg, chunk->nents, i) {
169 sg_set_page(sg, page_list[i + off],
172 usnic_dbg("va: 0x%lx pa: %pa\n",
173 cur_base + i*PAGE_SIZE, &pa);
175 cur_base += chunk->nents * PAGE_SIZE;
178 list_add_tail(&chunk->list, chunk_list);
186 usnic_uiom_put_pages(chunk_list, 0);
187 atomic64_sub(npages, ¤t->mm->pinned_vm);
189 mmgrab(uiomr->owning_mm);
191 up_read(&mm->mmap_sem);
192 free_page((unsigned long) page_list);
196 static void usnic_uiom_unmap_sorted_intervals(struct list_head *intervals,
197 struct usnic_uiom_pd *pd)
199 struct usnic_uiom_interval_node *interval, *tmp;
200 long unsigned va, size;
202 list_for_each_entry_safe(interval, tmp, intervals, link) {
203 va = interval->start << PAGE_SHIFT;
204 size = ((interval->last - interval->start) + 1) << PAGE_SHIFT;
206 /* Workaround for RH 970401 */
207 usnic_dbg("va 0x%lx size 0x%lx", va, PAGE_SIZE);
208 iommu_unmap(pd->domain, va, PAGE_SIZE);
215 static void __usnic_uiom_reg_release(struct usnic_uiom_pd *pd,
216 struct usnic_uiom_reg *uiomr,
220 unsigned long vpn_start, vpn_last;
221 struct usnic_uiom_interval_node *interval, *tmp;
223 LIST_HEAD(rm_intervals);
225 npages = PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
226 vpn_start = (uiomr->va & PAGE_MASK) >> PAGE_SHIFT;
227 vpn_last = vpn_start + npages - 1;
229 spin_lock(&pd->lock);
230 usnic_uiom_remove_interval(&pd->root, vpn_start,
231 vpn_last, &rm_intervals);
232 usnic_uiom_unmap_sorted_intervals(&rm_intervals, pd);
234 list_for_each_entry_safe(interval, tmp, &rm_intervals, link) {
235 if (interval->flags & IOMMU_WRITE)
237 list_del(&interval->link);
241 usnic_uiom_put_pages(&uiomr->chunk_list, dirty & writable);
242 spin_unlock(&pd->lock);
245 static int usnic_uiom_map_sorted_intervals(struct list_head *intervals,
246 struct usnic_uiom_reg *uiomr)
250 struct usnic_uiom_chunk *chunk;
251 struct usnic_uiom_interval_node *interval_node;
253 dma_addr_t pa_start = 0;
254 dma_addr_t pa_end = 0;
255 long int va_start = -EINVAL;
256 struct usnic_uiom_pd *pd = uiomr->pd;
257 long int va = uiomr->va & PAGE_MASK;
258 int flags = IOMMU_READ | IOMMU_CACHE;
260 flags |= (uiomr->writable) ? IOMMU_WRITE : 0;
261 chunk = list_first_entry(&uiomr->chunk_list, struct usnic_uiom_chunk,
263 list_for_each_entry(interval_node, intervals, link) {
265 for (i = 0; i < chunk->nents; i++, va += PAGE_SIZE) {
266 pa = sg_phys(&chunk->page_list[i]);
267 if ((va >> PAGE_SHIFT) < interval_node->start)
270 if ((va >> PAGE_SHIFT) == interval_node->start) {
271 /* First page of the interval */
277 WARN_ON(va_start == -EINVAL);
279 if ((pa_end + PAGE_SIZE != pa) &&
281 /* PAs are not contiguous */
282 size = pa_end - pa_start + PAGE_SIZE;
283 usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x",
284 va_start, &pa_start, size, flags);
285 err = iommu_map(pd->domain, va_start, pa_start,
288 usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
289 va_start, &pa_start, size, err);
297 if ((va >> PAGE_SHIFT) == interval_node->last) {
298 /* Last page of the interval */
299 size = pa - pa_start + PAGE_SIZE;
300 usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x\n",
301 va_start, &pa_start, size, flags);
302 err = iommu_map(pd->domain, va_start, pa_start,
305 usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
306 va_start, &pa_start, size, err);
316 if (i == chunk->nents) {
318 * Hit last entry of the chunk,
319 * hence advance to next chunk
321 chunk = list_first_entry(&chunk->list,
322 struct usnic_uiom_chunk,
331 usnic_uiom_unmap_sorted_intervals(intervals, pd);
335 struct usnic_uiom_reg *usnic_uiom_reg_get(struct usnic_uiom_pd *pd,
336 unsigned long addr, size_t size,
337 int writable, int dmasync)
339 struct usnic_uiom_reg *uiomr;
340 unsigned long va_base, vpn_start, vpn_last;
341 unsigned long npages;
343 LIST_HEAD(sorted_diff_intervals);
346 * Intel IOMMU map throws an error if a translation entry is
347 * changed from read to write. This module may not unmap
348 * and then remap the entry after fixing the permission
349 * b/c this open up a small windows where hw DMA may page fault
350 * Hence, make all entries to be writable.
354 va_base = addr & PAGE_MASK;
355 offset = addr & ~PAGE_MASK;
356 npages = PAGE_ALIGN(size + offset) >> PAGE_SHIFT;
357 vpn_start = (addr & PAGE_MASK) >> PAGE_SHIFT;
358 vpn_last = vpn_start + npages - 1;
360 uiomr = kmalloc(sizeof(*uiomr), GFP_KERNEL);
362 return ERR_PTR(-ENOMEM);
365 uiomr->offset = offset;
366 uiomr->length = size;
367 uiomr->writable = writable;
370 err = usnic_uiom_get_pages(addr, size, writable, dmasync,
373 usnic_err("Failed get_pages vpn [0x%lx,0x%lx] err %d\n",
374 vpn_start, vpn_last, err);
378 spin_lock(&pd->lock);
379 err = usnic_uiom_get_intervals_diff(vpn_start, vpn_last,
380 (writable) ? IOMMU_WRITE : 0,
383 &sorted_diff_intervals);
385 usnic_err("Failed disjoint interval vpn [0x%lx,0x%lx] err %d\n",
386 vpn_start, vpn_last, err);
390 err = usnic_uiom_map_sorted_intervals(&sorted_diff_intervals, uiomr);
392 usnic_err("Failed map interval vpn [0x%lx,0x%lx] err %d\n",
393 vpn_start, vpn_last, err);
394 goto out_put_intervals;
398 err = usnic_uiom_insert_interval(&pd->root, vpn_start, vpn_last,
399 (writable) ? IOMMU_WRITE : 0);
401 usnic_err("Failed insert interval vpn [0x%lx,0x%lx] err %d\n",
402 vpn_start, vpn_last, err);
403 goto out_unmap_intervals;
406 usnic_uiom_put_interval_set(&sorted_diff_intervals);
407 spin_unlock(&pd->lock);
412 usnic_uiom_unmap_sorted_intervals(&sorted_diff_intervals, pd);
414 usnic_uiom_put_interval_set(&sorted_diff_intervals);
416 usnic_uiom_put_pages(&uiomr->chunk_list, 0);
417 spin_unlock(&pd->lock);
418 mmdrop(uiomr->owning_mm);
424 static void __usnic_uiom_release_tail(struct usnic_uiom_reg *uiomr)
426 mmdrop(uiomr->owning_mm);
430 static inline size_t usnic_uiom_num_pages(struct usnic_uiom_reg *uiomr)
432 return PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
435 void usnic_uiom_reg_release(struct usnic_uiom_reg *uiomr)
437 __usnic_uiom_reg_release(uiomr->pd, uiomr, 1);
439 atomic64_sub(usnic_uiom_num_pages(uiomr), &uiomr->owning_mm->pinned_vm);
440 __usnic_uiom_release_tail(uiomr);
443 struct usnic_uiom_pd *usnic_uiom_alloc_pd(void)
445 struct usnic_uiom_pd *pd;
448 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
450 return ERR_PTR(-ENOMEM);
452 pd->domain = domain = iommu_domain_alloc(&pci_bus_type);
454 usnic_err("Failed to allocate IOMMU domain");
456 return ERR_PTR(-ENOMEM);
459 iommu_set_fault_handler(pd->domain, usnic_uiom_dma_fault, NULL);
461 spin_lock_init(&pd->lock);
462 INIT_LIST_HEAD(&pd->devs);
467 void usnic_uiom_dealloc_pd(struct usnic_uiom_pd *pd)
469 iommu_domain_free(pd->domain);
473 int usnic_uiom_attach_dev_to_pd(struct usnic_uiom_pd *pd, struct device *dev)
475 struct usnic_uiom_dev *uiom_dev;
478 uiom_dev = kzalloc(sizeof(*uiom_dev), GFP_ATOMIC);
483 err = iommu_attach_device(pd->domain, dev);
487 if (!iommu_capable(dev->bus, IOMMU_CAP_CACHE_COHERENCY)) {
488 usnic_err("IOMMU of %s does not support cache coherency\n",
491 goto out_detach_device;
494 spin_lock(&pd->lock);
495 list_add_tail(&uiom_dev->link, &pd->devs);
497 spin_unlock(&pd->lock);
502 iommu_detach_device(pd->domain, dev);
508 void usnic_uiom_detach_dev_from_pd(struct usnic_uiom_pd *pd, struct device *dev)
510 struct usnic_uiom_dev *uiom_dev;
513 spin_lock(&pd->lock);
514 list_for_each_entry(uiom_dev, &pd->devs, link) {
515 if (uiom_dev->dev == dev) {
522 usnic_err("Unable to free dev %s - not found\n",
524 spin_unlock(&pd->lock);
528 list_del(&uiom_dev->link);
530 spin_unlock(&pd->lock);
532 return iommu_detach_device(pd->domain, dev);
535 struct device **usnic_uiom_get_dev_list(struct usnic_uiom_pd *pd)
537 struct usnic_uiom_dev *uiom_dev;
538 struct device **devs;
541 spin_lock(&pd->lock);
542 devs = kcalloc(pd->dev_cnt + 1, sizeof(*devs), GFP_ATOMIC);
544 devs = ERR_PTR(-ENOMEM);
548 list_for_each_entry(uiom_dev, &pd->devs, link) {
549 devs[i++] = uiom_dev->dev;
552 spin_unlock(&pd->lock);
556 void usnic_uiom_free_dev_list(struct device **devs)
561 int usnic_uiom_init(char *drv_name)
563 if (!iommu_present(&pci_bus_type)) {
564 usnic_err("IOMMU required but not present or enabled. USNIC QPs will not function w/o enabling IOMMU\n");