drivers/infiniband/hw/qib/qib_init.c

   1 /*
   2  * Copyright (c) 2012, 2013 Intel Corporation.  All rights reserved.
   3  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
   4  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34
  35 #include <linux/pci.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/delay.h>
  39 #include <linux/idr.h>
  40 #include <linux/module.h>
  41 #include <linux/printk.h>
  42 #ifdef CONFIG_INFINIBAND_QIB_DCA
  43 #include <linux/dca.h>
  44 #endif
  45 #include <rdma/rdma_vt.h>
  46
  47 #include "qib.h"
  48 #include "qib_common.h"
  49 #include "qib_mad.h"
  50 #ifdef CONFIG_DEBUG_FS
  51 #include "qib_debugfs.h"
  52 #include "qib_verbs.h"
  53 #endif
  54
  55 #undef pr_fmt
  56 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
  57
  58 /*
  59  * min buffers we want to have per context, after driver
  60  */
  61 #define QIB_MIN_USER_CTXT_BUFCNT 7
  62
  63 #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF
  64 #define QLOGIC_IB_R_SOFTWARE_SHIFT 24
  65 #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62)
  66
  67 /*
  68  * Number of ctxts we are configured to use (to allow for more pio
  69  * buffers per ctxt, etc.)  Zero means use chip value.
  70  */
  71 ushort qib_cfgctxts;
  72 module_param_named(cfgctxts, qib_cfgctxts, ushort, S_IRUGO);
  73 MODULE_PARM_DESC(cfgctxts, "Set max number of contexts to use");
  74
  75 unsigned qib_numa_aware;
  76 module_param_named(numa_aware, qib_numa_aware, uint, S_IRUGO);
  77 MODULE_PARM_DESC(numa_aware,
  78         "0 -> PSM allocation close to HCA, 1 -> PSM allocation local to process");
  79
  80 /*
  81  * If set, do not write to any regs if avoidable, hack to allow
  82  * check for deranged default register values.
  83  */
  84 ushort qib_mini_init;
  85 module_param_named(mini_init, qib_mini_init, ushort, S_IRUGO);
  86 MODULE_PARM_DESC(mini_init, "If set, do minimal diag init");
  87
  88 unsigned qib_n_krcv_queues;
  89 module_param_named(krcvqs, qib_n_krcv_queues, uint, S_IRUGO);
  90 MODULE_PARM_DESC(krcvqs, "number of kernel receive queues per IB port");
  91
  92 unsigned qib_cc_table_size;
  93 module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO);
  94 MODULE_PARM_DESC(cc_table_size, "Congestion control table entries 0 (CCA disabled - default), min = 128, max = 1984");
  95
  96 static void verify_interrupt(struct timer_list *);
  97
  98 static struct idr qib_unit_table;
  99 u32 qib_cpulist_count;
 100 unsigned long *qib_cpulist;
 101
 102 /* set number of contexts we'll actually use */
 103 void qib_set_ctxtcnt(struct qib_devdata *dd)
 104 {
 105         if (!qib_cfgctxts) {
 106                 dd->cfgctxts = dd->first_user_ctxt + num_online_cpus();
 107                 if (dd->cfgctxts > dd->ctxtcnt)
 108                         dd->cfgctxts = dd->ctxtcnt;
 109         } else if (qib_cfgctxts < dd->num_pports)
 110                 dd->cfgctxts = dd->ctxtcnt;
 111         else if (qib_cfgctxts <= dd->ctxtcnt)
 112                 dd->cfgctxts = qib_cfgctxts;
 113         else
 114                 dd->cfgctxts = dd->ctxtcnt;
 115         dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 :
 116                 dd->cfgctxts - dd->first_user_ctxt;
 117 }
 118
 119 /*
 120  * Common code for creating the receive context array.
 121  */
 122 int qib_create_ctxts(struct qib_devdata *dd)
 123 {
 124         unsigned i;
 125         int local_node_id = pcibus_to_node(dd->pcidev->bus);
 126
 127         if (local_node_id < 0)
 128                 local_node_id = numa_node_id();
 129         dd->assigned_node_id = local_node_id;
 130
 131         /*
 132          * Allocate full ctxtcnt array, rather than just cfgctxts, because
 133          * cleanup iterates across all possible ctxts.
 134          */
 135         dd->rcd = kcalloc(dd->ctxtcnt, sizeof(*dd->rcd), GFP_KERNEL);
 136         if (!dd->rcd)
 137                 return -ENOMEM;
 138
 139         /* create (one or more) kctxt */
 140         for (i = 0; i < dd->first_user_ctxt; ++i) {
 141                 struct qib_pportdata *ppd;
 142                 struct qib_ctxtdata *rcd;
 143
 144                 if (dd->skip_kctxt_mask & (1 << i))
 145                         continue;
 146
 147                 ppd = dd->pport + (i % dd->num_pports);
 148
 149                 rcd = qib_create_ctxtdata(ppd, i, dd->assigned_node_id);
 150                 if (!rcd) {
 151                         qib_dev_err(dd,
 152                                 "Unable to allocate ctxtdata for Kernel ctxt, failing\n");
 153                         kfree(dd->rcd);
 154                         dd->rcd = NULL;
 155                         return -ENOMEM;
 156                 }
 157                 rcd->pkeys[0] = QIB_DEFAULT_P_KEY;
 158                 rcd->seq_cnt = 1;
 159         }
 160         return 0;
 161 }
 162
 163 /*
 164  * Common code for user and kernel context setup.
 165  */
 166 struct qib_ctxtdata *qib_create_ctxtdata(struct qib_pportdata *ppd, u32 ctxt,
 167         int node_id)
 168 {
 169         struct qib_devdata *dd = ppd->dd;
 170         struct qib_ctxtdata *rcd;
 171
 172         rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, node_id);
 173         if (rcd) {
 174                 INIT_LIST_HEAD(&rcd->qp_wait_list);
 175                 rcd->node_id = node_id;
 176                 rcd->ppd = ppd;
 177                 rcd->dd = dd;
 178                 rcd->cnt = 1;
 179                 rcd->ctxt = ctxt;
 180                 dd->rcd[ctxt] = rcd;
 181 #ifdef CONFIG_DEBUG_FS
 182                 if (ctxt < dd->first_user_ctxt) { /* N/A for PSM contexts */
 183                         rcd->opstats = kzalloc_node(sizeof(*rcd->opstats),
 184                                 GFP_KERNEL, node_id);
 185                         if (!rcd->opstats) {
 186                                 kfree(rcd);
 187                                 qib_dev_err(dd,
 188                                         "Unable to allocate per ctxt stats buffer\n");
 189                                 return NULL;
 190                         }
 191                 }
 192 #endif
 193                 dd->f_init_ctxt(rcd);
 194
 195                 /*
 196                  * To avoid wasting a lot of memory, we allocate 32KB chunks
 197                  * of physically contiguous memory, advance through it until
 198                  * used up and then allocate more.  Of course, we need
 199                  * memory to store those extra pointers, now.  32KB seems to
 200                  * be the most that is "safe" under memory pressure
 201                  * (creating large files and then copying them over
 202                  * NFS while doing lots of MPI jobs).  The OOM killer can
 203                  * get invoked, even though we say we can sleep and this can
 204                  * cause significant system problems....
 205                  */
 206                 rcd->rcvegrbuf_size = 0x8000;
 207                 rcd->rcvegrbufs_perchunk =
 208                         rcd->rcvegrbuf_size / dd->rcvegrbufsize;
 209                 rcd->rcvegrbuf_chunks = (rcd->rcvegrcnt +
 210                         rcd->rcvegrbufs_perchunk - 1) /
 211                         rcd->rcvegrbufs_perchunk;
 212                 BUG_ON(!is_power_of_2(rcd->rcvegrbufs_perchunk));
 213                 rcd->rcvegrbufs_perchunk_shift =
 214                         ilog2(rcd->rcvegrbufs_perchunk);
 215         }
 216         return rcd;
 217 }
 218
 219 /*
 220  * Common code for initializing the physical port structure.
 221  */
 222 int qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd,
 223                         u8 hw_pidx, u8 port)
 224 {
 225         int size;
 226
 227         ppd->dd = dd;
 228         ppd->hw_pidx = hw_pidx;
 229         ppd->port = port; /* IB port number, not index */
 230
 231         spin_lock_init(&ppd->sdma_lock);
 232         spin_lock_init(&ppd->lflags_lock);
 233         spin_lock_init(&ppd->cc_shadow_lock);
 234         init_waitqueue_head(&ppd->state_wait);
 235
 236         timer_setup(&ppd->symerr_clear_timer, qib_clear_symerror_on_linkup, 0);
 237
 238         ppd->qib_wq = NULL;
 239         ppd->ibport_data.pmastats =
 240                 alloc_percpu(struct qib_pma_counters);
 241         if (!ppd->ibport_data.pmastats)
 242                 return -ENOMEM;
 243         ppd->ibport_data.rvp.rc_acks = alloc_percpu(u64);
 244         ppd->ibport_data.rvp.rc_qacks = alloc_percpu(u64);
 245         ppd->ibport_data.rvp.rc_delayed_comp = alloc_percpu(u64);
 246         if (!(ppd->ibport_data.rvp.rc_acks) ||
 247             !(ppd->ibport_data.rvp.rc_qacks) ||
 248             !(ppd->ibport_data.rvp.rc_delayed_comp))
 249                 return -ENOMEM;
 250
 251         if (qib_cc_table_size < IB_CCT_MIN_ENTRIES)
 252                 goto bail;
 253
 254         ppd->cc_supported_table_entries = min(max_t(int, qib_cc_table_size,
 255                 IB_CCT_MIN_ENTRIES), IB_CCT_ENTRIES*IB_CC_TABLE_CAP_DEFAULT);
 256
 257         ppd->cc_max_table_entries =
 258                 ppd->cc_supported_table_entries/IB_CCT_ENTRIES;
 259
 260         size = IB_CC_TABLE_CAP_DEFAULT * sizeof(struct ib_cc_table_entry)
 261                 * IB_CCT_ENTRIES;
 262         ppd->ccti_entries = kzalloc(size, GFP_KERNEL);
 263         if (!ppd->ccti_entries)
 264                 goto bail;
 265
 266         size = IB_CC_CCS_ENTRIES * sizeof(struct ib_cc_congestion_entry);
 267         ppd->congestion_entries = kzalloc(size, GFP_KERNEL);
 268         if (!ppd->congestion_entries)
 269                 goto bail_1;
 270
 271         size = sizeof(struct cc_table_shadow);
 272         ppd->ccti_entries_shadow = kzalloc(size, GFP_KERNEL);
 273         if (!ppd->ccti_entries_shadow)
 274                 goto bail_2;
 275
 276         size = sizeof(struct ib_cc_congestion_setting_attr);
 277         ppd->congestion_entries_shadow = kzalloc(size, GFP_KERNEL);
 278         if (!ppd->congestion_entries_shadow)
 279                 goto bail_3;
 280
 281         return 0;
 282
 283 bail_3:
 284         kfree(ppd->ccti_entries_shadow);
 285         ppd->ccti_entries_shadow = NULL;
 286 bail_2:
 287         kfree(ppd->congestion_entries);
 288         ppd->congestion_entries = NULL;
 289 bail_1:
 290         kfree(ppd->ccti_entries);
 291         ppd->ccti_entries = NULL;
 292 bail:
 293         /* User is intentionally disabling the congestion control agent */
 294         if (!qib_cc_table_size)
 295                 return 0;
 296
 297         if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) {
 298                 qib_cc_table_size = 0;
 299                 qib_dev_err(dd,
 300                  "Congestion Control table size %d less than minimum %d for port %d\n",
 301                  qib_cc_table_size, IB_CCT_MIN_ENTRIES, port);
 302         }
 303
 304         qib_dev_err(dd, "Congestion Control Agent disabled for port %d\n",
 305                 port);
 306         return 0;
 307 }
 308
 309 static int init_pioavailregs(struct qib_devdata *dd)
 310 {
 311         int ret, pidx;
 312         u64 *status_page;
 313
 314         dd->pioavailregs_dma = dma_alloc_coherent(
 315                 &dd->pcidev->dev, PAGE_SIZE, &dd->pioavailregs_phys,
 316                 GFP_KERNEL);
 317         if (!dd->pioavailregs_dma) {
 318                 qib_dev_err(dd,
 319                         "failed to allocate PIOavail reg area in memory\n");
 320                 ret = -ENOMEM;
 321                 goto done;
 322         }
 323
 324         /*
 325          * We really want L2 cache aligned, but for current CPUs of
 326          * interest, they are the same.
 327          */
 328         status_page = (u64 *)
 329                 ((char *) dd->pioavailregs_dma +
 330                  ((2 * L1_CACHE_BYTES +
 331                    dd->pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
 332         /* device status comes first, for backwards compatibility */
 333         dd->devstatusp = status_page;
 334         *status_page++ = 0;
 335         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 336                 dd->pport[pidx].statusp = status_page;
 337                 *status_page++ = 0;
 338         }
 339
 340         /*
 341          * Setup buffer to hold freeze and other messages, accessible to
 342          * apps, following statusp.  This is per-unit, not per port.
 343          */
 344         dd->freezemsg = (char *) status_page;
 345         *dd->freezemsg = 0;
 346         /* length of msg buffer is "whatever is left" */
 347         ret = (char *) status_page - (char *) dd->pioavailregs_dma;
 348         dd->freezelen = PAGE_SIZE - ret;
 349
 350         ret = 0;
 351
 352 done:
 353         return ret;
 354 }
 355
 356 /**
 357  * init_shadow_tids - allocate the shadow TID array
 358  * @dd: the qlogic_ib device
 359  *
 360  * allocate the shadow TID array, so we can qib_munlock previous
 361  * entries.  It may make more sense to move the pageshadow to the
 362  * ctxt data structure, so we only allocate memory for ctxts actually
 363  * in use, since we at 8k per ctxt, now.
 364  * We don't want failures here to prevent use of the driver/chip,
 365  * so no return value.
 366  */
 367 static void init_shadow_tids(struct qib_devdata *dd)
 368 {
 369         struct page **pages;
 370         dma_addr_t *addrs;
 371
 372         pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *));
 373         if (!pages)
 374                 goto bail;
 375
 376         addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t));
 377         if (!addrs)
 378                 goto bail_free;
 379
 380         dd->pageshadow = pages;
 381         dd->physshadow = addrs;
 382         return;
 383
 384 bail_free:
 385         vfree(pages);
 386 bail:
 387         dd->pageshadow = NULL;
 388 }
 389
 390 /*
 391  * Do initialization for device that is only needed on
 392  * first detect, not on resets.
 393  */
 394 static int loadtime_init(struct qib_devdata *dd)
 395 {
 396         int ret = 0;
 397
 398         if (((dd->revision >> QLOGIC_IB_R_SOFTWARE_SHIFT) &
 399              QLOGIC_IB_R_SOFTWARE_MASK) != QIB_CHIP_SWVERSION) {
 400                 qib_dev_err(dd,
 401                         "Driver only handles version %d, chip swversion is %d (%llx), failing\n",
 402                         QIB_CHIP_SWVERSION,
 403                         (int)(dd->revision >>
 404                                 QLOGIC_IB_R_SOFTWARE_SHIFT) &
 405                                 QLOGIC_IB_R_SOFTWARE_MASK,
 406                         (unsigned long long) dd->revision);
 407                 ret = -ENOSYS;
 408                 goto done;
 409         }
 410
 411         if (dd->revision & QLOGIC_IB_R_EMULATOR_MASK)
 412                 qib_devinfo(dd->pcidev, "%s", dd->boardversion);
 413
 414         spin_lock_init(&dd->pioavail_lock);
 415         spin_lock_init(&dd->sendctrl_lock);
 416         spin_lock_init(&dd->uctxt_lock);
 417         spin_lock_init(&dd->qib_diag_trans_lock);
 418         spin_lock_init(&dd->eep_st_lock);
 419         mutex_init(&dd->eep_lock);
 420
 421         if (qib_mini_init)
 422                 goto done;
 423
 424         ret = init_pioavailregs(dd);
 425         init_shadow_tids(dd);
 426
 427         qib_get_eeprom_info(dd);
 428
 429         /* setup time (don't start yet) to verify we got interrupt */
 430         timer_setup(&dd->intrchk_timer, verify_interrupt, 0);
 431 done:
 432         return ret;
 433 }
 434
 435 /**
 436  * init_after_reset - re-initialize after a reset
 437  * @dd: the qlogic_ib device
 438  *
 439  * sanity check at least some of the values after reset, and
 440  * ensure no receive or transmit (explicitly, in case reset
 441  * failed
 442  */
 443 static int init_after_reset(struct qib_devdata *dd)
 444 {
 445         int i;
 446
 447         /*
 448          * Ensure chip does no sends or receives, tail updates, or
 449          * pioavail updates while we re-initialize.  This is mostly
 450          * for the driver data structures, not chip registers.
 451          */
 452         for (i = 0; i < dd->num_pports; ++i) {
 453                 /*
 454                  * ctxt == -1 means "all contexts". Only really safe for
 455                  * _dis_abling things, as here.
 456                  */
 457                 dd->f_rcvctrl(dd->pport + i, QIB_RCVCTRL_CTXT_DIS |
 458                                   QIB_RCVCTRL_INTRAVAIL_DIS |
 459                                   QIB_RCVCTRL_TAILUPD_DIS, -1);
 460                 /* Redundant across ports for some, but no big deal.  */
 461                 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_DIS |
 462                         QIB_SENDCTRL_AVAIL_DIS);
 463         }
 464
 465         return 0;
 466 }
 467
 468 static void enable_chip(struct qib_devdata *dd)
 469 {
 470         u64 rcvmask;
 471         int i;
 472
 473         /*
 474          * Enable PIO send, and update of PIOavail regs to memory.
 475          */
 476         for (i = 0; i < dd->num_pports; ++i)
 477                 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_ENB |
 478                         QIB_SENDCTRL_AVAIL_ENB);
 479         /*
 480          * Enable kernel ctxts' receive and receive interrupt.
 481          * Other ctxts done as user opens and inits them.
 482          */
 483         rcvmask = QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_INTRAVAIL_ENB;
 484         rcvmask |= (dd->flags & QIB_NODMA_RTAIL) ?
 485                   QIB_RCVCTRL_TAILUPD_DIS : QIB_RCVCTRL_TAILUPD_ENB;
 486         for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
 487                 struct qib_ctxtdata *rcd = dd->rcd[i];
 488
 489                 if (rcd)
 490                         dd->f_rcvctrl(rcd->ppd, rcvmask, i);
 491         }
 492 }
 493
 494 static void verify_interrupt(struct timer_list *t)
 495 {
 496         struct qib_devdata *dd = from_timer(dd, t, intrchk_timer);
 497         u64 int_counter;
 498
 499         if (!dd)
 500                 return; /* being torn down */
 501
 502         /*
 503          * If we don't have a lid or any interrupts, let the user know and
 504          * don't bother checking again.
 505          */
 506         int_counter = qib_int_counter(dd) - dd->z_int_counter;
 507         if (int_counter == 0) {
 508                 if (!dd->f_intr_fallback(dd))
 509                         dev_err(&dd->pcidev->dev,
 510                                 "No interrupts detected, not usable.\n");
 511                 else /* re-arm the timer to see if fallback works */
 512                         mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
 513         }
 514 }
 515
 516 static void init_piobuf_state(struct qib_devdata *dd)
 517 {
 518         int i, pidx;
 519         u32 uctxts;
 520
 521         /*
 522          * Ensure all buffers are free, and fifos empty.  Buffers
 523          * are common, so only do once for port 0.
 524          *
 525          * After enable and qib_chg_pioavailkernel so we can safely
 526          * enable pioavail updates and PIOENABLE.  After this, packets
 527          * are ready and able to go out.
 528          */
 529         dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_ALL);
 530         for (pidx = 0; pidx < dd->num_pports; ++pidx)
 531                 dd->f_sendctrl(dd->pport + pidx, QIB_SENDCTRL_FLUSH);
 532
 533         /*
 534          * If not all sendbufs are used, add the one to each of the lower
 535          * numbered contexts.  pbufsctxt and lastctxt_piobuf are
 536          * calculated in chip-specific code because it may cause some
 537          * chip-specific adjustments to be made.
 538          */
 539         uctxts = dd->cfgctxts - dd->first_user_ctxt;
 540         dd->ctxts_extrabuf = dd->pbufsctxt ?
 541                 dd->lastctxt_piobuf - (dd->pbufsctxt * uctxts) : 0;
 542
 543         /*
 544          * Set up the shadow copies of the piobufavail registers,
 545          * which we compare against the chip registers for now, and
 546          * the in memory DMA'ed copies of the registers.
 547          * By now pioavail updates to memory should have occurred, so
 548          * copy them into our working/shadow registers; this is in
 549          * case something went wrong with abort, but mostly to get the
 550          * initial values of the generation bit correct.
 551          */
 552         for (i = 0; i < dd->pioavregs; i++) {
 553                 __le64 tmp;
 554
 555                 tmp = dd->pioavailregs_dma[i];
 556                 /*
 557                  * Don't need to worry about pioavailkernel here
 558                  * because we will call qib_chg_pioavailkernel() later
 559                  * in initialization, to busy out buffers as needed.
 560                  */
 561                 dd->pioavailshadow[i] = le64_to_cpu(tmp);
 562         }
 563         while (i < ARRAY_SIZE(dd->pioavailshadow))
 564                 dd->pioavailshadow[i++] = 0; /* for debugging sanity */
 565
 566         /* after pioavailshadow is setup */
 567         qib_chg_pioavailkernel(dd, 0, dd->piobcnt2k + dd->piobcnt4k,
 568                                TXCHK_CHG_TYPE_KERN, NULL);
 569         dd->f_initvl15_bufs(dd);
 570 }
 571
 572 /**
 573  * qib_create_workqueues - create per port workqueues
 574  * @dd: the qlogic_ib device
 575  */
 576 static int qib_create_workqueues(struct qib_devdata *dd)
 577 {
 578         int pidx;
 579         struct qib_pportdata *ppd;
 580
 581         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 582                 ppd = dd->pport + pidx;
 583                 if (!ppd->qib_wq) {
 584                         char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */
 585
 586                         snprintf(wq_name, sizeof(wq_name), "qib%d_%d",
 587                                 dd->unit, pidx);
 588                         ppd->qib_wq = alloc_ordered_workqueue(wq_name,
 589                                                               WQ_MEM_RECLAIM);
 590                         if (!ppd->qib_wq)
 591                                 goto wq_error;
 592                 }
 593         }
 594         return 0;
 595 wq_error:
 596         pr_err("create_singlethread_workqueue failed for port %d\n",
 597                 pidx + 1);
 598         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 599                 ppd = dd->pport + pidx;
 600                 if (ppd->qib_wq) {
 601                         destroy_workqueue(ppd->qib_wq);
 602                         ppd->qib_wq = NULL;
 603                 }
 604         }
 605         return -ENOMEM;
 606 }
 607
 608 static void qib_free_pportdata(struct qib_pportdata *ppd)
 609 {
 610         free_percpu(ppd->ibport_data.pmastats);
 611         free_percpu(ppd->ibport_data.rvp.rc_acks);
 612         free_percpu(ppd->ibport_data.rvp.rc_qacks);
 613         free_percpu(ppd->ibport_data.rvp.rc_delayed_comp);
 614         ppd->ibport_data.pmastats = NULL;
 615 }
 616
 617 /**
 618  * qib_init - do the actual initialization sequence on the chip
 619  * @dd: the qlogic_ib device
 620  * @reinit: reinitializing, so don't allocate new memory
 621  *
 622  * Do the actual initialization sequence on the chip.  This is done
 623  * both from the init routine called from the PCI infrastructure, and
 624  * when we reset the chip, or detect that it was reset internally,
 625  * or it's administratively re-enabled.
 626  *
 627  * Memory allocation here and in called routines is only done in
 628  * the first case (reinit == 0).  We have to be careful, because even
 629  * without memory allocation, we need to re-write all the chip registers
 630  * TIDs, etc. after the reset or enable has completed.
 631  */
 632 int qib_init(struct qib_devdata *dd, int reinit)
 633 {
 634         int ret = 0, pidx, lastfail = 0;
 635         u32 portok = 0;
 636         unsigned i;
 637         struct qib_ctxtdata *rcd;
 638         struct qib_pportdata *ppd;
 639         unsigned long flags;
 640
 641         /* Set linkstate to unknown, so we can watch for a transition. */
 642         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 643                 ppd = dd->pport + pidx;
 644                 spin_lock_irqsave(&ppd->lflags_lock, flags);
 645                 ppd->lflags &= ~(QIBL_LINKACTIVE | QIBL_LINKARMED |
 646                                  QIBL_LINKDOWN | QIBL_LINKINIT |
 647                                  QIBL_LINKV);
 648                 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 649         }
 650
 651         if (reinit)
 652                 ret = init_after_reset(dd);
 653         else
 654                 ret = loadtime_init(dd);
 655         if (ret)
 656                 goto done;
 657
 658         /* Bypass most chip-init, to get to device creation */
 659         if (qib_mini_init)
 660                 return 0;
 661
 662         ret = dd->f_late_initreg(dd);
 663         if (ret)
 664                 goto done;
 665
 666         /* dd->rcd can be NULL if early init failed */
 667         for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
 668                 /*
 669                  * Set up the (kernel) rcvhdr queue and egr TIDs.  If doing
 670                  * re-init, the simplest way to handle this is to free
 671                  * existing, and re-allocate.
 672                  * Need to re-create rest of ctxt 0 ctxtdata as well.
 673                  */
 674                 rcd = dd->rcd[i];
 675                 if (!rcd)
 676                         continue;
 677
 678                 lastfail = qib_create_rcvhdrq(dd, rcd);
 679                 if (!lastfail)
 680                         lastfail = qib_setup_eagerbufs(rcd);
 681                 if (lastfail)
 682                         qib_dev_err(dd,
 683                                 "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n");
 684         }
 685
 686         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 687                 int mtu;
 688
 689                 if (lastfail)
 690                         ret = lastfail;
 691                 ppd = dd->pport + pidx;
 692                 mtu = ib_mtu_enum_to_int(qib_ibmtu);
 693                 if (mtu == -1) {
 694                         mtu = QIB_DEFAULT_MTU;
 695                         qib_ibmtu = 0; /* don't leave invalid value */
 696                 }
 697                 /* set max we can ever have for this driver load */
 698                 ppd->init_ibmaxlen = min(mtu > 2048 ?
 699                                          dd->piosize4k : dd->piosize2k,
 700                                          dd->rcvegrbufsize +
 701                                          (dd->rcvhdrentsize << 2));
 702                 /*
 703                  * Have to initialize ibmaxlen, but this will normally
 704                  * change immediately in qib_set_mtu().
 705                  */
 706                 ppd->ibmaxlen = ppd->init_ibmaxlen;
 707                 qib_set_mtu(ppd, mtu);
 708
 709                 spin_lock_irqsave(&ppd->lflags_lock, flags);
 710                 ppd->lflags |= QIBL_IB_LINK_DISABLED;
 711                 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 712
 713                 lastfail = dd->f_bringup_serdes(ppd);
 714                 if (lastfail) {
 715                         qib_devinfo(dd->pcidev,
 716                                  "Failed to bringup IB port %u\n", ppd->port);
 717                         lastfail = -ENETDOWN;
 718                         continue;
 719                 }
 720
 721                 portok++;
 722         }
 723
 724         if (!portok) {
 725                 /* none of the ports initialized */
 726                 if (!ret && lastfail)
 727                         ret = lastfail;
 728                 else if (!ret)
 729                         ret = -ENETDOWN;
 730                 /* but continue on, so we can debug cause */
 731         }
 732
 733         enable_chip(dd);
 734
 735         init_piobuf_state(dd);
 736
 737 done:
 738         if (!ret) {
 739                 /* chip is OK for user apps; mark it as initialized */
 740                 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 741                         ppd = dd->pport + pidx;
 742                         /*
 743                          * Set status even if port serdes is not initialized
 744                          * so that diags will work.
 745                          */
 746                         *ppd->statusp |= QIB_STATUS_CHIP_PRESENT |
 747                                 QIB_STATUS_INITTED;
 748                         if (!ppd->link_speed_enabled)
 749                                 continue;
 750                         if (dd->flags & QIB_HAS_SEND_DMA)
 751                                 ret = qib_setup_sdma(ppd);
 752                         timer_setup(&ppd->hol_timer, qib_hol_event, 0);
 753                         ppd->hol_state = QIB_HOL_UP;
 754                 }
 755
 756                 /* now we can enable all interrupts from the chip */
 757                 dd->f_set_intr_state(dd, 1);
 758
 759                 /*
 760                  * Setup to verify we get an interrupt, and fallback
 761                  * to an alternate if necessary and possible.
 762                  */
 763                 mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
 764                 /* start stats retrieval timer */
 765                 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER);
 766         }
 767
 768         /* if ret is non-zero, we probably should do some cleanup here... */
 769         return ret;
 770 }
 771
 772 /*
 773  * These next two routines are placeholders in case we don't have per-arch
 774  * code for controlling write combining.  If explicit control of write
 775  * combining is not available, performance will probably be awful.
 776  */
 777
 778 int __attribute__((weak)) qib_enable_wc(struct qib_devdata *dd)
 779 {
 780         return -EOPNOTSUPP;
 781 }
 782
 783 void __attribute__((weak)) qib_disable_wc(struct qib_devdata *dd)
 784 {
 785 }
 786
 787 static inline struct qib_devdata *__qib_lookup(int unit)
 788 {
 789         return idr_find(&qib_unit_table, unit);
 790 }
 791
 792 struct qib_devdata *qib_lookup(int unit)
 793 {
 794         struct qib_devdata *dd;
 795         unsigned long flags;
 796
 797         spin_lock_irqsave(&qib_devs_lock, flags);
 798         dd = __qib_lookup(unit);
 799         spin_unlock_irqrestore(&qib_devs_lock, flags);
 800
 801         return dd;
 802 }
 803
 804 /*
 805  * Stop the timers during unit shutdown, or after an error late
 806  * in initialization.
 807  */
 808 static void qib_stop_timers(struct qib_devdata *dd)
 809 {
 810         struct qib_pportdata *ppd;
 811         int pidx;
 812
 813         if (dd->stats_timer.function)
 814                 del_timer_sync(&dd->stats_timer);
 815         if (dd->intrchk_timer.function)
 816                 del_timer_sync(&dd->intrchk_timer);
 817         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 818                 ppd = dd->pport + pidx;
 819                 if (ppd->hol_timer.function)
 820                         del_timer_sync(&ppd->hol_timer);
 821                 if (ppd->led_override_timer.function) {
 822                         del_timer_sync(&ppd->led_override_timer);
 823                         atomic_set(&ppd->led_override_timer_active, 0);
 824                 }
 825                 if (ppd->symerr_clear_timer.function)
 826                         del_timer_sync(&ppd->symerr_clear_timer);
 827         }
 828 }
 829
 830 /**
 831  * qib_shutdown_device - shut down a device
 832  * @dd: the qlogic_ib device
 833  *
 834  * This is called to make the device quiet when we are about to
 835  * unload the driver, and also when the device is administratively
 836  * disabled.   It does not free any data structures.
 837  * Everything it does has to be setup again by qib_init(dd, 1)
 838  */
 839 static void qib_shutdown_device(struct qib_devdata *dd)
 840 {
 841         struct qib_pportdata *ppd;
 842         unsigned pidx;
 843
 844         if (dd->flags & QIB_SHUTDOWN)
 845                 return;
 846         dd->flags |= QIB_SHUTDOWN;
 847
 848         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 849                 ppd = dd->pport + pidx;
 850
 851                 spin_lock_irq(&ppd->lflags_lock);
 852                 ppd->lflags &= ~(QIBL_LINKDOWN | QIBL_LINKINIT |
 853                                  QIBL_LINKARMED | QIBL_LINKACTIVE |
 854                                  QIBL_LINKV);
 855                 spin_unlock_irq(&ppd->lflags_lock);
 856                 *ppd->statusp &= ~(QIB_STATUS_IB_CONF | QIB_STATUS_IB_READY);
 857         }
 858         dd->flags &= ~QIB_INITTED;
 859
 860         /* mask interrupts, but not errors */
 861         dd->f_set_intr_state(dd, 0);
 862
 863         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 864                 ppd = dd->pport + pidx;
 865                 dd->f_rcvctrl(ppd, QIB_RCVCTRL_TAILUPD_DIS |
 866                                    QIB_RCVCTRL_CTXT_DIS |
 867                                    QIB_RCVCTRL_INTRAVAIL_DIS |
 868                                    QIB_RCVCTRL_PKEY_ENB, -1);
 869                 /*
 870                  * Gracefully stop all sends allowing any in progress to
 871                  * trickle out first.
 872                  */
 873                 dd->f_sendctrl(ppd, QIB_SENDCTRL_CLEAR);
 874         }
 875
 876         /*
 877          * Enough for anything that's going to trickle out to have actually
 878          * done so.
 879          */
 880         udelay(20);
 881
 882         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 883                 ppd = dd->pport + pidx;
 884                 dd->f_setextled(ppd, 0); /* make sure LEDs are off */
 885
 886                 if (dd->flags & QIB_HAS_SEND_DMA)
 887                         qib_teardown_sdma(ppd);
 888
 889                 dd->f_sendctrl(ppd, QIB_SENDCTRL_AVAIL_DIS |
 890                                     QIB_SENDCTRL_SEND_DIS);
 891                 /*
 892                  * Clear SerdesEnable.
 893                  * We can't count on interrupts since we are stopping.
 894                  */
 895                 dd->f_quiet_serdes(ppd);
 896
 897                 if (ppd->qib_wq) {
 898                         destroy_workqueue(ppd->qib_wq);
 899                         ppd->qib_wq = NULL;
 900                 }
 901                 qib_free_pportdata(ppd);
 902         }
 903
 904 }
 905
 906 /**
 907  * qib_free_ctxtdata - free a context's allocated data
 908  * @dd: the qlogic_ib device
 909  * @rcd: the ctxtdata structure
 910  *
 911  * free up any allocated data for a context
 912  * This should not touch anything that would affect a simultaneous
 913  * re-allocation of context data, because it is called after qib_mutex
 914  * is released (and can be called from reinit as well).
 915  * It should never change any chip state, or global driver state.
 916  */
 917 void qib_free_ctxtdata(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
 918 {
 919         if (!rcd)
 920                 return;
 921
 922         if (rcd->rcvhdrq) {
 923                 dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size,
 924                                   rcd->rcvhdrq, rcd->rcvhdrq_phys);
 925                 rcd->rcvhdrq = NULL;
 926                 if (rcd->rcvhdrtail_kvaddr) {
 927                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 928                                           rcd->rcvhdrtail_kvaddr,
 929                                           rcd->rcvhdrqtailaddr_phys);
 930                         rcd->rcvhdrtail_kvaddr = NULL;
 931                 }
 932         }
 933         if (rcd->rcvegrbuf) {
 934                 unsigned e;
 935
 936                 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
 937                         void *base = rcd->rcvegrbuf[e];
 938                         size_t size = rcd->rcvegrbuf_size;
 939
 940                         dma_free_coherent(&dd->pcidev->dev, size,
 941                                           base, rcd->rcvegrbuf_phys[e]);
 942                 }
 943                 kfree(rcd->rcvegrbuf);
 944                 rcd->rcvegrbuf = NULL;
 945                 kfree(rcd->rcvegrbuf_phys);
 946                 rcd->rcvegrbuf_phys = NULL;
 947                 rcd->rcvegrbuf_chunks = 0;
 948         }
 949
 950         kfree(rcd->tid_pg_list);
 951         vfree(rcd->user_event_mask);
 952         vfree(rcd->subctxt_uregbase);
 953         vfree(rcd->subctxt_rcvegrbuf);
 954         vfree(rcd->subctxt_rcvhdr_base);
 955 #ifdef CONFIG_DEBUG_FS
 956         kfree(rcd->opstats);
 957         rcd->opstats = NULL;
 958 #endif
 959         kfree(rcd);
 960 }
 961
 962 /*
 963  * Perform a PIO buffer bandwidth write test, to verify proper system
 964  * configuration.  Even when all the setup calls work, occasionally
 965  * BIOS or other issues can prevent write combining from working, or
 966  * can cause other bandwidth problems to the chip.
 967  *
 968  * This test simply writes the same buffer over and over again, and
 969  * measures close to the peak bandwidth to the chip (not testing
 970  * data bandwidth to the wire).   On chips that use an address-based
 971  * trigger to send packets to the wire, this is easy.  On chips that
 972  * use a count to trigger, we want to make sure that the packet doesn't
 973  * go out on the wire, or trigger flow control checks.
 974  */
 975 static void qib_verify_pioperf(struct qib_devdata *dd)
 976 {
 977         u32 pbnum, cnt, lcnt;
 978         u32 __iomem *piobuf;
 979         u32 *addr;
 980         u64 msecs, emsecs;
 981
 982         piobuf = dd->f_getsendbuf(dd->pport, 0ULL, &pbnum);
 983         if (!piobuf) {
 984                 qib_devinfo(dd->pcidev,
 985                          "No PIObufs for checking perf, skipping\n");
 986                 return;
 987         }
 988
 989         /*
 990          * Enough to give us a reasonable test, less than piobuf size, and
 991          * likely multiple of store buffer length.
 992          */
 993         cnt = 1024;
 994
 995         addr = vmalloc(cnt);
 996         if (!addr)
 997                 goto done;
 998
 999         preempt_disable();  /* we want reasonably accurate elapsed time */
1000         msecs = 1 + jiffies_to_msecs(jiffies);
1001         for (lcnt = 0; lcnt < 10000U; lcnt++) {
1002                 /* wait until we cross msec boundary */
1003                 if (jiffies_to_msecs(jiffies) >= msecs)
1004                         break;
1005                 udelay(1);
1006         }
1007
1008         dd->f_set_armlaunch(dd, 0);
1009
1010         /*
1011          * length 0, no dwords actually sent
1012          */
1013         writeq(0, piobuf);
1014         qib_flush_wc();
1015
1016         /*
1017          * This is only roughly accurate, since even with preempt we
1018          * still take interrupts that could take a while.   Running for
1019          * >= 5 msec seems to get us "close enough" to accurate values.
1020          */
1021         msecs = jiffies_to_msecs(jiffies);
1022         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
1023                 qib_pio_copy(piobuf + 64, addr, cnt >> 2);
1024                 emsecs = jiffies_to_msecs(jiffies) - msecs;
1025         }
1026
1027         /* 1 GiB/sec, slightly over IB SDR line rate */
1028         if (lcnt < (emsecs * 1024U))
1029                 qib_dev_err(dd,
1030                             "Performance problem: bandwidth to PIO buffers is only %u MiB/sec\n",
1031                             lcnt / (u32) emsecs);
1032
1033         preempt_enable();
1034
1035         vfree(addr);
1036
1037 done:
1038         /* disarm piobuf, so it's available again */
1039         dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(pbnum));
1040         qib_sendbuf_done(dd, pbnum);
1041         dd->f_set_armlaunch(dd, 1);
1042 }
1043
1044 void qib_free_devdata(struct qib_devdata *dd)
1045 {
1046         unsigned long flags;
1047
1048         spin_lock_irqsave(&qib_devs_lock, flags);
1049         idr_remove(&qib_unit_table, dd->unit);
1050         list_del(&dd->list);
1051         spin_unlock_irqrestore(&qib_devs_lock, flags);
1052
1053 #ifdef CONFIG_DEBUG_FS
1054         qib_dbg_ibdev_exit(&dd->verbs_dev);
1055 #endif
1056         free_percpu(dd->int_counter);
1057         rvt_dealloc_device(&dd->verbs_dev.rdi);
1058 }
1059
1060 u64 qib_int_counter(struct qib_devdata *dd)
1061 {
1062         int cpu;
1063         u64 int_counter = 0;
1064
1065         for_each_possible_cpu(cpu)
1066                 int_counter += *per_cpu_ptr(dd->int_counter, cpu);
1067         return int_counter;
1068 }
1069
1070 u64 qib_sps_ints(void)
1071 {
1072         unsigned long flags;
1073         struct qib_devdata *dd;
1074         u64 sps_ints = 0;
1075
1076         spin_lock_irqsave(&qib_devs_lock, flags);
1077         list_for_each_entry(dd, &qib_dev_list, list) {
1078                 sps_ints += qib_int_counter(dd);
1079         }
1080         spin_unlock_irqrestore(&qib_devs_lock, flags);
1081         return sps_ints;
1082 }
1083
1084 /*
1085  * Allocate our primary per-unit data structure.  Must be done via verbs
1086  * allocator, because the verbs cleanup process both does cleanup and
1087  * free of the data structure.
1088  * "extra" is for chip-specific data.
1089  *
1090  * Use the idr mechanism to get a unit number for this unit.
1091  */
1092 struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra)
1093 {
1094         unsigned long flags;
1095         struct qib_devdata *dd;
1096         int ret, nports;
1097
1098         /* extra is * number of ports */
1099         nports = extra / sizeof(struct qib_pportdata);
1100         dd = (struct qib_devdata *)rvt_alloc_device(sizeof(*dd) + extra,
1101                                                     nports);
1102         if (!dd)
1103                 return ERR_PTR(-ENOMEM);
1104
1105         INIT_LIST_HEAD(&dd->list);
1106
1107         idr_preload(GFP_KERNEL);
1108         spin_lock_irqsave(&qib_devs_lock, flags);
1109
1110         ret = idr_alloc(&qib_unit_table, dd, 0, 0, GFP_NOWAIT);
1111         if (ret >= 0) {
1112                 dd->unit = ret;
1113                 list_add(&dd->list, &qib_dev_list);
1114         }
1115
1116         spin_unlock_irqrestore(&qib_devs_lock, flags);
1117         idr_preload_end();
1118
1119         if (ret < 0) {
1120                 qib_early_err(&pdev->dev,
1121                               "Could not allocate unit ID: error %d\n", -ret);
1122                 goto bail;
1123         }
1124         rvt_set_ibdev_name(&dd->verbs_dev.rdi, "%s%d", "qib", dd->unit);
1125
1126         dd->int_counter = alloc_percpu(u64);
1127         if (!dd->int_counter) {
1128                 ret = -ENOMEM;
1129                 qib_early_err(&pdev->dev,
1130                               "Could not allocate per-cpu int_counter\n");
1131                 goto bail;
1132         }
1133
1134         if (!qib_cpulist_count) {
1135                 u32 count = num_online_cpus();
1136
1137                 qib_cpulist = kcalloc(BITS_TO_LONGS(count), sizeof(long),
1138                                       GFP_KERNEL);
1139                 if (qib_cpulist)
1140                         qib_cpulist_count = count;
1141         }
1142 #ifdef CONFIG_DEBUG_FS
1143         qib_dbg_ibdev_init(&dd->verbs_dev);
1144 #endif
1145         return dd;
1146 bail:
1147         if (!list_empty(&dd->list))
1148                 list_del_init(&dd->list);
1149         rvt_dealloc_device(&dd->verbs_dev.rdi);
1150         return ERR_PTR(ret);
1151 }
1152
1153 /*
1154  * Called from freeze mode handlers, and from PCI error
1155  * reporting code.  Should be paranoid about state of
1156  * system and data structures.
1157  */
1158 void qib_disable_after_error(struct qib_devdata *dd)
1159 {
1160         if (dd->flags & QIB_INITTED) {
1161                 u32 pidx;
1162
1163                 dd->flags &= ~QIB_INITTED;
1164                 if (dd->pport)
1165                         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1166                                 struct qib_pportdata *ppd;
1167
1168                                 ppd = dd->pport + pidx;
1169                                 if (dd->flags & QIB_PRESENT) {
1170                                         qib_set_linkstate(ppd,
1171                                                 QIB_IB_LINKDOWN_DISABLE);
1172                                         dd->f_setextled(ppd, 0);
1173                                 }
1174                                 *ppd->statusp &= ~QIB_STATUS_IB_READY;
1175                         }
1176         }
1177
1178         /*
1179          * Mark as having had an error for driver, and also
1180          * for /sys and status word mapped to user programs.
1181          * This marks unit as not usable, until reset.
1182          */
1183         if (dd->devstatusp)
1184                 *dd->devstatusp |= QIB_STATUS_HWERROR;
1185 }
1186
1187 static void qib_remove_one(struct pci_dev *);
1188 static int qib_init_one(struct pci_dev *, const struct pci_device_id *);
1189 static void qib_shutdown_one(struct pci_dev *);
1190
1191 #define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: "
1192 #define PFX QIB_DRV_NAME ": "
1193
1194 static const struct pci_device_id qib_pci_tbl[] = {
1195         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_QLOGIC_IB_6120) },
1196         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7220) },
1197         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7322) },
1198         { 0, }
1199 };
1200
1201 MODULE_DEVICE_TABLE(pci, qib_pci_tbl);
1202
1203 static struct pci_driver qib_driver = {
1204         .name = QIB_DRV_NAME,
1205         .probe = qib_init_one,
1206         .remove = qib_remove_one,
1207         .shutdown = qib_shutdown_one,
1208         .id_table = qib_pci_tbl,
1209         .err_handler = &qib_pci_err_handler,
1210 };
1211
1212 #ifdef CONFIG_INFINIBAND_QIB_DCA
1213
1214 static int qib_notify_dca(struct notifier_block *, unsigned long, void *);
1215 static struct notifier_block dca_notifier = {
1216         .notifier_call  = qib_notify_dca,
1217         .next           = NULL,
1218         .priority       = 0
1219 };
1220
1221 static int qib_notify_dca_device(struct device *device, void *data)
1222 {
1223         struct qib_devdata *dd = dev_get_drvdata(device);
1224         unsigned long event = *(unsigned long *)data;
1225
1226         return dd->f_notify_dca(dd, event);
1227 }
1228
1229 static int qib_notify_dca(struct notifier_block *nb, unsigned long event,
1230                                           void *p)
1231 {
1232         int rval;
1233
1234         rval = driver_for_each_device(&qib_driver.driver, NULL,
1235                                       &event, qib_notify_dca_device);
1236         return rval ? NOTIFY_BAD : NOTIFY_DONE;
1237 }
1238
1239 #endif
1240
1241 /*
1242  * Do all the generic driver unit- and chip-independent memory
1243  * allocation and initialization.
1244  */
1245 static int __init qib_ib_init(void)
1246 {
1247         int ret;
1248
1249         ret = qib_dev_init();
1250         if (ret)
1251                 goto bail;
1252
1253         /*
1254          * These must be called before the driver is registered with
1255          * the PCI subsystem.
1256          */
1257         idr_init(&qib_unit_table);
1258
1259 #ifdef CONFIG_INFINIBAND_QIB_DCA
1260         dca_register_notify(&dca_notifier);
1261 #endif
1262 #ifdef CONFIG_DEBUG_FS
1263         qib_dbg_init();
1264 #endif
1265         ret = pci_register_driver(&qib_driver);
1266         if (ret < 0) {
1267                 pr_err("Unable to register driver: error %d\n", -ret);
1268                 goto bail_dev;
1269         }
1270
1271         /* not fatal if it doesn't work */
1272         if (qib_init_qibfs())
1273                 pr_err("Unable to register ipathfs\n");
1274         goto bail; /* all OK */
1275
1276 bail_dev:
1277 #ifdef CONFIG_INFINIBAND_QIB_DCA
1278         dca_unregister_notify(&dca_notifier);
1279 #endif
1280 #ifdef CONFIG_DEBUG_FS
1281         qib_dbg_exit();
1282 #endif
1283         idr_destroy(&qib_unit_table);
1284         qib_dev_cleanup();
1285 bail:
1286         return ret;
1287 }
1288
1289 module_init(qib_ib_init);
1290
1291 /*
1292  * Do the non-unit driver cleanup, memory free, etc. at unload.
1293  */
1294 static void __exit qib_ib_cleanup(void)
1295 {
1296         int ret;
1297
1298         ret = qib_exit_qibfs();
1299         if (ret)
1300                 pr_err(
1301                         "Unable to cleanup counter filesystem: error %d\n",
1302                         -ret);
1303
1304 #ifdef CONFIG_INFINIBAND_QIB_DCA
1305         dca_unregister_notify(&dca_notifier);
1306 #endif
1307         pci_unregister_driver(&qib_driver);
1308 #ifdef CONFIG_DEBUG_FS
1309         qib_dbg_exit();
1310 #endif
1311
1312         qib_cpulist_count = 0;
1313         kfree(qib_cpulist);
1314
1315         idr_destroy(&qib_unit_table);
1316         qib_dev_cleanup();
1317 }
1318
1319 module_exit(qib_ib_cleanup);
1320
1321 /* this can only be called after a successful initialization */
1322 static void cleanup_device_data(struct qib_devdata *dd)
1323 {
1324         int ctxt;
1325         int pidx;
1326         struct qib_ctxtdata **tmp;
1327         unsigned long flags;
1328
1329         /* users can't do anything more with chip */
1330         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1331                 if (dd->pport[pidx].statusp)
1332                         *dd->pport[pidx].statusp &= ~QIB_STATUS_CHIP_PRESENT;
1333
1334                 spin_lock(&dd->pport[pidx].cc_shadow_lock);
1335
1336                 kfree(dd->pport[pidx].congestion_entries);
1337                 dd->pport[pidx].congestion_entries = NULL;
1338                 kfree(dd->pport[pidx].ccti_entries);
1339                 dd->pport[pidx].ccti_entries = NULL;
1340                 kfree(dd->pport[pidx].ccti_entries_shadow);
1341                 dd->pport[pidx].ccti_entries_shadow = NULL;
1342                 kfree(dd->pport[pidx].congestion_entries_shadow);
1343                 dd->pport[pidx].congestion_entries_shadow = NULL;
1344
1345                 spin_unlock(&dd->pport[pidx].cc_shadow_lock);
1346         }
1347
1348         qib_disable_wc(dd);
1349
1350         if (dd->pioavailregs_dma) {
1351                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1352                                   (void *) dd->pioavailregs_dma,
1353                                   dd->pioavailregs_phys);
1354                 dd->pioavailregs_dma = NULL;
1355         }
1356
1357         if (dd->pageshadow) {
1358                 struct page **tmpp = dd->pageshadow;
1359                 dma_addr_t *tmpd = dd->physshadow;
1360                 int i;
1361
1362                 for (ctxt = 0; ctxt < dd->cfgctxts; ctxt++) {
1363                         int ctxt_tidbase = ctxt * dd->rcvtidcnt;
1364                         int maxtid = ctxt_tidbase + dd->rcvtidcnt;
1365
1366                         for (i = ctxt_tidbase; i < maxtid; i++) {
1367                                 if (!tmpp[i])
1368                                         continue;
1369                                 pci_unmap_page(dd->pcidev, tmpd[i],
1370                                                PAGE_SIZE, PCI_DMA_FROMDEVICE);
1371                                 qib_release_user_pages(&tmpp[i], 1);
1372                                 tmpp[i] = NULL;
1373                         }
1374                 }
1375
1376                 dd->pageshadow = NULL;
1377                 vfree(tmpp);
1378                 dd->physshadow = NULL;
1379                 vfree(tmpd);
1380         }
1381
1382         /*
1383          * Free any resources still in use (usually just kernel contexts)
1384          * at unload; we do for ctxtcnt, because that's what we allocate.
1385          * We acquire lock to be really paranoid that rcd isn't being
1386          * accessed from some interrupt-related code (that should not happen,
1387          * but best to be sure).
1388          */
1389         spin_lock_irqsave(&dd->uctxt_lock, flags);
1390         tmp = dd->rcd;
1391         dd->rcd = NULL;
1392         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1393         for (ctxt = 0; tmp && ctxt < dd->ctxtcnt; ctxt++) {
1394                 struct qib_ctxtdata *rcd = tmp[ctxt];
1395
1396                 tmp[ctxt] = NULL; /* debugging paranoia */
1397                 qib_free_ctxtdata(dd, rcd);
1398         }
1399         kfree(tmp);
1400 }
1401
1402 /*
1403  * Clean up on unit shutdown, or error during unit load after
1404  * successful initialization.
1405  */
1406 static void qib_postinit_cleanup(struct qib_devdata *dd)
1407 {
1408         /*
1409          * Clean up chip-specific stuff.
1410          * We check for NULL here, because it's outside
1411          * the kregbase check, and we need to call it
1412          * after the free_irq.  Thus it's possible that
1413          * the function pointers were never initialized.
1414          */
1415         if (dd->f_cleanup)
1416                 dd->f_cleanup(dd);
1417
1418         qib_pcie_ddcleanup(dd);
1419
1420         cleanup_device_data(dd);
1421
1422         qib_free_devdata(dd);
1423 }
1424
1425 static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1426 {
1427         int ret, j, pidx, initfail;
1428         struct qib_devdata *dd = NULL;
1429
1430         ret = qib_pcie_init(pdev, ent);
1431         if (ret)
1432                 goto bail;
1433
1434         /*
1435          * Do device-specific initialiation, function table setup, dd
1436          * allocation, etc.
1437          */
1438         switch (ent->device) {
1439         case PCI_DEVICE_ID_QLOGIC_IB_6120:
1440 #ifdef CONFIG_PCI_MSI
1441                 dd = qib_init_iba6120_funcs(pdev, ent);
1442 #else
1443                 qib_early_err(&pdev->dev,
1444                         "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n",
1445                         ent->device);
1446                 dd = ERR_PTR(-ENODEV);
1447 #endif
1448                 break;
1449
1450         case PCI_DEVICE_ID_QLOGIC_IB_7220:
1451                 dd = qib_init_iba7220_funcs(pdev, ent);
1452                 break;
1453
1454         case PCI_DEVICE_ID_QLOGIC_IB_7322:
1455                 dd = qib_init_iba7322_funcs(pdev, ent);
1456                 break;
1457
1458         default:
1459                 qib_early_err(&pdev->dev,
1460                         "Failing on unknown Intel deviceid 0x%x\n",
1461                         ent->device);
1462                 ret = -ENODEV;
1463         }
1464
1465         if (IS_ERR(dd))
1466                 ret = PTR_ERR(dd);
1467         if (ret)
1468                 goto bail; /* error already printed */
1469
1470         ret = qib_create_workqueues(dd);
1471         if (ret)
1472                 goto bail;
1473
1474         /* do the generic initialization */
1475         initfail = qib_init(dd, 0);
1476
1477         ret = qib_register_ib_device(dd);
1478
1479         /*
1480          * Now ready for use.  this should be cleared whenever we
1481          * detect a reset, or initiate one.  If earlier failure,
1482          * we still create devices, so diags, etc. can be used
1483          * to determine cause of problem.
1484          */
1485         if (!qib_mini_init && !initfail && !ret)
1486                 dd->flags |= QIB_INITTED;
1487
1488         j = qib_device_create(dd);
1489         if (j)
1490                 qib_dev_err(dd, "Failed to create /dev devices: %d\n", -j);
1491         j = qibfs_add(dd);
1492         if (j)
1493                 qib_dev_err(dd, "Failed filesystem setup for counters: %d\n",
1494                             -j);
1495
1496         if (qib_mini_init || initfail || ret) {
1497                 qib_stop_timers(dd);
1498                 flush_workqueue(ib_wq);
1499                 for (pidx = 0; pidx < dd->num_pports; ++pidx)
1500                         dd->f_quiet_serdes(dd->pport + pidx);
1501                 if (qib_mini_init)
1502                         goto bail;
1503                 if (!j) {
1504                         (void) qibfs_remove(dd);
1505                         qib_device_remove(dd);
1506                 }
1507                 if (!ret)
1508                         qib_unregister_ib_device(dd);
1509                 qib_postinit_cleanup(dd);
1510                 if (initfail)
1511                         ret = initfail;
1512                 goto bail;
1513         }
1514
1515         ret = qib_enable_wc(dd);
1516         if (ret) {
1517                 qib_dev_err(dd,
1518                         "Write combining not enabled (err %d): performance may be poor\n",
1519                         -ret);
1520                 ret = 0;
1521         }
1522
1523         qib_verify_pioperf(dd);
1524 bail:
1525         return ret;
1526 }
1527
1528 static void qib_remove_one(struct pci_dev *pdev)
1529 {
1530         struct qib_devdata *dd = pci_get_drvdata(pdev);
1531         int ret;
1532
1533         /* unregister from IB core */
1534         qib_unregister_ib_device(dd);
1535
1536         /*
1537          * Disable the IB link, disable interrupts on the device,
1538          * clear dma engines, etc.
1539          */
1540         if (!qib_mini_init)
1541                 qib_shutdown_device(dd);
1542
1543         qib_stop_timers(dd);
1544
1545         /* wait until all of our (qsfp) queue_work() calls complete */
1546         flush_workqueue(ib_wq);
1547
1548         ret = qibfs_remove(dd);
1549         if (ret)
1550                 qib_dev_err(dd, "Failed counters filesystem cleanup: %d\n",
1551                             -ret);
1552
1553         qib_device_remove(dd);
1554
1555         qib_postinit_cleanup(dd);
1556 }
1557
1558 static void qib_shutdown_one(struct pci_dev *pdev)
1559 {
1560         struct qib_devdata *dd = pci_get_drvdata(pdev);
1561
1562         qib_shutdown_device(dd);
1563 }
1564
1565 /**
1566  * qib_create_rcvhdrq - create a receive header queue
1567  * @dd: the qlogic_ib device
1568  * @rcd: the context data
1569  *
1570  * This must be contiguous memory (from an i/o perspective), and must be
1571  * DMA'able (which means for some systems, it will go through an IOMMU,
1572  * or be forced into a low address range).
1573  */
1574 int qib_create_rcvhdrq(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
1575 {
1576         unsigned amt;
1577         int old_node_id;
1578
1579         if (!rcd->rcvhdrq) {
1580                 dma_addr_t phys_hdrqtail;
1581                 gfp_t gfp_flags;
1582
1583                 amt = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1584                             sizeof(u32), PAGE_SIZE);
1585                 gfp_flags = (rcd->ctxt >= dd->first_user_ctxt) ?
1586                         GFP_USER : GFP_KERNEL;
1587
1588                 old_node_id = dev_to_node(&dd->pcidev->dev);
1589                 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1590                 rcd->rcvhdrq = dma_alloc_coherent(
1591                         &dd->pcidev->dev, amt, &rcd->rcvhdrq_phys,
1592                         gfp_flags | __GFP_COMP);
1593                 set_dev_node(&dd->pcidev->dev, old_node_id);
1594
1595                 if (!rcd->rcvhdrq) {
1596                         qib_dev_err(dd,
1597                                 "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n",
1598                                 amt, rcd->ctxt);
1599                         goto bail;
1600                 }
1601
1602                 if (rcd->ctxt >= dd->first_user_ctxt) {
1603                         rcd->user_event_mask = vmalloc_user(PAGE_SIZE);
1604                         if (!rcd->user_event_mask)
1605                                 goto bail_free_hdrq;
1606                 }
1607
1608                 if (!(dd->flags & QIB_NODMA_RTAIL)) {
1609                         set_dev_node(&dd->pcidev->dev, rcd->node_id);
1610                         rcd->rcvhdrtail_kvaddr = dma_alloc_coherent(
1611                                 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1612                                 gfp_flags);
1613                         set_dev_node(&dd->pcidev->dev, old_node_id);
1614                         if (!rcd->rcvhdrtail_kvaddr)
1615                                 goto bail_free;
1616                         rcd->rcvhdrqtailaddr_phys = phys_hdrqtail;
1617                 }
1618
1619                 rcd->rcvhdrq_size = amt;
1620         }
1621
1622         /* clear for security and sanity on each use */
1623         memset(rcd->rcvhdrq, 0, rcd->rcvhdrq_size);
1624         if (rcd->rcvhdrtail_kvaddr)
1625                 memset(rcd->rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1626         return 0;
1627
1628 bail_free:
1629         qib_dev_err(dd,
1630                 "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n",
1631                 rcd->ctxt);
1632         vfree(rcd->user_event_mask);
1633         rcd->user_event_mask = NULL;
1634 bail_free_hdrq:
1635         dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq,
1636                           rcd->rcvhdrq_phys);
1637         rcd->rcvhdrq = NULL;
1638 bail:
1639         return -ENOMEM;
1640 }
1641
1642 /**
1643  * allocate eager buffers, both kernel and user contexts.
1644  * @rcd: the context we are setting up.
1645  *
1646  * Allocate the eager TID buffers and program them into hip.
1647  * They are no longer completely contiguous, we do multiple allocation
1648  * calls.  Otherwise we get the OOM code involved, by asking for too
1649  * much per call, with disastrous results on some kernels.
1650  */
1651 int qib_setup_eagerbufs(struct qib_ctxtdata *rcd)
1652 {
1653         struct qib_devdata *dd = rcd->dd;
1654         unsigned e, egrcnt, egrperchunk, chunk, egrsize, egroff;
1655         size_t size;
1656         gfp_t gfp_flags;
1657         int old_node_id;
1658
1659         /*
1660          * GFP_USER, but without GFP_FS, so buffer cache can be
1661          * coalesced (we hope); otherwise, even at order 4,
1662          * heavy filesystem activity makes these fail, and we can
1663          * use compound pages.
1664          */
1665         gfp_flags = __GFP_RECLAIM | __GFP_IO | __GFP_COMP;
1666
1667         egrcnt = rcd->rcvegrcnt;
1668         egroff = rcd->rcvegr_tid_base;
1669         egrsize = dd->rcvegrbufsize;
1670
1671         chunk = rcd->rcvegrbuf_chunks;
1672         egrperchunk = rcd->rcvegrbufs_perchunk;
1673         size = rcd->rcvegrbuf_size;
1674         if (!rcd->rcvegrbuf) {
1675                 rcd->rcvegrbuf =
1676                         kzalloc_node(chunk * sizeof(rcd->rcvegrbuf[0]),
1677                                 GFP_KERNEL, rcd->node_id);
1678                 if (!rcd->rcvegrbuf)
1679                         goto bail;
1680         }
1681         if (!rcd->rcvegrbuf_phys) {
1682                 rcd->rcvegrbuf_phys =
1683                         kmalloc_array_node(chunk,
1684                                            sizeof(rcd->rcvegrbuf_phys[0]),
1685                                            GFP_KERNEL, rcd->node_id);
1686                 if (!rcd->rcvegrbuf_phys)
1687                         goto bail_rcvegrbuf;
1688         }
1689         for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
1690                 if (rcd->rcvegrbuf[e])
1691                         continue;
1692
1693                 old_node_id = dev_to_node(&dd->pcidev->dev);
1694                 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1695                 rcd->rcvegrbuf[e] =
1696                         dma_alloc_coherent(&dd->pcidev->dev, size,
1697                                            &rcd->rcvegrbuf_phys[e],
1698                                            gfp_flags);
1699                 set_dev_node(&dd->pcidev->dev, old_node_id);
1700                 if (!rcd->rcvegrbuf[e])
1701                         goto bail_rcvegrbuf_phys;
1702         }
1703
1704         rcd->rcvegr_phys = rcd->rcvegrbuf_phys[0];
1705
1706         for (e = chunk = 0; chunk < rcd->rcvegrbuf_chunks; chunk++) {
1707                 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk];
1708                 unsigned i;
1709
1710                 /* clear for security and sanity on each use */
1711                 memset(rcd->rcvegrbuf[chunk], 0, size);
1712
1713                 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) {
1714                         dd->f_put_tid(dd, e + egroff +
1715                                           (u64 __iomem *)
1716                                           ((char __iomem *)
1717                                            dd->kregbase +
1718                                            dd->rcvegrbase),
1719                                           RCVHQ_RCV_TYPE_EAGER, pa);
1720                         pa += egrsize;
1721                 }
1722                 cond_resched(); /* don't hog the cpu */
1723         }
1724
1725         return 0;
1726
1727 bail_rcvegrbuf_phys:
1728         for (e = 0; e < rcd->rcvegrbuf_chunks && rcd->rcvegrbuf[e]; e++)
1729                 dma_free_coherent(&dd->pcidev->dev, size,
1730                                   rcd->rcvegrbuf[e], rcd->rcvegrbuf_phys[e]);
1731         kfree(rcd->rcvegrbuf_phys);
1732         rcd->rcvegrbuf_phys = NULL;
1733 bail_rcvegrbuf:
1734         kfree(rcd->rcvegrbuf);
1735         rcd->rcvegrbuf = NULL;
1736 bail:
1737         return -ENOMEM;
1738 }
1739
1740 /*
1741  * Note: Changes to this routine should be mirrored
1742  * for the diagnostics routine qib_remap_ioaddr32().
1743  * There is also related code for VL15 buffers in qib_init_7322_variables().
1744  * The teardown code that unmaps is in qib_pcie_ddcleanup()
1745  */
1746 int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen)
1747 {
1748         u64 __iomem *qib_kregbase = NULL;
1749         void __iomem *qib_piobase = NULL;
1750         u64 __iomem *qib_userbase = NULL;
1751         u64 qib_kreglen;
1752         u64 qib_pio2koffset = dd->piobufbase & 0xffffffff;
1753         u64 qib_pio4koffset = dd->piobufbase >> 32;
1754         u64 qib_pio2klen = dd->piobcnt2k * dd->palign;
1755         u64 qib_pio4klen = dd->piobcnt4k * dd->align4k;
1756         u64 qib_physaddr = dd->physaddr;
1757         u64 qib_piolen;
1758         u64 qib_userlen = 0;
1759
1760         /*
1761          * Free the old mapping because the kernel will try to reuse the
1762          * old mapping and not create a new mapping with the
1763          * write combining attribute.
1764          */
1765         iounmap(dd->kregbase);
1766         dd->kregbase = NULL;
1767
1768         /*
1769          * Assumes chip address space looks like:
1770          *      - kregs + sregs + cregs + uregs (in any order)
1771          *      - piobufs (2K and 4K bufs in either order)
1772          * or:
1773          *      - kregs + sregs + cregs (in any order)
1774          *      - piobufs (2K and 4K bufs in either order)
1775          *      - uregs
1776          */
1777         if (dd->piobcnt4k == 0) {
1778                 qib_kreglen = qib_pio2koffset;
1779                 qib_piolen = qib_pio2klen;
1780         } else if (qib_pio2koffset < qib_pio4koffset) {
1781                 qib_kreglen = qib_pio2koffset;
1782                 qib_piolen = qib_pio4koffset + qib_pio4klen - qib_kreglen;
1783         } else {
1784                 qib_kreglen = qib_pio4koffset;
1785                 qib_piolen = qib_pio2koffset + qib_pio2klen - qib_kreglen;
1786         }
1787         qib_piolen += vl15buflen;
1788         /* Map just the configured ports (not all hw ports) */
1789         if (dd->uregbase > qib_kreglen)
1790                 qib_userlen = dd->ureg_align * dd->cfgctxts;
1791
1792         /* Sanity checks passed, now create the new mappings */
1793         qib_kregbase = ioremap_nocache(qib_physaddr, qib_kreglen);
1794         if (!qib_kregbase)
1795                 goto bail;
1796
1797         qib_piobase = ioremap_wc(qib_physaddr + qib_kreglen, qib_piolen);
1798         if (!qib_piobase)
1799                 goto bail_kregbase;
1800
1801         if (qib_userlen) {
1802                 qib_userbase = ioremap_nocache(qib_physaddr + dd->uregbase,
1803                                                qib_userlen);
1804                 if (!qib_userbase)
1805                         goto bail_piobase;
1806         }
1807
1808         dd->kregbase = qib_kregbase;
1809         dd->kregend = (u64 __iomem *)
1810                 ((char __iomem *) qib_kregbase + qib_kreglen);
1811         dd->piobase = qib_piobase;
1812         dd->pio2kbase = (void __iomem *)
1813                 (((char __iomem *) dd->piobase) +
1814                  qib_pio2koffset - qib_kreglen);
1815         if (dd->piobcnt4k)
1816                 dd->pio4kbase = (void __iomem *)
1817                         (((char __iomem *) dd->piobase) +
1818                          qib_pio4koffset - qib_kreglen);
1819         if (qib_userlen)
1820                 /* ureg will now be accessed relative to dd->userbase */
1821                 dd->userbase = qib_userbase;
1822         return 0;
1823
1824 bail_piobase:
1825         iounmap(qib_piobase);
1826 bail_kregbase:
1827         iounmap(qib_kregbase);
1828 bail:
1829         return -ENOMEM;
1830 }