1 /*******************************************************************************
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 *******************************************************************************/
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/random.h>
38 #include <linux/highmem.h>
39 #include <linux/time.h>
40 #include <linux/hugetlb.h>
41 #include <linux/irq.h>
42 #include <asm/byteorder.h>
44 #include <rdma/ib_verbs.h>
45 #include <rdma/iw_cm.h>
46 #include <rdma/ib_user_verbs.h>
47 #include <rdma/ib_umem.h>
48 #include <rdma/uverbs_ioctl.h>
52 * i40iw_query_device - get device attributes
53 * @ibdev: device pointer from stack
54 * @props: returning device attributes
57 static int i40iw_query_device(struct ib_device *ibdev,
58 struct ib_device_attr *props,
59 struct ib_udata *udata)
61 struct i40iw_device *iwdev = to_iwdev(ibdev);
63 if (udata->inlen || udata->outlen)
65 memset(props, 0, sizeof(*props));
66 ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
67 props->fw_ver = i40iw_fw_major_ver(&iwdev->sc_dev) << 32 |
68 i40iw_fw_minor_ver(&iwdev->sc_dev);
69 props->device_cap_flags = iwdev->device_cap_flags;
70 props->vendor_id = iwdev->ldev->pcidev->vendor;
71 props->vendor_part_id = iwdev->ldev->pcidev->device;
72 props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
73 props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
74 props->max_qp = iwdev->max_qp - iwdev->used_qps;
75 props->max_qp_wr = I40IW_MAX_QP_WRS;
76 props->max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
77 props->max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
78 props->max_cq = iwdev->max_cq - iwdev->used_cqs;
79 props->max_cqe = iwdev->max_cqe;
80 props->max_mr = iwdev->max_mr - iwdev->used_mrs;
81 props->max_pd = iwdev->max_pd - iwdev->used_pds;
82 props->max_sge_rd = I40IW_MAX_SGE_RD;
83 props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
84 props->max_qp_init_rd_atom = props->max_qp_rd_atom;
85 props->atomic_cap = IB_ATOMIC_NONE;
86 props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
91 * i40iw_query_port - get port attrubutes
92 * @ibdev: device pointer from stack
93 * @port: port number for query
94 * @props: returning device attributes
96 static int i40iw_query_port(struct ib_device *ibdev,
98 struct ib_port_attr *props)
101 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
102 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
103 props->gid_tbl_len = 1;
104 props->active_width = IB_WIDTH_4X;
105 props->active_speed = 1;
106 props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
111 * i40iw_alloc_ucontext - Allocate the user context data structure
112 * @uctx: Uverbs context pointer from stack
115 * This keeps track of all objects associated with a particular
118 static int i40iw_alloc_ucontext(struct ib_ucontext *uctx,
119 struct ib_udata *udata)
121 struct ib_device *ibdev = uctx->device;
122 struct i40iw_device *iwdev = to_iwdev(ibdev);
123 struct i40iw_alloc_ucontext_req req;
124 struct i40iw_alloc_ucontext_resp uresp = {};
125 struct i40iw_ucontext *ucontext = to_ucontext(uctx);
127 if (ib_copy_from_udata(&req, udata, sizeof(req)))
130 if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
131 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
135 uresp.max_qps = iwdev->max_qp;
136 uresp.max_pds = iwdev->max_pd;
137 uresp.wq_size = iwdev->max_qp_wr * 2;
138 uresp.kernel_ver = req.userspace_ver;
140 ucontext->iwdev = iwdev;
141 ucontext->abi_ver = req.userspace_ver;
143 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp)))
146 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
147 spin_lock_init(&ucontext->cq_reg_mem_list_lock);
148 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
149 spin_lock_init(&ucontext->qp_reg_mem_list_lock);
155 * i40iw_dealloc_ucontext - deallocate the user context data structure
156 * @context: user context created during alloc
158 static void i40iw_dealloc_ucontext(struct ib_ucontext *context)
164 * i40iw_mmap - user memory map
165 * @context: context created during alloc
166 * @vma: kernel info for user memory map
168 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
170 struct i40iw_ucontext *ucontext;
171 u64 db_addr_offset, push_offset, pfn;
173 ucontext = to_ucontext(context);
174 if (ucontext->iwdev->sc_dev.is_pf) {
175 db_addr_offset = I40IW_DB_ADDR_OFFSET;
176 push_offset = I40IW_PUSH_OFFSET;
178 vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
180 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
181 push_offset = I40IW_VF_PUSH_OFFSET;
183 vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
186 vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
188 if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
189 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
191 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
192 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
194 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
197 pfn = vma->vm_pgoff +
198 (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >>
201 return rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
202 vma->vm_page_prot, NULL);
206 * i40iw_alloc_push_page - allocate a push page for qp
207 * @iwdev: iwarp device
208 * @qp: hardware control qp
210 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
212 struct i40iw_cqp_request *cqp_request;
213 struct cqp_commands_info *cqp_info;
214 enum i40iw_status_code status;
216 if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
219 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
223 atomic_inc(&cqp_request->refcount);
225 cqp_info = &cqp_request->info;
226 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
227 cqp_info->post_sq = 1;
229 cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
230 cqp_info->in.u.manage_push_page.info.free_page = 0;
231 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
232 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
234 status = i40iw_handle_cqp_op(iwdev, cqp_request);
236 qp->push_idx = cqp_request->compl_info.op_ret_val;
238 i40iw_pr_err("CQP-OP Push page fail");
239 i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
243 * i40iw_dealloc_push_page - free a push page for qp
244 * @iwdev: iwarp device
245 * @qp: hardware control qp
247 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
249 struct i40iw_cqp_request *cqp_request;
250 struct cqp_commands_info *cqp_info;
251 enum i40iw_status_code status;
253 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
256 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
260 cqp_info = &cqp_request->info;
261 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
262 cqp_info->post_sq = 1;
264 cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
265 cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
266 cqp_info->in.u.manage_push_page.info.free_page = 1;
267 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
268 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
270 status = i40iw_handle_cqp_op(iwdev, cqp_request);
272 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
274 i40iw_pr_err("CQP-OP Push page fail");
278 * i40iw_alloc_pd - allocate protection domain
282 static int i40iw_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
284 struct i40iw_pd *iwpd = to_iwpd(pd);
285 struct i40iw_device *iwdev = to_iwdev(pd->device);
286 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
287 struct i40iw_alloc_pd_resp uresp;
288 struct i40iw_sc_pd *sc_pd;
295 err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
296 iwdev->max_pd, &pd_id, &iwdev->next_pd);
298 i40iw_pr_err("alloc resource failed\n");
302 sc_pd = &iwpd->sc_pd;
305 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
306 udata, struct i40iw_ucontext, ibucontext);
307 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
308 memset(&uresp, 0, sizeof(uresp));
310 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
315 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
318 i40iw_add_pdusecount(iwpd);
322 i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
327 * i40iw_dealloc_pd - deallocate pd
328 * @ibpd: ptr of pd to be deallocated
329 * @udata: user data or null for kernel object
331 static void i40iw_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
333 struct i40iw_pd *iwpd = to_iwpd(ibpd);
334 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
336 i40iw_rem_pdusecount(iwpd, iwdev);
340 * i40iw_get_pbl - Retrieve pbl from a list given a virtual
342 * @va: user virtual address
343 * @pbl_list: pbl list to search in (QP's or CQ's)
345 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
346 struct list_head *pbl_list)
348 struct i40iw_pbl *iwpbl;
350 list_for_each_entry(iwpbl, pbl_list, list) {
351 if (iwpbl->user_base == va) {
352 iwpbl->on_list = false;
353 list_del(&iwpbl->list);
361 * i40iw_free_qp_resources - free up memory resources for qp
362 * @iwdev: iwarp device
363 * @iwqp: qp ptr (user or kernel)
364 * @qp_num: qp number assigned
366 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
367 struct i40iw_qp *iwqp,
370 struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
372 i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
373 i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
375 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
376 if (iwpbl->pbl_allocated)
377 i40iw_free_pble(iwdev->pble_rsrc, &iwpbl->pble_alloc);
378 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
379 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
380 kfree(iwqp->kqp.wrid_mem);
381 iwqp->kqp.wrid_mem = NULL;
382 kfree(iwqp->allocated_buffer);
386 * i40iw_clean_cqes - clean cq entries for qp
387 * @iwqp: qp ptr (user or kernel)
390 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
392 struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
394 ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
398 * i40iw_destroy_qp - destroy qp
399 * @ibqp: qp's ib pointer also to get to device's qp address
401 static int i40iw_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
403 struct i40iw_qp *iwqp = to_iwqp(ibqp);
407 if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
408 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
410 if (!iwqp->user_mode) {
412 i40iw_clean_cqes(iwqp, iwqp->iwscq);
413 if (iwqp->iwrcq != iwqp->iwscq)
414 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
418 i40iw_rem_ref(&iwqp->ibqp);
423 * i40iw_setup_virt_qp - setup for allocation of virtual qp
426 * @init_info: initialize info to return
428 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
429 struct i40iw_qp *iwqp,
430 struct i40iw_qp_init_info *init_info)
432 struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
433 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
435 iwqp->page = qpmr->sq_page;
436 init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
437 if (iwpbl->pbl_allocated) {
438 init_info->virtual_map = true;
439 init_info->sq_pa = qpmr->sq_pbl.idx;
440 init_info->rq_pa = qpmr->rq_pbl.idx;
442 init_info->sq_pa = qpmr->sq_pbl.addr;
443 init_info->rq_pa = qpmr->rq_pbl.addr;
449 * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
450 * @iwdev: iwarp device
451 * @iwqp: qp ptr (user or kernel)
452 * @info: initialize info to return
454 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
455 struct i40iw_qp *iwqp,
456 struct i40iw_qp_init_info *info)
458 struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
459 u32 sqdepth, rqdepth;
462 enum i40iw_status_code status;
463 struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
465 i40iw_get_wqe_shift(ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
466 status = i40iw_get_sqdepth(ukinfo->sq_size, sqshift, &sqdepth);
470 status = i40iw_get_rqdepth(ukinfo->rq_size, I40IW_MAX_RQ_WQE_SHIFT, &rqdepth);
474 size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
475 iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
477 ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
478 if (!ukinfo->sq_wrtrk_array)
481 ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
483 size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
484 size += (I40IW_SHADOW_AREA_SIZE << 3);
486 status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
488 kfree(ukinfo->sq_wrtrk_array);
489 ukinfo->sq_wrtrk_array = NULL;
493 ukinfo->sq = mem->va;
494 info->sq_pa = mem->pa;
496 ukinfo->rq = &ukinfo->sq[sqdepth];
497 info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
499 ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
500 info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
502 ukinfo->sq_size = sqdepth >> sqshift;
503 ukinfo->rq_size = rqdepth >> I40IW_MAX_RQ_WQE_SHIFT;
504 ukinfo->qp_id = iwqp->ibqp.qp_num;
509 * i40iw_create_qp - create qp
511 * @init_attr: attributes for qp
512 * @udata: user data for create qp
514 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
515 struct ib_qp_init_attr *init_attr,
516 struct ib_udata *udata)
518 struct i40iw_pd *iwpd = to_iwpd(ibpd);
519 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
520 struct i40iw_cqp *iwcqp = &iwdev->cqp;
521 struct i40iw_qp *iwqp;
522 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
523 udata, struct i40iw_ucontext, ibucontext);
524 struct i40iw_create_qp_req req;
525 struct i40iw_create_qp_resp uresp;
528 enum i40iw_status_code ret;
532 struct i40iw_sc_qp *qp;
533 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
534 struct i40iw_qp_init_info init_info;
535 struct i40iw_create_qp_info *qp_info;
536 struct i40iw_cqp_request *cqp_request;
537 struct cqp_commands_info *cqp_info;
539 struct i40iw_qp_host_ctx_info *ctx_info;
540 struct i40iwarp_offload_info *iwarp_info;
544 return ERR_PTR(-ENODEV);
546 if (init_attr->create_flags)
547 return ERR_PTR(-EINVAL);
548 if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
549 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
551 if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
552 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
554 if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
555 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
557 memset(&init_info, 0, sizeof(init_info));
559 sq_size = init_attr->cap.max_send_wr;
560 rq_size = init_attr->cap.max_recv_wr;
562 init_info.vsi = &iwdev->vsi;
563 init_info.qp_uk_init_info.sq_size = sq_size;
564 init_info.qp_uk_init_info.rq_size = rq_size;
565 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
566 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
567 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
569 mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
571 return ERR_PTR(-ENOMEM);
573 iwqp = (struct i40iw_qp *)mem;
574 iwqp->allocated_buffer = mem;
576 qp->back_qp = (void *)iwqp;
577 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
579 iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
581 if (i40iw_allocate_dma_mem(dev->hw,
583 I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
585 i40iw_pr_err("dma_mem failed\n");
590 init_info.q2 = iwqp->q2_ctx_mem.va;
591 init_info.q2_pa = iwqp->q2_ctx_mem.pa;
593 init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
594 init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
596 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
597 &qp_num, &iwdev->next_qp);
599 i40iw_pr_err("qp resource\n");
605 iwqp->ibqp.qp_num = qp_num;
607 iwqp->iwscq = to_iwcq(init_attr->send_cq);
608 iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
610 iwqp->host_ctx.va = init_info.host_ctx;
611 iwqp->host_ctx.pa = init_info.host_ctx_pa;
612 iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
614 init_info.pd = &iwpd->sc_pd;
615 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
616 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
618 if (init_attr->qp_type != IB_QPT_RC) {
619 err_code = -EOPNOTSUPP;
622 if (iwdev->push_mode)
623 i40iw_alloc_push_page(iwdev, qp);
625 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
627 i40iw_pr_err("ib_copy_from_data\n");
630 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
633 if (req.user_wqe_buffers) {
634 struct i40iw_pbl *iwpbl;
637 &ucontext->qp_reg_mem_list_lock, flags);
638 iwpbl = i40iw_get_pbl(
639 (unsigned long)req.user_wqe_buffers,
640 &ucontext->qp_reg_mem_list);
641 spin_unlock_irqrestore(
642 &ucontext->qp_reg_mem_list_lock, flags);
646 i40iw_pr_err("no pbl info\n");
649 memcpy(&iwqp->iwpbl, iwpbl, sizeof(iwqp->iwpbl));
651 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
653 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
657 i40iw_pr_err("setup qp failed\n");
661 init_info.type = I40IW_QP_TYPE_IWARP;
662 ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
665 i40iw_pr_err("qp_init fail\n");
668 ctx_info = &iwqp->ctx_info;
669 iwarp_info = &iwqp->iwarp_info;
670 iwarp_info->rd_enable = true;
671 iwarp_info->wr_rdresp_en = true;
672 if (!iwqp->user_mode) {
673 iwarp_info->fast_reg_en = true;
674 iwarp_info->priv_mode_en = true;
676 iwarp_info->ddp_ver = 1;
677 iwarp_info->rdmap_ver = 1;
679 ctx_info->iwarp_info_valid = true;
680 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
681 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
682 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
683 ctx_info->push_mode_en = false;
685 ctx_info->push_mode_en = true;
686 ctx_info->push_idx = qp->push_idx;
689 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
690 (u64 *)iwqp->host_ctx.va,
692 ctx_info->iwarp_info_valid = false;
693 cqp_request = i40iw_get_cqp_request(iwcqp, true);
698 cqp_info = &cqp_request->info;
699 qp_info = &cqp_request->info.in.u.qp_create.info;
701 memset(qp_info, 0, sizeof(*qp_info));
703 qp_info->cq_num_valid = true;
704 qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
706 cqp_info->cqp_cmd = OP_QP_CREATE;
707 cqp_info->post_sq = 1;
708 cqp_info->in.u.qp_create.qp = qp;
709 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
710 ret = i40iw_handle_cqp_op(iwdev, cqp_request);
712 i40iw_pr_err("CQP-OP QP create fail");
717 i40iw_add_ref(&iwqp->ibqp);
718 spin_lock_init(&iwqp->lock);
719 iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
720 iwdev->qp_table[qp_num] = iwqp;
721 i40iw_add_pdusecount(iwqp->iwpd);
722 i40iw_add_devusecount(iwdev);
724 memset(&uresp, 0, sizeof(uresp));
725 uresp.actual_sq_size = sq_size;
726 uresp.actual_rq_size = rq_size;
727 uresp.qp_id = qp_num;
728 uresp.push_idx = qp->push_idx;
729 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
731 i40iw_pr_err("copy_to_udata failed\n");
732 i40iw_destroy_qp(&iwqp->ibqp, udata);
733 /* let the completion of the qp destroy free the qp */
734 return ERR_PTR(err_code);
737 init_completion(&iwqp->sq_drained);
738 init_completion(&iwqp->rq_drained);
742 i40iw_free_qp_resources(iwdev, iwqp, qp_num);
743 return ERR_PTR(err_code);
747 * i40iw_query - query qp attributes
749 * @attr: attributes pointer
750 * @attr_mask: Not used
751 * @init_attr: qp attributes to return
753 static int i40iw_query_qp(struct ib_qp *ibqp,
754 struct ib_qp_attr *attr,
756 struct ib_qp_init_attr *init_attr)
758 struct i40iw_qp *iwqp = to_iwqp(ibqp);
759 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
761 attr->qp_state = iwqp->ibqp_state;
762 attr->cur_qp_state = attr->qp_state;
763 attr->qp_access_flags = 0;
764 attr->cap.max_send_wr = qp->qp_uk.sq_size;
765 attr->cap.max_recv_wr = qp->qp_uk.rq_size;
766 attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
767 attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
768 attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
770 init_attr->event_handler = iwqp->ibqp.event_handler;
771 init_attr->qp_context = iwqp->ibqp.qp_context;
772 init_attr->send_cq = iwqp->ibqp.send_cq;
773 init_attr->recv_cq = iwqp->ibqp.recv_cq;
774 init_attr->srq = iwqp->ibqp.srq;
775 init_attr->cap = attr->cap;
776 init_attr->port_num = 1;
781 * i40iw_hw_modify_qp - setup cqp for modify qp
782 * @iwdev: iwarp device
783 * @iwqp: qp ptr (user or kernel)
784 * @info: info for modify qp
785 * @wait: flag to wait or not for modify qp completion
787 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
788 struct i40iw_modify_qp_info *info, bool wait)
790 struct i40iw_cqp_request *cqp_request;
791 struct cqp_commands_info *cqp_info;
792 struct i40iw_modify_qp_info *m_info;
793 struct i40iw_gen_ae_info ae_info;
795 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
799 cqp_info = &cqp_request->info;
800 m_info = &cqp_info->in.u.qp_modify.info;
801 memcpy(m_info, info, sizeof(*m_info));
802 cqp_info->cqp_cmd = OP_QP_MODIFY;
803 cqp_info->post_sq = 1;
804 cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
805 cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
806 if (!i40iw_handle_cqp_op(iwdev, cqp_request))
809 switch (m_info->next_iwarp_state) {
810 case I40IW_QP_STATE_RTS:
811 if (iwqp->iwarp_state == I40IW_QP_STATE_IDLE)
812 i40iw_send_reset(iwqp->cm_node);
814 case I40IW_QP_STATE_IDLE:
815 case I40IW_QP_STATE_TERMINATE:
816 case I40IW_QP_STATE_CLOSING:
817 ae_info.ae_code = I40IW_AE_BAD_CLOSE;
818 ae_info.ae_source = 0;
819 i40iw_gen_ae(iwdev, &iwqp->sc_qp, &ae_info, false);
821 case I40IW_QP_STATE_ERROR:
828 * i40iw_modify_qp - modify qp request
829 * @ibqp: qp's pointer for modify
830 * @attr: access attributes
831 * @attr_mask: state mask
834 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
835 int attr_mask, struct ib_udata *udata)
837 struct i40iw_qp *iwqp = to_iwqp(ibqp);
838 struct i40iw_device *iwdev = iwqp->iwdev;
839 struct i40iw_qp_host_ctx_info *ctx_info;
840 struct i40iwarp_offload_info *iwarp_info;
841 struct i40iw_modify_qp_info info;
842 u8 issue_modify_qp = 0;
847 memset(&info, 0, sizeof(info));
848 ctx_info = &iwqp->ctx_info;
849 iwarp_info = &iwqp->iwarp_info;
851 spin_lock_irqsave(&iwqp->lock, flags);
853 if (attr_mask & IB_QP_STATE) {
854 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
859 switch (attr->qp_state) {
862 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
866 if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
867 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
872 if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
879 iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
881 info.next_iwarp_state = I40IW_QP_STATE_RTS;
882 info.tcp_ctx_valid = true;
883 info.ord_valid = true;
884 info.arp_cache_idx_valid = true;
885 info.cq_num_valid = true;
888 if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
892 if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
893 (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
897 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
901 info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
905 if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
909 info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
914 if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
918 if (iwqp->sc_qp.term_flags)
919 i40iw_terminate_del_timer(&iwqp->sc_qp);
920 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
921 if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
923 (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
924 info.reset_tcp_conn = true;
928 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
935 iwqp->ibqp_state = attr->qp_state;
938 if (attr_mask & IB_QP_ACCESS_FLAGS) {
939 ctx_info->iwarp_info_valid = true;
940 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
941 iwarp_info->wr_rdresp_en = true;
942 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
943 iwarp_info->wr_rdresp_en = true;
944 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
945 iwarp_info->rd_enable = true;
946 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
947 iwarp_info->bind_en = true;
949 if (iwqp->user_mode) {
950 iwarp_info->rd_enable = true;
951 iwarp_info->wr_rdresp_en = true;
952 iwarp_info->priv_mode_en = false;
956 if (ctx_info->iwarp_info_valid) {
957 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
960 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
961 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
962 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
963 (u64 *)iwqp->host_ctx.va,
966 i40iw_pr_err("setting QP context\n");
972 spin_unlock_irqrestore(&iwqp->lock, flags);
974 if (issue_modify_qp) {
975 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
977 spin_lock_irqsave(&iwqp->lock, flags);
978 iwqp->iwarp_state = info.next_iwarp_state;
979 spin_unlock_irqrestore(&iwqp->lock, flags);
982 if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
984 if (iwqp->cm_id && iwqp->hw_tcp_state) {
985 spin_lock_irqsave(&iwqp->lock, flags);
986 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
987 iwqp->last_aeq = I40IW_AE_RESET_SENT;
988 spin_unlock_irqrestore(&iwqp->lock, flags);
989 i40iw_cm_disconn(iwqp);
992 spin_lock_irqsave(&iwqp->lock, flags);
994 if (atomic_inc_return(&iwqp->close_timer_started) == 1) {
995 iwqp->cm_id->add_ref(iwqp->cm_id);
996 i40iw_schedule_cm_timer(iwqp->cm_node,
997 (struct i40iw_puda_buf *)iwqp,
998 I40IW_TIMER_TYPE_CLOSE, 1, 0);
1001 spin_unlock_irqrestore(&iwqp->lock, flags);
1006 spin_unlock_irqrestore(&iwqp->lock, flags);
1011 * cq_free_resources - free up recources for cq
1012 * @iwdev: iwarp device
1015 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1017 struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1019 if (!iwcq->user_mode)
1020 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1021 i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1025 * i40iw_cq_wq_destroy - send cq destroy cqp
1026 * @iwdev: iwarp device
1027 * @cq: hardware control cq
1029 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1031 enum i40iw_status_code status;
1032 struct i40iw_cqp_request *cqp_request;
1033 struct cqp_commands_info *cqp_info;
1035 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1039 cqp_info = &cqp_request->info;
1041 cqp_info->cqp_cmd = OP_CQ_DESTROY;
1042 cqp_info->post_sq = 1;
1043 cqp_info->in.u.cq_destroy.cq = cq;
1044 cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1045 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1047 i40iw_pr_err("CQP-OP Destroy QP fail");
1051 * i40iw_destroy_cq - destroy cq
1052 * @ib_cq: cq pointer
1053 * @udata: user data or NULL for kernel object
1055 static void i40iw_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1057 struct i40iw_cq *iwcq;
1058 struct i40iw_device *iwdev;
1059 struct i40iw_sc_cq *cq;
1061 iwcq = to_iwcq(ib_cq);
1062 iwdev = to_iwdev(ib_cq->device);
1064 i40iw_cq_wq_destroy(iwdev, cq);
1065 cq_free_resources(iwdev, iwcq);
1066 i40iw_rem_devusecount(iwdev);
1070 * i40iw_create_cq - create cq
1071 * @ibcq: CQ allocated
1072 * @attr: attributes for cq
1075 static int i40iw_create_cq(struct ib_cq *ibcq,
1076 const struct ib_cq_init_attr *attr,
1077 struct ib_udata *udata)
1079 struct ib_device *ibdev = ibcq->device;
1080 struct i40iw_device *iwdev = to_iwdev(ibdev);
1081 struct i40iw_cq *iwcq = to_iwcq(ibcq);
1082 struct i40iw_pbl *iwpbl;
1084 struct i40iw_sc_cq *cq;
1085 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1086 struct i40iw_cq_init_info info = {};
1087 enum i40iw_status_code status;
1088 struct i40iw_cqp_request *cqp_request;
1089 struct cqp_commands_info *cqp_info;
1090 struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1091 unsigned long flags;
1093 int entries = attr->cqe;
1098 if (entries > iwdev->max_cqe)
1101 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1102 iwdev->max_cq, &cq_num,
1108 cq->back_cq = (void *)iwcq;
1109 spin_lock_init(&iwcq->lock);
1112 ukinfo->cq_size = max(entries, 4);
1113 ukinfo->cq_id = cq_num;
1114 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1116 if (attr->comp_vector < iwdev->ceqs_count)
1117 info.ceq_id = attr->comp_vector;
1118 info.ceq_id_valid = true;
1120 info.type = I40IW_CQ_TYPE_IWARP;
1122 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
1123 udata, struct i40iw_ucontext, ibucontext);
1124 struct i40iw_create_cq_req req;
1125 struct i40iw_cq_mr *cqmr;
1127 memset(&req, 0, sizeof(req));
1128 iwcq->user_mode = true;
1129 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) {
1131 goto cq_free_resources;
1134 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1135 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1136 &ucontext->cq_reg_mem_list);
1137 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1140 goto cq_free_resources;
1143 iwcq->iwpbl = iwpbl;
1144 iwcq->cq_mem_size = 0;
1145 cqmr = &iwpbl->cq_mr;
1146 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1147 if (iwpbl->pbl_allocated) {
1148 info.virtual_map = true;
1149 info.pbl_chunk_size = 1;
1150 info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1152 info.cq_base_pa = cqmr->cq_pbl.addr;
1155 /* Kmode allocations */
1159 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1160 rsize = round_up(rsize, 256);
1161 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1162 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1163 rsize + shadow, 256);
1166 goto cq_free_resources;
1168 ukinfo->cq_base = iwcq->kmem.va;
1169 info.cq_base_pa = iwcq->kmem.pa;
1170 info.shadow_area_pa = info.cq_base_pa + rsize;
1171 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1174 if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1175 i40iw_pr_err("init cq fail\n");
1177 goto cq_free_resources;
1180 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1183 goto cq_free_resources;
1186 cqp_info = &cqp_request->info;
1187 cqp_info->cqp_cmd = OP_CQ_CREATE;
1188 cqp_info->post_sq = 1;
1189 cqp_info->in.u.cq_create.cq = cq;
1190 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1191 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1193 i40iw_pr_err("CQP-OP Create QP fail");
1195 goto cq_free_resources;
1199 struct i40iw_create_cq_resp resp;
1201 memset(&resp, 0, sizeof(resp));
1202 resp.cq_id = info.cq_uk_init_info.cq_id;
1203 resp.cq_size = info.cq_uk_init_info.cq_size;
1204 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1205 i40iw_pr_err("copy to user data\n");
1211 i40iw_add_devusecount(iwdev);
1215 i40iw_cq_wq_destroy(iwdev, cq);
1217 cq_free_resources(iwdev, iwcq);
1222 * i40iw_get_user_access - get hw access from IB access
1223 * @acc: IB access to return hw access
1225 static inline u16 i40iw_get_user_access(int acc)
1229 access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1230 access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1231 access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1232 access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1237 * i40iw_free_stag - free stag resource
1238 * @iwdev: iwarp device
1239 * @stag: stag to free
1241 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1245 stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1246 i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1247 i40iw_rem_devusecount(iwdev);
1251 * i40iw_create_stag - create random stag
1252 * @iwdev: iwarp device
1254 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1258 u32 next_stag_index;
1264 get_random_bytes(&random, sizeof(random));
1265 consumer_key = (u8)random;
1267 driver_key = random & ~iwdev->mr_stagmask;
1268 next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1269 next_stag_index %= iwdev->max_mr;
1271 ret = i40iw_alloc_resource(iwdev,
1272 iwdev->allocated_mrs, iwdev->max_mr,
1273 &stag_index, &next_stag_index);
1275 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1277 stag += (u32)consumer_key;
1278 i40iw_add_devusecount(iwdev);
1284 * i40iw_next_pbl_addr - Get next pbl address
1285 * @pbl: pointer to a pble
1286 * @pinfo: info pointer
1289 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1290 struct i40iw_pble_info **pinfo,
1294 if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1298 return (u64 *)(*pinfo)->addr;
1302 * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1303 * @iwmr: iwmr for IB's user page addresses
1304 * @pbl: ple pointer to save 1 level or 0 level pble
1305 * @level: indicated level 0, 1 or 2
1307 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1309 enum i40iw_pble_level level)
1311 struct ib_umem *region = iwmr->region;
1312 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1313 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1314 struct i40iw_pble_info *pinfo;
1315 struct ib_block_iter biter;
1318 pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1320 if (iwmr->type == IW_MEMREG_TYPE_QP)
1321 iwpbl->qp_mr.sq_page = sg_page(region->sg_head.sgl);
1323 rdma_for_each_block(region->sg_head.sgl, &biter, region->nmap,
1325 *pbl = rdma_block_iter_dma_address(&biter);
1326 pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1331 * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1332 * @arr: lvl1 pbl array
1333 * @npages: page count
1334 * pg_size: page size
1337 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1341 for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1342 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1349 * i40iw_check_mr_contiguous - check if MR is physically contiguous
1350 * @palloc: pbl allocation struct
1351 * pg_size: page size
1353 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1355 struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1356 struct i40iw_pble_info *leaf = lvl2->leaf;
1358 u64 *start_addr = NULL;
1362 if (palloc->level == I40IW_LEVEL_1) {
1363 arr = (u64 *)palloc->level1.addr;
1364 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1368 start_addr = (u64 *)leaf->addr;
1370 for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1371 arr = (u64 *)leaf->addr;
1372 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1374 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1383 * i40iw_setup_pbles - copy user pg address to pble's
1384 * @iwdev: iwarp device
1385 * @iwmr: mr pointer for this memory registration
1386 * @use_pbles: flag if to use pble's
1388 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1389 struct i40iw_mr *iwmr,
1392 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1393 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1394 struct i40iw_pble_info *pinfo;
1396 enum i40iw_status_code status;
1397 enum i40iw_pble_level level = I40IW_LEVEL_1;
1400 mutex_lock(&iwdev->pbl_mutex);
1401 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1402 mutex_unlock(&iwdev->pbl_mutex);
1406 iwpbl->pbl_allocated = true;
1407 level = palloc->level;
1408 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1409 pbl = (u64 *)pinfo->addr;
1411 pbl = iwmr->pgaddrmem;
1414 i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1417 iwmr->pgaddrmem[0] = *pbl;
1423 * i40iw_handle_q_mem - handle memory for qp and cq
1424 * @iwdev: iwarp device
1425 * @req: information for q memory management
1426 * @iwpbl: pble struct
1427 * @use_pbles: flag to use pble
1429 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1430 struct i40iw_mem_reg_req *req,
1431 struct i40iw_pbl *iwpbl,
1434 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1435 struct i40iw_mr *iwmr = iwpbl->iwmr;
1436 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1437 struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1438 struct i40iw_hmc_pble *hmc_p;
1439 u64 *arr = iwmr->pgaddrmem;
1445 total = req->sq_pages + req->rq_pages + req->cq_pages;
1446 pg_size = iwmr->page_size;
1448 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1452 if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1453 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1454 iwpbl->pbl_allocated = false;
1459 arr = (u64 *)palloc->level1.addr;
1461 if (iwmr->type == IW_MEMREG_TYPE_QP) {
1462 hmc_p = &qpmr->sq_pbl;
1463 qpmr->shadow = (dma_addr_t)arr[total];
1466 ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1468 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1472 hmc_p->idx = palloc->level1.idx;
1473 hmc_p = &qpmr->rq_pbl;
1474 hmc_p->idx = palloc->level1.idx + req->sq_pages;
1476 hmc_p->addr = arr[0];
1477 hmc_p = &qpmr->rq_pbl;
1478 hmc_p->addr = arr[req->sq_pages];
1481 hmc_p = &cqmr->cq_pbl;
1482 cqmr->shadow = (dma_addr_t)arr[total];
1485 ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1488 hmc_p->idx = palloc->level1.idx;
1490 hmc_p->addr = arr[0];
1493 if (use_pbles && ret) {
1494 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1495 iwpbl->pbl_allocated = false;
1502 * i40iw_hw_alloc_stag - cqp command to allocate stag
1503 * @iwdev: iwarp device
1504 * @iwmr: iwarp mr pointer
1506 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1508 struct i40iw_allocate_stag_info *info;
1509 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1510 enum i40iw_status_code status;
1512 struct i40iw_cqp_request *cqp_request;
1513 struct cqp_commands_info *cqp_info;
1515 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1519 cqp_info = &cqp_request->info;
1520 info = &cqp_info->in.u.alloc_stag.info;
1521 memset(info, 0, sizeof(*info));
1522 info->page_size = PAGE_SIZE;
1523 info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1524 info->pd_id = iwpd->sc_pd.pd_id;
1525 info->total_len = iwmr->length;
1526 info->remote_access = true;
1527 cqp_info->cqp_cmd = OP_ALLOC_STAG;
1528 cqp_info->post_sq = 1;
1529 cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1530 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1532 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1535 i40iw_pr_err("CQP-OP MR Reg fail");
1541 * i40iw_alloc_mr - register stag for fast memory registration
1543 * @mr_type: memory for stag registrion
1544 * @max_num_sg: man number of pages
1546 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
1549 struct i40iw_pd *iwpd = to_iwpd(pd);
1550 struct i40iw_device *iwdev = to_iwdev(pd->device);
1551 struct i40iw_pble_alloc *palloc;
1552 struct i40iw_pbl *iwpbl;
1553 struct i40iw_mr *iwmr;
1554 enum i40iw_status_code status;
1556 int err_code = -ENOMEM;
1558 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1560 return ERR_PTR(-ENOMEM);
1562 stag = i40iw_create_stag(iwdev);
1564 err_code = -EOVERFLOW;
1567 stag &= ~I40IW_CQPSQ_STAG_KEY_MASK;
1569 iwmr->ibmr.rkey = stag;
1570 iwmr->ibmr.lkey = stag;
1572 iwmr->ibmr.device = pd->device;
1573 iwpbl = &iwmr->iwpbl;
1575 iwmr->type = IW_MEMREG_TYPE_MEM;
1576 palloc = &iwpbl->pble_alloc;
1577 iwmr->page_cnt = max_num_sg;
1578 mutex_lock(&iwdev->pbl_mutex);
1579 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1580 mutex_unlock(&iwdev->pbl_mutex);
1584 if (palloc->level != I40IW_LEVEL_1)
1586 err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1589 iwpbl->pbl_allocated = true;
1590 i40iw_add_pdusecount(iwpd);
1593 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1595 i40iw_free_stag(iwdev, stag);
1598 return ERR_PTR(err_code);
1602 * i40iw_set_page - populate pbl list for fmr
1603 * @ibmr: ib mem to access iwarp mr pointer
1604 * @addr: page dma address fro pbl list
1606 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1608 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1609 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1610 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1613 if (unlikely(iwmr->npages == iwmr->page_cnt))
1616 pbl = (u64 *)palloc->level1.addr;
1617 pbl[iwmr->npages++] = cpu_to_le64(addr);
1622 * i40iw_map_mr_sg - map of sg list for fmr
1623 * @ibmr: ib mem to access iwarp mr pointer
1624 * @sg: scatter gather list for fmr
1625 * @sg_nents: number of sg pages
1627 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1628 int sg_nents, unsigned int *sg_offset)
1630 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1633 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1637 * i40iw_drain_sq - drain the send queue
1638 * @ibqp: ib qp pointer
1640 static void i40iw_drain_sq(struct ib_qp *ibqp)
1642 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1643 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1645 if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1646 wait_for_completion(&iwqp->sq_drained);
1650 * i40iw_drain_rq - drain the receive queue
1651 * @ibqp: ib qp pointer
1653 static void i40iw_drain_rq(struct ib_qp *ibqp)
1655 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1656 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1658 if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1659 wait_for_completion(&iwqp->rq_drained);
1663 * i40iw_hwreg_mr - send cqp command for memory registration
1664 * @iwdev: iwarp device
1665 * @iwmr: iwarp mr pointer
1666 * @access: access for MR
1668 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1669 struct i40iw_mr *iwmr,
1672 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1673 struct i40iw_reg_ns_stag_info *stag_info;
1674 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1675 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1676 enum i40iw_status_code status;
1678 struct i40iw_cqp_request *cqp_request;
1679 struct cqp_commands_info *cqp_info;
1681 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1685 cqp_info = &cqp_request->info;
1686 stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1687 memset(stag_info, 0, sizeof(*stag_info));
1688 stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1689 stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1690 stag_info->stag_key = (u8)iwmr->stag;
1691 stag_info->total_len = iwmr->length;
1692 stag_info->access_rights = access;
1693 stag_info->pd_id = iwpd->sc_pd.pd_id;
1694 stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1695 stag_info->page_size = iwmr->page_size;
1697 if (iwpbl->pbl_allocated) {
1698 if (palloc->level == I40IW_LEVEL_1) {
1699 stag_info->first_pm_pbl_index = palloc->level1.idx;
1700 stag_info->chunk_size = 1;
1702 stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1703 stag_info->chunk_size = 3;
1706 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1709 cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1710 cqp_info->post_sq = 1;
1711 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1712 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1714 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1717 i40iw_pr_err("CQP-OP MR Reg fail");
1723 * i40iw_reg_user_mr - Register a user memory region
1725 * @start: virtual start address
1726 * @length: length of mr
1727 * @virt: virtual address
1728 * @acc: access of mr
1731 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1736 struct ib_udata *udata)
1738 struct i40iw_pd *iwpd = to_iwpd(pd);
1739 struct i40iw_device *iwdev = to_iwdev(pd->device);
1740 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
1741 udata, struct i40iw_ucontext, ibucontext);
1742 struct i40iw_pble_alloc *palloc;
1743 struct i40iw_pbl *iwpbl;
1744 struct i40iw_mr *iwmr;
1745 struct ib_umem *region;
1746 struct i40iw_mem_reg_req req;
1751 bool use_pbles = false;
1752 unsigned long flags;
1758 return ERR_PTR(-EOPNOTSUPP);
1761 return ERR_PTR(-ENODEV);
1763 if (length > I40IW_MAX_MR_SIZE)
1764 return ERR_PTR(-EINVAL);
1765 region = ib_umem_get(pd->device, start, length, acc);
1767 return (struct ib_mr *)region;
1769 if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1770 ib_umem_release(region);
1771 return ERR_PTR(-EFAULT);
1774 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1776 ib_umem_release(region);
1777 return ERR_PTR(-ENOMEM);
1780 iwpbl = &iwmr->iwpbl;
1782 iwmr->region = region;
1784 iwmr->ibmr.device = pd->device;
1786 iwmr->page_size = PAGE_SIZE;
1787 if (req.reg_type == IW_MEMREG_TYPE_MEM)
1788 iwmr->page_size = ib_umem_find_best_pgsz(region, SZ_4K | SZ_2M,
1791 region_length = region->length + (start & (iwmr->page_size - 1));
1792 pg_shift = ffs(iwmr->page_size) - 1;
1793 pbl_depth = region_length >> pg_shift;
1794 pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1795 iwmr->length = region->length;
1797 iwpbl->user_base = virt;
1798 palloc = &iwpbl->pble_alloc;
1800 iwmr->type = req.reg_type;
1801 iwmr->page_cnt = (u32)pbl_depth;
1803 switch (req.reg_type) {
1804 case IW_MEMREG_TYPE_QP:
1805 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1806 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1809 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1810 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1811 iwpbl->on_list = true;
1812 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1814 case IW_MEMREG_TYPE_CQ:
1815 use_pbles = (req.cq_pages > 1);
1816 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1820 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1821 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1822 iwpbl->on_list = true;
1823 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1825 case IW_MEMREG_TYPE_MEM:
1826 use_pbles = (iwmr->page_cnt != 1);
1827 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1829 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1834 ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1836 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1837 iwpbl->pbl_allocated = false;
1841 access |= i40iw_get_user_access(acc);
1842 stag = i40iw_create_stag(iwdev);
1849 iwmr->ibmr.rkey = stag;
1850 iwmr->ibmr.lkey = stag;
1852 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1854 i40iw_free_stag(iwdev, stag);
1863 iwmr->type = req.reg_type;
1864 if (req.reg_type == IW_MEMREG_TYPE_MEM)
1865 i40iw_add_pdusecount(iwpd);
1869 if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1870 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1871 ib_umem_release(region);
1873 return ERR_PTR(err);
1877 * i40iw_reg_phys_mr - register kernel physical memory
1879 * @addr: physical address of memory to register
1880 * @size: size of memory to register
1881 * @acc: Access rights
1882 * @iova_start: start of virtual address for physical buffers
1884 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1890 struct i40iw_pd *iwpd = to_iwpd(pd);
1891 struct i40iw_device *iwdev = to_iwdev(pd->device);
1892 struct i40iw_pbl *iwpbl;
1893 struct i40iw_mr *iwmr;
1894 enum i40iw_status_code status;
1896 u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1899 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1901 return ERR_PTR(-ENOMEM);
1903 iwmr->ibmr.device = pd->device;
1904 iwpbl = &iwmr->iwpbl;
1906 iwmr->type = IW_MEMREG_TYPE_MEM;
1907 iwpbl->user_base = *iova_start;
1908 stag = i40iw_create_stag(iwdev);
1913 access |= i40iw_get_user_access(acc);
1915 iwmr->ibmr.rkey = stag;
1916 iwmr->ibmr.lkey = stag;
1918 iwmr->pgaddrmem[0] = addr;
1919 iwmr->length = size;
1920 status = i40iw_hwreg_mr(iwdev, iwmr, access);
1922 i40iw_free_stag(iwdev, stag);
1927 i40iw_add_pdusecount(iwpd);
1931 return ERR_PTR(ret);
1935 * i40iw_get_dma_mr - register physical mem
1937 * @acc: access for memory
1939 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
1943 return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
1947 * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
1948 * @iwmr: iwmr for IB's user page addresses
1949 * @ucontext: ptr to user context
1951 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
1952 struct i40iw_ucontext *ucontext)
1954 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1955 unsigned long flags;
1957 switch (iwmr->type) {
1958 case IW_MEMREG_TYPE_CQ:
1959 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1960 if (iwpbl->on_list) {
1961 iwpbl->on_list = false;
1962 list_del(&iwpbl->list);
1964 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1966 case IW_MEMREG_TYPE_QP:
1967 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1968 if (iwpbl->on_list) {
1969 iwpbl->on_list = false;
1970 list_del(&iwpbl->list);
1972 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1980 * i40iw_dereg_mr - deregister mr
1981 * @ib_mr: mr ptr for dereg
1983 static int i40iw_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
1985 struct ib_pd *ibpd = ib_mr->pd;
1986 struct i40iw_pd *iwpd = to_iwpd(ibpd);
1987 struct i40iw_mr *iwmr = to_iwmr(ib_mr);
1988 struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
1989 enum i40iw_status_code status;
1990 struct i40iw_dealloc_stag_info *info;
1991 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1992 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1993 struct i40iw_cqp_request *cqp_request;
1994 struct cqp_commands_info *cqp_info;
1997 ib_umem_release(iwmr->region);
1999 if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2000 /* region is released. only test for userness. */
2002 struct i40iw_ucontext *ucontext =
2003 rdma_udata_to_drv_context(
2005 struct i40iw_ucontext,
2008 i40iw_del_memlist(iwmr, ucontext);
2010 if (iwpbl->pbl_allocated && iwmr->type != IW_MEMREG_TYPE_QP)
2011 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2016 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2020 cqp_info = &cqp_request->info;
2021 info = &cqp_info->in.u.dealloc_stag.info;
2022 memset(info, 0, sizeof(*info));
2024 info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2025 info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2026 stag_idx = info->stag_idx;
2028 if (iwpbl->pbl_allocated)
2029 info->dealloc_pbl = true;
2031 cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2032 cqp_info->post_sq = 1;
2033 cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2034 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2035 status = i40iw_handle_cqp_op(iwdev, cqp_request);
2037 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2038 i40iw_rem_pdusecount(iwpd, iwdev);
2039 i40iw_free_stag(iwdev, iwmr->stag);
2040 if (iwpbl->pbl_allocated)
2041 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2049 static ssize_t hw_rev_show(struct device *dev,
2050 struct device_attribute *attr, char *buf)
2052 struct i40iw_ib_device *iwibdev =
2053 rdma_device_to_drv_device(dev, struct i40iw_ib_device, ibdev);
2054 u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2056 return sprintf(buf, "%x\n", hw_rev);
2058 static DEVICE_ATTR_RO(hw_rev);
2063 static ssize_t hca_type_show(struct device *dev,
2064 struct device_attribute *attr, char *buf)
2066 return sprintf(buf, "I40IW\n");
2068 static DEVICE_ATTR_RO(hca_type);
2073 static ssize_t board_id_show(struct device *dev,
2074 struct device_attribute *attr, char *buf)
2076 return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2078 static DEVICE_ATTR_RO(board_id);
2080 static struct attribute *i40iw_dev_attributes[] = {
2081 &dev_attr_hw_rev.attr,
2082 &dev_attr_hca_type.attr,
2083 &dev_attr_board_id.attr,
2087 static const struct attribute_group i40iw_attr_group = {
2088 .attrs = i40iw_dev_attributes,
2092 * i40iw_copy_sg_list - copy sg list for qp
2093 * @sg_list: copied into sg_list
2094 * @sgl: copy from sgl
2095 * @num_sges: count of sg entries
2097 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2101 for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2102 sg_list[i].tag_off = sgl[i].addr;
2103 sg_list[i].len = sgl[i].length;
2104 sg_list[i].stag = sgl[i].lkey;
2109 * i40iw_post_send - kernel application wr
2110 * @ibqp: qp ptr for wr
2111 * @ib_wr: work request ptr
2112 * @bad_wr: return of bad wr if err
2114 static int i40iw_post_send(struct ib_qp *ibqp,
2115 const struct ib_send_wr *ib_wr,
2116 const struct ib_send_wr **bad_wr)
2118 struct i40iw_qp *iwqp;
2119 struct i40iw_qp_uk *ukqp;
2120 struct i40iw_post_sq_info info;
2121 enum i40iw_status_code ret;
2123 unsigned long flags;
2126 iwqp = (struct i40iw_qp *)ibqp;
2127 ukqp = &iwqp->sc_qp.qp_uk;
2129 spin_lock_irqsave(&iwqp->lock, flags);
2131 if (iwqp->flush_issued) {
2138 memset(&info, 0, sizeof(info));
2139 info.wr_id = (u64)(ib_wr->wr_id);
2140 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2141 info.signaled = true;
2142 if (ib_wr->send_flags & IB_SEND_FENCE)
2143 info.read_fence = true;
2145 switch (ib_wr->opcode) {
2147 case IB_WR_SEND_WITH_INV:
2148 if (ib_wr->opcode == IB_WR_SEND) {
2149 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2150 info.op_type = I40IW_OP_TYPE_SEND_SOL;
2152 info.op_type = I40IW_OP_TYPE_SEND;
2154 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2155 info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2157 info.op_type = I40IW_OP_TYPE_SEND_INV;
2160 if (ib_wr->send_flags & IB_SEND_INLINE) {
2161 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2162 info.op.inline_send.len = ib_wr->sg_list[0].length;
2163 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2165 info.op.send.num_sges = ib_wr->num_sge;
2166 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2167 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2171 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2177 case IB_WR_RDMA_WRITE:
2178 info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2180 if (ib_wr->send_flags & IB_SEND_INLINE) {
2181 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2182 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2183 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2184 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2185 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2187 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2188 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2189 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2190 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2191 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2195 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2201 case IB_WR_RDMA_READ_WITH_INV:
2204 case IB_WR_RDMA_READ:
2205 if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2209 info.op_type = I40IW_OP_TYPE_RDMA_READ;
2210 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2211 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2212 info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2213 info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2214 info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2215 ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2217 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2223 case IB_WR_LOCAL_INV:
2224 info.op_type = I40IW_OP_TYPE_INV_STAG;
2225 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2226 ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2232 struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2233 int flags = reg_wr(ib_wr)->access;
2234 struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2235 struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2236 struct i40iw_fast_reg_stag_info info;
2238 memset(&info, 0, sizeof(info));
2239 info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2240 info.access_rights |= i40iw_get_user_access(flags);
2241 info.stag_key = reg_wr(ib_wr)->key & 0xff;
2242 info.stag_idx = reg_wr(ib_wr)->key >> 8;
2243 info.page_size = reg_wr(ib_wr)->mr->page_size;
2244 info.wr_id = ib_wr->wr_id;
2246 info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2247 info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2248 info.total_len = iwmr->ibmr.length;
2249 info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2250 info.first_pm_pbl_index = palloc->level1.idx;
2251 info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2252 info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2254 if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2255 info.chunk_size = 1;
2257 ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2264 i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2271 ib_wr = ib_wr->next;
2278 ukqp->ops.iw_qp_post_wr(ukqp);
2279 spin_unlock_irqrestore(&iwqp->lock, flags);
2285 * i40iw_post_recv - post receive wr for kernel application
2286 * @ibqp: ib qp pointer
2287 * @ib_wr: work request for receive
2288 * @bad_wr: bad wr caused an error
2290 static int i40iw_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *ib_wr,
2291 const struct ib_recv_wr **bad_wr)
2293 struct i40iw_qp *iwqp;
2294 struct i40iw_qp_uk *ukqp;
2295 struct i40iw_post_rq_info post_recv;
2296 struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2297 enum i40iw_status_code ret = 0;
2298 unsigned long flags;
2301 iwqp = (struct i40iw_qp *)ibqp;
2302 ukqp = &iwqp->sc_qp.qp_uk;
2304 memset(&post_recv, 0, sizeof(post_recv));
2305 spin_lock_irqsave(&iwqp->lock, flags);
2307 if (iwqp->flush_issued) {
2313 post_recv.num_sges = ib_wr->num_sge;
2314 post_recv.wr_id = ib_wr->wr_id;
2315 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2316 post_recv.sg_list = sg_list;
2317 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2319 i40iw_pr_err(" post_recv err %d\n", ret);
2320 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2327 ib_wr = ib_wr->next;
2330 spin_unlock_irqrestore(&iwqp->lock, flags);
2335 * i40iw_poll_cq - poll cq for completion (kernel apps)
2337 * @num_entries: number of entries to poll
2338 * @entry: wr of entry completed
2340 static int i40iw_poll_cq(struct ib_cq *ibcq,
2342 struct ib_wc *entry)
2344 struct i40iw_cq *iwcq;
2346 struct i40iw_cq_poll_info cq_poll_info;
2347 enum i40iw_status_code ret;
2348 struct i40iw_cq_uk *ukcq;
2349 struct i40iw_sc_qp *qp;
2350 struct i40iw_qp *iwqp;
2351 unsigned long flags;
2353 iwcq = (struct i40iw_cq *)ibcq;
2354 ukcq = &iwcq->sc_cq.cq_uk;
2356 spin_lock_irqsave(&iwcq->lock, flags);
2357 while (cqe_count < num_entries) {
2358 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2359 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2361 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2368 entry->wc_flags = 0;
2369 entry->wr_id = cq_poll_info.wr_id;
2370 if (cq_poll_info.error) {
2371 entry->status = IB_WC_WR_FLUSH_ERR;
2372 entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2374 entry->status = IB_WC_SUCCESS;
2377 switch (cq_poll_info.op_type) {
2378 case I40IW_OP_TYPE_RDMA_WRITE:
2379 entry->opcode = IB_WC_RDMA_WRITE;
2381 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2382 case I40IW_OP_TYPE_RDMA_READ:
2383 entry->opcode = IB_WC_RDMA_READ;
2385 case I40IW_OP_TYPE_SEND_SOL:
2386 case I40IW_OP_TYPE_SEND_SOL_INV:
2387 case I40IW_OP_TYPE_SEND_INV:
2388 case I40IW_OP_TYPE_SEND:
2389 entry->opcode = IB_WC_SEND;
2391 case I40IW_OP_TYPE_REC:
2392 entry->opcode = IB_WC_RECV;
2395 entry->opcode = IB_WC_RECV;
2399 entry->ex.imm_data = 0;
2400 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2401 entry->qp = (struct ib_qp *)qp->back_qp;
2402 entry->src_qp = cq_poll_info.qp_id;
2403 iwqp = (struct i40iw_qp *)qp->back_qp;
2404 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2405 if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2406 complete(&iwqp->sq_drained);
2407 if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2408 complete(&iwqp->rq_drained);
2410 entry->byte_len = cq_poll_info.bytes_xfered;
2414 spin_unlock_irqrestore(&iwcq->lock, flags);
2419 * i40iw_req_notify_cq - arm cq kernel application
2421 * @notify_flags: notofication flags
2423 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2424 enum ib_cq_notify_flags notify_flags)
2426 struct i40iw_cq *iwcq;
2427 struct i40iw_cq_uk *ukcq;
2428 unsigned long flags;
2429 enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2431 iwcq = (struct i40iw_cq *)ibcq;
2432 ukcq = &iwcq->sc_cq.cq_uk;
2433 if (notify_flags == IB_CQ_SOLICITED)
2434 cq_notify = IW_CQ_COMPL_SOLICITED;
2435 spin_lock_irqsave(&iwcq->lock, flags);
2436 ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2437 spin_unlock_irqrestore(&iwcq->lock, flags);
2442 * i40iw_port_immutable - return port's immutable data
2443 * @ibdev: ib dev struct
2444 * @port_num: port number
2445 * @immutable: immutable data for the port return
2447 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2448 struct ib_port_immutable *immutable)
2450 struct ib_port_attr attr;
2453 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2455 err = ib_query_port(ibdev, port_num, &attr);
2460 immutable->gid_tbl_len = attr.gid_tbl_len;
2465 static const char * const i40iw_hw_stat_names[] = {
2467 [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2468 [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2469 [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2470 [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2471 [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2472 [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2473 [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2474 [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2475 [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2477 [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2479 [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2481 [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2483 [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2485 [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2487 [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2489 [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2491 [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2493 [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2495 [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2497 [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2499 [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2501 [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2503 [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2505 [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2507 [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2509 [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2511 [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2513 [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2515 [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2517 [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2519 [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2521 [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2523 [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2525 [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2527 [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2531 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str)
2533 struct i40iw_device *iwdev = to_iwdev(dev);
2535 snprintf(str, IB_FW_VERSION_NAME_MAX, "%llu.%llu",
2536 i40iw_fw_major_ver(&iwdev->sc_dev),
2537 i40iw_fw_minor_ver(&iwdev->sc_dev));
2541 * i40iw_alloc_hw_stats - Allocate a hw stats structure
2542 * @ibdev: device pointer from stack
2543 * @port_num: port number
2545 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2548 struct i40iw_device *iwdev = to_iwdev(ibdev);
2549 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2550 int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2551 I40IW_HW_STAT_INDEX_MAX_64;
2552 unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2554 BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2555 (I40IW_HW_STAT_INDEX_MAX_32 +
2556 I40IW_HW_STAT_INDEX_MAX_64));
2559 * PFs get the default update lifespan, but VFs only update once
2564 return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2569 * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2570 * @ibdev: device pointer from stack
2571 * @stats: stats pointer from stack
2572 * @port_num: port number
2573 * @index: which hw counter the stack is requesting we update
2575 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2576 struct rdma_hw_stats *stats,
2577 u8 port_num, int index)
2579 struct i40iw_device *iwdev = to_iwdev(ibdev);
2580 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2581 struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2582 struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2585 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2587 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2591 memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2593 return stats->num_counters;
2597 * i40iw_query_gid - Query port GID
2598 * @ibdev: device pointer from stack
2599 * @port: port number
2600 * @index: Entry index
2603 static int i40iw_query_gid(struct ib_device *ibdev,
2608 struct i40iw_device *iwdev = to_iwdev(ibdev);
2610 memset(gid->raw, 0, sizeof(gid->raw));
2611 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2615 static const struct ib_device_ops i40iw_dev_ops = {
2616 .owner = THIS_MODULE,
2617 .driver_id = RDMA_DRIVER_I40IW,
2618 /* NOTE: Older kernels wrongly use 0 for the uverbs_abi_ver */
2619 .uverbs_abi_ver = I40IW_ABI_VER,
2621 .alloc_hw_stats = i40iw_alloc_hw_stats,
2622 .alloc_mr = i40iw_alloc_mr,
2623 .alloc_pd = i40iw_alloc_pd,
2624 .alloc_ucontext = i40iw_alloc_ucontext,
2625 .create_cq = i40iw_create_cq,
2626 .create_qp = i40iw_create_qp,
2627 .dealloc_pd = i40iw_dealloc_pd,
2628 .dealloc_ucontext = i40iw_dealloc_ucontext,
2629 .dereg_mr = i40iw_dereg_mr,
2630 .destroy_cq = i40iw_destroy_cq,
2631 .destroy_qp = i40iw_destroy_qp,
2632 .drain_rq = i40iw_drain_rq,
2633 .drain_sq = i40iw_drain_sq,
2634 .get_dev_fw_str = i40iw_get_dev_fw_str,
2635 .get_dma_mr = i40iw_get_dma_mr,
2636 .get_hw_stats = i40iw_get_hw_stats,
2637 .get_port_immutable = i40iw_port_immutable,
2638 .iw_accept = i40iw_accept,
2639 .iw_add_ref = i40iw_add_ref,
2640 .iw_connect = i40iw_connect,
2641 .iw_create_listen = i40iw_create_listen,
2642 .iw_destroy_listen = i40iw_destroy_listen,
2643 .iw_get_qp = i40iw_get_qp,
2644 .iw_reject = i40iw_reject,
2645 .iw_rem_ref = i40iw_rem_ref,
2646 .map_mr_sg = i40iw_map_mr_sg,
2648 .modify_qp = i40iw_modify_qp,
2649 .poll_cq = i40iw_poll_cq,
2650 .post_recv = i40iw_post_recv,
2651 .post_send = i40iw_post_send,
2652 .query_device = i40iw_query_device,
2653 .query_gid = i40iw_query_gid,
2654 .query_port = i40iw_query_port,
2655 .query_qp = i40iw_query_qp,
2656 .reg_user_mr = i40iw_reg_user_mr,
2657 .req_notify_cq = i40iw_req_notify_cq,
2658 INIT_RDMA_OBJ_SIZE(ib_pd, i40iw_pd, ibpd),
2659 INIT_RDMA_OBJ_SIZE(ib_cq, i40iw_cq, ibcq),
2660 INIT_RDMA_OBJ_SIZE(ib_ucontext, i40iw_ucontext, ibucontext),
2664 * i40iw_init_rdma_device - initialization of iwarp device
2665 * @iwdev: iwarp device
2667 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2669 struct i40iw_ib_device *iwibdev;
2670 struct net_device *netdev = iwdev->netdev;
2671 struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2673 iwibdev = ib_alloc_device(i40iw_ib_device, ibdev);
2675 i40iw_pr_err("iwdev == NULL\n");
2678 iwdev->iwibdev = iwibdev;
2679 iwibdev->iwdev = iwdev;
2681 iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2682 ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2684 iwibdev->ibdev.uverbs_cmd_mask =
2685 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2686 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2687 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2688 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2689 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2690 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2691 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2692 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2693 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2694 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2695 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2696 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2697 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2698 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2699 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2700 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2701 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2702 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2703 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2704 (1ull << IB_USER_VERBS_CMD_POST_SEND);
2705 iwibdev->ibdev.phys_port_cnt = 1;
2706 iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2707 iwibdev->ibdev.dev.parent = &pcidev->dev;
2708 memcpy(iwibdev->ibdev.iw_ifname, netdev->name,
2709 sizeof(iwibdev->ibdev.iw_ifname));
2710 ib_set_device_ops(&iwibdev->ibdev, &i40iw_dev_ops);
2716 * i40iw_port_ibevent - indicate port event
2717 * @iwdev: iwarp device
2719 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2721 struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2722 struct ib_event event;
2724 event.device = &iwibdev->ibdev;
2725 event.element.port_num = 1;
2726 event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2727 ib_dispatch_event(&event);
2731 * i40iw_destroy_rdma_device - destroy rdma device and free resources
2732 * @iwibdev: IB device ptr
2734 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2736 ib_unregister_device(&iwibdev->ibdev);
2737 wait_event_timeout(iwibdev->iwdev->close_wq,
2738 !atomic64_read(&iwibdev->iwdev->use_count),
2739 I40IW_EVENT_TIMEOUT);
2740 ib_dealloc_device(&iwibdev->ibdev);
2744 * i40iw_register_rdma_device - register iwarp device to IB
2745 * @iwdev: iwarp device
2747 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2750 struct i40iw_ib_device *iwibdev;
2752 iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2753 if (!iwdev->iwibdev)
2755 iwibdev = iwdev->iwibdev;
2756 rdma_set_device_sysfs_group(&iwibdev->ibdev, &i40iw_attr_group);
2757 ret = ib_device_set_netdev(&iwibdev->ibdev, iwdev->netdev, 1);
2761 ret = ib_register_device(&iwibdev->ibdev, "i40iw%d");
2767 ib_dealloc_device(&iwdev->iwibdev->ibdev);