drivers/infiniband/hw/i40iw/i40iw_verbs.c

   1 /*******************************************************************************
   2 *
   3 * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenFabrics.org BSD license below:
  10 *
  11 *   Redistribution and use in source and binary forms, with or
  12 *   without modification, are permitted provided that the following
  13 *   conditions are met:
  14 *
  15 *    - Redistributions of source code must retain the above
  16 *       copyright notice, this list of conditions and the following
  17 *       disclaimer.
  18 *
  19 *    - Redistributions in binary form must reproduce the above
  20 *       copyright notice, this list of conditions and the following
  21 *       disclaimer in the documentation and/or other materials
  22 *       provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 *
  33 *******************************************************************************/
  34
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/random.h>
  38 #include <linux/highmem.h>
  39 #include <linux/time.h>
  40 #include <linux/hugetlb.h>
  41 #include <linux/irq.h>
  42 #include <asm/byteorder.h>
  43 #include <net/ip.h>
  44 #include <rdma/ib_verbs.h>
  45 #include <rdma/iw_cm.h>
  46 #include <rdma/ib_user_verbs.h>
  47 #include <rdma/ib_umem.h>
  48 #include <rdma/uverbs_ioctl.h>
  49 #include "i40iw.h"
  50
  51 /**
  52  * i40iw_query_device - get device attributes
  53  * @ibdev: device pointer from stack
  54  * @props: returning device attributes
  55  * @udata: user data
  56  */
  57 static int i40iw_query_device(struct ib_device *ibdev,
  58                               struct ib_device_attr *props,
  59                               struct ib_udata *udata)
  60 {
  61         struct i40iw_device *iwdev = to_iwdev(ibdev);
  62
  63         if (udata->inlen || udata->outlen)
  64                 return -EINVAL;
  65         memset(props, 0, sizeof(*props));
  66         ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  67         props->fw_ver = I40IW_FW_VERSION;
  68         props->device_cap_flags = iwdev->device_cap_flags;
  69         props->vendor_id = iwdev->ldev->pcidev->vendor;
  70         props->vendor_part_id = iwdev->ldev->pcidev->device;
  71         props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  72         props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  73         props->max_qp = iwdev->max_qp - iwdev->used_qps;
  74         props->max_qp_wr = I40IW_MAX_QP_WRS;
  75         props->max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  76         props->max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  77         props->max_cq = iwdev->max_cq - iwdev->used_cqs;
  78         props->max_cqe = iwdev->max_cqe;
  79         props->max_mr = iwdev->max_mr - iwdev->used_mrs;
  80         props->max_pd = iwdev->max_pd - iwdev->used_pds;
  81         props->max_sge_rd = I40IW_MAX_SGE_RD;
  82         props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  83         props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  84         props->atomic_cap = IB_ATOMIC_NONE;
  85         props->max_map_per_fmr = 1;
  86         props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  87         return 0;
  88 }
  89
  90 /**
  91  * i40iw_query_port - get port attrubutes
  92  * @ibdev: device pointer from stack
  93  * @port: port number for query
  94  * @props: returning device attributes
  95  */
  96 static int i40iw_query_port(struct ib_device *ibdev,
  97                             u8 port,
  98                             struct ib_port_attr *props)
  99 {
 100         struct i40iw_device *iwdev = to_iwdev(ibdev);
 101         struct net_device *netdev = iwdev->netdev;
 102
 103         /* props being zeroed by the caller, avoid zeroing it here */
 104         props->max_mtu = IB_MTU_4096;
 105         props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
 106
 107         props->lid = 1;
 108         if (netif_carrier_ok(iwdev->netdev))
 109                 props->state = IB_PORT_ACTIVE;
 110         else
 111                 props->state = IB_PORT_DOWN;
 112         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 113                 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 114         props->gid_tbl_len = 1;
 115         props->pkey_tbl_len = 1;
 116         props->active_width = IB_WIDTH_4X;
 117         props->active_speed = 1;
 118         props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 119         return 0;
 120 }
 121
 122 /**
 123  * i40iw_alloc_ucontext - Allocate the user context data structure
 124  * @uctx: Uverbs context pointer from stack
 125  * @udata: user data
 126  *
 127  * This keeps track of all objects associated with a particular
 128  * user-mode client.
 129  */
 130 static int i40iw_alloc_ucontext(struct ib_ucontext *uctx,
 131                                 struct ib_udata *udata)
 132 {
 133         struct ib_device *ibdev = uctx->device;
 134         struct i40iw_device *iwdev = to_iwdev(ibdev);
 135         struct i40iw_alloc_ucontext_req req;
 136         struct i40iw_alloc_ucontext_resp uresp = {};
 137         struct i40iw_ucontext *ucontext = to_ucontext(uctx);
 138
 139         if (ib_copy_from_udata(&req, udata, sizeof(req)))
 140                 return -EINVAL;
 141
 142         if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
 143                 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
 144                 return -EINVAL;
 145         }
 146
 147         uresp.max_qps = iwdev->max_qp;
 148         uresp.max_pds = iwdev->max_pd;
 149         uresp.wq_size = iwdev->max_qp_wr * 2;
 150         uresp.kernel_ver = req.userspace_ver;
 151
 152         ucontext->iwdev = iwdev;
 153         ucontext->abi_ver = req.userspace_ver;
 154
 155         if (ib_copy_to_udata(udata, &uresp, sizeof(uresp)))
 156                 return -EFAULT;
 157
 158         INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 159         spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 160         INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 161         spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 162
 163         return 0;
 164 }
 165
 166 /**
 167  * i40iw_dealloc_ucontext - deallocate the user context data structure
 168  * @context: user context created during alloc
 169  */
 170 static void i40iw_dealloc_ucontext(struct ib_ucontext *context)
 171 {
 172         return;
 173 }
 174
 175 /**
 176  * i40iw_mmap - user memory map
 177  * @context: context created during alloc
 178  * @vma: kernel info for user memory map
 179  */
 180 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 181 {
 182         struct i40iw_ucontext *ucontext;
 183         u64 db_addr_offset;
 184         u64 push_offset;
 185
 186         ucontext = to_ucontext(context);
 187         if (ucontext->iwdev->sc_dev.is_pf) {
 188                 db_addr_offset = I40IW_DB_ADDR_OFFSET;
 189                 push_offset = I40IW_PUSH_OFFSET;
 190                 if (vma->vm_pgoff)
 191                         vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
 192         } else {
 193                 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
 194                 push_offset = I40IW_VF_PUSH_OFFSET;
 195                 if (vma->vm_pgoff)
 196                         vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
 197         }
 198
 199         vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
 200
 201         if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
 202                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 203                 vma->vm_private_data = ucontext;
 204         } else {
 205                 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
 206                         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 207                 else
 208                         vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 209         }
 210
 211         if (io_remap_pfn_range(vma, vma->vm_start,
 212                                vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
 213                                PAGE_SIZE, vma->vm_page_prot))
 214                 return -EAGAIN;
 215
 216         return 0;
 217 }
 218
 219 /**
 220  * i40iw_alloc_push_page - allocate a push page for qp
 221  * @iwdev: iwarp device
 222  * @qp: hardware control qp
 223  */
 224 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 225 {
 226         struct i40iw_cqp_request *cqp_request;
 227         struct cqp_commands_info *cqp_info;
 228         enum i40iw_status_code status;
 229
 230         if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 231                 return;
 232
 233         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 234         if (!cqp_request)
 235                 return;
 236
 237         atomic_inc(&cqp_request->refcount);
 238
 239         cqp_info = &cqp_request->info;
 240         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 241         cqp_info->post_sq = 1;
 242
 243         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 244         cqp_info->in.u.manage_push_page.info.free_page = 0;
 245         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 246         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 247
 248         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 249         if (!status)
 250                 qp->push_idx = cqp_request->compl_info.op_ret_val;
 251         else
 252                 i40iw_pr_err("CQP-OP Push page fail");
 253         i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 254 }
 255
 256 /**
 257  * i40iw_dealloc_push_page - free a push page for qp
 258  * @iwdev: iwarp device
 259  * @qp: hardware control qp
 260  */
 261 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 262 {
 263         struct i40iw_cqp_request *cqp_request;
 264         struct cqp_commands_info *cqp_info;
 265         enum i40iw_status_code status;
 266
 267         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 268                 return;
 269
 270         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 271         if (!cqp_request)
 272                 return;
 273
 274         cqp_info = &cqp_request->info;
 275         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 276         cqp_info->post_sq = 1;
 277
 278         cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 279         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 280         cqp_info->in.u.manage_push_page.info.free_page = 1;
 281         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 282         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 283
 284         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 285         if (!status)
 286                 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 287         else
 288                 i40iw_pr_err("CQP-OP Push page fail");
 289 }
 290
 291 /**
 292  * i40iw_alloc_pd - allocate protection domain
 293  * @pd: PD pointer
 294  * @udata: user data
 295  */
 296 static int i40iw_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
 297 {
 298         struct i40iw_pd *iwpd = to_iwpd(pd);
 299         struct i40iw_device *iwdev = to_iwdev(pd->device);
 300         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 301         struct i40iw_alloc_pd_resp uresp;
 302         struct i40iw_sc_pd *sc_pd;
 303         u32 pd_id = 0;
 304         int err;
 305
 306         if (iwdev->closing)
 307                 return -ENODEV;
 308
 309         err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 310                                    iwdev->max_pd, &pd_id, &iwdev->next_pd);
 311         if (err) {
 312                 i40iw_pr_err("alloc resource failed\n");
 313                 return err;
 314         }
 315
 316         sc_pd = &iwpd->sc_pd;
 317
 318         if (udata) {
 319                 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
 320                         udata, struct i40iw_ucontext, ibucontext);
 321                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 322                 memset(&uresp, 0, sizeof(uresp));
 323                 uresp.pd_id = pd_id;
 324                 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 325                         err = -EFAULT;
 326                         goto error;
 327                 }
 328         } else {
 329                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
 330         }
 331
 332         i40iw_add_pdusecount(iwpd);
 333         return 0;
 334
 335 error:
 336         i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 337         return err;
 338 }
 339
 340 /**
 341  * i40iw_dealloc_pd - deallocate pd
 342  * @ibpd: ptr of pd to be deallocated
 343  * @udata: user data or null for kernel object
 344  */
 345 static void i40iw_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
 346 {
 347         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 348         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 349
 350         i40iw_rem_pdusecount(iwpd, iwdev);
 351 }
 352
 353 /**
 354  * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 355  * address
 356  * @va: user virtual address
 357  * @pbl_list: pbl list to search in (QP's or CQ's)
 358  */
 359 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 360                                        struct list_head *pbl_list)
 361 {
 362         struct i40iw_pbl *iwpbl;
 363
 364         list_for_each_entry(iwpbl, pbl_list, list) {
 365                 if (iwpbl->user_base == va) {
 366                         iwpbl->on_list = false;
 367                         list_del(&iwpbl->list);
 368                         return iwpbl;
 369                 }
 370         }
 371         return NULL;
 372 }
 373
 374 /**
 375  * i40iw_free_qp_resources - free up memory resources for qp
 376  * @iwdev: iwarp device
 377  * @iwqp: qp ptr (user or kernel)
 378  * @qp_num: qp number assigned
 379  */
 380 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 381                              struct i40iw_qp *iwqp,
 382                              u32 qp_num)
 383 {
 384         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 385
 386         i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
 387         i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 388         if (qp_num)
 389                 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 390         if (iwpbl->pbl_allocated)
 391                 i40iw_free_pble(iwdev->pble_rsrc, &iwpbl->pble_alloc);
 392         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 393         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 394         kfree(iwqp->kqp.wrid_mem);
 395         iwqp->kqp.wrid_mem = NULL;
 396         kfree(iwqp->allocated_buffer);
 397 }
 398
 399 /**
 400  * i40iw_clean_cqes - clean cq entries for qp
 401  * @iwqp: qp ptr (user or kernel)
 402  * @iwcq: cq ptr
 403  */
 404 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 405 {
 406         struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 407
 408         ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 409 }
 410
 411 /**
 412  * i40iw_destroy_qp - destroy qp
 413  * @ibqp: qp's ib pointer also to get to device's qp address
 414  */
 415 static int i40iw_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
 416 {
 417         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 418
 419         iwqp->destroyed = 1;
 420
 421         if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 422                 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 423
 424         if (!iwqp->user_mode) {
 425                 if (iwqp->iwscq) {
 426                         i40iw_clean_cqes(iwqp, iwqp->iwscq);
 427                         if (iwqp->iwrcq != iwqp->iwscq)
 428                                 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 429                 }
 430         }
 431
 432         i40iw_rem_ref(&iwqp->ibqp);
 433         return 0;
 434 }
 435
 436 /**
 437  * i40iw_setup_virt_qp - setup for allocation of virtual qp
 438  * @dev: iwarp device
 439  * @qp: qp ptr
 440  * @init_info: initialize info to return
 441  */
 442 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 443                                struct i40iw_qp *iwqp,
 444                                struct i40iw_qp_init_info *init_info)
 445 {
 446         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 447         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 448
 449         iwqp->page = qpmr->sq_page;
 450         init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 451         if (iwpbl->pbl_allocated) {
 452                 init_info->virtual_map = true;
 453                 init_info->sq_pa = qpmr->sq_pbl.idx;
 454                 init_info->rq_pa = qpmr->rq_pbl.idx;
 455         } else {
 456                 init_info->sq_pa = qpmr->sq_pbl.addr;
 457                 init_info->rq_pa = qpmr->rq_pbl.addr;
 458         }
 459         return 0;
 460 }
 461
 462 /**
 463  * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 464  * @iwdev: iwarp device
 465  * @iwqp: qp ptr (user or kernel)
 466  * @info: initialize info to return
 467  */
 468 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 469                                 struct i40iw_qp *iwqp,
 470                                 struct i40iw_qp_init_info *info)
 471 {
 472         struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 473         u32 sqdepth, rqdepth;
 474         u8 sqshift;
 475         u32 size;
 476         enum i40iw_status_code status;
 477         struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 478
 479         i40iw_get_wqe_shift(ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 480         status = i40iw_get_sqdepth(ukinfo->sq_size, sqshift, &sqdepth);
 481         if (status)
 482                 return -ENOMEM;
 483
 484         status = i40iw_get_rqdepth(ukinfo->rq_size, I40IW_MAX_RQ_WQE_SHIFT, &rqdepth);
 485         if (status)
 486                 return -ENOMEM;
 487
 488         size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 489         iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 490
 491         ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 492         if (!ukinfo->sq_wrtrk_array)
 493                 return -ENOMEM;
 494
 495         ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 496
 497         size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 498         size += (I40IW_SHADOW_AREA_SIZE << 3);
 499
 500         status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 501         if (status) {
 502                 kfree(ukinfo->sq_wrtrk_array);
 503                 ukinfo->sq_wrtrk_array = NULL;
 504                 return -ENOMEM;
 505         }
 506
 507         ukinfo->sq = mem->va;
 508         info->sq_pa = mem->pa;
 509
 510         ukinfo->rq = &ukinfo->sq[sqdepth];
 511         info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 512
 513         ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 514         info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 515
 516         ukinfo->sq_size = sqdepth >> sqshift;
 517         ukinfo->rq_size = rqdepth >> I40IW_MAX_RQ_WQE_SHIFT;
 518         ukinfo->qp_id = iwqp->ibqp.qp_num;
 519         return 0;
 520 }
 521
 522 /**
 523  * i40iw_create_qp - create qp
 524  * @ibpd: ptr of pd
 525  * @init_attr: attributes for qp
 526  * @udata: user data for create qp
 527  */
 528 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 529                                      struct ib_qp_init_attr *init_attr,
 530                                      struct ib_udata *udata)
 531 {
 532         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 533         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 534         struct i40iw_cqp *iwcqp = &iwdev->cqp;
 535         struct i40iw_qp *iwqp;
 536         struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
 537                 udata, struct i40iw_ucontext, ibucontext);
 538         struct i40iw_create_qp_req req;
 539         struct i40iw_create_qp_resp uresp;
 540         u32 qp_num = 0;
 541         void *mem;
 542         enum i40iw_status_code ret;
 543         int err_code;
 544         int sq_size;
 545         int rq_size;
 546         struct i40iw_sc_qp *qp;
 547         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 548         struct i40iw_qp_init_info init_info;
 549         struct i40iw_create_qp_info *qp_info;
 550         struct i40iw_cqp_request *cqp_request;
 551         struct cqp_commands_info *cqp_info;
 552
 553         struct i40iw_qp_host_ctx_info *ctx_info;
 554         struct i40iwarp_offload_info *iwarp_info;
 555         unsigned long flags;
 556
 557         if (iwdev->closing)
 558                 return ERR_PTR(-ENODEV);
 559
 560         if (init_attr->create_flags)
 561                 return ERR_PTR(-EINVAL);
 562         if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 563                 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 564
 565         if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 566                 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 567
 568         if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 569                 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 570
 571         memset(&init_info, 0, sizeof(init_info));
 572
 573         sq_size = init_attr->cap.max_send_wr;
 574         rq_size = init_attr->cap.max_recv_wr;
 575
 576         init_info.vsi = &iwdev->vsi;
 577         init_info.qp_uk_init_info.sq_size = sq_size;
 578         init_info.qp_uk_init_info.rq_size = rq_size;
 579         init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 580         init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 581         init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 582
 583         mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 584         if (!mem)
 585                 return ERR_PTR(-ENOMEM);
 586
 587         iwqp = (struct i40iw_qp *)mem;
 588         iwqp->allocated_buffer = mem;
 589         qp = &iwqp->sc_qp;
 590         qp->back_qp = (void *)iwqp;
 591         qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 592
 593         iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 594
 595         if (i40iw_allocate_dma_mem(dev->hw,
 596                                    &iwqp->q2_ctx_mem,
 597                                    I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 598                                    256)) {
 599                 i40iw_pr_err("dma_mem failed\n");
 600                 err_code = -ENOMEM;
 601                 goto error;
 602         }
 603
 604         init_info.q2 = iwqp->q2_ctx_mem.va;
 605         init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 606
 607         init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 608         init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 609
 610         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 611                                         &qp_num, &iwdev->next_qp);
 612         if (err_code) {
 613                 i40iw_pr_err("qp resource\n");
 614                 goto error;
 615         }
 616
 617         iwqp->iwdev = iwdev;
 618         iwqp->iwpd = iwpd;
 619         iwqp->ibqp.qp_num = qp_num;
 620         qp = &iwqp->sc_qp;
 621         iwqp->iwscq = to_iwcq(init_attr->send_cq);
 622         iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 623
 624         iwqp->host_ctx.va = init_info.host_ctx;
 625         iwqp->host_ctx.pa = init_info.host_ctx_pa;
 626         iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 627
 628         init_info.pd = &iwpd->sc_pd;
 629         init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 630         iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 631
 632         if (init_attr->qp_type != IB_QPT_RC) {
 633                 err_code = -EINVAL;
 634                 goto error;
 635         }
 636         if (iwdev->push_mode)
 637                 i40iw_alloc_push_page(iwdev, qp);
 638         if (udata) {
 639                 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 640                 if (err_code) {
 641                         i40iw_pr_err("ib_copy_from_data\n");
 642                         goto error;
 643                 }
 644                 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 645                 iwqp->user_mode = 1;
 646
 647                 if (req.user_wqe_buffers) {
 648                         struct i40iw_pbl *iwpbl;
 649
 650                         spin_lock_irqsave(
 651                             &ucontext->qp_reg_mem_list_lock, flags);
 652                         iwpbl = i40iw_get_pbl(
 653                             (unsigned long)req.user_wqe_buffers,
 654                             &ucontext->qp_reg_mem_list);
 655                         spin_unlock_irqrestore(
 656                             &ucontext->qp_reg_mem_list_lock, flags);
 657
 658                         if (!iwpbl) {
 659                                 err_code = -ENODATA;
 660                                 i40iw_pr_err("no pbl info\n");
 661                                 goto error;
 662                         }
 663                         memcpy(&iwqp->iwpbl, iwpbl, sizeof(iwqp->iwpbl));
 664                 }
 665                 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 666         } else {
 667                 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 668         }
 669
 670         if (err_code) {
 671                 i40iw_pr_err("setup qp failed\n");
 672                 goto error;
 673         }
 674
 675         init_info.type = I40IW_QP_TYPE_IWARP;
 676         ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 677         if (ret) {
 678                 err_code = -EPROTO;
 679                 i40iw_pr_err("qp_init fail\n");
 680                 goto error;
 681         }
 682         ctx_info = &iwqp->ctx_info;
 683         iwarp_info = &iwqp->iwarp_info;
 684         iwarp_info->rd_enable = true;
 685         iwarp_info->wr_rdresp_en = true;
 686         if (!iwqp->user_mode) {
 687                 iwarp_info->fast_reg_en = true;
 688                 iwarp_info->priv_mode_en = true;
 689         }
 690         iwarp_info->ddp_ver = 1;
 691         iwarp_info->rdmap_ver = 1;
 692
 693         ctx_info->iwarp_info_valid = true;
 694         ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 695         ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 696         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 697                 ctx_info->push_mode_en = false;
 698         } else {
 699                 ctx_info->push_mode_en = true;
 700                 ctx_info->push_idx = qp->push_idx;
 701         }
 702
 703         ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 704                                              (u64 *)iwqp->host_ctx.va,
 705                                              ctx_info);
 706         ctx_info->iwarp_info_valid = false;
 707         cqp_request = i40iw_get_cqp_request(iwcqp, true);
 708         if (!cqp_request) {
 709                 err_code = -ENOMEM;
 710                 goto error;
 711         }
 712         cqp_info = &cqp_request->info;
 713         qp_info = &cqp_request->info.in.u.qp_create.info;
 714
 715         memset(qp_info, 0, sizeof(*qp_info));
 716
 717         qp_info->cq_num_valid = true;
 718         qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 719
 720         cqp_info->cqp_cmd = OP_QP_CREATE;
 721         cqp_info->post_sq = 1;
 722         cqp_info->in.u.qp_create.qp = qp;
 723         cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 724         ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 725         if (ret) {
 726                 i40iw_pr_err("CQP-OP QP create fail");
 727                 err_code = -EACCES;
 728                 goto error;
 729         }
 730
 731         i40iw_add_ref(&iwqp->ibqp);
 732         spin_lock_init(&iwqp->lock);
 733         iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 734         iwdev->qp_table[qp_num] = iwqp;
 735         i40iw_add_pdusecount(iwqp->iwpd);
 736         i40iw_add_devusecount(iwdev);
 737         if (udata) {
 738                 memset(&uresp, 0, sizeof(uresp));
 739                 uresp.actual_sq_size = sq_size;
 740                 uresp.actual_rq_size = rq_size;
 741                 uresp.qp_id = qp_num;
 742                 uresp.push_idx = qp->push_idx;
 743                 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 744                 if (err_code) {
 745                         i40iw_pr_err("copy_to_udata failed\n");
 746                         i40iw_destroy_qp(&iwqp->ibqp, udata);
 747                         /* let the completion of the qp destroy free the qp */
 748                         return ERR_PTR(err_code);
 749                 }
 750         }
 751         init_completion(&iwqp->sq_drained);
 752         init_completion(&iwqp->rq_drained);
 753
 754         return &iwqp->ibqp;
 755 error:
 756         i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 757         return ERR_PTR(err_code);
 758 }
 759
 760 /**
 761  * i40iw_query - query qp attributes
 762  * @ibqp: qp pointer
 763  * @attr: attributes pointer
 764  * @attr_mask: Not used
 765  * @init_attr: qp attributes to return
 766  */
 767 static int i40iw_query_qp(struct ib_qp *ibqp,
 768                           struct ib_qp_attr *attr,
 769                           int attr_mask,
 770                           struct ib_qp_init_attr *init_attr)
 771 {
 772         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 773         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 774
 775         attr->qp_access_flags = 0;
 776         attr->cap.max_send_wr = qp->qp_uk.sq_size;
 777         attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 778         attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 779         attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 780         attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 781         attr->port_num = 1;
 782         init_attr->event_handler = iwqp->ibqp.event_handler;
 783         init_attr->qp_context = iwqp->ibqp.qp_context;
 784         init_attr->send_cq = iwqp->ibqp.send_cq;
 785         init_attr->recv_cq = iwqp->ibqp.recv_cq;
 786         init_attr->srq = iwqp->ibqp.srq;
 787         init_attr->cap = attr->cap;
 788         init_attr->port_num = 1;
 789         return 0;
 790 }
 791
 792 /**
 793  * i40iw_hw_modify_qp - setup cqp for modify qp
 794  * @iwdev: iwarp device
 795  * @iwqp: qp ptr (user or kernel)
 796  * @info: info for modify qp
 797  * @wait: flag to wait or not for modify qp completion
 798  */
 799 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 800                         struct i40iw_modify_qp_info *info, bool wait)
 801 {
 802         struct i40iw_cqp_request *cqp_request;
 803         struct cqp_commands_info *cqp_info;
 804         struct i40iw_modify_qp_info *m_info;
 805         struct i40iw_gen_ae_info ae_info;
 806
 807         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 808         if (!cqp_request)
 809                 return;
 810
 811         cqp_info = &cqp_request->info;
 812         m_info = &cqp_info->in.u.qp_modify.info;
 813         memcpy(m_info, info, sizeof(*m_info));
 814         cqp_info->cqp_cmd = OP_QP_MODIFY;
 815         cqp_info->post_sq = 1;
 816         cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 817         cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 818         if (!i40iw_handle_cqp_op(iwdev, cqp_request))
 819                 return;
 820
 821         switch (m_info->next_iwarp_state) {
 822         case I40IW_QP_STATE_RTS:
 823                 if (iwqp->iwarp_state == I40IW_QP_STATE_IDLE)
 824                         i40iw_send_reset(iwqp->cm_node);
 825                 /* fall through */
 826         case I40IW_QP_STATE_IDLE:
 827         case I40IW_QP_STATE_TERMINATE:
 828         case I40IW_QP_STATE_CLOSING:
 829                 ae_info.ae_code = I40IW_AE_BAD_CLOSE;
 830                 ae_info.ae_source = 0;
 831                 i40iw_gen_ae(iwdev, &iwqp->sc_qp, &ae_info, false);
 832                 break;
 833         case I40IW_QP_STATE_ERROR:
 834         default:
 835                 break;
 836         }
 837 }
 838
 839 /**
 840  * i40iw_modify_qp - modify qp request
 841  * @ibqp: qp's pointer for modify
 842  * @attr: access attributes
 843  * @attr_mask: state mask
 844  * @udata: user data
 845  */
 846 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 847                     int attr_mask, struct ib_udata *udata)
 848 {
 849         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 850         struct i40iw_device *iwdev = iwqp->iwdev;
 851         struct i40iw_qp_host_ctx_info *ctx_info;
 852         struct i40iwarp_offload_info *iwarp_info;
 853         struct i40iw_modify_qp_info info;
 854         u8 issue_modify_qp = 0;
 855         u8 dont_wait = 0;
 856         u32 err;
 857         unsigned long flags;
 858
 859         memset(&info, 0, sizeof(info));
 860         ctx_info = &iwqp->ctx_info;
 861         iwarp_info = &iwqp->iwarp_info;
 862
 863         spin_lock_irqsave(&iwqp->lock, flags);
 864
 865         if (attr_mask & IB_QP_STATE) {
 866                 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
 867                         err = -EINVAL;
 868                         goto exit;
 869                 }
 870
 871                 switch (attr->qp_state) {
 872                 case IB_QPS_INIT:
 873                 case IB_QPS_RTR:
 874                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 875                                 err = -EINVAL;
 876                                 goto exit;
 877                         }
 878                         if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 879                                 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 880                                 issue_modify_qp = 1;
 881                         }
 882                         break;
 883                 case IB_QPS_RTS:
 884                         if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 885                             (!iwqp->cm_id)) {
 886                                 err = -EINVAL;
 887                                 goto exit;
 888                         }
 889
 890                         issue_modify_qp = 1;
 891                         iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 892                         iwqp->hte_added = 1;
 893                         info.next_iwarp_state = I40IW_QP_STATE_RTS;
 894                         info.tcp_ctx_valid = true;
 895                         info.ord_valid = true;
 896                         info.arp_cache_idx_valid = true;
 897                         info.cq_num_valid = true;
 898                         break;
 899                 case IB_QPS_SQD:
 900                         if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 901                                 err = 0;
 902                                 goto exit;
 903                         }
 904                         if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 905                             (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 906                                 err = 0;
 907                                 goto exit;
 908                         }
 909                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 910                                 err = -EINVAL;
 911                                 goto exit;
 912                         }
 913                         info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 914                         issue_modify_qp = 1;
 915                         break;
 916                 case IB_QPS_SQE:
 917                         if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 918                                 err = -EINVAL;
 919                                 goto exit;
 920                         }
 921                         info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 922                         issue_modify_qp = 1;
 923                         break;
 924                 case IB_QPS_ERR:
 925                 case IB_QPS_RESET:
 926                         if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 927                                 err = -EINVAL;
 928                                 goto exit;
 929                         }
 930                         if (iwqp->sc_qp.term_flags)
 931                                 i40iw_terminate_del_timer(&iwqp->sc_qp);
 932                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 933                         if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 934                             iwdev->iw_status &&
 935                             (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 936                                 info.reset_tcp_conn = true;
 937                         else
 938                                 dont_wait = 1;
 939                         issue_modify_qp = 1;
 940                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 941                         break;
 942                 default:
 943                         err = -EINVAL;
 944                         goto exit;
 945                 }
 946
 947                 iwqp->ibqp_state = attr->qp_state;
 948
 949         }
 950         if (attr_mask & IB_QP_ACCESS_FLAGS) {
 951                 ctx_info->iwarp_info_valid = true;
 952                 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 953                         iwarp_info->wr_rdresp_en = true;
 954                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 955                         iwarp_info->wr_rdresp_en = true;
 956                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 957                         iwarp_info->rd_enable = true;
 958                 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 959                         iwarp_info->bind_en = true;
 960
 961                 if (iwqp->user_mode) {
 962                         iwarp_info->rd_enable = true;
 963                         iwarp_info->wr_rdresp_en = true;
 964                         iwarp_info->priv_mode_en = false;
 965                 }
 966         }
 967
 968         if (ctx_info->iwarp_info_valid) {
 969                 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 970                 int ret;
 971
 972                 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 973                 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 974                 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 975                                                      (u64 *)iwqp->host_ctx.va,
 976                                                      ctx_info);
 977                 if (ret) {
 978                         i40iw_pr_err("setting QP context\n");
 979                         err = -EINVAL;
 980                         goto exit;
 981                 }
 982         }
 983
 984         spin_unlock_irqrestore(&iwqp->lock, flags);
 985
 986         if (issue_modify_qp) {
 987                 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
 988
 989                 spin_lock_irqsave(&iwqp->lock, flags);
 990                 iwqp->iwarp_state = info.next_iwarp_state;
 991                 spin_unlock_irqrestore(&iwqp->lock, flags);
 992         }
 993
 994         if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
 995                 if (dont_wait) {
 996                         if (iwqp->cm_id && iwqp->hw_tcp_state) {
 997                                 spin_lock_irqsave(&iwqp->lock, flags);
 998                                 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
 999                                 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1000                                 spin_unlock_irqrestore(&iwqp->lock, flags);
1001                                 i40iw_cm_disconn(iwqp);
1002                         }
1003                 } else {
1004                         spin_lock_irqsave(&iwqp->lock, flags);
1005                         if (iwqp->cm_id) {
1006                                 if (atomic_inc_return(&iwqp->close_timer_started) == 1) {
1007                                         iwqp->cm_id->add_ref(iwqp->cm_id);
1008                                         i40iw_schedule_cm_timer(iwqp->cm_node,
1009                                                                 (struct i40iw_puda_buf *)iwqp,
1010                                                                  I40IW_TIMER_TYPE_CLOSE, 1, 0);
1011                                 }
1012                         }
1013                         spin_unlock_irqrestore(&iwqp->lock, flags);
1014                 }
1015         }
1016         return 0;
1017 exit:
1018         spin_unlock_irqrestore(&iwqp->lock, flags);
1019         return err;
1020 }
1021
1022 /**
1023  * cq_free_resources - free up recources for cq
1024  * @iwdev: iwarp device
1025  * @iwcq: cq ptr
1026  */
1027 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1028 {
1029         struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1030
1031         if (!iwcq->user_mode)
1032                 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1033         i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1034 }
1035
1036 /**
1037  * i40iw_cq_wq_destroy - send cq destroy cqp
1038  * @iwdev: iwarp device
1039  * @cq: hardware control cq
1040  */
1041 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1042 {
1043         enum i40iw_status_code status;
1044         struct i40iw_cqp_request *cqp_request;
1045         struct cqp_commands_info *cqp_info;
1046
1047         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1048         if (!cqp_request)
1049                 return;
1050
1051         cqp_info = &cqp_request->info;
1052
1053         cqp_info->cqp_cmd = OP_CQ_DESTROY;
1054         cqp_info->post_sq = 1;
1055         cqp_info->in.u.cq_destroy.cq = cq;
1056         cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1057         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1058         if (status)
1059                 i40iw_pr_err("CQP-OP Destroy QP fail");
1060 }
1061
1062 /**
1063  * i40iw_destroy_cq - destroy cq
1064  * @ib_cq: cq pointer
1065  * @udata: user data or NULL for kernel object
1066  */
1067 static int i40iw_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1068 {
1069         struct i40iw_cq *iwcq;
1070         struct i40iw_device *iwdev;
1071         struct i40iw_sc_cq *cq;
1072
1073         if (!ib_cq) {
1074                 i40iw_pr_err("ib_cq == NULL\n");
1075                 return 0;
1076         }
1077
1078         iwcq = to_iwcq(ib_cq);
1079         iwdev = to_iwdev(ib_cq->device);
1080         cq = &iwcq->sc_cq;
1081         i40iw_cq_wq_destroy(iwdev, cq);
1082         cq_free_resources(iwdev, iwcq);
1083         kfree(iwcq);
1084         i40iw_rem_devusecount(iwdev);
1085         return 0;
1086 }
1087
1088 /**
1089  * i40iw_create_cq - create cq
1090  * @ibdev: device pointer from stack
1091  * @attr: attributes for cq
1092  * @udata: user data
1093  */
1094 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1095                                      const struct ib_cq_init_attr *attr,
1096                                      struct ib_udata *udata)
1097 {
1098         struct i40iw_device *iwdev = to_iwdev(ibdev);
1099         struct i40iw_cq *iwcq;
1100         struct i40iw_pbl *iwpbl;
1101         u32 cq_num = 0;
1102         struct i40iw_sc_cq *cq;
1103         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1104         struct i40iw_cq_init_info info;
1105         enum i40iw_status_code status;
1106         struct i40iw_cqp_request *cqp_request;
1107         struct cqp_commands_info *cqp_info;
1108         struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1109         unsigned long flags;
1110         int err_code;
1111         int entries = attr->cqe;
1112
1113         if (iwdev->closing)
1114                 return ERR_PTR(-ENODEV);
1115
1116         if (entries > iwdev->max_cqe)
1117                 return ERR_PTR(-EINVAL);
1118
1119         iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1120         if (!iwcq)
1121                 return ERR_PTR(-ENOMEM);
1122
1123         memset(&info, 0, sizeof(info));
1124
1125         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1126                                         iwdev->max_cq, &cq_num,
1127                                         &iwdev->next_cq);
1128         if (err_code)
1129                 goto error;
1130
1131         cq = &iwcq->sc_cq;
1132         cq->back_cq = (void *)iwcq;
1133         spin_lock_init(&iwcq->lock);
1134
1135         info.dev = dev;
1136         ukinfo->cq_size = max(entries, 4);
1137         ukinfo->cq_id = cq_num;
1138         iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1139         info.ceqe_mask = 0;
1140         if (attr->comp_vector < iwdev->ceqs_count)
1141                 info.ceq_id = attr->comp_vector;
1142         info.ceq_id_valid = true;
1143         info.ceqe_mask = 1;
1144         info.type = I40IW_CQ_TYPE_IWARP;
1145         if (udata) {
1146                 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
1147                         udata, struct i40iw_ucontext, ibucontext);
1148                 struct i40iw_create_cq_req req;
1149                 struct i40iw_cq_mr *cqmr;
1150
1151                 memset(&req, 0, sizeof(req));
1152                 iwcq->user_mode = true;
1153                 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) {
1154                         err_code = -EFAULT;
1155                         goto cq_free_resources;
1156                 }
1157
1158                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1159                 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1160                                       &ucontext->cq_reg_mem_list);
1161                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1162                 if (!iwpbl) {
1163                         err_code = -EPROTO;
1164                         goto cq_free_resources;
1165                 }
1166
1167                 iwcq->iwpbl = iwpbl;
1168                 iwcq->cq_mem_size = 0;
1169                 cqmr = &iwpbl->cq_mr;
1170                 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1171                 if (iwpbl->pbl_allocated) {
1172                         info.virtual_map = true;
1173                         info.pbl_chunk_size = 1;
1174                         info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1175                 } else {
1176                         info.cq_base_pa = cqmr->cq_pbl.addr;
1177                 }
1178         } else {
1179                 /* Kmode allocations */
1180                 int rsize;
1181                 int shadow;
1182
1183                 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1184                 rsize = round_up(rsize, 256);
1185                 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1186                 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1187                                                 rsize + shadow, 256);
1188                 if (status) {
1189                         err_code = -ENOMEM;
1190                         goto cq_free_resources;
1191                 }
1192                 ukinfo->cq_base = iwcq->kmem.va;
1193                 info.cq_base_pa = iwcq->kmem.pa;
1194                 info.shadow_area_pa = info.cq_base_pa + rsize;
1195                 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1196         }
1197
1198         if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1199                 i40iw_pr_err("init cq fail\n");
1200                 err_code = -EPROTO;
1201                 goto cq_free_resources;
1202         }
1203
1204         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1205         if (!cqp_request) {
1206                 err_code = -ENOMEM;
1207                 goto cq_free_resources;
1208         }
1209
1210         cqp_info = &cqp_request->info;
1211         cqp_info->cqp_cmd = OP_CQ_CREATE;
1212         cqp_info->post_sq = 1;
1213         cqp_info->in.u.cq_create.cq = cq;
1214         cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1215         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1216         if (status) {
1217                 i40iw_pr_err("CQP-OP Create QP fail");
1218                 err_code = -EPROTO;
1219                 goto cq_free_resources;
1220         }
1221
1222         if (udata) {
1223                 struct i40iw_create_cq_resp resp;
1224
1225                 memset(&resp, 0, sizeof(resp));
1226                 resp.cq_id = info.cq_uk_init_info.cq_id;
1227                 resp.cq_size = info.cq_uk_init_info.cq_size;
1228                 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1229                         i40iw_pr_err("copy to user data\n");
1230                         err_code = -EPROTO;
1231                         goto cq_destroy;
1232                 }
1233         }
1234
1235         i40iw_add_devusecount(iwdev);
1236         return (struct ib_cq *)iwcq;
1237
1238 cq_destroy:
1239         i40iw_cq_wq_destroy(iwdev, cq);
1240 cq_free_resources:
1241         cq_free_resources(iwdev, iwcq);
1242 error:
1243         kfree(iwcq);
1244         return ERR_PTR(err_code);
1245 }
1246
1247 /**
1248  * i40iw_get_user_access - get hw access from IB access
1249  * @acc: IB access to return hw access
1250  */
1251 static inline u16 i40iw_get_user_access(int acc)
1252 {
1253         u16 access = 0;
1254
1255         access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1256         access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1257         access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1258         access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1259         return access;
1260 }
1261
1262 /**
1263  * i40iw_free_stag - free stag resource
1264  * @iwdev: iwarp device
1265  * @stag: stag to free
1266  */
1267 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1268 {
1269         u32 stag_idx;
1270
1271         stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1272         i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1273         i40iw_rem_devusecount(iwdev);
1274 }
1275
1276 /**
1277  * i40iw_create_stag - create random stag
1278  * @iwdev: iwarp device
1279  */
1280 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1281 {
1282         u32 stag = 0;
1283         u32 stag_index = 0;
1284         u32 next_stag_index;
1285         u32 driver_key;
1286         u32 random;
1287         u8 consumer_key;
1288         int ret;
1289
1290         get_random_bytes(&random, sizeof(random));
1291         consumer_key = (u8)random;
1292
1293         driver_key = random & ~iwdev->mr_stagmask;
1294         next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1295         next_stag_index %= iwdev->max_mr;
1296
1297         ret = i40iw_alloc_resource(iwdev,
1298                                    iwdev->allocated_mrs, iwdev->max_mr,
1299                                    &stag_index, &next_stag_index);
1300         if (!ret) {
1301                 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1302                 stag |= driver_key;
1303                 stag += (u32)consumer_key;
1304                 i40iw_add_devusecount(iwdev);
1305         }
1306         return stag;
1307 }
1308
1309 /**
1310  * i40iw_next_pbl_addr - Get next pbl address
1311  * @pbl: pointer to a pble
1312  * @pinfo: info pointer
1313  * @idx: index
1314  */
1315 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1316                                        struct i40iw_pble_info **pinfo,
1317                                        u32 *idx)
1318 {
1319         *idx += 1;
1320         if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1321                 return ++pbl;
1322         *idx = 0;
1323         (*pinfo)++;
1324         return (u64 *)(*pinfo)->addr;
1325 }
1326
1327 /**
1328  * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1329  * @iwmr: iwmr for IB's user page addresses
1330  * @pbl: ple pointer to save 1 level or 0 level pble
1331  * @level: indicated level 0, 1 or 2
1332  */
1333 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1334                                     u64 *pbl,
1335                                     enum i40iw_pble_level level)
1336 {
1337         struct ib_umem *region = iwmr->region;
1338         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1339         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1340         struct i40iw_pble_info *pinfo;
1341         struct ib_block_iter biter;
1342         u32 idx = 0;
1343
1344         pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1345
1346         if (iwmr->type == IW_MEMREG_TYPE_QP)
1347                 iwpbl->qp_mr.sq_page = sg_page(region->sg_head.sgl);
1348
1349         rdma_for_each_block(region->sg_head.sgl, &biter, region->nmap,
1350                             iwmr->page_size) {
1351                 *pbl = rdma_block_iter_dma_address(&biter);
1352                 pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1353         }
1354 }
1355
1356 /**
1357  * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1358  * @arr: lvl1 pbl array
1359  * @npages: page count
1360  * pg_size: page size
1361  *
1362  */
1363 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1364 {
1365         u32 pg_idx;
1366
1367         for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1368                 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1369                         return false;
1370         }
1371         return true;
1372 }
1373
1374 /**
1375  * i40iw_check_mr_contiguous - check if MR is physically contiguous
1376  * @palloc: pbl allocation struct
1377  * pg_size: page size
1378  */
1379 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1380 {
1381         struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1382         struct i40iw_pble_info *leaf = lvl2->leaf;
1383         u64 *arr = NULL;
1384         u64 *start_addr = NULL;
1385         int i;
1386         bool ret;
1387
1388         if (palloc->level == I40IW_LEVEL_1) {
1389                 arr = (u64 *)palloc->level1.addr;
1390                 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1391                 return ret;
1392         }
1393
1394         start_addr = (u64 *)leaf->addr;
1395
1396         for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1397                 arr = (u64 *)leaf->addr;
1398                 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1399                         return false;
1400                 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1401                 if (!ret)
1402                         return false;
1403         }
1404
1405         return true;
1406 }
1407
1408 /**
1409  * i40iw_setup_pbles - copy user pg address to pble's
1410  * @iwdev: iwarp device
1411  * @iwmr: mr pointer for this memory registration
1412  * @use_pbles: flag if to use pble's
1413  */
1414 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1415                              struct i40iw_mr *iwmr,
1416                              bool use_pbles)
1417 {
1418         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1419         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1420         struct i40iw_pble_info *pinfo;
1421         u64 *pbl;
1422         enum i40iw_status_code status;
1423         enum i40iw_pble_level level = I40IW_LEVEL_1;
1424
1425         if (use_pbles) {
1426                 mutex_lock(&iwdev->pbl_mutex);
1427                 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1428                 mutex_unlock(&iwdev->pbl_mutex);
1429                 if (status)
1430                         return -ENOMEM;
1431
1432                 iwpbl->pbl_allocated = true;
1433                 level = palloc->level;
1434                 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1435                 pbl = (u64 *)pinfo->addr;
1436         } else {
1437                 pbl = iwmr->pgaddrmem;
1438         }
1439
1440         i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1441
1442         if (use_pbles)
1443                 iwmr->pgaddrmem[0] = *pbl;
1444
1445         return 0;
1446 }
1447
1448 /**
1449  * i40iw_handle_q_mem - handle memory for qp and cq
1450  * @iwdev: iwarp device
1451  * @req: information for q memory management
1452  * @iwpbl: pble struct
1453  * @use_pbles: flag to use pble
1454  */
1455 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1456                               struct i40iw_mem_reg_req *req,
1457                               struct i40iw_pbl *iwpbl,
1458                               bool use_pbles)
1459 {
1460         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1461         struct i40iw_mr *iwmr = iwpbl->iwmr;
1462         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1463         struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1464         struct i40iw_hmc_pble *hmc_p;
1465         u64 *arr = iwmr->pgaddrmem;
1466         u32 pg_size;
1467         int err;
1468         int total;
1469         bool ret = true;
1470
1471         total = req->sq_pages + req->rq_pages + req->cq_pages;
1472         pg_size = iwmr->page_size;
1473
1474         err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1475         if (err)
1476                 return err;
1477
1478         if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1479                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1480                 iwpbl->pbl_allocated = false;
1481                 return -ENOMEM;
1482         }
1483
1484         if (use_pbles)
1485                 arr = (u64 *)palloc->level1.addr;
1486
1487         if (iwmr->type == IW_MEMREG_TYPE_QP) {
1488                 hmc_p = &qpmr->sq_pbl;
1489                 qpmr->shadow = (dma_addr_t)arr[total];
1490
1491                 if (use_pbles) {
1492                         ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1493                         if (ret)
1494                                 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1495                 }
1496
1497                 if (!ret) {
1498                         hmc_p->idx = palloc->level1.idx;
1499                         hmc_p = &qpmr->rq_pbl;
1500                         hmc_p->idx = palloc->level1.idx + req->sq_pages;
1501                 } else {
1502                         hmc_p->addr = arr[0];
1503                         hmc_p = &qpmr->rq_pbl;
1504                         hmc_p->addr = arr[req->sq_pages];
1505                 }
1506         } else {                /* CQ */
1507                 hmc_p = &cqmr->cq_pbl;
1508                 cqmr->shadow = (dma_addr_t)arr[total];
1509
1510                 if (use_pbles)
1511                         ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1512
1513                 if (!ret)
1514                         hmc_p->idx = palloc->level1.idx;
1515                 else
1516                         hmc_p->addr = arr[0];
1517         }
1518
1519         if (use_pbles && ret) {
1520                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1521                 iwpbl->pbl_allocated = false;
1522         }
1523
1524         return err;
1525 }
1526
1527 /**
1528  * i40iw_hw_alloc_stag - cqp command to allocate stag
1529  * @iwdev: iwarp device
1530  * @iwmr: iwarp mr pointer
1531  */
1532 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1533 {
1534         struct i40iw_allocate_stag_info *info;
1535         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1536         enum i40iw_status_code status;
1537         int err = 0;
1538         struct i40iw_cqp_request *cqp_request;
1539         struct cqp_commands_info *cqp_info;
1540
1541         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1542         if (!cqp_request)
1543                 return -ENOMEM;
1544
1545         cqp_info = &cqp_request->info;
1546         info = &cqp_info->in.u.alloc_stag.info;
1547         memset(info, 0, sizeof(*info));
1548         info->page_size = PAGE_SIZE;
1549         info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1550         info->pd_id = iwpd->sc_pd.pd_id;
1551         info->total_len = iwmr->length;
1552         info->remote_access = true;
1553         cqp_info->cqp_cmd = OP_ALLOC_STAG;
1554         cqp_info->post_sq = 1;
1555         cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1556         cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1557
1558         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1559         if (status) {
1560                 err = -ENOMEM;
1561                 i40iw_pr_err("CQP-OP MR Reg fail");
1562         }
1563         return err;
1564 }
1565
1566 /**
1567  * i40iw_alloc_mr - register stag for fast memory registration
1568  * @pd: ibpd pointer
1569  * @mr_type: memory for stag registrion
1570  * @max_num_sg: man number of pages
1571  * @udata: user data or NULL for kernel objects
1572  */
1573 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
1574                                     u32 max_num_sg, struct ib_udata *udata)
1575 {
1576         struct i40iw_pd *iwpd = to_iwpd(pd);
1577         struct i40iw_device *iwdev = to_iwdev(pd->device);
1578         struct i40iw_pble_alloc *palloc;
1579         struct i40iw_pbl *iwpbl;
1580         struct i40iw_mr *iwmr;
1581         enum i40iw_status_code status;
1582         u32 stag;
1583         int err_code = -ENOMEM;
1584
1585         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1586         if (!iwmr)
1587                 return ERR_PTR(-ENOMEM);
1588
1589         stag = i40iw_create_stag(iwdev);
1590         if (!stag) {
1591                 err_code = -EOVERFLOW;
1592                 goto err;
1593         }
1594         stag &= ~I40IW_CQPSQ_STAG_KEY_MASK;
1595         iwmr->stag = stag;
1596         iwmr->ibmr.rkey = stag;
1597         iwmr->ibmr.lkey = stag;
1598         iwmr->ibmr.pd = pd;
1599         iwmr->ibmr.device = pd->device;
1600         iwpbl = &iwmr->iwpbl;
1601         iwpbl->iwmr = iwmr;
1602         iwmr->type = IW_MEMREG_TYPE_MEM;
1603         palloc = &iwpbl->pble_alloc;
1604         iwmr->page_cnt = max_num_sg;
1605         mutex_lock(&iwdev->pbl_mutex);
1606         status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1607         mutex_unlock(&iwdev->pbl_mutex);
1608         if (status)
1609                 goto err1;
1610
1611         if (palloc->level != I40IW_LEVEL_1)
1612                 goto err2;
1613         err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1614         if (err_code)
1615                 goto err2;
1616         iwpbl->pbl_allocated = true;
1617         i40iw_add_pdusecount(iwpd);
1618         return &iwmr->ibmr;
1619 err2:
1620         i40iw_free_pble(iwdev->pble_rsrc, palloc);
1621 err1:
1622         i40iw_free_stag(iwdev, stag);
1623 err:
1624         kfree(iwmr);
1625         return ERR_PTR(err_code);
1626 }
1627
1628 /**
1629  * i40iw_set_page - populate pbl list for fmr
1630  * @ibmr: ib mem to access iwarp mr pointer
1631  * @addr: page dma address fro pbl list
1632  */
1633 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1634 {
1635         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1636         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1637         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1638         u64 *pbl;
1639
1640         if (unlikely(iwmr->npages == iwmr->page_cnt))
1641                 return -ENOMEM;
1642
1643         pbl = (u64 *)palloc->level1.addr;
1644         pbl[iwmr->npages++] = cpu_to_le64(addr);
1645         return 0;
1646 }
1647
1648 /**
1649  * i40iw_map_mr_sg - map of sg list for fmr
1650  * @ibmr: ib mem to access iwarp mr pointer
1651  * @sg: scatter gather list for fmr
1652  * @sg_nents: number of sg pages
1653  */
1654 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1655                            int sg_nents, unsigned int *sg_offset)
1656 {
1657         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1658
1659         iwmr->npages = 0;
1660         return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1661 }
1662
1663 /**
1664  * i40iw_drain_sq - drain the send queue
1665  * @ibqp: ib qp pointer
1666  */
1667 static void i40iw_drain_sq(struct ib_qp *ibqp)
1668 {
1669         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1670         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1671
1672         if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1673                 wait_for_completion(&iwqp->sq_drained);
1674 }
1675
1676 /**
1677  * i40iw_drain_rq - drain the receive queue
1678  * @ibqp: ib qp pointer
1679  */
1680 static void i40iw_drain_rq(struct ib_qp *ibqp)
1681 {
1682         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1683         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1684
1685         if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1686                 wait_for_completion(&iwqp->rq_drained);
1687 }
1688
1689 /**
1690  * i40iw_hwreg_mr - send cqp command for memory registration
1691  * @iwdev: iwarp device
1692  * @iwmr: iwarp mr pointer
1693  * @access: access for MR
1694  */
1695 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1696                           struct i40iw_mr *iwmr,
1697                           u16 access)
1698 {
1699         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1700         struct i40iw_reg_ns_stag_info *stag_info;
1701         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1702         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1703         enum i40iw_status_code status;
1704         int err = 0;
1705         struct i40iw_cqp_request *cqp_request;
1706         struct cqp_commands_info *cqp_info;
1707
1708         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1709         if (!cqp_request)
1710                 return -ENOMEM;
1711
1712         cqp_info = &cqp_request->info;
1713         stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1714         memset(stag_info, 0, sizeof(*stag_info));
1715         stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1716         stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1717         stag_info->stag_key = (u8)iwmr->stag;
1718         stag_info->total_len = iwmr->length;
1719         stag_info->access_rights = access;
1720         stag_info->pd_id = iwpd->sc_pd.pd_id;
1721         stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1722         stag_info->page_size = iwmr->page_size;
1723
1724         if (iwpbl->pbl_allocated) {
1725                 if (palloc->level == I40IW_LEVEL_1) {
1726                         stag_info->first_pm_pbl_index = palloc->level1.idx;
1727                         stag_info->chunk_size = 1;
1728                 } else {
1729                         stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1730                         stag_info->chunk_size = 3;
1731                 }
1732         } else {
1733                 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1734         }
1735
1736         cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1737         cqp_info->post_sq = 1;
1738         cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1739         cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1740
1741         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1742         if (status) {
1743                 err = -ENOMEM;
1744                 i40iw_pr_err("CQP-OP MR Reg fail");
1745         }
1746         return err;
1747 }
1748
1749 /**
1750  * i40iw_reg_user_mr - Register a user memory region
1751  * @pd: ptr of pd
1752  * @start: virtual start address
1753  * @length: length of mr
1754  * @virt: virtual address
1755  * @acc: access of mr
1756  * @udata: user data
1757  */
1758 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1759                                        u64 start,
1760                                        u64 length,
1761                                        u64 virt,
1762                                        int acc,
1763                                        struct ib_udata *udata)
1764 {
1765         struct i40iw_pd *iwpd = to_iwpd(pd);
1766         struct i40iw_device *iwdev = to_iwdev(pd->device);
1767         struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
1768                 udata, struct i40iw_ucontext, ibucontext);
1769         struct i40iw_pble_alloc *palloc;
1770         struct i40iw_pbl *iwpbl;
1771         struct i40iw_mr *iwmr;
1772         struct ib_umem *region;
1773         struct i40iw_mem_reg_req req;
1774         u64 pbl_depth = 0;
1775         u32 stag = 0;
1776         u16 access;
1777         u64 region_length;
1778         bool use_pbles = false;
1779         unsigned long flags;
1780         int err = -ENOSYS;
1781         int ret;
1782         int pg_shift;
1783
1784         if (iwdev->closing)
1785                 return ERR_PTR(-ENODEV);
1786
1787         if (length > I40IW_MAX_MR_SIZE)
1788                 return ERR_PTR(-EINVAL);
1789         region = ib_umem_get(udata, start, length, acc, 0);
1790         if (IS_ERR(region))
1791                 return (struct ib_mr *)region;
1792
1793         if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1794                 ib_umem_release(region);
1795                 return ERR_PTR(-EFAULT);
1796         }
1797
1798         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1799         if (!iwmr) {
1800                 ib_umem_release(region);
1801                 return ERR_PTR(-ENOMEM);
1802         }
1803
1804         iwpbl = &iwmr->iwpbl;
1805         iwpbl->iwmr = iwmr;
1806         iwmr->region = region;
1807         iwmr->ibmr.pd = pd;
1808         iwmr->ibmr.device = pd->device;
1809
1810         iwmr->page_size = PAGE_SIZE;
1811         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1812                 iwmr->page_size = ib_umem_find_best_pgsz(region, SZ_4K | SZ_2M,
1813                                                          virt);
1814
1815         region_length = region->length + (start & (iwmr->page_size - 1));
1816         pg_shift = ffs(iwmr->page_size) - 1;
1817         pbl_depth = region_length >> pg_shift;
1818         pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1819         iwmr->length = region->length;
1820
1821         iwpbl->user_base = virt;
1822         palloc = &iwpbl->pble_alloc;
1823
1824         iwmr->type = req.reg_type;
1825         iwmr->page_cnt = (u32)pbl_depth;
1826
1827         switch (req.reg_type) {
1828         case IW_MEMREG_TYPE_QP:
1829                 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1830                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1831                 if (err)
1832                         goto error;
1833                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1834                 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1835                 iwpbl->on_list = true;
1836                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1837                 break;
1838         case IW_MEMREG_TYPE_CQ:
1839                 use_pbles = (req.cq_pages > 1);
1840                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1841                 if (err)
1842                         goto error;
1843
1844                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1845                 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1846                 iwpbl->on_list = true;
1847                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1848                 break;
1849         case IW_MEMREG_TYPE_MEM:
1850                 use_pbles = (iwmr->page_cnt != 1);
1851                 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1852
1853                 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1854                 if (err)
1855                         goto error;
1856
1857                 if (use_pbles) {
1858                         ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1859                         if (ret) {
1860                                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1861                                 iwpbl->pbl_allocated = false;
1862                         }
1863                 }
1864
1865                 access |= i40iw_get_user_access(acc);
1866                 stag = i40iw_create_stag(iwdev);
1867                 if (!stag) {
1868                         err = -ENOMEM;
1869                         goto error;
1870                 }
1871
1872                 iwmr->stag = stag;
1873                 iwmr->ibmr.rkey = stag;
1874                 iwmr->ibmr.lkey = stag;
1875
1876                 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1877                 if (err) {
1878                         i40iw_free_stag(iwdev, stag);
1879                         goto error;
1880                 }
1881
1882                 break;
1883         default:
1884                 goto error;
1885         }
1886
1887         iwmr->type = req.reg_type;
1888         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1889                 i40iw_add_pdusecount(iwpd);
1890         return &iwmr->ibmr;
1891
1892 error:
1893         if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1894                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1895         ib_umem_release(region);
1896         kfree(iwmr);
1897         return ERR_PTR(err);
1898 }
1899
1900 /**
1901  * i40iw_reg_phys_mr - register kernel physical memory
1902  * @pd: ibpd pointer
1903  * @addr: physical address of memory to register
1904  * @size: size of memory to register
1905  * @acc: Access rights
1906  * @iova_start: start of virtual address for physical buffers
1907  */
1908 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1909                                 u64 addr,
1910                                 u64 size,
1911                                 int acc,
1912                                 u64 *iova_start)
1913 {
1914         struct i40iw_pd *iwpd = to_iwpd(pd);
1915         struct i40iw_device *iwdev = to_iwdev(pd->device);
1916         struct i40iw_pbl *iwpbl;
1917         struct i40iw_mr *iwmr;
1918         enum i40iw_status_code status;
1919         u32 stag;
1920         u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1921         int ret;
1922
1923         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1924         if (!iwmr)
1925                 return ERR_PTR(-ENOMEM);
1926         iwmr->ibmr.pd = pd;
1927         iwmr->ibmr.device = pd->device;
1928         iwpbl = &iwmr->iwpbl;
1929         iwpbl->iwmr = iwmr;
1930         iwmr->type = IW_MEMREG_TYPE_MEM;
1931         iwpbl->user_base = *iova_start;
1932         stag = i40iw_create_stag(iwdev);
1933         if (!stag) {
1934                 ret = -EOVERFLOW;
1935                 goto err;
1936         }
1937         access |= i40iw_get_user_access(acc);
1938         iwmr->stag = stag;
1939         iwmr->ibmr.rkey = stag;
1940         iwmr->ibmr.lkey = stag;
1941         iwmr->page_cnt = 1;
1942         iwmr->pgaddrmem[0]  = addr;
1943         iwmr->length = size;
1944         status = i40iw_hwreg_mr(iwdev, iwmr, access);
1945         if (status) {
1946                 i40iw_free_stag(iwdev, stag);
1947                 ret = -ENOMEM;
1948                 goto err;
1949         }
1950
1951         i40iw_add_pdusecount(iwpd);
1952         return &iwmr->ibmr;
1953  err:
1954         kfree(iwmr);
1955         return ERR_PTR(ret);
1956 }
1957
1958 /**
1959  * i40iw_get_dma_mr - register physical mem
1960  * @pd: ptr of pd
1961  * @acc: access for memory
1962  */
1963 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
1964 {
1965         u64 kva = 0;
1966
1967         return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
1968 }
1969
1970 /**
1971  * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
1972  * @iwmr: iwmr for IB's user page addresses
1973  * @ucontext: ptr to user context
1974  */
1975 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
1976                               struct i40iw_ucontext *ucontext)
1977 {
1978         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1979         unsigned long flags;
1980
1981         switch (iwmr->type) {
1982         case IW_MEMREG_TYPE_CQ:
1983                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1984                 if (iwpbl->on_list) {
1985                         iwpbl->on_list = false;
1986                         list_del(&iwpbl->list);
1987                 }
1988                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1989                 break;
1990         case IW_MEMREG_TYPE_QP:
1991                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1992                 if (iwpbl->on_list) {
1993                         iwpbl->on_list = false;
1994                         list_del(&iwpbl->list);
1995                 }
1996                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1997                 break;
1998         default:
1999                 break;
2000         }
2001 }
2002
2003 /**
2004  * i40iw_dereg_mr - deregister mr
2005  * @ib_mr: mr ptr for dereg
2006  */
2007 static int i40iw_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
2008 {
2009         struct ib_pd *ibpd = ib_mr->pd;
2010         struct i40iw_pd *iwpd = to_iwpd(ibpd);
2011         struct i40iw_mr *iwmr = to_iwmr(ib_mr);
2012         struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
2013         enum i40iw_status_code status;
2014         struct i40iw_dealloc_stag_info *info;
2015         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2016         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
2017         struct i40iw_cqp_request *cqp_request;
2018         struct cqp_commands_info *cqp_info;
2019         u32 stag_idx;
2020
2021         if (iwmr->region)
2022                 ib_umem_release(iwmr->region);
2023
2024         if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2025                 /* region is released. only test for userness. */
2026                 if (iwmr->region) {
2027                         struct i40iw_ucontext *ucontext =
2028                                 rdma_udata_to_drv_context(
2029                                         udata,
2030                                         struct i40iw_ucontext,
2031                                         ibucontext);
2032
2033                         i40iw_del_memlist(iwmr, ucontext);
2034                 }
2035                 if (iwpbl->pbl_allocated && iwmr->type != IW_MEMREG_TYPE_QP)
2036                         i40iw_free_pble(iwdev->pble_rsrc, palloc);
2037                 kfree(iwmr);
2038                 return 0;
2039         }
2040
2041         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2042         if (!cqp_request)
2043                 return -ENOMEM;
2044
2045         cqp_info = &cqp_request->info;
2046         info = &cqp_info->in.u.dealloc_stag.info;
2047         memset(info, 0, sizeof(*info));
2048
2049         info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2050         info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2051         stag_idx = info->stag_idx;
2052         info->mr = true;
2053         if (iwpbl->pbl_allocated)
2054                 info->dealloc_pbl = true;
2055
2056         cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2057         cqp_info->post_sq = 1;
2058         cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2059         cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2060         status = i40iw_handle_cqp_op(iwdev, cqp_request);
2061         if (status)
2062                 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2063         i40iw_rem_pdusecount(iwpd, iwdev);
2064         i40iw_free_stag(iwdev, iwmr->stag);
2065         if (iwpbl->pbl_allocated)
2066                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2067         kfree(iwmr);
2068         return 0;
2069 }
2070
2071 /**
2072  * hw_rev_show
2073  */
2074 static ssize_t hw_rev_show(struct device *dev,
2075                            struct device_attribute *attr, char *buf)
2076 {
2077         struct i40iw_ib_device *iwibdev =
2078                 rdma_device_to_drv_device(dev, struct i40iw_ib_device, ibdev);
2079         u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2080
2081         return sprintf(buf, "%x\n", hw_rev);
2082 }
2083 static DEVICE_ATTR_RO(hw_rev);
2084
2085 /**
2086  * hca_type_show
2087  */
2088 static ssize_t hca_type_show(struct device *dev,
2089                              struct device_attribute *attr, char *buf)
2090 {
2091         return sprintf(buf, "I40IW\n");
2092 }
2093 static DEVICE_ATTR_RO(hca_type);
2094
2095 /**
2096  * board_id_show
2097  */
2098 static ssize_t board_id_show(struct device *dev,
2099                              struct device_attribute *attr, char *buf)
2100 {
2101         return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2102 }
2103 static DEVICE_ATTR_RO(board_id);
2104
2105 static struct attribute *i40iw_dev_attributes[] = {
2106         &dev_attr_hw_rev.attr,
2107         &dev_attr_hca_type.attr,
2108         &dev_attr_board_id.attr,
2109         NULL
2110 };
2111
2112 static const struct attribute_group i40iw_attr_group = {
2113         .attrs = i40iw_dev_attributes,
2114 };
2115
2116 /**
2117  * i40iw_copy_sg_list - copy sg list for qp
2118  * @sg_list: copied into sg_list
2119  * @sgl: copy from sgl
2120  * @num_sges: count of sg entries
2121  */
2122 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2123 {
2124         unsigned int i;
2125
2126         for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2127                 sg_list[i].tag_off = sgl[i].addr;
2128                 sg_list[i].len = sgl[i].length;
2129                 sg_list[i].stag = sgl[i].lkey;
2130         }
2131 }
2132
2133 /**
2134  * i40iw_post_send -  kernel application wr
2135  * @ibqp: qp ptr for wr
2136  * @ib_wr: work request ptr
2137  * @bad_wr: return of bad wr if err
2138  */
2139 static int i40iw_post_send(struct ib_qp *ibqp,
2140                            const struct ib_send_wr *ib_wr,
2141                            const struct ib_send_wr **bad_wr)
2142 {
2143         struct i40iw_qp *iwqp;
2144         struct i40iw_qp_uk *ukqp;
2145         struct i40iw_post_sq_info info;
2146         enum i40iw_status_code ret;
2147         int err = 0;
2148         unsigned long flags;
2149         bool inv_stag;
2150
2151         iwqp = (struct i40iw_qp *)ibqp;
2152         ukqp = &iwqp->sc_qp.qp_uk;
2153
2154         spin_lock_irqsave(&iwqp->lock, flags);
2155
2156         if (iwqp->flush_issued) {
2157                 err = -EINVAL;
2158                 goto out;
2159         }
2160
2161         while (ib_wr) {
2162                 inv_stag = false;
2163                 memset(&info, 0, sizeof(info));
2164                 info.wr_id = (u64)(ib_wr->wr_id);
2165                 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2166                         info.signaled = true;
2167                 if (ib_wr->send_flags & IB_SEND_FENCE)
2168                         info.read_fence = true;
2169
2170                 switch (ib_wr->opcode) {
2171                 case IB_WR_SEND:
2172                         /* fall-through */
2173                 case IB_WR_SEND_WITH_INV:
2174                         if (ib_wr->opcode == IB_WR_SEND) {
2175                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2176                                         info.op_type = I40IW_OP_TYPE_SEND_SOL;
2177                                 else
2178                                         info.op_type = I40IW_OP_TYPE_SEND;
2179                         } else {
2180                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2181                                         info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2182                                 else
2183                                         info.op_type = I40IW_OP_TYPE_SEND_INV;
2184                         }
2185
2186                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2187                                 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2188                                 info.op.inline_send.len = ib_wr->sg_list[0].length;
2189                                 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2190                         } else {
2191                                 info.op.send.num_sges = ib_wr->num_sge;
2192                                 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2193                                 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2194                         }
2195
2196                         if (ret) {
2197                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2198                                         err = -ENOMEM;
2199                                 else
2200                                         err = -EINVAL;
2201                         }
2202                         break;
2203                 case IB_WR_RDMA_WRITE:
2204                         info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2205
2206                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2207                                 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2208                                 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2209                                 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2210                                 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2211                                 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2212                         } else {
2213                                 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2214                                 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2215                                 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2216                                 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2217                                 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2218                         }
2219
2220                         if (ret) {
2221                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2222                                         err = -ENOMEM;
2223                                 else
2224                                         err = -EINVAL;
2225                         }
2226                         break;
2227                 case IB_WR_RDMA_READ_WITH_INV:
2228                         inv_stag = true;
2229                         /* fall-through*/
2230                 case IB_WR_RDMA_READ:
2231                         if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2232                                 err = -EINVAL;
2233                                 break;
2234                         }
2235                         info.op_type = I40IW_OP_TYPE_RDMA_READ;
2236                         info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2237                         info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2238                         info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2239                         info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2240                         info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2241                         ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2242                         if (ret) {
2243                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2244                                         err = -ENOMEM;
2245                                 else
2246                                         err = -EINVAL;
2247                         }
2248                         break;
2249                 case IB_WR_LOCAL_INV:
2250                         info.op_type = I40IW_OP_TYPE_INV_STAG;
2251                         info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2252                         ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2253                         if (ret)
2254                                 err = -ENOMEM;
2255                         break;
2256                 case IB_WR_REG_MR:
2257                 {
2258                         struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2259                         int flags = reg_wr(ib_wr)->access;
2260                         struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2261                         struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2262                         struct i40iw_fast_reg_stag_info info;
2263
2264                         memset(&info, 0, sizeof(info));
2265                         info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2266                         info.access_rights |= i40iw_get_user_access(flags);
2267                         info.stag_key = reg_wr(ib_wr)->key & 0xff;
2268                         info.stag_idx = reg_wr(ib_wr)->key >> 8;
2269                         info.page_size = reg_wr(ib_wr)->mr->page_size;
2270                         info.wr_id = ib_wr->wr_id;
2271
2272                         info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2273                         info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2274                         info.total_len = iwmr->ibmr.length;
2275                         info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2276                         info.first_pm_pbl_index = palloc->level1.idx;
2277                         info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2278                         info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2279
2280                         if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2281                                 info.chunk_size = 1;
2282
2283                         ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2284                         if (ret)
2285                                 err = -ENOMEM;
2286                         break;
2287                 }
2288                 default:
2289                         err = -EINVAL;
2290                         i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2291                                      ib_wr->opcode);
2292                         break;
2293                 }
2294
2295                 if (err)
2296                         break;
2297                 ib_wr = ib_wr->next;
2298         }
2299
2300 out:
2301         if (err)
2302                 *bad_wr = ib_wr;
2303         else
2304                 ukqp->ops.iw_qp_post_wr(ukqp);
2305         spin_unlock_irqrestore(&iwqp->lock, flags);
2306
2307         return err;
2308 }
2309
2310 /**
2311  * i40iw_post_recv - post receive wr for kernel application
2312  * @ibqp: ib qp pointer
2313  * @ib_wr: work request for receive
2314  * @bad_wr: bad wr caused an error
2315  */
2316 static int i40iw_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *ib_wr,
2317                            const struct ib_recv_wr **bad_wr)
2318 {
2319         struct i40iw_qp *iwqp;
2320         struct i40iw_qp_uk *ukqp;
2321         struct i40iw_post_rq_info post_recv;
2322         struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2323         enum i40iw_status_code ret = 0;
2324         unsigned long flags;
2325         int err = 0;
2326
2327         iwqp = (struct i40iw_qp *)ibqp;
2328         ukqp = &iwqp->sc_qp.qp_uk;
2329
2330         memset(&post_recv, 0, sizeof(post_recv));
2331         spin_lock_irqsave(&iwqp->lock, flags);
2332
2333         if (iwqp->flush_issued) {
2334                 err = -EINVAL;
2335                 goto out;
2336         }
2337
2338         while (ib_wr) {
2339                 post_recv.num_sges = ib_wr->num_sge;
2340                 post_recv.wr_id = ib_wr->wr_id;
2341                 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2342                 post_recv.sg_list = sg_list;
2343                 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2344                 if (ret) {
2345                         i40iw_pr_err(" post_recv err %d\n", ret);
2346                         if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2347                                 err = -ENOMEM;
2348                         else
2349                                 err = -EINVAL;
2350                         *bad_wr = ib_wr;
2351                         goto out;
2352                 }
2353                 ib_wr = ib_wr->next;
2354         }
2355  out:
2356         spin_unlock_irqrestore(&iwqp->lock, flags);
2357         return err;
2358 }
2359
2360 /**
2361  * i40iw_poll_cq - poll cq for completion (kernel apps)
2362  * @ibcq: cq to poll
2363  * @num_entries: number of entries to poll
2364  * @entry: wr of entry completed
2365  */
2366 static int i40iw_poll_cq(struct ib_cq *ibcq,
2367                          int num_entries,
2368                          struct ib_wc *entry)
2369 {
2370         struct i40iw_cq *iwcq;
2371         int cqe_count = 0;
2372         struct i40iw_cq_poll_info cq_poll_info;
2373         enum i40iw_status_code ret;
2374         struct i40iw_cq_uk *ukcq;
2375         struct i40iw_sc_qp *qp;
2376         struct i40iw_qp *iwqp;
2377         unsigned long flags;
2378
2379         iwcq = (struct i40iw_cq *)ibcq;
2380         ukcq = &iwcq->sc_cq.cq_uk;
2381
2382         spin_lock_irqsave(&iwcq->lock, flags);
2383         while (cqe_count < num_entries) {
2384                 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2385                 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2386                         break;
2387                 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2388                         continue;
2389                 } else if (ret) {
2390                         if (!cqe_count)
2391                                 cqe_count = -1;
2392                         break;
2393                 }
2394                 entry->wc_flags = 0;
2395                 entry->wr_id = cq_poll_info.wr_id;
2396                 if (cq_poll_info.error) {
2397                         entry->status = IB_WC_WR_FLUSH_ERR;
2398                         entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2399                 } else {
2400                         entry->status = IB_WC_SUCCESS;
2401                 }
2402
2403                 switch (cq_poll_info.op_type) {
2404                 case I40IW_OP_TYPE_RDMA_WRITE:
2405                         entry->opcode = IB_WC_RDMA_WRITE;
2406                         break;
2407                 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2408                 case I40IW_OP_TYPE_RDMA_READ:
2409                         entry->opcode = IB_WC_RDMA_READ;
2410                         break;
2411                 case I40IW_OP_TYPE_SEND_SOL:
2412                 case I40IW_OP_TYPE_SEND_SOL_INV:
2413                 case I40IW_OP_TYPE_SEND_INV:
2414                 case I40IW_OP_TYPE_SEND:
2415                         entry->opcode = IB_WC_SEND;
2416                         break;
2417                 case I40IW_OP_TYPE_REC:
2418                         entry->opcode = IB_WC_RECV;
2419                         break;
2420                 default:
2421                         entry->opcode = IB_WC_RECV;
2422                         break;
2423                 }
2424
2425                 entry->ex.imm_data = 0;
2426                 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2427                 entry->qp = (struct ib_qp *)qp->back_qp;
2428                 entry->src_qp = cq_poll_info.qp_id;
2429                 iwqp = (struct i40iw_qp *)qp->back_qp;
2430                 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2431                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2432                                 complete(&iwqp->sq_drained);
2433                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2434                                 complete(&iwqp->rq_drained);
2435                 }
2436                 entry->byte_len = cq_poll_info.bytes_xfered;
2437                 entry++;
2438                 cqe_count++;
2439         }
2440         spin_unlock_irqrestore(&iwcq->lock, flags);
2441         return cqe_count;
2442 }
2443
2444 /**
2445  * i40iw_req_notify_cq - arm cq kernel application
2446  * @ibcq: cq to arm
2447  * @notify_flags: notofication flags
2448  */
2449 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2450                                enum ib_cq_notify_flags notify_flags)
2451 {
2452         struct i40iw_cq *iwcq;
2453         struct i40iw_cq_uk *ukcq;
2454         unsigned long flags;
2455         enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2456
2457         iwcq = (struct i40iw_cq *)ibcq;
2458         ukcq = &iwcq->sc_cq.cq_uk;
2459         if (notify_flags == IB_CQ_SOLICITED)
2460                 cq_notify = IW_CQ_COMPL_SOLICITED;
2461         spin_lock_irqsave(&iwcq->lock, flags);
2462         ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2463         spin_unlock_irqrestore(&iwcq->lock, flags);
2464         return 0;
2465 }
2466
2467 /**
2468  * i40iw_port_immutable - return port's immutable data
2469  * @ibdev: ib dev struct
2470  * @port_num: port number
2471  * @immutable: immutable data for the port return
2472  */
2473 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2474                                 struct ib_port_immutable *immutable)
2475 {
2476         struct ib_port_attr attr;
2477         int err;
2478
2479         immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2480
2481         err = ib_query_port(ibdev, port_num, &attr);
2482
2483         if (err)
2484                 return err;
2485
2486         immutable->pkey_tbl_len = attr.pkey_tbl_len;
2487         immutable->gid_tbl_len = attr.gid_tbl_len;
2488
2489         return 0;
2490 }
2491
2492 static const char * const i40iw_hw_stat_names[] = {
2493         // 32bit names
2494         [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2495         [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2496         [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2497         [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2498         [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2499         [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2500         [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2501         [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2502         [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2503         // 64bit names
2504         [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2505                 "ip4InOctets",
2506         [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2507                 "ip4InPkts",
2508         [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2509                 "ip4InReasmRqd",
2510         [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2511                 "ip4InMcastPkts",
2512         [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2513                 "ip4OutOctets",
2514         [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2515                 "ip4OutPkts",
2516         [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2517                 "ip4OutSegRqd",
2518         [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2519                 "ip4OutMcastPkts",
2520         [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2521                 "ip6InOctets",
2522         [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2523                 "ip6InPkts",
2524         [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2525                 "ip6InReasmRqd",
2526         [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2527                 "ip6InMcastPkts",
2528         [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2529                 "ip6OutOctets",
2530         [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2531                 "ip6OutPkts",
2532         [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2533                 "ip6OutSegRqd",
2534         [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2535                 "ip6OutMcastPkts",
2536         [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2537                 "tcpInSegs",
2538         [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2539                 "tcpOutSegs",
2540         [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2541                 "iwInRdmaReads",
2542         [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2543                 "iwInRdmaSends",
2544         [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2545                 "iwInRdmaWrites",
2546         [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2547                 "iwOutRdmaReads",
2548         [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2549                 "iwOutRdmaSends",
2550         [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2551                 "iwOutRdmaWrites",
2552         [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2553                 "iwRdmaBnd",
2554         [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2555                 "iwRdmaInv"
2556 };
2557
2558 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str)
2559 {
2560         u32 firmware_version = I40IW_FW_VERSION;
2561
2562         snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u", firmware_version,
2563                  (firmware_version & 0x000000ff));
2564 }
2565
2566 /**
2567  * i40iw_alloc_hw_stats - Allocate a hw stats structure
2568  * @ibdev: device pointer from stack
2569  * @port_num: port number
2570  */
2571 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2572                                                   u8 port_num)
2573 {
2574         struct i40iw_device *iwdev = to_iwdev(ibdev);
2575         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2576         int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2577                 I40IW_HW_STAT_INDEX_MAX_64;
2578         unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2579
2580         BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2581                      (I40IW_HW_STAT_INDEX_MAX_32 +
2582                       I40IW_HW_STAT_INDEX_MAX_64));
2583
2584         /*
2585          * PFs get the default update lifespan, but VFs only update once
2586          * per second
2587          */
2588         if (!dev->is_pf)
2589                 lifespan = 1000;
2590         return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2591                                           lifespan);
2592 }
2593
2594 /**
2595  * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2596  * @ibdev: device pointer from stack
2597  * @stats: stats pointer from stack
2598  * @port_num: port number
2599  * @index: which hw counter the stack is requesting we update
2600  */
2601 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2602                               struct rdma_hw_stats *stats,
2603                               u8 port_num, int index)
2604 {
2605         struct i40iw_device *iwdev = to_iwdev(ibdev);
2606         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2607         struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2608         struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2609
2610         if (dev->is_pf) {
2611                 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2612         } else {
2613                 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2614                         return -ENOSYS;
2615         }
2616
2617         memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2618
2619         return stats->num_counters;
2620 }
2621
2622 /**
2623  * i40iw_query_gid - Query port GID
2624  * @ibdev: device pointer from stack
2625  * @port: port number
2626  * @index: Entry index
2627  * @gid: Global ID
2628  */
2629 static int i40iw_query_gid(struct ib_device *ibdev,
2630                            u8 port,
2631                            int index,
2632                            union ib_gid *gid)
2633 {
2634         struct i40iw_device *iwdev = to_iwdev(ibdev);
2635
2636         memset(gid->raw, 0, sizeof(gid->raw));
2637         ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2638         return 0;
2639 }
2640
2641 /**
2642  * i40iw_query_pkey - Query partition key
2643  * @ibdev: device pointer from stack
2644  * @port: port number
2645  * @index: index of pkey
2646  * @pkey: pointer to store the pkey
2647  */
2648 static int i40iw_query_pkey(struct ib_device *ibdev,
2649                             u8 port,
2650                             u16 index,
2651                             u16 *pkey)
2652 {
2653         *pkey = 0;
2654         return 0;
2655 }
2656
2657 static const struct ib_device_ops i40iw_dev_ops = {
2658         .alloc_hw_stats = i40iw_alloc_hw_stats,
2659         .alloc_mr = i40iw_alloc_mr,
2660         .alloc_pd = i40iw_alloc_pd,
2661         .alloc_ucontext = i40iw_alloc_ucontext,
2662         .create_cq = i40iw_create_cq,
2663         .create_qp = i40iw_create_qp,
2664         .dealloc_pd = i40iw_dealloc_pd,
2665         .dealloc_ucontext = i40iw_dealloc_ucontext,
2666         .dereg_mr = i40iw_dereg_mr,
2667         .destroy_cq = i40iw_destroy_cq,
2668         .destroy_qp = i40iw_destroy_qp,
2669         .drain_rq = i40iw_drain_rq,
2670         .drain_sq = i40iw_drain_sq,
2671         .get_dev_fw_str = i40iw_get_dev_fw_str,
2672         .get_dma_mr = i40iw_get_dma_mr,
2673         .get_hw_stats = i40iw_get_hw_stats,
2674         .get_port_immutable = i40iw_port_immutable,
2675         .iw_accept = i40iw_accept,
2676         .iw_add_ref = i40iw_add_ref,
2677         .iw_connect = i40iw_connect,
2678         .iw_create_listen = i40iw_create_listen,
2679         .iw_destroy_listen = i40iw_destroy_listen,
2680         .iw_get_qp = i40iw_get_qp,
2681         .iw_reject = i40iw_reject,
2682         .iw_rem_ref = i40iw_rem_ref,
2683         .map_mr_sg = i40iw_map_mr_sg,
2684         .mmap = i40iw_mmap,
2685         .modify_qp = i40iw_modify_qp,
2686         .poll_cq = i40iw_poll_cq,
2687         .post_recv = i40iw_post_recv,
2688         .post_send = i40iw_post_send,
2689         .query_device = i40iw_query_device,
2690         .query_gid = i40iw_query_gid,
2691         .query_pkey = i40iw_query_pkey,
2692         .query_port = i40iw_query_port,
2693         .query_qp = i40iw_query_qp,
2694         .reg_user_mr = i40iw_reg_user_mr,
2695         .req_notify_cq = i40iw_req_notify_cq,
2696         INIT_RDMA_OBJ_SIZE(ib_pd, i40iw_pd, ibpd),
2697         INIT_RDMA_OBJ_SIZE(ib_ucontext, i40iw_ucontext, ibucontext),
2698 };
2699
2700 /**
2701  * i40iw_init_rdma_device - initialization of iwarp device
2702  * @iwdev: iwarp device
2703  */
2704 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2705 {
2706         struct i40iw_ib_device *iwibdev;
2707         struct net_device *netdev = iwdev->netdev;
2708         struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2709
2710         iwibdev = ib_alloc_device(i40iw_ib_device, ibdev);
2711         if (!iwibdev) {
2712                 i40iw_pr_err("iwdev == NULL\n");
2713                 return NULL;
2714         }
2715         iwibdev->ibdev.owner = THIS_MODULE;
2716         iwdev->iwibdev = iwibdev;
2717         iwibdev->iwdev = iwdev;
2718
2719         iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2720         ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2721
2722         iwibdev->ibdev.uverbs_cmd_mask =
2723             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2724             (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2725             (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2726             (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2727             (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2728             (1ull << IB_USER_VERBS_CMD_REG_MR) |
2729             (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2730             (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2731             (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2732             (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2733             (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2734             (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2735             (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2736             (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2737             (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2738             (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2739             (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2740             (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2741             (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2742             (1ull << IB_USER_VERBS_CMD_POST_SEND);
2743         iwibdev->ibdev.phys_port_cnt = 1;
2744         iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2745         iwibdev->ibdev.dev.parent = &pcidev->dev;
2746         memcpy(iwibdev->ibdev.iw_ifname, netdev->name,
2747                sizeof(iwibdev->ibdev.iw_ifname));
2748         ib_set_device_ops(&iwibdev->ibdev, &i40iw_dev_ops);
2749
2750         return iwibdev;
2751 }
2752
2753 /**
2754  * i40iw_port_ibevent - indicate port event
2755  * @iwdev: iwarp device
2756  */
2757 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2758 {
2759         struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2760         struct ib_event event;
2761
2762         event.device = &iwibdev->ibdev;
2763         event.element.port_num = 1;
2764         event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2765         ib_dispatch_event(&event);
2766 }
2767
2768 /**
2769  * i40iw_destroy_rdma_device - destroy rdma device and free resources
2770  * @iwibdev: IB device ptr
2771  */
2772 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2773 {
2774         if (!iwibdev)
2775                 return;
2776
2777         ib_unregister_device(&iwibdev->ibdev);
2778         wait_event_timeout(iwibdev->iwdev->close_wq,
2779                            !atomic64_read(&iwibdev->iwdev->use_count),
2780                            I40IW_EVENT_TIMEOUT);
2781         ib_dealloc_device(&iwibdev->ibdev);
2782 }
2783
2784 /**
2785  * i40iw_register_rdma_device - register iwarp device to IB
2786  * @iwdev: iwarp device
2787  */
2788 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2789 {
2790         int ret;
2791         struct i40iw_ib_device *iwibdev;
2792
2793         iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2794         if (!iwdev->iwibdev)
2795                 return -ENOMEM;
2796         iwibdev = iwdev->iwibdev;
2797         rdma_set_device_sysfs_group(&iwibdev->ibdev, &i40iw_attr_group);
2798         iwibdev->ibdev.driver_id = RDMA_DRIVER_I40IW;
2799         ret = ib_register_device(&iwibdev->ibdev, "i40iw%d");
2800         if (ret)
2801                 goto error;
2802
2803         return 0;
2804 error:
2805         ib_dealloc_device(&iwdev->iwibdev->ibdev);
2806         return ret;
2807 }