1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
3 * Copyright (c) 2018 Hisilicon Limited.
7 #include <rdma/ib_umem.h>
8 #include "hns_roce_device.h"
9 #include "hns_roce_cmd.h"
10 #include "hns_roce_hem.h"
12 void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type)
14 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
15 struct hns_roce_srq *srq;
17 xa_lock(&srq_table->xa);
18 srq = xa_load(&srq_table->xa, srqn & (hr_dev->caps.num_srqs - 1));
20 atomic_inc(&srq->refcount);
21 xa_unlock(&srq_table->xa);
24 dev_warn(hr_dev->dev, "Async event for bogus SRQ %08x\n", srqn);
28 srq->event(srq, event_type);
30 if (atomic_dec_and_test(&srq->refcount))
34 static void hns_roce_ib_srq_event(struct hns_roce_srq *srq,
35 enum hns_roce_event event_type)
37 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device);
38 struct ib_srq *ibsrq = &srq->ibsrq;
39 struct ib_event event;
41 if (ibsrq->event_handler) {
42 event.device = ibsrq->device;
43 event.element.srq = ibsrq;
45 case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:
46 event.event = IB_EVENT_SRQ_LIMIT_REACHED;
48 case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR:
49 event.event = IB_EVENT_SRQ_ERR;
53 "hns_roce:Unexpected event type 0x%x on SRQ %06lx\n",
54 event_type, srq->srqn);
58 ibsrq->event_handler(&event, ibsrq->srq_context);
62 static int hns_roce_hw_create_srq(struct hns_roce_dev *dev,
63 struct hns_roce_cmd_mailbox *mailbox,
64 unsigned long srq_num)
66 return hns_roce_cmd_mbox(dev, mailbox->dma, 0, srq_num, 0,
67 HNS_ROCE_CMD_CREATE_SRQ,
68 HNS_ROCE_CMD_TIMEOUT_MSECS);
71 static int hns_roce_hw_destroy_srq(struct hns_roce_dev *dev,
72 struct hns_roce_cmd_mailbox *mailbox,
73 unsigned long srq_num)
75 return hns_roce_cmd_mbox(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
76 mailbox ? 0 : 1, HNS_ROCE_CMD_DESTROY_SRQ,
77 HNS_ROCE_CMD_TIMEOUT_MSECS);
80 static int alloc_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
82 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
83 struct ib_device *ibdev = &hr_dev->ib_dev;
84 struct hns_roce_cmd_mailbox *mailbox;
87 ret = hns_roce_bitmap_alloc(&srq_table->bitmap, &srq->srqn);
89 ibdev_err(ibdev, "failed to alloc SRQ number.\n");
93 ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn);
95 ibdev_err(ibdev, "failed to get SRQC table, ret = %d.\n", ret);
99 ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL));
101 ibdev_err(ibdev, "failed to store SRQC, ret = %d.\n", ret);
105 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
106 if (IS_ERR_OR_NULL(mailbox)) {
107 ibdev_err(ibdev, "failed to alloc mailbox for SRQC.\n");
112 ret = hr_dev->hw->write_srqc(srq, mailbox->buf);
114 ibdev_err(ibdev, "failed to write SRQC.\n");
118 ret = hns_roce_hw_create_srq(hr_dev, mailbox, srq->srqn);
120 ibdev_err(ibdev, "failed to config SRQC, ret = %d.\n", ret);
124 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
129 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
131 xa_erase(&srq_table->xa, srq->srqn);
133 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
135 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR);
140 static void free_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
142 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
145 ret = hns_roce_hw_destroy_srq(hr_dev, NULL, srq->srqn);
147 dev_err(hr_dev->dev, "DESTROY_SRQ failed (%d) for SRQN %06lx\n",
150 xa_erase(&srq_table->xa, srq->srqn);
152 if (atomic_dec_and_test(&srq->refcount))
153 complete(&srq->free);
154 wait_for_completion(&srq->free);
156 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
157 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR);
160 static int alloc_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq,
161 struct ib_udata *udata, unsigned long addr)
163 struct hns_roce_idx_que *idx_que = &srq->idx_que;
164 struct ib_device *ibdev = &hr_dev->ib_dev;
165 struct hns_roce_buf_attr buf_attr = {};
168 srq->idx_que.entry_shift = ilog2(HNS_ROCE_IDX_QUE_ENTRY_SZ);
170 buf_attr.page_shift = hr_dev->caps.idx_buf_pg_sz + HNS_HW_PAGE_SHIFT;
171 buf_attr.region[0].size = to_hr_hem_entries_size(srq->wqe_cnt,
172 srq->idx_que.entry_shift);
173 buf_attr.region[0].hopnum = hr_dev->caps.idx_hop_num;
174 buf_attr.region_count = 1;
176 ret = hns_roce_mtr_create(hr_dev, &idx_que->mtr, &buf_attr,
177 hr_dev->caps.idx_ba_pg_sz + HNS_HW_PAGE_SHIFT,
181 "failed to alloc SRQ idx mtr, ret = %d.\n", ret);
186 idx_que->bitmap = bitmap_zalloc(srq->wqe_cnt, GFP_KERNEL);
187 if (!idx_que->bitmap) {
188 ibdev_err(ibdev, "failed to alloc SRQ idx bitmap.\n");
199 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr);
204 static void free_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
206 struct hns_roce_idx_que *idx_que = &srq->idx_que;
208 bitmap_free(idx_que->bitmap);
209 idx_que->bitmap = NULL;
210 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr);
213 static int alloc_srq_wqe_buf(struct hns_roce_dev *hr_dev,
214 struct hns_roce_srq *srq,
215 struct ib_udata *udata, unsigned long addr)
217 struct ib_device *ibdev = &hr_dev->ib_dev;
218 struct hns_roce_buf_attr buf_attr = {};
221 srq->wqe_shift = ilog2(roundup_pow_of_two(max(HNS_ROCE_SGE_SIZE,
225 buf_attr.page_shift = hr_dev->caps.srqwqe_buf_pg_sz + HNS_HW_PAGE_SHIFT;
226 buf_attr.region[0].size = to_hr_hem_entries_size(srq->wqe_cnt,
228 buf_attr.region[0].hopnum = hr_dev->caps.srqwqe_hop_num;
229 buf_attr.region_count = 1;
231 ret = hns_roce_mtr_create(hr_dev, &srq->buf_mtr, &buf_attr,
232 hr_dev->caps.srqwqe_ba_pg_sz +
233 HNS_HW_PAGE_SHIFT, udata, addr);
236 "failed to alloc SRQ buf mtr, ret = %d.\n", ret);
241 static void free_srq_wqe_buf(struct hns_roce_dev *hr_dev,
242 struct hns_roce_srq *srq)
244 hns_roce_mtr_destroy(hr_dev, &srq->buf_mtr);
247 static int alloc_srq_wrid(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
249 srq->wrid = kvmalloc_array(srq->wqe_cnt, sizeof(u64), GFP_KERNEL);
256 static void free_srq_wrid(struct hns_roce_srq *srq)
262 static u32 proc_srq_sge(struct hns_roce_dev *dev, struct hns_roce_srq *hr_srq,
265 u32 max_sge = dev->caps.max_srq_sges;
267 if (dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
270 /* Reserve SGEs only for HIP08 in kernel; The userspace driver will
271 * calculate number of max_sge with reserved SGEs when allocating wqe
272 * buf, so there is no need to do this again in kernel. But the number
273 * may exceed the capacity of SGEs recorded in the firmware, so the
274 * kernel driver should just adapt the value accordingly.
277 max_sge = roundup_pow_of_two(max_sge + 1);
284 static int set_srq_basic_param(struct hns_roce_srq *srq,
285 struct ib_srq_init_attr *init_attr,
286 struct ib_udata *udata)
288 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device);
289 struct ib_srq_attr *attr = &init_attr->attr;
292 max_sge = proc_srq_sge(hr_dev, srq, !!udata);
293 if (attr->max_wr > hr_dev->caps.max_srq_wrs ||
294 attr->max_sge > max_sge) {
295 ibdev_err(&hr_dev->ib_dev,
296 "invalid SRQ attr, depth = %u, sge = %u.\n",
297 attr->max_wr, attr->max_sge);
301 attr->max_wr = max_t(u32, attr->max_wr, HNS_ROCE_MIN_SRQ_WQE_NUM);
302 srq->wqe_cnt = roundup_pow_of_two(attr->max_wr);
303 srq->max_gs = roundup_pow_of_two(attr->max_sge + srq->rsv_sge);
305 attr->max_wr = srq->wqe_cnt;
306 attr->max_sge = srq->max_gs - srq->rsv_sge;
312 static void set_srq_ext_param(struct hns_roce_srq *srq,
313 struct ib_srq_init_attr *init_attr)
315 srq->cqn = ib_srq_has_cq(init_attr->srq_type) ?
316 to_hr_cq(init_attr->ext.cq)->cqn : 0;
319 static int set_srq_param(struct hns_roce_srq *srq,
320 struct ib_srq_init_attr *init_attr,
321 struct ib_udata *udata)
325 ret = set_srq_basic_param(srq, init_attr, udata);
329 set_srq_ext_param(srq, init_attr);
334 static int alloc_srq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq,
335 struct ib_udata *udata)
337 struct hns_roce_ib_create_srq ucmd = {};
341 ret = ib_copy_from_udata(&ucmd, udata,
342 min(udata->inlen, sizeof(ucmd)));
344 ibdev_err(&hr_dev->ib_dev,
345 "failed to copy SRQ udata, ret = %d.\n",
351 ret = alloc_srq_idx(hr_dev, srq, udata, ucmd.que_addr);
355 ret = alloc_srq_wqe_buf(hr_dev, srq, udata, ucmd.buf_addr);
360 ret = alloc_srq_wrid(hr_dev, srq);
368 free_srq_wqe_buf(hr_dev, srq);
370 free_srq_idx(hr_dev, srq);
375 static void free_srq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
378 free_srq_wqe_buf(hr_dev, srq);
379 free_srq_idx(hr_dev, srq);
382 int hns_roce_create_srq(struct ib_srq *ib_srq,
383 struct ib_srq_init_attr *init_attr,
384 struct ib_udata *udata)
386 struct hns_roce_dev *hr_dev = to_hr_dev(ib_srq->device);
387 struct hns_roce_ib_create_srq_resp resp = {};
388 struct hns_roce_srq *srq = to_hr_srq(ib_srq);
391 mutex_init(&srq->mutex);
392 spin_lock_init(&srq->lock);
394 ret = set_srq_param(srq, init_attr, udata);
398 ret = alloc_srq_buf(hr_dev, srq, udata);
402 ret = alloc_srqc(hr_dev, srq);
407 resp.srqn = srq->srqn;
408 if (ib_copy_to_udata(udata, &resp,
409 min(udata->outlen, sizeof(resp)))) {
415 srq->db_reg_l = hr_dev->reg_base + SRQ_DB_REG;
416 srq->event = hns_roce_ib_srq_event;
417 atomic_set(&srq->refcount, 1);
418 init_completion(&srq->free);
423 free_srqc(hr_dev, srq);
425 free_srq_buf(hr_dev, srq);
430 int hns_roce_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
432 struct hns_roce_dev *hr_dev = to_hr_dev(ibsrq->device);
433 struct hns_roce_srq *srq = to_hr_srq(ibsrq);
435 free_srqc(hr_dev, srq);
436 free_srq_buf(hr_dev, srq);
440 int hns_roce_init_srq_table(struct hns_roce_dev *hr_dev)
442 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
444 xa_init(&srq_table->xa);
446 return hns_roce_bitmap_init(&srq_table->bitmap, hr_dev->caps.num_srqs,
447 hr_dev->caps.num_srqs - 1,
448 hr_dev->caps.reserved_srqs, 0);
451 void hns_roce_cleanup_srq_table(struct hns_roce_dev *hr_dev)
453 hns_roce_bitmap_cleanup(&hr_dev->srq_table.bitmap);