1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
3 * Copyright (c) 2018 Hisilicon Limited.
6 #include <rdma/ib_umem.h>
7 #include <rdma/hns-abi.h>
8 #include "hns_roce_device.h"
9 #include "hns_roce_cmd.h"
10 #include "hns_roce_hem.h"
12 void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type)
14 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
15 struct hns_roce_srq *srq;
17 xa_lock(&srq_table->xa);
18 srq = xa_load(&srq_table->xa, srqn & (hr_dev->caps.num_srqs - 1));
20 atomic_inc(&srq->refcount);
21 xa_unlock(&srq_table->xa);
24 dev_warn(hr_dev->dev, "Async event for bogus SRQ %08x\n", srqn);
28 srq->event(srq, event_type);
30 if (atomic_dec_and_test(&srq->refcount))
34 static void hns_roce_ib_srq_event(struct hns_roce_srq *srq,
35 enum hns_roce_event event_type)
37 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device);
38 struct ib_srq *ibsrq = &srq->ibsrq;
39 struct ib_event event;
41 if (ibsrq->event_handler) {
42 event.device = ibsrq->device;
43 event.element.srq = ibsrq;
45 case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:
46 event.event = IB_EVENT_SRQ_LIMIT_REACHED;
48 case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR:
49 event.event = IB_EVENT_SRQ_ERR;
53 "hns_roce:Unexpected event type 0x%x on SRQ %06lx\n",
54 event_type, srq->srqn);
58 ibsrq->event_handler(&event, ibsrq->srq_context);
62 static int hns_roce_sw2hw_srq(struct hns_roce_dev *dev,
63 struct hns_roce_cmd_mailbox *mailbox,
64 unsigned long srq_num)
66 return hns_roce_cmd_mbox(dev, mailbox->dma, 0, srq_num, 0,
67 HNS_ROCE_CMD_SW2HW_SRQ,
68 HNS_ROCE_CMD_TIMEOUT_MSECS);
71 static int hns_roce_hw2sw_srq(struct hns_roce_dev *dev,
72 struct hns_roce_cmd_mailbox *mailbox,
73 unsigned long srq_num)
75 return hns_roce_cmd_mbox(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
76 mailbox ? 0 : 1, HNS_ROCE_CMD_HW2SW_SRQ,
77 HNS_ROCE_CMD_TIMEOUT_MSECS);
80 static int hns_roce_srq_alloc(struct hns_roce_dev *hr_dev, u32 pdn, u32 cqn,
81 u16 xrcd, struct hns_roce_mtt *hr_mtt,
82 u64 db_rec_addr, struct hns_roce_srq *srq)
84 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
85 struct hns_roce_cmd_mailbox *mailbox;
86 dma_addr_t dma_handle_wqe;
87 dma_addr_t dma_handle_idx;
92 /* Get the physical address of srq buf */
93 mtts_wqe = hns_roce_table_find(hr_dev,
94 &hr_dev->mr_table.mtt_srqwqe_table,
99 "SRQ alloc.Failed to find srq buf addr.\n");
103 /* Get physical address of idx que buf */
104 mtts_idx = hns_roce_table_find(hr_dev, &hr_dev->mr_table.mtt_idx_table,
105 srq->idx_que.mtt.first_seg,
109 "SRQ alloc.Failed to find idx que buf addr.\n");
113 ret = hns_roce_bitmap_alloc(&srq_table->bitmap, &srq->srqn);
115 dev_err(hr_dev->dev, "SRQ alloc.Failed to alloc index.\n");
119 ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn);
123 ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL));
127 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
128 if (IS_ERR(mailbox)) {
129 ret = PTR_ERR(mailbox);
133 hr_dev->hw->write_srqc(hr_dev, srq, pdn, xrcd, cqn, mailbox->buf,
134 mtts_wqe, mtts_idx, dma_handle_wqe,
137 ret = hns_roce_sw2hw_srq(hr_dev, mailbox, srq->srqn);
138 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
142 atomic_set(&srq->refcount, 1);
143 init_completion(&srq->free);
147 xa_erase(&srq_table->xa, srq->srqn);
150 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
153 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR);
157 static void hns_roce_srq_free(struct hns_roce_dev *hr_dev,
158 struct hns_roce_srq *srq)
160 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
163 ret = hns_roce_hw2sw_srq(hr_dev, NULL, srq->srqn);
165 dev_err(hr_dev->dev, "HW2SW_SRQ failed (%d) for CQN %06lx\n",
168 xa_erase(&srq_table->xa, srq->srqn);
170 if (atomic_dec_and_test(&srq->refcount))
171 complete(&srq->free);
172 wait_for_completion(&srq->free);
174 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
175 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR);
178 static int create_user_srq(struct hns_roce_srq *srq, struct ib_udata *udata,
181 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device);
182 struct hns_roce_ib_create_srq ucmd;
183 struct hns_roce_buf *buf;
186 if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)))
189 srq->umem = ib_umem_get(udata, ucmd.buf_addr, srq_buf_size, 0, 0);
190 if (IS_ERR(srq->umem))
191 return PTR_ERR(srq->umem);
194 buf->npages = (ib_umem_page_count(srq->umem) +
195 (1 << hr_dev->caps.srqwqe_buf_pg_sz) - 1) /
196 (1 << hr_dev->caps.srqwqe_buf_pg_sz);
197 buf->page_shift = PAGE_SHIFT + hr_dev->caps.srqwqe_buf_pg_sz;
198 ret = hns_roce_mtt_init(hr_dev, buf->npages, buf->page_shift,
203 ret = hns_roce_ib_umem_write_mtt(hr_dev, &srq->mtt, srq->umem);
205 goto err_user_srq_mtt;
207 /* config index queue BA */
208 srq->idx_que.umem = ib_umem_get(udata, ucmd.que_addr,
209 srq->idx_que.buf_size, 0, 0);
210 if (IS_ERR(srq->idx_que.umem)) {
211 dev_err(hr_dev->dev, "ib_umem_get error for index queue\n");
212 ret = PTR_ERR(srq->idx_que.umem);
213 goto err_user_srq_mtt;
216 buf = &srq->idx_que.idx_buf;
217 buf->npages = DIV_ROUND_UP(ib_umem_page_count(srq->idx_que.umem),
218 1 << hr_dev->caps.idx_buf_pg_sz);
219 buf->page_shift = PAGE_SHIFT + hr_dev->caps.idx_buf_pg_sz;
220 ret = hns_roce_mtt_init(hr_dev, buf->npages, buf->page_shift,
223 dev_err(hr_dev->dev, "hns_roce_mtt_init error for idx que\n");
224 goto err_user_idx_mtt;
227 ret = hns_roce_ib_umem_write_mtt(hr_dev, &srq->idx_que.mtt,
231 "hns_roce_ib_umem_write_mtt error for idx que\n");
232 goto err_user_idx_buf;
238 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt);
241 ib_umem_release(srq->idx_que.umem);
244 hns_roce_mtt_cleanup(hr_dev, &srq->mtt);
247 ib_umem_release(srq->umem);
252 static int hns_roce_create_idx_que(struct ib_pd *pd, struct hns_roce_srq *srq,
255 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
256 struct hns_roce_idx_que *idx_que = &srq->idx_que;
258 idx_que->bitmap = bitmap_zalloc(srq->max, GFP_KERNEL);
259 if (!idx_que->bitmap)
262 idx_que->buf_size = srq->idx_que.buf_size;
264 if (hns_roce_buf_alloc(hr_dev, idx_que->buf_size, (1 << page_shift) * 2,
265 &idx_que->idx_buf, page_shift)) {
266 bitmap_free(idx_que->bitmap);
273 static int create_kernel_srq(struct hns_roce_srq *srq, int srq_buf_size)
275 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device);
276 u32 page_shift = PAGE_SHIFT + hr_dev->caps.srqwqe_buf_pg_sz;
279 if (hns_roce_buf_alloc(hr_dev, srq_buf_size, (1 << page_shift) * 2,
280 &srq->buf, page_shift))
284 srq->tail = srq->max - 1;
286 ret = hns_roce_mtt_init(hr_dev, srq->buf.npages, srq->buf.page_shift,
291 ret = hns_roce_buf_write_mtt(hr_dev, &srq->mtt, &srq->buf);
293 goto err_kernel_srq_mtt;
295 page_shift = PAGE_SHIFT + hr_dev->caps.idx_buf_pg_sz;
296 ret = hns_roce_create_idx_que(srq->ibsrq.pd, srq, page_shift);
298 dev_err(hr_dev->dev, "Create idx queue fail(%d)!\n", ret);
299 goto err_kernel_srq_mtt;
302 /* Init mtt table for idx_que */
303 ret = hns_roce_mtt_init(hr_dev, srq->idx_que.idx_buf.npages,
304 srq->idx_que.idx_buf.page_shift,
307 goto err_kernel_create_idx;
309 /* Write buffer address into the mtt table */
310 ret = hns_roce_buf_write_mtt(hr_dev, &srq->idx_que.mtt,
311 &srq->idx_que.idx_buf);
313 goto err_kernel_idx_buf;
315 srq->wrid = kvmalloc_array(srq->max, sizeof(u64), GFP_KERNEL);
318 goto err_kernel_idx_buf;
324 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt);
326 err_kernel_create_idx:
327 hns_roce_buf_free(hr_dev, srq->idx_que.buf_size,
328 &srq->idx_que.idx_buf);
329 kfree(srq->idx_que.bitmap);
332 hns_roce_mtt_cleanup(hr_dev, &srq->mtt);
335 hns_roce_buf_free(hr_dev, srq_buf_size, &srq->buf);
340 static void destroy_user_srq(struct hns_roce_dev *hr_dev,
341 struct hns_roce_srq *srq)
343 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt);
344 ib_umem_release(srq->idx_que.umem);
345 hns_roce_mtt_cleanup(hr_dev, &srq->mtt);
346 ib_umem_release(srq->umem);
349 static void destroy_kernel_srq(struct hns_roce_dev *hr_dev,
350 struct hns_roce_srq *srq, int srq_buf_size)
353 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt);
354 hns_roce_buf_free(hr_dev, srq->idx_que.buf_size, &srq->idx_que.idx_buf);
355 kfree(srq->idx_que.bitmap);
356 hns_roce_mtt_cleanup(hr_dev, &srq->mtt);
357 hns_roce_buf_free(hr_dev, srq_buf_size, &srq->buf);
360 int hns_roce_create_srq(struct ib_srq *ib_srq,
361 struct ib_srq_init_attr *srq_init_attr,
362 struct ib_udata *udata)
364 struct hns_roce_dev *hr_dev = to_hr_dev(ib_srq->device);
365 struct hns_roce_ib_create_srq_resp resp = {};
366 struct hns_roce_srq *srq = to_hr_srq(ib_srq);
372 /* Check the actual SRQ wqe and SRQ sge num */
373 if (srq_init_attr->attr.max_wr >= hr_dev->caps.max_srq_wrs ||
374 srq_init_attr->attr.max_sge > hr_dev->caps.max_srq_sges)
377 mutex_init(&srq->mutex);
378 spin_lock_init(&srq->lock);
380 srq->max = roundup_pow_of_two(srq_init_attr->attr.max_wr + 1);
381 srq->max_gs = srq_init_attr->attr.max_sge;
383 srq_desc_size = max(16, 16 * srq->max_gs);
385 srq->wqe_shift = ilog2(srq_desc_size);
387 srq_buf_size = srq->max * srq_desc_size;
389 srq->idx_que.entry_sz = HNS_ROCE_IDX_QUE_ENTRY_SZ;
390 srq->idx_que.buf_size = srq->max * srq->idx_que.entry_sz;
391 srq->mtt.mtt_type = MTT_TYPE_SRQWQE;
392 srq->idx_que.mtt.mtt_type = MTT_TYPE_IDX;
395 ret = create_user_srq(srq, udata, srq_buf_size);
397 dev_err(hr_dev->dev, "Create user srq failed\n");
401 ret = create_kernel_srq(srq, srq_buf_size);
403 dev_err(hr_dev->dev, "Create kernel srq failed\n");
408 cqn = ib_srq_has_cq(srq_init_attr->srq_type) ?
409 to_hr_cq(srq_init_attr->ext.cq)->cqn : 0;
411 srq->db_reg_l = hr_dev->reg_base + SRQ_DB_REG;
413 ret = hns_roce_srq_alloc(hr_dev, to_hr_pd(ib_srq->pd)->pdn, cqn, 0,
418 srq->event = hns_roce_ib_srq_event;
419 resp.srqn = srq->srqn;
422 if (ib_copy_to_udata(udata, &resp,
423 min(udata->outlen, sizeof(resp)))) {
432 hns_roce_srq_free(hr_dev, srq);
436 destroy_user_srq(hr_dev, srq);
438 destroy_kernel_srq(hr_dev, srq, srq_buf_size);
444 void hns_roce_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
446 struct hns_roce_dev *hr_dev = to_hr_dev(ibsrq->device);
447 struct hns_roce_srq *srq = to_hr_srq(ibsrq);
449 hns_roce_srq_free(hr_dev, srq);
450 hns_roce_mtt_cleanup(hr_dev, &srq->mtt);
453 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt);
456 hns_roce_buf_free(hr_dev, srq->max << srq->wqe_shift,
459 ib_umem_release(srq->idx_que.umem);
460 ib_umem_release(srq->umem);
463 int hns_roce_init_srq_table(struct hns_roce_dev *hr_dev)
465 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
467 xa_init(&srq_table->xa);
469 return hns_roce_bitmap_init(&srq_table->bitmap, hr_dev->caps.num_srqs,
470 hr_dev->caps.num_srqs - 1,
471 hr_dev->caps.reserved_srqs, 0);
474 void hns_roce_cleanup_srq_table(struct hns_roce_dev *hr_dev)
476 hns_roce_bitmap_cleanup(&hr_dev->srq_table.bitmap);