2 * Copyright (c) 2016 Hisilicon Limited.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/platform_device.h>
35 #include <linux/vmalloc.h>
36 #include <rdma/ib_umem.h>
37 #include "hns_roce_device.h"
38 #include "hns_roce_cmd.h"
39 #include "hns_roce_hem.h"
41 static u32 hw_index_to_key(unsigned long ind)
43 return (u32)(ind >> 24) | (ind << 8);
46 unsigned long key_to_hw_index(u32 key)
48 return (key << 24) | (key >> 8);
51 static int hns_roce_hw_create_mpt(struct hns_roce_dev *hr_dev,
52 struct hns_roce_cmd_mailbox *mailbox,
53 unsigned long mpt_index)
55 return hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, mpt_index, 0,
56 HNS_ROCE_CMD_CREATE_MPT,
57 HNS_ROCE_CMD_TIMEOUT_MSECS);
60 int hns_roce_hw_destroy_mpt(struct hns_roce_dev *hr_dev,
61 struct hns_roce_cmd_mailbox *mailbox,
62 unsigned long mpt_index)
64 return hns_roce_cmd_mbox(hr_dev, 0, mailbox ? mailbox->dma : 0,
65 mpt_index, !mailbox, HNS_ROCE_CMD_DESTROY_MPT,
66 HNS_ROCE_CMD_TIMEOUT_MSECS);
69 static int alloc_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr,
70 u32 pd, u64 iova, u64 size, u32 access)
72 struct ib_device *ibdev = &hr_dev->ib_dev;
73 unsigned long obj = 0;
76 /* Allocate a key for mr from mr_table */
77 err = hns_roce_bitmap_alloc(&hr_dev->mr_table.mtpt_bitmap, &obj);
80 "failed to alloc bitmap for MR key, ret = %d.\n",
85 mr->iova = iova; /* MR va starting addr */
86 mr->size = size; /* MR addr range */
87 mr->pd = pd; /* MR num */
88 mr->access = access; /* MR access permit */
89 mr->enabled = 0; /* MR active status */
90 mr->key = hw_index_to_key(obj); /* MR key */
92 err = hns_roce_table_get(hr_dev, &hr_dev->mr_table.mtpt_table, obj);
94 ibdev_err(ibdev, "failed to alloc mtpt, ret = %d.\n", err);
100 hns_roce_bitmap_free(&hr_dev->mr_table.mtpt_bitmap, obj, BITMAP_NO_RR);
104 static void free_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
106 unsigned long obj = key_to_hw_index(mr->key);
108 hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table, obj);
109 hns_roce_bitmap_free(&hr_dev->mr_table.mtpt_bitmap, obj, BITMAP_NO_RR);
112 static int alloc_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr,
113 size_t length, struct ib_udata *udata, u64 start,
116 struct ib_device *ibdev = &hr_dev->ib_dev;
117 bool is_fast = mr->type == MR_TYPE_FRMR;
118 struct hns_roce_buf_attr buf_attr = {};
121 mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num;
122 buf_attr.page_shift = is_fast ? PAGE_SHIFT :
123 hr_dev->caps.pbl_buf_pg_sz + PAGE_SHIFT;
124 buf_attr.region[0].size = length;
125 buf_attr.region[0].hopnum = mr->pbl_hop_num;
126 buf_attr.region_count = 1;
127 buf_attr.fixed_page = true;
128 buf_attr.user_access = access;
129 /* fast MR's buffer is alloced before mapping, not at creation */
130 buf_attr.mtt_only = is_fast;
132 err = hns_roce_mtr_create(hr_dev, &mr->pbl_mtr, &buf_attr,
133 hr_dev->caps.pbl_ba_pg_sz + HNS_HW_PAGE_SHIFT,
136 ibdev_err(ibdev, "failed to alloc pbl mtr, ret = %d.\n", err);
138 mr->npages = mr->pbl_mtr.hem_cfg.buf_pg_count;
143 static void free_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
145 hns_roce_mtr_destroy(hr_dev, &mr->pbl_mtr);
148 static void hns_roce_mr_free(struct hns_roce_dev *hr_dev,
149 struct hns_roce_mr *mr)
151 struct ib_device *ibdev = &hr_dev->ib_dev;
155 ret = hns_roce_hw_destroy_mpt(hr_dev, NULL,
156 key_to_hw_index(mr->key) &
157 (hr_dev->caps.num_mtpts - 1));
159 ibdev_warn(ibdev, "failed to destroy mpt, ret = %d.\n",
163 free_mr_pbl(hr_dev, mr);
164 free_mr_key(hr_dev, mr);
167 static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev,
168 struct hns_roce_mr *mr)
171 unsigned long mtpt_idx = key_to_hw_index(mr->key);
172 struct device *dev = hr_dev->dev;
173 struct hns_roce_cmd_mailbox *mailbox;
175 /* Allocate mailbox memory */
176 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
177 if (IS_ERR(mailbox)) {
178 ret = PTR_ERR(mailbox);
182 if (mr->type != MR_TYPE_FRMR)
183 ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr,
186 ret = hr_dev->hw->frmr_write_mtpt(hr_dev, mailbox->buf, mr);
188 dev_err(dev, "Write mtpt fail!\n");
192 ret = hns_roce_hw_create_mpt(hr_dev, mailbox,
193 mtpt_idx & (hr_dev->caps.num_mtpts - 1));
195 dev_err(dev, "CREATE_MPT failed (%d)\n", ret);
200 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
205 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
210 int hns_roce_init_mr_table(struct hns_roce_dev *hr_dev)
212 struct hns_roce_mr_table *mr_table = &hr_dev->mr_table;
215 ret = hns_roce_bitmap_init(&mr_table->mtpt_bitmap,
216 hr_dev->caps.num_mtpts,
217 hr_dev->caps.num_mtpts - 1,
218 hr_dev->caps.reserved_mrws, 0);
222 void hns_roce_cleanup_mr_table(struct hns_roce_dev *hr_dev)
224 struct hns_roce_mr_table *mr_table = &hr_dev->mr_table;
226 hns_roce_bitmap_cleanup(&mr_table->mtpt_bitmap);
229 struct ib_mr *hns_roce_get_dma_mr(struct ib_pd *pd, int acc)
231 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
232 struct hns_roce_mr *mr;
235 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
237 return ERR_PTR(-ENOMEM);
239 mr->type = MR_TYPE_DMA;
241 /* Allocate memory region key */
242 hns_roce_hem_list_init(&mr->pbl_mtr.hem_list);
243 ret = alloc_mr_key(hr_dev, mr, to_hr_pd(pd)->pdn, 0, 0, acc);
247 ret = hns_roce_mr_enable(to_hr_dev(pd->device), mr);
251 mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
255 free_mr_key(hr_dev, mr);
262 struct ib_mr *hns_roce_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
263 u64 virt_addr, int access_flags,
264 struct ib_udata *udata)
266 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
267 struct hns_roce_mr *mr;
270 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
272 return ERR_PTR(-ENOMEM);
274 mr->type = MR_TYPE_MR;
275 ret = alloc_mr_key(hr_dev, mr, to_hr_pd(pd)->pdn, virt_addr, length,
280 ret = alloc_mr_pbl(hr_dev, mr, length, udata, start, access_flags);
284 ret = hns_roce_mr_enable(hr_dev, mr);
288 mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
289 mr->ibmr.length = length;
294 free_mr_pbl(hr_dev, mr);
296 free_mr_key(hr_dev, mr);
302 static int rereg_mr_trans(struct ib_mr *ibmr, int flags,
303 u64 start, u64 length,
304 u64 virt_addr, int mr_access_flags,
305 struct hns_roce_cmd_mailbox *mailbox,
306 u32 pdn, struct ib_udata *udata)
308 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
309 struct ib_device *ibdev = &hr_dev->ib_dev;
310 struct hns_roce_mr *mr = to_hr_mr(ibmr);
313 free_mr_pbl(hr_dev, mr);
314 ret = alloc_mr_pbl(hr_dev, mr, length, udata, start, mr_access_flags);
316 ibdev_err(ibdev, "failed to create mr PBL, ret = %d.\n", ret);
320 ret = hr_dev->hw->rereg_write_mtpt(hr_dev, mr, flags, pdn,
321 mr_access_flags, virt_addr,
322 length, mailbox->buf);
324 ibdev_err(ibdev, "failed to write mtpt, ret = %d.\n", ret);
325 free_mr_pbl(hr_dev, mr);
331 int hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start, u64 length,
332 u64 virt_addr, int mr_access_flags, struct ib_pd *pd,
333 struct ib_udata *udata)
335 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
336 struct ib_device *ib_dev = &hr_dev->ib_dev;
337 struct hns_roce_mr *mr = to_hr_mr(ibmr);
338 struct hns_roce_cmd_mailbox *mailbox;
339 unsigned long mtpt_idx;
346 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
348 return PTR_ERR(mailbox);
350 mtpt_idx = key_to_hw_index(mr->key) & (hr_dev->caps.num_mtpts - 1);
351 ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, mtpt_idx, 0,
352 HNS_ROCE_CMD_QUERY_MPT,
353 HNS_ROCE_CMD_TIMEOUT_MSECS);
357 ret = hns_roce_hw_destroy_mpt(hr_dev, NULL, mtpt_idx);
359 ibdev_warn(ib_dev, "failed to destroy MPT, ret = %d.\n", ret);
363 if (flags & IB_MR_REREG_PD)
364 pdn = to_hr_pd(pd)->pdn;
366 if (flags & IB_MR_REREG_TRANS) {
367 ret = rereg_mr_trans(ibmr, flags,
369 virt_addr, mr_access_flags,
370 mailbox, pdn, udata);
374 ret = hr_dev->hw->rereg_write_mtpt(hr_dev, mr, flags, pdn,
375 mr_access_flags, virt_addr,
376 length, mailbox->buf);
381 ret = hns_roce_hw_create_mpt(hr_dev, mailbox, mtpt_idx);
383 ibdev_err(ib_dev, "failed to create MPT, ret = %d.\n", ret);
388 if (flags & IB_MR_REREG_ACCESS)
389 mr->access = mr_access_flags;
391 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
396 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
401 int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
403 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
404 struct hns_roce_mr *mr = to_hr_mr(ibmr);
407 if (hr_dev->hw->dereg_mr) {
408 ret = hr_dev->hw->dereg_mr(hr_dev, mr, udata);
410 hns_roce_mr_free(hr_dev, mr);
417 struct ib_mr *hns_roce_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
420 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
421 struct device *dev = hr_dev->dev;
422 struct hns_roce_mr *mr;
426 if (mr_type != IB_MR_TYPE_MEM_REG)
427 return ERR_PTR(-EINVAL);
429 if (max_num_sg > HNS_ROCE_FRMR_MAX_PA) {
430 dev_err(dev, "max_num_sg larger than %d\n",
431 HNS_ROCE_FRMR_MAX_PA);
432 return ERR_PTR(-EINVAL);
435 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
437 return ERR_PTR(-ENOMEM);
439 mr->type = MR_TYPE_FRMR;
441 /* Allocate memory region key */
442 length = max_num_sg * (1 << PAGE_SHIFT);
443 ret = alloc_mr_key(hr_dev, mr, to_hr_pd(pd)->pdn, 0, length, 0);
447 ret = alloc_mr_pbl(hr_dev, mr, length, NULL, 0, 0);
451 ret = hns_roce_mr_enable(hr_dev, mr);
455 mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
456 mr->ibmr.length = length;
461 free_mr_key(hr_dev, mr);
463 free_mr_pbl(hr_dev, mr);
469 static int hns_roce_set_page(struct ib_mr *ibmr, u64 addr)
471 struct hns_roce_mr *mr = to_hr_mr(ibmr);
473 if (likely(mr->npages < mr->pbl_mtr.hem_cfg.buf_pg_count)) {
474 mr->page_list[mr->npages++] = addr;
481 int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
482 unsigned int *sg_offset)
484 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
485 struct ib_device *ibdev = &hr_dev->ib_dev;
486 struct hns_roce_mr *mr = to_hr_mr(ibmr);
487 struct hns_roce_mtr *mtr = &mr->pbl_mtr;
491 mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count,
492 sizeof(dma_addr_t), GFP_KERNEL);
496 ret = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, hns_roce_set_page);
498 ibdev_err(ibdev, "failed to store sg pages %d %d, cnt = %d.\n",
499 mr->npages, mr->pbl_mtr.hem_cfg.buf_pg_count, ret);
503 mtr->hem_cfg.region[0].offset = 0;
504 mtr->hem_cfg.region[0].count = mr->npages;
505 mtr->hem_cfg.region[0].hopnum = mr->pbl_hop_num;
506 mtr->hem_cfg.region_count = 1;
507 ret = hns_roce_mtr_map(hr_dev, mtr, mr->page_list, mr->npages);
509 ibdev_err(ibdev, "failed to map sg mtr, ret = %d.\n", ret);
512 mr->pbl_mtr.hem_cfg.buf_pg_shift = ilog2(ibmr->page_size);
517 kvfree(mr->page_list);
518 mr->page_list = NULL;
523 static void hns_roce_mw_free(struct hns_roce_dev *hr_dev,
524 struct hns_roce_mw *mw)
526 struct device *dev = hr_dev->dev;
530 ret = hns_roce_hw_destroy_mpt(hr_dev, NULL,
531 key_to_hw_index(mw->rkey) &
532 (hr_dev->caps.num_mtpts - 1));
534 dev_warn(dev, "MW DESTROY_MPT failed (%d)\n", ret);
536 hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table,
537 key_to_hw_index(mw->rkey));
540 hns_roce_bitmap_free(&hr_dev->mr_table.mtpt_bitmap,
541 key_to_hw_index(mw->rkey), BITMAP_NO_RR);
544 static int hns_roce_mw_enable(struct hns_roce_dev *hr_dev,
545 struct hns_roce_mw *mw)
547 struct hns_roce_mr_table *mr_table = &hr_dev->mr_table;
548 struct hns_roce_cmd_mailbox *mailbox;
549 struct device *dev = hr_dev->dev;
550 unsigned long mtpt_idx = key_to_hw_index(mw->rkey);
553 /* prepare HEM entry memory */
554 ret = hns_roce_table_get(hr_dev, &mr_table->mtpt_table, mtpt_idx);
558 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
559 if (IS_ERR(mailbox)) {
560 ret = PTR_ERR(mailbox);
564 ret = hr_dev->hw->mw_write_mtpt(mailbox->buf, mw);
566 dev_err(dev, "MW write mtpt fail!\n");
570 ret = hns_roce_hw_create_mpt(hr_dev, mailbox,
571 mtpt_idx & (hr_dev->caps.num_mtpts - 1));
573 dev_err(dev, "MW CREATE_MPT failed (%d)\n", ret);
579 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
584 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
587 hns_roce_table_put(hr_dev, &mr_table->mtpt_table, mtpt_idx);
592 int hns_roce_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
594 struct hns_roce_dev *hr_dev = to_hr_dev(ibmw->device);
595 struct hns_roce_mw *mw = to_hr_mw(ibmw);
596 unsigned long index = 0;
599 /* Allocate a key for mw from bitmap */
600 ret = hns_roce_bitmap_alloc(&hr_dev->mr_table.mtpt_bitmap, &index);
604 mw->rkey = hw_index_to_key(index);
606 ibmw->rkey = mw->rkey;
607 mw->pdn = to_hr_pd(ibmw->pd)->pdn;
608 mw->pbl_hop_num = hr_dev->caps.pbl_hop_num;
609 mw->pbl_ba_pg_sz = hr_dev->caps.pbl_ba_pg_sz;
610 mw->pbl_buf_pg_sz = hr_dev->caps.pbl_buf_pg_sz;
612 ret = hns_roce_mw_enable(hr_dev, mw);
619 hns_roce_mw_free(hr_dev, mw);
623 int hns_roce_dealloc_mw(struct ib_mw *ibmw)
625 struct hns_roce_dev *hr_dev = to_hr_dev(ibmw->device);
626 struct hns_roce_mw *mw = to_hr_mw(ibmw);
628 hns_roce_mw_free(hr_dev, mw);
632 static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
633 dma_addr_t *pages, struct hns_roce_buf_region *region)
643 /* if hopnum is 0, buffer cannot store BAs, so skip write mtt */
647 offset = region->offset;
648 end = offset + region->count;
650 while (offset < end) {
651 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list,
652 offset, &count, NULL);
656 for (i = 0; i < count; i++) {
657 if (hr_dev->hw_rev == HNS_ROCE_HW_VER1)
658 addr = to_hr_hw_page_addr(pages[npage]);
662 mtts[i] = cpu_to_le64(addr);
671 static inline bool mtr_has_mtt(struct hns_roce_buf_attr *attr)
675 for (i = 0; i < attr->region_count; i++)
676 if (attr->region[i].hopnum != HNS_ROCE_HOP_NUM_0 &&
677 attr->region[i].hopnum > 0)
680 /* because the mtr only one root base address, when hopnum is 0 means
681 * root base address equals the first buffer address, thus all alloced
682 * memory must in a continuous space accessed by direct mode.
687 static inline size_t mtr_bufs_size(struct hns_roce_buf_attr *attr)
692 for (i = 0; i < attr->region_count; i++)
693 size += attr->region[i].size;
698 static inline size_t mtr_kmem_direct_size(bool is_direct, size_t alloc_size,
699 unsigned int page_shift)
702 return ALIGN(alloc_size, 1 << page_shift);
704 return HNS_HW_DIRECT_PAGE_COUNT << page_shift;
708 * check the given pages in continuous address space
709 * Returns 0 on success, or the error page num.
711 static inline int mtr_check_direct_pages(dma_addr_t *pages, int page_count,
712 unsigned int page_shift)
714 size_t page_size = 1 << page_shift;
717 for (i = 1; i < page_count; i++)
718 if (pages[i] - pages[i - 1] != page_size)
724 static void mtr_free_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
726 /* release user buffers */
728 ib_umem_release(mtr->umem);
732 /* release kernel buffers */
734 hns_roce_buf_free(hr_dev, mtr->kmem);
740 static int mtr_alloc_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
741 struct hns_roce_buf_attr *buf_attr, bool is_direct,
742 struct ib_udata *udata, unsigned long user_addr)
744 struct ib_device *ibdev = &hr_dev->ib_dev;
745 unsigned int best_pg_shift;
746 int all_pg_count = 0;
751 total_size = mtr_bufs_size(buf_attr);
752 if (total_size < 1) {
753 ibdev_err(ibdev, "Failed to check mtr size\n");
758 unsigned long pgsz_bitmap;
759 unsigned long page_size;
762 mtr->umem = ib_umem_get(ibdev, user_addr, total_size,
763 buf_attr->user_access);
764 if (IS_ERR_OR_NULL(mtr->umem)) {
765 ibdev_err(ibdev, "Failed to get umem, ret %ld\n",
769 if (buf_attr->fixed_page)
770 pgsz_bitmap = 1 << buf_attr->page_shift;
772 pgsz_bitmap = GENMASK(buf_attr->page_shift, PAGE_SHIFT);
774 page_size = ib_umem_find_best_pgsz(mtr->umem, pgsz_bitmap,
778 best_pg_shift = order_base_2(page_size);
779 all_pg_count = ib_umem_num_dma_blocks(mtr->umem, page_size);
783 mtr->kmem = kzalloc(sizeof(*mtr->kmem), GFP_KERNEL);
785 ibdev_err(ibdev, "Failed to alloc kmem\n");
788 direct_size = mtr_kmem_direct_size(is_direct, total_size,
789 buf_attr->page_shift);
790 ret = hns_roce_buf_alloc(hr_dev, total_size, direct_size,
791 mtr->kmem, buf_attr->page_shift);
793 ibdev_err(ibdev, "Failed to alloc kmem, ret %d\n", ret);
796 best_pg_shift = buf_attr->page_shift;
797 all_pg_count = mtr->kmem->npages;
800 /* must bigger than minimum hardware page shift */
801 if (best_pg_shift < HNS_HW_PAGE_SHIFT || all_pg_count < 1) {
803 ibdev_err(ibdev, "Failed to check mtr page shift %d count %d\n",
804 best_pg_shift, all_pg_count);
808 mtr->hem_cfg.buf_pg_shift = best_pg_shift;
809 mtr->hem_cfg.buf_pg_count = all_pg_count;
813 mtr_free_bufs(hr_dev, mtr);
817 static int mtr_get_pages(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
818 dma_addr_t *pages, int count, unsigned int page_shift)
820 struct ib_device *ibdev = &hr_dev->ib_dev;
825 npage = hns_roce_get_umem_bufs(hr_dev, pages, count, 0,
826 mtr->umem, page_shift);
828 npage = hns_roce_get_kmem_bufs(hr_dev, pages, count, 0,
831 if (mtr->hem_cfg.is_direct && npage > 1) {
832 err = mtr_check_direct_pages(pages, npage, page_shift);
834 ibdev_err(ibdev, "Failed to check %s direct page-%d\n",
835 mtr->umem ? "user" : "kernel", err);
843 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
844 dma_addr_t *pages, int page_cnt)
846 struct ib_device *ibdev = &hr_dev->ib_dev;
847 struct hns_roce_buf_region *r;
852 * Only use the first page address as root ba when hopnum is 0, this
853 * is because the addresses of all pages are consecutive in this case.
855 if (mtr->hem_cfg.is_direct) {
856 mtr->hem_cfg.root_ba = pages[0];
860 for (i = 0; i < mtr->hem_cfg.region_count; i++) {
861 r = &mtr->hem_cfg.region[i];
862 if (r->offset + r->count > page_cnt) {
865 "Failed to check mtr%d end %d + %d, max %d\n",
866 i, r->offset, r->count, page_cnt);
870 err = mtr_map_region(hr_dev, mtr, &pages[r->offset], r);
873 "Failed to map mtr%d offset %d, err %d\n",
882 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
883 int offset, u64 *mtt_buf, int mtt_max, u64 *base_addr)
885 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
894 if (!mtt_buf || mtt_max < 1)
897 /* no mtt memory in direct mode, so just return the buffer address */
898 if (cfg->is_direct) {
899 start_index = offset >> HNS_HW_PAGE_SHIFT;
900 for (mtt_count = 0; mtt_count < cfg->region_count &&
901 total < mtt_max; mtt_count++) {
902 npage = cfg->region[mtt_count].offset;
903 if (npage < start_index)
906 addr = cfg->root_ba + (npage << HNS_HW_PAGE_SHIFT);
907 if (hr_dev->hw_rev == HNS_ROCE_HW_VER1)
908 mtt_buf[total] = to_hr_hw_page_addr(addr);
910 mtt_buf[total] = addr;
918 start_index = offset >> cfg->buf_pg_shift;
922 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list,
925 if (!mtts || !mtt_count)
928 npage = min(mtt_count, left);
930 for (mtt_count = 0; mtt_count < npage; mtt_count++)
931 mtt_buf[total++] = le64_to_cpu(mtts[mtt_count]);
936 *base_addr = cfg->root_ba;
941 static int mtr_init_buf_cfg(struct hns_roce_dev *hr_dev,
942 struct hns_roce_buf_attr *attr,
943 struct hns_roce_hem_cfg *cfg,
944 unsigned int *buf_page_shift)
946 struct hns_roce_buf_region *r;
947 unsigned int page_shift;
952 if (cfg->is_direct) {
953 buf_size = cfg->buf_pg_count << cfg->buf_pg_shift;
954 page_cnt = DIV_ROUND_UP(buf_size, HNS_HW_PAGE_SIZE);
956 * When HEM buffer use level-0 addressing, the page size equals
957 * the buffer size, and the the page size = 4K * 2^N.
959 cfg->buf_pg_shift = HNS_HW_PAGE_SHIFT + order_base_2(page_cnt);
960 if (attr->region_count > 1) {
961 cfg->buf_pg_count = page_cnt;
962 page_shift = HNS_HW_PAGE_SHIFT;
964 cfg->buf_pg_count = 1;
965 page_shift = cfg->buf_pg_shift;
966 if (buf_size != 1 << page_shift) {
967 ibdev_err(&hr_dev->ib_dev,
968 "failed to check direct size %zu shift %d.\n",
969 buf_size, page_shift);
974 page_shift = cfg->buf_pg_shift;
977 /* convert buffer size to page index and page count */
978 for (page_cnt = 0, region_cnt = 0; page_cnt < cfg->buf_pg_count &&
979 region_cnt < attr->region_count &&
980 region_cnt < ARRAY_SIZE(cfg->region); region_cnt++) {
981 r = &cfg->region[region_cnt];
982 r->offset = page_cnt;
983 buf_size = hr_hw_page_align(attr->region[region_cnt].size);
984 r->count = DIV_ROUND_UP(buf_size, 1 << page_shift);
985 page_cnt += r->count;
986 r->hopnum = to_hr_hem_hopnum(attr->region[region_cnt].hopnum,
990 if (region_cnt < 1) {
991 ibdev_err(&hr_dev->ib_dev,
992 "failed to check mtr region count, pages = %d.\n",
997 cfg->region_count = region_cnt;
998 *buf_page_shift = page_shift;
1004 * hns_roce_mtr_create - Create hns memory translate region.
1006 * @mtr: memory translate region
1007 * @buf_attr: buffer attribute for creating mtr
1008 * @ba_page_shift: page shift for multi-hop base address table
1009 * @udata: user space context, if it's NULL, means kernel space
1010 * @user_addr: userspace virtual address to start at
1012 int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
1013 struct hns_roce_buf_attr *buf_attr,
1014 unsigned int ba_page_shift, struct ib_udata *udata,
1015 unsigned long user_addr)
1017 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
1018 struct ib_device *ibdev = &hr_dev->ib_dev;
1019 unsigned int buf_page_shift = 0;
1020 dma_addr_t *pages = NULL;
1025 /* if disable mtt, all pages must in a continuous address range */
1026 cfg->is_direct = !mtr_has_mtt(buf_attr);
1028 /* if buffer only need mtt, just init the hem cfg */
1029 if (buf_attr->mtt_only) {
1030 cfg->buf_pg_shift = buf_attr->page_shift;
1031 cfg->buf_pg_count = mtr_bufs_size(buf_attr) >>
1032 buf_attr->page_shift;
1036 ret = mtr_alloc_bufs(hr_dev, mtr, buf_attr, cfg->is_direct,
1040 "failed to alloc mtr bufs, ret = %d.\n", ret);
1045 all_pg_cnt = mtr_init_buf_cfg(hr_dev, buf_attr, cfg, &buf_page_shift);
1046 if (all_pg_cnt < 1) {
1048 ibdev_err(ibdev, "failed to init mtr buf cfg.\n");
1049 goto err_alloc_bufs;
1052 hns_roce_hem_list_init(&mtr->hem_list);
1053 if (!cfg->is_direct) {
1054 ret = hns_roce_hem_list_request(hr_dev, &mtr->hem_list,
1055 cfg->region, cfg->region_count,
1058 ibdev_err(ibdev, "failed to request mtr hem, ret = %d.\n",
1060 goto err_alloc_bufs;
1062 cfg->root_ba = mtr->hem_list.root_ba;
1063 cfg->ba_pg_shift = ba_page_shift;
1065 cfg->ba_pg_shift = cfg->buf_pg_shift;
1068 /* no buffer to map */
1069 if (buf_attr->mtt_only)
1072 /* alloc a tmp array to store buffer's dma address */
1073 pages = kvcalloc(all_pg_cnt, sizeof(dma_addr_t), GFP_KERNEL);
1076 ibdev_err(ibdev, "failed to alloc mtr page list %d.\n",
1078 goto err_alloc_hem_list;
1081 get_pg_cnt = mtr_get_pages(hr_dev, mtr, pages, all_pg_cnt,
1083 if (get_pg_cnt != all_pg_cnt) {
1084 ibdev_err(ibdev, "failed to get mtr page %d != %d.\n",
1085 get_pg_cnt, all_pg_cnt);
1087 goto err_alloc_page_list;
1090 /* write buffer's dma address to BA table */
1091 ret = hns_roce_mtr_map(hr_dev, mtr, pages, all_pg_cnt);
1093 ibdev_err(ibdev, "failed to map mtr pages, ret = %d.\n", ret);
1094 goto err_alloc_page_list;
1097 /* drop tmp array */
1100 err_alloc_page_list:
1103 hns_roce_hem_list_release(hr_dev, &mtr->hem_list);
1105 mtr_free_bufs(hr_dev, mtr);
1109 void hns_roce_mtr_destroy(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
1111 /* release multi-hop addressing resource */
1112 hns_roce_hem_list_release(hr_dev, &mtr->hem_list);
1115 mtr_free_bufs(hr_dev, mtr);