drivers/infiniband/hw/hfi1/verbs.c

   1 /*
   2  * Copyright(c) 2015 - 2018 Intel Corporation.
   3  *
   4  * This file is provided under a dual BSD/GPLv2 license.  When using or
   5  * redistributing this file, you may do so under either license.
   6  *
   7  * GPL LICENSE SUMMARY
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * BSD LICENSE
  19  *
  20  * Redistribution and use in source and binary forms, with or without
  21  * modification, are permitted provided that the following conditions
  22  * are met:
  23  *
  24  *  - Redistributions of source code must retain the above copyright
  25  *    notice, this list of conditions and the following disclaimer.
  26  *  - Redistributions in binary form must reproduce the above copyright
  27  *    notice, this list of conditions and the following disclaimer in
  28  *    the documentation and/or other materials provided with the
  29  *    distribution.
  30  *  - Neither the name of Intel Corporation nor the names of its
  31  *    contributors may be used to endorse or promote products derived
  32  *    from this software without specific prior written permission.
  33  *
  34  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45  *
  46  */
  47
  48 #include <rdma/ib_mad.h>
  49 #include <rdma/ib_user_verbs.h>
  50 #include <linux/io.h>
  51 #include <linux/module.h>
  52 #include <linux/utsname.h>
  53 #include <linux/rculist.h>
  54 #include <linux/mm.h>
  55 #include <linux/vmalloc.h>
  56 #include <rdma/opa_addr.h>
  57
  58 #include "hfi.h"
  59 #include "common.h"
  60 #include "device.h"
  61 #include "trace.h"
  62 #include "qp.h"
  63 #include "verbs_txreq.h"
  64 #include "debugfs.h"
  65 #include "vnic.h"
  66 #include "fault.h"
  67 #include "affinity.h"
  68
  69 static unsigned int hfi1_lkey_table_size = 16;
  70 module_param_named(lkey_table_size, hfi1_lkey_table_size, uint,
  71                    S_IRUGO);
  72 MODULE_PARM_DESC(lkey_table_size,
  73                  "LKEY table size in bits (2^n, 1 <= n <= 23)");
  74
  75 static unsigned int hfi1_max_pds = 0xFFFF;
  76 module_param_named(max_pds, hfi1_max_pds, uint, S_IRUGO);
  77 MODULE_PARM_DESC(max_pds,
  78                  "Maximum number of protection domains to support");
  79
  80 static unsigned int hfi1_max_ahs = 0xFFFF;
  81 module_param_named(max_ahs, hfi1_max_ahs, uint, S_IRUGO);
  82 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
  83
  84 unsigned int hfi1_max_cqes = 0x2FFFFF;
  85 module_param_named(max_cqes, hfi1_max_cqes, uint, S_IRUGO);
  86 MODULE_PARM_DESC(max_cqes,
  87                  "Maximum number of completion queue entries to support");
  88
  89 unsigned int hfi1_max_cqs = 0x1FFFF;
  90 module_param_named(max_cqs, hfi1_max_cqs, uint, S_IRUGO);
  91 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
  92
  93 unsigned int hfi1_max_qp_wrs = 0x3FFF;
  94 module_param_named(max_qp_wrs, hfi1_max_qp_wrs, uint, S_IRUGO);
  95 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
  96
  97 unsigned int hfi1_max_qps = 32768;
  98 module_param_named(max_qps, hfi1_max_qps, uint, S_IRUGO);
  99 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
 100
 101 unsigned int hfi1_max_sges = 0x60;
 102 module_param_named(max_sges, hfi1_max_sges, uint, S_IRUGO);
 103 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
 104
 105 unsigned int hfi1_max_mcast_grps = 16384;
 106 module_param_named(max_mcast_grps, hfi1_max_mcast_grps, uint, S_IRUGO);
 107 MODULE_PARM_DESC(max_mcast_grps,
 108                  "Maximum number of multicast groups to support");
 109
 110 unsigned int hfi1_max_mcast_qp_attached = 16;
 111 module_param_named(max_mcast_qp_attached, hfi1_max_mcast_qp_attached,
 112                    uint, S_IRUGO);
 113 MODULE_PARM_DESC(max_mcast_qp_attached,
 114                  "Maximum number of attached QPs to support");
 115
 116 unsigned int hfi1_max_srqs = 1024;
 117 module_param_named(max_srqs, hfi1_max_srqs, uint, S_IRUGO);
 118 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
 119
 120 unsigned int hfi1_max_srq_sges = 128;
 121 module_param_named(max_srq_sges, hfi1_max_srq_sges, uint, S_IRUGO);
 122 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
 123
 124 unsigned int hfi1_max_srq_wrs = 0x1FFFF;
 125 module_param_named(max_srq_wrs, hfi1_max_srq_wrs, uint, S_IRUGO);
 126 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
 127
 128 unsigned short piothreshold = 256;
 129 module_param(piothreshold, ushort, S_IRUGO);
 130 MODULE_PARM_DESC(piothreshold, "size used to determine sdma vs. pio");
 131
 132 static unsigned int sge_copy_mode;
 133 module_param(sge_copy_mode, uint, S_IRUGO);
 134 MODULE_PARM_DESC(sge_copy_mode,
 135                  "Verbs copy mode: 0 use memcpy, 1 use cacheless copy, 2 adapt based on WSS");
 136
 137 static void verbs_sdma_complete(
 138         struct sdma_txreq *cookie,
 139         int status);
 140
 141 static int pio_wait(struct rvt_qp *qp,
 142                     struct send_context *sc,
 143                     struct hfi1_pkt_state *ps,
 144                     u32 flag);
 145
 146 /* Length of buffer to create verbs txreq cache name */
 147 #define TXREQ_NAME_LEN 24
 148
 149 /* 16B trailing buffer */
 150 static const u8 trail_buf[MAX_16B_PADDING];
 151
 152 static uint wss_threshold = 80;
 153 module_param(wss_threshold, uint, S_IRUGO);
 154 MODULE_PARM_DESC(wss_threshold, "Percentage (1-100) of LLC to use as a threshold for a cacheless copy");
 155 static uint wss_clean_period = 256;
 156 module_param(wss_clean_period, uint, S_IRUGO);
 157 MODULE_PARM_DESC(wss_clean_period, "Count of verbs copies before an entry in the page copy table is cleaned");
 158
 159 /*
 160  * Translate ib_wr_opcode into ib_wc_opcode.
 161  */
 162 const enum ib_wc_opcode ib_hfi1_wc_opcode[] = {
 163         [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
 164         [IB_WR_TID_RDMA_WRITE] = IB_WC_RDMA_WRITE,
 165         [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
 166         [IB_WR_SEND] = IB_WC_SEND,
 167         [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
 168         [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
 169         [IB_WR_TID_RDMA_READ] = IB_WC_RDMA_READ,
 170         [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
 171         [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD,
 172         [IB_WR_SEND_WITH_INV] = IB_WC_SEND,
 173         [IB_WR_LOCAL_INV] = IB_WC_LOCAL_INV,
 174         [IB_WR_REG_MR] = IB_WC_REG_MR
 175 };
 176
 177 /*
 178  * Length of header by opcode, 0 --> not supported
 179  */
 180 const u8 hdr_len_by_opcode[256] = {
 181         /* RC */
 182         [IB_OPCODE_RC_SEND_FIRST]                     = 12 + 8,
 183         [IB_OPCODE_RC_SEND_MIDDLE]                    = 12 + 8,
 184         [IB_OPCODE_RC_SEND_LAST]                      = 12 + 8,
 185         [IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE]       = 12 + 8 + 4,
 186         [IB_OPCODE_RC_SEND_ONLY]                      = 12 + 8,
 187         [IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 4,
 188         [IB_OPCODE_RC_RDMA_WRITE_FIRST]               = 12 + 8 + 16,
 189         [IB_OPCODE_RC_RDMA_WRITE_MIDDLE]              = 12 + 8,
 190         [IB_OPCODE_RC_RDMA_WRITE_LAST]                = 12 + 8,
 191         [IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = 12 + 8 + 4,
 192         [IB_OPCODE_RC_RDMA_WRITE_ONLY]                = 12 + 8 + 16,
 193         [IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = 12 + 8 + 20,
 194         [IB_OPCODE_RC_RDMA_READ_REQUEST]              = 12 + 8 + 16,
 195         [IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST]       = 12 + 8 + 4,
 196         [IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE]      = 12 + 8,
 197         [IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST]        = 12 + 8 + 4,
 198         [IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY]        = 12 + 8 + 4,
 199         [IB_OPCODE_RC_ACKNOWLEDGE]                    = 12 + 8 + 4,
 200         [IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE]             = 12 + 8 + 4 + 8,
 201         [IB_OPCODE_RC_COMPARE_SWAP]                   = 12 + 8 + 28,
 202         [IB_OPCODE_RC_FETCH_ADD]                      = 12 + 8 + 28,
 203         [IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE]      = 12 + 8 + 4,
 204         [IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = 12 + 8 + 4,
 205         [IB_OPCODE_TID_RDMA_READ_REQ]                 = 12 + 8 + 36,
 206         [IB_OPCODE_TID_RDMA_READ_RESP]                = 12 + 8 + 36,
 207         [IB_OPCODE_TID_RDMA_WRITE_REQ]                = 12 + 8 + 36,
 208         [IB_OPCODE_TID_RDMA_WRITE_RESP]               = 12 + 8 + 36,
 209         [IB_OPCODE_TID_RDMA_WRITE_DATA]               = 12 + 8 + 36,
 210         [IB_OPCODE_TID_RDMA_WRITE_DATA_LAST]          = 12 + 8 + 36,
 211         [IB_OPCODE_TID_RDMA_ACK]                      = 12 + 8 + 36,
 212         [IB_OPCODE_TID_RDMA_RESYNC]                   = 12 + 8 + 36,
 213         /* UC */
 214         [IB_OPCODE_UC_SEND_FIRST]                     = 12 + 8,
 215         [IB_OPCODE_UC_SEND_MIDDLE]                    = 12 + 8,
 216         [IB_OPCODE_UC_SEND_LAST]                      = 12 + 8,
 217         [IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE]       = 12 + 8 + 4,
 218         [IB_OPCODE_UC_SEND_ONLY]                      = 12 + 8,
 219         [IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 4,
 220         [IB_OPCODE_UC_RDMA_WRITE_FIRST]               = 12 + 8 + 16,
 221         [IB_OPCODE_UC_RDMA_WRITE_MIDDLE]              = 12 + 8,
 222         [IB_OPCODE_UC_RDMA_WRITE_LAST]                = 12 + 8,
 223         [IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = 12 + 8 + 4,
 224         [IB_OPCODE_UC_RDMA_WRITE_ONLY]                = 12 + 8 + 16,
 225         [IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = 12 + 8 + 20,
 226         /* UD */
 227         [IB_OPCODE_UD_SEND_ONLY]                      = 12 + 8 + 8,
 228         [IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 12
 229 };
 230
 231 static const opcode_handler opcode_handler_tbl[256] = {
 232         /* RC */
 233         [IB_OPCODE_RC_SEND_FIRST]                     = &hfi1_rc_rcv,
 234         [IB_OPCODE_RC_SEND_MIDDLE]                    = &hfi1_rc_rcv,
 235         [IB_OPCODE_RC_SEND_LAST]                      = &hfi1_rc_rcv,
 236         [IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE]       = &hfi1_rc_rcv,
 237         [IB_OPCODE_RC_SEND_ONLY]                      = &hfi1_rc_rcv,
 238         [IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_rc_rcv,
 239         [IB_OPCODE_RC_RDMA_WRITE_FIRST]               = &hfi1_rc_rcv,
 240         [IB_OPCODE_RC_RDMA_WRITE_MIDDLE]              = &hfi1_rc_rcv,
 241         [IB_OPCODE_RC_RDMA_WRITE_LAST]                = &hfi1_rc_rcv,
 242         [IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = &hfi1_rc_rcv,
 243         [IB_OPCODE_RC_RDMA_WRITE_ONLY]                = &hfi1_rc_rcv,
 244         [IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = &hfi1_rc_rcv,
 245         [IB_OPCODE_RC_RDMA_READ_REQUEST]              = &hfi1_rc_rcv,
 246         [IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST]       = &hfi1_rc_rcv,
 247         [IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE]      = &hfi1_rc_rcv,
 248         [IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST]        = &hfi1_rc_rcv,
 249         [IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY]        = &hfi1_rc_rcv,
 250         [IB_OPCODE_RC_ACKNOWLEDGE]                    = &hfi1_rc_rcv,
 251         [IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE]             = &hfi1_rc_rcv,
 252         [IB_OPCODE_RC_COMPARE_SWAP]                   = &hfi1_rc_rcv,
 253         [IB_OPCODE_RC_FETCH_ADD]                      = &hfi1_rc_rcv,
 254         [IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE]      = &hfi1_rc_rcv,
 255         [IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = &hfi1_rc_rcv,
 256
 257         /* TID RDMA has separate handlers for different opcodes.*/
 258         [IB_OPCODE_TID_RDMA_WRITE_REQ]       = &hfi1_rc_rcv_tid_rdma_write_req,
 259         [IB_OPCODE_TID_RDMA_WRITE_RESP]      = &hfi1_rc_rcv_tid_rdma_write_resp,
 260         [IB_OPCODE_TID_RDMA_WRITE_DATA]      = &hfi1_rc_rcv_tid_rdma_write_data,
 261         [IB_OPCODE_TID_RDMA_WRITE_DATA_LAST] = &hfi1_rc_rcv_tid_rdma_write_data,
 262         [IB_OPCODE_TID_RDMA_READ_REQ]        = &hfi1_rc_rcv_tid_rdma_read_req,
 263         [IB_OPCODE_TID_RDMA_READ_RESP]       = &hfi1_rc_rcv_tid_rdma_read_resp,
 264         [IB_OPCODE_TID_RDMA_RESYNC]          = &hfi1_rc_rcv_tid_rdma_resync,
 265         [IB_OPCODE_TID_RDMA_ACK]             = &hfi1_rc_rcv_tid_rdma_ack,
 266
 267         /* UC */
 268         [IB_OPCODE_UC_SEND_FIRST]                     = &hfi1_uc_rcv,
 269         [IB_OPCODE_UC_SEND_MIDDLE]                    = &hfi1_uc_rcv,
 270         [IB_OPCODE_UC_SEND_LAST]                      = &hfi1_uc_rcv,
 271         [IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE]       = &hfi1_uc_rcv,
 272         [IB_OPCODE_UC_SEND_ONLY]                      = &hfi1_uc_rcv,
 273         [IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_uc_rcv,
 274         [IB_OPCODE_UC_RDMA_WRITE_FIRST]               = &hfi1_uc_rcv,
 275         [IB_OPCODE_UC_RDMA_WRITE_MIDDLE]              = &hfi1_uc_rcv,
 276         [IB_OPCODE_UC_RDMA_WRITE_LAST]                = &hfi1_uc_rcv,
 277         [IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = &hfi1_uc_rcv,
 278         [IB_OPCODE_UC_RDMA_WRITE_ONLY]                = &hfi1_uc_rcv,
 279         [IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = &hfi1_uc_rcv,
 280         /* UD */
 281         [IB_OPCODE_UD_SEND_ONLY]                      = &hfi1_ud_rcv,
 282         [IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_ud_rcv,
 283         /* CNP */
 284         [IB_OPCODE_CNP]                               = &hfi1_cnp_rcv
 285 };
 286
 287 #define OPMASK 0x1f
 288
 289 static const u32 pio_opmask[BIT(3)] = {
 290         /* RC */
 291         [IB_OPCODE_RC >> 5] =
 292                 BIT(RC_OP(SEND_ONLY) & OPMASK) |
 293                 BIT(RC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
 294                 BIT(RC_OP(RDMA_WRITE_ONLY) & OPMASK) |
 295                 BIT(RC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK) |
 296                 BIT(RC_OP(RDMA_READ_REQUEST) & OPMASK) |
 297                 BIT(RC_OP(ACKNOWLEDGE) & OPMASK) |
 298                 BIT(RC_OP(ATOMIC_ACKNOWLEDGE) & OPMASK) |
 299                 BIT(RC_OP(COMPARE_SWAP) & OPMASK) |
 300                 BIT(RC_OP(FETCH_ADD) & OPMASK),
 301         /* UC */
 302         [IB_OPCODE_UC >> 5] =
 303                 BIT(UC_OP(SEND_ONLY) & OPMASK) |
 304                 BIT(UC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
 305                 BIT(UC_OP(RDMA_WRITE_ONLY) & OPMASK) |
 306                 BIT(UC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK),
 307 };
 308
 309 /*
 310  * System image GUID.
 311  */
 312 __be64 ib_hfi1_sys_image_guid;
 313
 314 /*
 315  * Make sure the QP is ready and able to accept the given opcode.
 316  */
 317 static inline opcode_handler qp_ok(struct hfi1_packet *packet)
 318 {
 319         if (!(ib_rvt_state_ops[packet->qp->state] & RVT_PROCESS_RECV_OK))
 320                 return NULL;
 321         if (((packet->opcode & RVT_OPCODE_QP_MASK) ==
 322              packet->qp->allowed_ops) ||
 323             (packet->opcode == IB_OPCODE_CNP))
 324                 return opcode_handler_tbl[packet->opcode];
 325
 326         return NULL;
 327 }
 328
 329 static u64 hfi1_fault_tx(struct rvt_qp *qp, u8 opcode, u64 pbc)
 330 {
 331 #ifdef CONFIG_FAULT_INJECTION
 332         if ((opcode & IB_OPCODE_MSP) == IB_OPCODE_MSP) {
 333                 /*
 334                  * In order to drop non-IB traffic we
 335                  * set PbcInsertHrc to NONE (0x2).
 336                  * The packet will still be delivered
 337                  * to the receiving node but a
 338                  * KHdrHCRCErr (KDETH packet with a bad
 339                  * HCRC) will be triggered and the
 340                  * packet will not be delivered to the
 341                  * correct context.
 342                  */
 343                 pbc &= ~PBC_INSERT_HCRC_SMASK;
 344                 pbc |= (u64)PBC_IHCRC_NONE << PBC_INSERT_HCRC_SHIFT;
 345         } else {
 346                 /*
 347                  * In order to drop regular verbs
 348                  * traffic we set the PbcTestEbp
 349                  * flag. The packet will still be
 350                  * delivered to the receiving node but
 351                  * a 'late ebp error' will be
 352                  * triggered and will be dropped.
 353                  */
 354                 pbc |= PBC_TEST_EBP;
 355         }
 356 #endif
 357         return pbc;
 358 }
 359
 360 static opcode_handler tid_qp_ok(int opcode, struct hfi1_packet *packet)
 361 {
 362         if (packet->qp->ibqp.qp_type != IB_QPT_RC ||
 363             !(ib_rvt_state_ops[packet->qp->state] & RVT_PROCESS_RECV_OK))
 364                 return NULL;
 365         if ((opcode & RVT_OPCODE_QP_MASK) == IB_OPCODE_TID_RDMA)
 366                 return opcode_handler_tbl[opcode];
 367         return NULL;
 368 }
 369
 370 void hfi1_kdeth_eager_rcv(struct hfi1_packet *packet)
 371 {
 372         struct hfi1_ctxtdata *rcd = packet->rcd;
 373         struct ib_header *hdr = packet->hdr;
 374         u32 tlen = packet->tlen;
 375         struct hfi1_pportdata *ppd = rcd->ppd;
 376         struct hfi1_ibport *ibp = &ppd->ibport_data;
 377         struct rvt_dev_info *rdi = &ppd->dd->verbs_dev.rdi;
 378         opcode_handler opcode_handler;
 379         unsigned long flags;
 380         u32 qp_num;
 381         int lnh;
 382         u8 opcode;
 383
 384         /* DW == LRH (2) + BTH (3) + KDETH (9) + CRC (1) */
 385         if (unlikely(tlen < 15 * sizeof(u32)))
 386                 goto drop;
 387
 388         lnh = be16_to_cpu(hdr->lrh[0]) & 3;
 389         if (lnh != HFI1_LRH_BTH)
 390                 goto drop;
 391
 392         packet->ohdr = &hdr->u.oth;
 393         trace_input_ibhdr(rcd->dd, packet, !!(rhf_dc_info(packet->rhf)));
 394
 395         opcode = (be32_to_cpu(packet->ohdr->bth[0]) >> 24);
 396         inc_opstats(tlen, &rcd->opstats->stats[opcode]);
 397
 398         /* verbs_qp can be picked up from any tid_rdma header struct */
 399         qp_num = be32_to_cpu(packet->ohdr->u.tid_rdma.r_req.verbs_qp) &
 400                 RVT_QPN_MASK;
 401
 402         rcu_read_lock();
 403         packet->qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
 404         if (!packet->qp)
 405                 goto drop_rcu;
 406         spin_lock_irqsave(&packet->qp->r_lock, flags);
 407         opcode_handler = tid_qp_ok(opcode, packet);
 408         if (likely(opcode_handler))
 409                 opcode_handler(packet);
 410         else
 411                 goto drop_unlock;
 412         spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 413         rcu_read_unlock();
 414
 415         return;
 416 drop_unlock:
 417         spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 418 drop_rcu:
 419         rcu_read_unlock();
 420 drop:
 421         ibp->rvp.n_pkt_drops++;
 422 }
 423
 424 void hfi1_kdeth_expected_rcv(struct hfi1_packet *packet)
 425 {
 426         struct hfi1_ctxtdata *rcd = packet->rcd;
 427         struct ib_header *hdr = packet->hdr;
 428         u32 tlen = packet->tlen;
 429         struct hfi1_pportdata *ppd = rcd->ppd;
 430         struct hfi1_ibport *ibp = &ppd->ibport_data;
 431         struct rvt_dev_info *rdi = &ppd->dd->verbs_dev.rdi;
 432         opcode_handler opcode_handler;
 433         unsigned long flags;
 434         u32 qp_num;
 435         int lnh;
 436         u8 opcode;
 437
 438         /* DW == LRH (2) + BTH (3) + KDETH (9) + CRC (1) */
 439         if (unlikely(tlen < 15 * sizeof(u32)))
 440                 goto drop;
 441
 442         lnh = be16_to_cpu(hdr->lrh[0]) & 3;
 443         if (lnh != HFI1_LRH_BTH)
 444                 goto drop;
 445
 446         packet->ohdr = &hdr->u.oth;
 447         trace_input_ibhdr(rcd->dd, packet, !!(rhf_dc_info(packet->rhf)));
 448
 449         opcode = (be32_to_cpu(packet->ohdr->bth[0]) >> 24);
 450         inc_opstats(tlen, &rcd->opstats->stats[opcode]);
 451
 452         /* verbs_qp can be picked up from any tid_rdma header struct */
 453         qp_num = be32_to_cpu(packet->ohdr->u.tid_rdma.r_rsp.verbs_qp) &
 454                 RVT_QPN_MASK;
 455
 456         rcu_read_lock();
 457         packet->qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
 458         if (!packet->qp)
 459                 goto drop_rcu;
 460         spin_lock_irqsave(&packet->qp->r_lock, flags);
 461         opcode_handler = tid_qp_ok(opcode, packet);
 462         if (likely(opcode_handler))
 463                 opcode_handler(packet);
 464         else
 465                 goto drop_unlock;
 466         spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 467         rcu_read_unlock();
 468
 469         return;
 470 drop_unlock:
 471         spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 472 drop_rcu:
 473         rcu_read_unlock();
 474 drop:
 475         ibp->rvp.n_pkt_drops++;
 476 }
 477
 478 static int hfi1_do_pkey_check(struct hfi1_packet *packet)
 479 {
 480         struct hfi1_ctxtdata *rcd = packet->rcd;
 481         struct hfi1_pportdata *ppd = rcd->ppd;
 482         struct hfi1_16b_header *hdr = packet->hdr;
 483         u16 pkey;
 484
 485         /* Pkey check needed only for bypass packets */
 486         if (packet->etype != RHF_RCV_TYPE_BYPASS)
 487                 return 0;
 488
 489         /* Perform pkey check */
 490         pkey = hfi1_16B_get_pkey(hdr);
 491         return ingress_pkey_check(ppd, pkey, packet->sc,
 492                                   packet->qp->s_pkey_index,
 493                                   packet->slid, true);
 494 }
 495
 496 static inline void hfi1_handle_packet(struct hfi1_packet *packet,
 497                                       bool is_mcast)
 498 {
 499         u32 qp_num;
 500         struct hfi1_ctxtdata *rcd = packet->rcd;
 501         struct hfi1_pportdata *ppd = rcd->ppd;
 502         struct hfi1_ibport *ibp = rcd_to_iport(rcd);
 503         struct rvt_dev_info *rdi = &ppd->dd->verbs_dev.rdi;
 504         opcode_handler packet_handler;
 505         unsigned long flags;
 506
 507         inc_opstats(packet->tlen, &rcd->opstats->stats[packet->opcode]);
 508
 509         if (unlikely(is_mcast)) {
 510                 struct rvt_mcast *mcast;
 511                 struct rvt_mcast_qp *p;
 512
 513                 if (!packet->grh)
 514                         goto drop;
 515                 mcast = rvt_mcast_find(&ibp->rvp,
 516                                        &packet->grh->dgid,
 517                                        opa_get_lid(packet->dlid, 9B));
 518                 if (!mcast)
 519                         goto drop;
 520                 list_for_each_entry_rcu(p, &mcast->qp_list, list) {
 521                         packet->qp = p->qp;
 522                         if (hfi1_do_pkey_check(packet))
 523                                 goto drop;
 524                         spin_lock_irqsave(&packet->qp->r_lock, flags);
 525                         packet_handler = qp_ok(packet);
 526                         if (likely(packet_handler))
 527                                 packet_handler(packet);
 528                         else
 529                                 ibp->rvp.n_pkt_drops++;
 530                         spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 531                 }
 532                 /*
 533                  * Notify rvt_multicast_detach() if it is waiting for us
 534                  * to finish.
 535                  */
 536                 if (atomic_dec_return(&mcast->refcount) <= 1)
 537                         wake_up(&mcast->wait);
 538         } else {
 539                 /* Get the destination QP number. */
 540                 if (packet->etype == RHF_RCV_TYPE_BYPASS &&
 541                     hfi1_16B_get_l4(packet->hdr) == OPA_16B_L4_FM)
 542                         qp_num = hfi1_16B_get_dest_qpn(packet->mgmt);
 543                 else
 544                         qp_num = ib_bth_get_qpn(packet->ohdr);
 545
 546                 rcu_read_lock();
 547                 packet->qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
 548                 if (!packet->qp)
 549                         goto unlock_drop;
 550
 551                 if (hfi1_do_pkey_check(packet))
 552                         goto unlock_drop;
 553
 554                 spin_lock_irqsave(&packet->qp->r_lock, flags);
 555                 packet_handler = qp_ok(packet);
 556                 if (likely(packet_handler))
 557                         packet_handler(packet);
 558                 else
 559                         ibp->rvp.n_pkt_drops++;
 560                 spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 561                 rcu_read_unlock();
 562         }
 563         return;
 564 unlock_drop:
 565         rcu_read_unlock();
 566 drop:
 567         ibp->rvp.n_pkt_drops++;
 568 }
 569
 570 /**
 571  * hfi1_ib_rcv - process an incoming packet
 572  * @packet: data packet information
 573  *
 574  * This is called to process an incoming packet at interrupt level.
 575  */
 576 void hfi1_ib_rcv(struct hfi1_packet *packet)
 577 {
 578         struct hfi1_ctxtdata *rcd = packet->rcd;
 579
 580         trace_input_ibhdr(rcd->dd, packet, !!(rhf_dc_info(packet->rhf)));
 581         hfi1_handle_packet(packet, hfi1_check_mcast(packet->dlid));
 582 }
 583
 584 void hfi1_16B_rcv(struct hfi1_packet *packet)
 585 {
 586         struct hfi1_ctxtdata *rcd = packet->rcd;
 587
 588         trace_input_ibhdr(rcd->dd, packet, false);
 589         hfi1_handle_packet(packet, hfi1_check_mcast(packet->dlid));
 590 }
 591
 592 /*
 593  * This is called from a timer to check for QPs
 594  * which need kernel memory in order to send a packet.
 595  */
 596 static void mem_timer(struct timer_list *t)
 597 {
 598         struct hfi1_ibdev *dev = from_timer(dev, t, mem_timer);
 599         struct list_head *list = &dev->memwait;
 600         struct rvt_qp *qp = NULL;
 601         struct iowait *wait;
 602         unsigned long flags;
 603         struct hfi1_qp_priv *priv;
 604
 605         write_seqlock_irqsave(&dev->iowait_lock, flags);
 606         if (!list_empty(list)) {
 607                 wait = list_first_entry(list, struct iowait, list);
 608                 qp = iowait_to_qp(wait);
 609                 priv = qp->priv;
 610                 list_del_init(&priv->s_iowait.list);
 611                 priv->s_iowait.lock = NULL;
 612                 /* refcount held until actual wake up */
 613                 if (!list_empty(list))
 614                         mod_timer(&dev->mem_timer, jiffies + 1);
 615         }
 616         write_sequnlock_irqrestore(&dev->iowait_lock, flags);
 617
 618         if (qp)
 619                 hfi1_qp_wakeup(qp, RVT_S_WAIT_KMEM);
 620 }
 621
 622 /*
 623  * This is called with progress side lock held.
 624  */
 625 /* New API */
 626 static void verbs_sdma_complete(
 627         struct sdma_txreq *cookie,
 628         int status)
 629 {
 630         struct verbs_txreq *tx =
 631                 container_of(cookie, struct verbs_txreq, txreq);
 632         struct rvt_qp *qp = tx->qp;
 633
 634         spin_lock(&qp->s_lock);
 635         if (tx->wqe) {
 636                 rvt_send_complete(qp, tx->wqe, IB_WC_SUCCESS);
 637         } else if (qp->ibqp.qp_type == IB_QPT_RC) {
 638                 struct hfi1_opa_header *hdr;
 639
 640                 hdr = &tx->phdr.hdr;
 641                 hfi1_rc_send_complete(qp, hdr);
 642         }
 643         spin_unlock(&qp->s_lock);
 644
 645         hfi1_put_txreq(tx);
 646 }
 647
 648 void hfi1_wait_kmem(struct rvt_qp *qp)
 649 {
 650         struct hfi1_qp_priv *priv = qp->priv;
 651         struct ib_qp *ibqp = &qp->ibqp;
 652         struct ib_device *ibdev = ibqp->device;
 653         struct hfi1_ibdev *dev = to_idev(ibdev);
 654
 655         if (list_empty(&priv->s_iowait.list)) {
 656                 if (list_empty(&dev->memwait))
 657                         mod_timer(&dev->mem_timer, jiffies + 1);
 658                 qp->s_flags |= RVT_S_WAIT_KMEM;
 659                 list_add_tail(&priv->s_iowait.list, &dev->memwait);
 660                 priv->s_iowait.lock = &dev->iowait_lock;
 661                 trace_hfi1_qpsleep(qp, RVT_S_WAIT_KMEM);
 662                 rvt_get_qp(qp);
 663         }
 664 }
 665
 666 static int wait_kmem(struct hfi1_ibdev *dev,
 667                      struct rvt_qp *qp,
 668                      struct hfi1_pkt_state *ps)
 669 {
 670         unsigned long flags;
 671         int ret = 0;
 672
 673         spin_lock_irqsave(&qp->s_lock, flags);
 674         if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
 675                 write_seqlock(&dev->iowait_lock);
 676                 list_add_tail(&ps->s_txreq->txreq.list,
 677                               &ps->wait->tx_head);
 678                 hfi1_wait_kmem(qp);
 679                 write_sequnlock(&dev->iowait_lock);
 680                 hfi1_qp_unbusy(qp, ps->wait);
 681                 ret = -EBUSY;
 682         }
 683         spin_unlock_irqrestore(&qp->s_lock, flags);
 684
 685         return ret;
 686 }
 687
 688 /*
 689  * This routine calls txadds for each sg entry.
 690  *
 691  * Add failures will revert the sge cursor
 692  */
 693 static noinline int build_verbs_ulp_payload(
 694         struct sdma_engine *sde,
 695         u32 length,
 696         struct verbs_txreq *tx)
 697 {
 698         struct rvt_sge_state *ss = tx->ss;
 699         struct rvt_sge *sg_list = ss->sg_list;
 700         struct rvt_sge sge = ss->sge;
 701         u8 num_sge = ss->num_sge;
 702         u32 len;
 703         int ret = 0;
 704
 705         while (length) {
 706                 len = rvt_get_sge_length(&ss->sge, length);
 707                 WARN_ON_ONCE(len == 0);
 708                 ret = sdma_txadd_kvaddr(
 709                         sde->dd,
 710                         &tx->txreq,
 711                         ss->sge.vaddr,
 712                         len);
 713                 if (ret)
 714                         goto bail_txadd;
 715                 rvt_update_sge(ss, len, false);
 716                 length -= len;
 717         }
 718         return ret;
 719 bail_txadd:
 720         /* unwind cursor */
 721         ss->sge = sge;
 722         ss->num_sge = num_sge;
 723         ss->sg_list = sg_list;
 724         return ret;
 725 }
 726
 727 /**
 728  * update_tx_opstats - record stats by opcode
 729  * @qp; the qp
 730  * @ps: transmit packet state
 731  * @plen: the plen in dwords
 732  *
 733  * This is a routine to record the tx opstats after a
 734  * packet has been presented to the egress mechanism.
 735  */
 736 static void update_tx_opstats(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
 737                               u32 plen)
 738 {
 739 #ifdef CONFIG_DEBUG_FS
 740         struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
 741         struct hfi1_opcode_stats_perctx *s = get_cpu_ptr(dd->tx_opstats);
 742
 743         inc_opstats(plen * 4, &s->stats[ps->opcode]);
 744         put_cpu_ptr(s);
 745 #endif
 746 }
 747
 748 /*
 749  * Build the number of DMA descriptors needed to send length bytes of data.
 750  *
 751  * NOTE: DMA mapping is held in the tx until completed in the ring or
 752  *       the tx desc is freed without having been submitted to the ring
 753  *
 754  * This routine ensures all the helper routine calls succeed.
 755  */
 756 /* New API */
 757 static int build_verbs_tx_desc(
 758         struct sdma_engine *sde,
 759         u32 length,
 760         struct verbs_txreq *tx,
 761         struct hfi1_ahg_info *ahg_info,
 762         u64 pbc)
 763 {
 764         int ret = 0;
 765         struct hfi1_sdma_header *phdr = &tx->phdr;
 766         u16 hdrbytes = (tx->hdr_dwords + sizeof(pbc) / 4) << 2;
 767         u8 extra_bytes = 0;
 768
 769         if (tx->phdr.hdr.hdr_type) {
 770                 /*
 771                  * hdrbytes accounts for PBC. Need to subtract 8 bytes
 772                  * before calculating padding.
 773                  */
 774                 extra_bytes = hfi1_get_16b_padding(hdrbytes - 8, length) +
 775                               (SIZE_OF_CRC << 2) + SIZE_OF_LT;
 776         }
 777         if (!ahg_info->ahgcount) {
 778                 ret = sdma_txinit_ahg(
 779                         &tx->txreq,
 780                         ahg_info->tx_flags,
 781                         hdrbytes + length +
 782                         extra_bytes,
 783                         ahg_info->ahgidx,
 784                         0,
 785                         NULL,
 786                         0,
 787                         verbs_sdma_complete);
 788                 if (ret)
 789                         goto bail_txadd;
 790                 phdr->pbc = cpu_to_le64(pbc);
 791                 ret = sdma_txadd_kvaddr(
 792                         sde->dd,
 793                         &tx->txreq,
 794                         phdr,
 795                         hdrbytes);
 796                 if (ret)
 797                         goto bail_txadd;
 798         } else {
 799                 ret = sdma_txinit_ahg(
 800                         &tx->txreq,
 801                         ahg_info->tx_flags,
 802                         length,
 803                         ahg_info->ahgidx,
 804                         ahg_info->ahgcount,
 805                         ahg_info->ahgdesc,
 806                         hdrbytes,
 807                         verbs_sdma_complete);
 808                 if (ret)
 809                         goto bail_txadd;
 810         }
 811         /* add the ulp payload - if any. tx->ss can be NULL for acks */
 812         if (tx->ss) {
 813                 ret = build_verbs_ulp_payload(sde, length, tx);
 814                 if (ret)
 815                         goto bail_txadd;
 816         }
 817
 818         /* add icrc, lt byte, and padding to flit */
 819         if (extra_bytes)
 820                 ret = sdma_txadd_kvaddr(sde->dd, &tx->txreq,
 821                                         (void *)trail_buf, extra_bytes);
 822
 823 bail_txadd:
 824         return ret;
 825 }
 826
 827 static u64 update_hcrc(u8 opcode, u64 pbc)
 828 {
 829         if ((opcode & IB_OPCODE_TID_RDMA) == IB_OPCODE_TID_RDMA) {
 830                 pbc &= ~PBC_INSERT_HCRC_SMASK;
 831                 pbc |= (u64)PBC_IHCRC_LKDETH << PBC_INSERT_HCRC_SHIFT;
 832         }
 833         return pbc;
 834 }
 835
 836 int hfi1_verbs_send_dma(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
 837                         u64 pbc)
 838 {
 839         struct hfi1_qp_priv *priv = qp->priv;
 840         struct hfi1_ahg_info *ahg_info = priv->s_ahg;
 841         u32 hdrwords = ps->s_txreq->hdr_dwords;
 842         u32 len = ps->s_txreq->s_cur_size;
 843         u32 plen;
 844         struct hfi1_ibdev *dev = ps->dev;
 845         struct hfi1_pportdata *ppd = ps->ppd;
 846         struct verbs_txreq *tx;
 847         u8 sc5 = priv->s_sc;
 848         int ret;
 849         u32 dwords;
 850
 851         if (ps->s_txreq->phdr.hdr.hdr_type) {
 852                 u8 extra_bytes = hfi1_get_16b_padding((hdrwords << 2), len);
 853
 854                 dwords = (len + extra_bytes + (SIZE_OF_CRC << 2) +
 855                           SIZE_OF_LT) >> 2;
 856         } else {
 857                 dwords = (len + 3) >> 2;
 858         }
 859         plen = hdrwords + dwords + sizeof(pbc) / 4;
 860
 861         tx = ps->s_txreq;
 862         if (!sdma_txreq_built(&tx->txreq)) {
 863                 if (likely(pbc == 0)) {
 864                         u32 vl = sc_to_vlt(dd_from_ibdev(qp->ibqp.device), sc5);
 865
 866                         /* No vl15 here */
 867                         /* set PBC_DC_INFO bit (aka SC[4]) in pbc */
 868                         if (ps->s_txreq->phdr.hdr.hdr_type)
 869                                 pbc |= PBC_PACKET_BYPASS |
 870                                        PBC_INSERT_BYPASS_ICRC;
 871                         else
 872                                 pbc |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
 873
 874                         if (unlikely(hfi1_dbg_should_fault_tx(qp, ps->opcode)))
 875                                 pbc = hfi1_fault_tx(qp, ps->opcode, pbc);
 876                         pbc = create_pbc(ppd,
 877                                          pbc,
 878                                          qp->srate_mbps,
 879                                          vl,
 880                                          plen);
 881
 882                         /* Update HCRC based on packet opcode */
 883                         pbc = update_hcrc(ps->opcode, pbc);
 884                 }
 885                 tx->wqe = qp->s_wqe;
 886                 ret = build_verbs_tx_desc(tx->sde, len, tx, ahg_info, pbc);
 887                 if (unlikely(ret))
 888                         goto bail_build;
 889         }
 890         ret =  sdma_send_txreq(tx->sde, ps->wait, &tx->txreq, ps->pkts_sent);
 891         if (unlikely(ret < 0)) {
 892                 if (ret == -ECOMM)
 893                         goto bail_ecomm;
 894                 return ret;
 895         }
 896
 897         update_tx_opstats(qp, ps, plen);
 898         trace_sdma_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
 899                                 &ps->s_txreq->phdr.hdr, ib_is_sc5(sc5));
 900         return ret;
 901
 902 bail_ecomm:
 903         /* The current one got "sent" */
 904         return 0;
 905 bail_build:
 906         ret = wait_kmem(dev, qp, ps);
 907         if (!ret) {
 908                 /* free txreq - bad state */
 909                 hfi1_put_txreq(ps->s_txreq);
 910                 ps->s_txreq = NULL;
 911         }
 912         return ret;
 913 }
 914
 915 /*
 916  * If we are now in the error state, return zero to flush the
 917  * send work request.
 918  */
 919 static int pio_wait(struct rvt_qp *qp,
 920                     struct send_context *sc,
 921                     struct hfi1_pkt_state *ps,
 922                     u32 flag)
 923 {
 924         struct hfi1_qp_priv *priv = qp->priv;
 925         struct hfi1_devdata *dd = sc->dd;
 926         unsigned long flags;
 927         int ret = 0;
 928
 929         /*
 930          * Note that as soon as want_buffer() is called and
 931          * possibly before it returns, sc_piobufavail()
 932          * could be called. Therefore, put QP on the I/O wait list before
 933          * enabling the PIO avail interrupt.
 934          */
 935         spin_lock_irqsave(&qp->s_lock, flags);
 936         if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
 937                 write_seqlock(&sc->waitlock);
 938                 list_add_tail(&ps->s_txreq->txreq.list,
 939                               &ps->wait->tx_head);
 940                 if (list_empty(&priv->s_iowait.list)) {
 941                         struct hfi1_ibdev *dev = &dd->verbs_dev;
 942                         int was_empty;
 943
 944                         dev->n_piowait += !!(flag & RVT_S_WAIT_PIO);
 945                         dev->n_piodrain += !!(flag & HFI1_S_WAIT_PIO_DRAIN);
 946                         qp->s_flags |= flag;
 947                         was_empty = list_empty(&sc->piowait);
 948                         iowait_get_priority(&priv->s_iowait);
 949                         iowait_queue(ps->pkts_sent, &priv->s_iowait,
 950                                      &sc->piowait);
 951                         priv->s_iowait.lock = &sc->waitlock;
 952                         trace_hfi1_qpsleep(qp, RVT_S_WAIT_PIO);
 953                         rvt_get_qp(qp);
 954                         /* counting: only call wantpiobuf_intr if first user */
 955                         if (was_empty)
 956                                 hfi1_sc_wantpiobuf_intr(sc, 1);
 957                 }
 958                 write_sequnlock(&sc->waitlock);
 959                 hfi1_qp_unbusy(qp, ps->wait);
 960                 ret = -EBUSY;
 961         }
 962         spin_unlock_irqrestore(&qp->s_lock, flags);
 963         return ret;
 964 }
 965
 966 static void verbs_pio_complete(void *arg, int code)
 967 {
 968         struct rvt_qp *qp = (struct rvt_qp *)arg;
 969         struct hfi1_qp_priv *priv = qp->priv;
 970
 971         if (iowait_pio_dec(&priv->s_iowait))
 972                 iowait_drain_wakeup(&priv->s_iowait);
 973 }
 974
 975 int hfi1_verbs_send_pio(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
 976                         u64 pbc)
 977 {
 978         struct hfi1_qp_priv *priv = qp->priv;
 979         u32 hdrwords = ps->s_txreq->hdr_dwords;
 980         struct rvt_sge_state *ss = ps->s_txreq->ss;
 981         u32 len = ps->s_txreq->s_cur_size;
 982         u32 dwords;
 983         u32 plen;
 984         struct hfi1_pportdata *ppd = ps->ppd;
 985         u32 *hdr;
 986         u8 sc5;
 987         unsigned long flags = 0;
 988         struct send_context *sc;
 989         struct pio_buf *pbuf;
 990         int wc_status = IB_WC_SUCCESS;
 991         int ret = 0;
 992         pio_release_cb cb = NULL;
 993         u8 extra_bytes = 0;
 994
 995         if (ps->s_txreq->phdr.hdr.hdr_type) {
 996                 u8 pad_size = hfi1_get_16b_padding((hdrwords << 2), len);
 997
 998                 extra_bytes = pad_size + (SIZE_OF_CRC << 2) + SIZE_OF_LT;
 999                 dwords = (len + extra_bytes) >> 2;
1000                 hdr = (u32 *)&ps->s_txreq->phdr.hdr.opah;
1001         } else {
1002                 dwords = (len + 3) >> 2;
1003                 hdr = (u32 *)&ps->s_txreq->phdr.hdr.ibh;
1004         }
1005         plen = hdrwords + dwords + sizeof(pbc) / 4;
1006
1007         /* only RC/UC use complete */
1008         switch (qp->ibqp.qp_type) {
1009         case IB_QPT_RC:
1010         case IB_QPT_UC:
1011                 cb = verbs_pio_complete;
1012                 break;
1013         default:
1014                 break;
1015         }
1016
1017         /* vl15 special case taken care of in ud.c */
1018         sc5 = priv->s_sc;
1019         sc = ps->s_txreq->psc;
1020
1021         if (likely(pbc == 0)) {
1022                 u8 vl = sc_to_vlt(dd_from_ibdev(qp->ibqp.device), sc5);
1023
1024                 /* set PBC_DC_INFO bit (aka SC[4]) in pbc */
1025                 if (ps->s_txreq->phdr.hdr.hdr_type)
1026                         pbc |= PBC_PACKET_BYPASS | PBC_INSERT_BYPASS_ICRC;
1027                 else
1028                         pbc |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
1029
1030                 if (unlikely(hfi1_dbg_should_fault_tx(qp, ps->opcode)))
1031                         pbc = hfi1_fault_tx(qp, ps->opcode, pbc);
1032                 pbc = create_pbc(ppd, pbc, qp->srate_mbps, vl, plen);
1033
1034                 /* Update HCRC based on packet opcode */
1035                 pbc = update_hcrc(ps->opcode, pbc);
1036         }
1037         if (cb)
1038                 iowait_pio_inc(&priv->s_iowait);
1039         pbuf = sc_buffer_alloc(sc, plen, cb, qp);
1040         if (unlikely(!pbuf)) {
1041                 if (cb)
1042                         verbs_pio_complete(qp, 0);
1043                 if (ppd->host_link_state != HLS_UP_ACTIVE) {
1044                         /*
1045                          * If we have filled the PIO buffers to capacity and are
1046                          * not in an active state this request is not going to
1047                          * go out to so just complete it with an error or else a
1048                          * ULP or the core may be stuck waiting.
1049                          */
1050                         hfi1_cdbg(
1051                                 PIO,
1052                                 "alloc failed. state not active, completing");
1053                         wc_status = IB_WC_GENERAL_ERR;
1054                         goto pio_bail;
1055                 } else {
1056                         /*
1057                          * This is a normal occurrence. The PIO buffs are full
1058                          * up but we are still happily sending, well we could be
1059                          * so lets continue to queue the request.
1060                          */
1061                         hfi1_cdbg(PIO, "alloc failed. state active, queuing");
1062                         ret = pio_wait(qp, sc, ps, RVT_S_WAIT_PIO);
1063                         if (!ret)
1064                                 /* txreq not queued - free */
1065                                 goto bail;
1066                         /* tx consumed in wait */
1067                         return ret;
1068                 }
1069         }
1070
1071         if (dwords == 0) {
1072                 pio_copy(ppd->dd, pbuf, pbc, hdr, hdrwords);
1073         } else {
1074                 seg_pio_copy_start(pbuf, pbc,
1075                                    hdr, hdrwords * 4);
1076                 if (ss) {
1077                         while (len) {
1078                                 void *addr = ss->sge.vaddr;
1079                                 u32 slen = rvt_get_sge_length(&ss->sge, len);
1080
1081                                 rvt_update_sge(ss, slen, false);
1082                                 seg_pio_copy_mid(pbuf, addr, slen);
1083                                 len -= slen;
1084                         }
1085                 }
1086                 /* add icrc, lt byte, and padding to flit */
1087                 if (extra_bytes)
1088                         seg_pio_copy_mid(pbuf, trail_buf, extra_bytes);
1089
1090                 seg_pio_copy_end(pbuf);
1091         }
1092
1093         update_tx_opstats(qp, ps, plen);
1094         trace_pio_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
1095                                &ps->s_txreq->phdr.hdr, ib_is_sc5(sc5));
1096
1097 pio_bail:
1098         if (qp->s_wqe) {
1099                 spin_lock_irqsave(&qp->s_lock, flags);
1100                 rvt_send_complete(qp, qp->s_wqe, wc_status);
1101                 spin_unlock_irqrestore(&qp->s_lock, flags);
1102         } else if (qp->ibqp.qp_type == IB_QPT_RC) {
1103                 spin_lock_irqsave(&qp->s_lock, flags);
1104                 hfi1_rc_send_complete(qp, &ps->s_txreq->phdr.hdr);
1105                 spin_unlock_irqrestore(&qp->s_lock, flags);
1106         }
1107
1108         ret = 0;
1109
1110 bail:
1111         hfi1_put_txreq(ps->s_txreq);
1112         return ret;
1113 }
1114
1115 /*
1116  * egress_pkey_matches_entry - return 1 if the pkey matches ent (ent
1117  * being an entry from the partition key table), return 0
1118  * otherwise. Use the matching criteria for egress partition keys
1119  * specified in the OPAv1 spec., section 9.1l.7.
1120  */
1121 static inline int egress_pkey_matches_entry(u16 pkey, u16 ent)
1122 {
1123         u16 mkey = pkey & PKEY_LOW_15_MASK;
1124         u16 mentry = ent & PKEY_LOW_15_MASK;
1125
1126         if (mkey == mentry) {
1127                 /*
1128                  * If pkey[15] is set (full partition member),
1129                  * is bit 15 in the corresponding table element
1130                  * clear (limited member)?
1131                  */
1132                 if (pkey & PKEY_MEMBER_MASK)
1133                         return !!(ent & PKEY_MEMBER_MASK);
1134                 return 1;
1135         }
1136         return 0;
1137 }
1138
1139 /**
1140  * egress_pkey_check - check P_KEY of a packet
1141  * @ppd:  Physical IB port data
1142  * @slid: SLID for packet
1143  * @bkey: PKEY for header
1144  * @sc5:  SC for packet
1145  * @s_pkey_index: It will be used for look up optimization for kernel contexts
1146  * only. If it is negative value, then it means user contexts is calling this
1147  * function.
1148  *
1149  * It checks if hdr's pkey is valid.
1150  *
1151  * Return: 0 on success, otherwise, 1
1152  */
1153 int egress_pkey_check(struct hfi1_pportdata *ppd, u32 slid, u16 pkey,
1154                       u8 sc5, int8_t s_pkey_index)
1155 {
1156         struct hfi1_devdata *dd;
1157         int i;
1158         int is_user_ctxt_mechanism = (s_pkey_index < 0);
1159
1160         if (!(ppd->part_enforce & HFI1_PART_ENFORCE_OUT))
1161                 return 0;
1162
1163         /* If SC15, pkey[0:14] must be 0x7fff */
1164         if ((sc5 == 0xf) && ((pkey & PKEY_LOW_15_MASK) != PKEY_LOW_15_MASK))
1165                 goto bad;
1166
1167         /* Is the pkey = 0x0, or 0x8000? */
1168         if ((pkey & PKEY_LOW_15_MASK) == 0)
1169                 goto bad;
1170
1171         /*
1172          * For the kernel contexts only, if a qp is passed into the function,
1173          * the most likely matching pkey has index qp->s_pkey_index
1174          */
1175         if (!is_user_ctxt_mechanism &&
1176             egress_pkey_matches_entry(pkey, ppd->pkeys[s_pkey_index])) {
1177                 return 0;
1178         }
1179
1180         for (i = 0; i < MAX_PKEY_VALUES; i++) {
1181                 if (egress_pkey_matches_entry(pkey, ppd->pkeys[i]))
1182                         return 0;
1183         }
1184 bad:
1185         /*
1186          * For the user-context mechanism, the P_KEY check would only happen
1187          * once per SDMA request, not once per packet.  Therefore, there's no
1188          * need to increment the counter for the user-context mechanism.
1189          */
1190         if (!is_user_ctxt_mechanism) {
1191                 incr_cntr64(&ppd->port_xmit_constraint_errors);
1192                 dd = ppd->dd;
1193                 if (!(dd->err_info_xmit_constraint.status &
1194                       OPA_EI_STATUS_SMASK)) {
1195                         dd->err_info_xmit_constraint.status |=
1196                                 OPA_EI_STATUS_SMASK;
1197                         dd->err_info_xmit_constraint.slid = slid;
1198                         dd->err_info_xmit_constraint.pkey = pkey;
1199                 }
1200         }
1201         return 1;
1202 }
1203
1204 /**
1205  * get_send_routine - choose an egress routine
1206  *
1207  * Choose an egress routine based on QP type
1208  * and size
1209  */
1210 static inline send_routine get_send_routine(struct rvt_qp *qp,
1211                                             struct hfi1_pkt_state *ps)
1212 {
1213         struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
1214         struct hfi1_qp_priv *priv = qp->priv;
1215         struct verbs_txreq *tx = ps->s_txreq;
1216
1217         if (unlikely(!(dd->flags & HFI1_HAS_SEND_DMA)))
1218                 return dd->process_pio_send;
1219         switch (qp->ibqp.qp_type) {
1220         case IB_QPT_SMI:
1221                 return dd->process_pio_send;
1222         case IB_QPT_GSI:
1223         case IB_QPT_UD:
1224                 break;
1225         case IB_QPT_UC:
1226         case IB_QPT_RC: {
1227                 if (piothreshold &&
1228                     tx->s_cur_size <= min(piothreshold, qp->pmtu) &&
1229                     (BIT(ps->opcode & OPMASK) & pio_opmask[ps->opcode >> 5]) &&
1230                     iowait_sdma_pending(&priv->s_iowait) == 0 &&
1231                     !sdma_txreq_built(&tx->txreq))
1232                         return dd->process_pio_send;
1233                 break;
1234         }
1235         default:
1236                 break;
1237         }
1238         return dd->process_dma_send;
1239 }
1240
1241 /**
1242  * hfi1_verbs_send - send a packet
1243  * @qp: the QP to send on
1244  * @ps: the state of the packet to send
1245  *
1246  * Return zero if packet is sent or queued OK.
1247  * Return non-zero and clear qp->s_flags RVT_S_BUSY otherwise.
1248  */
1249 int hfi1_verbs_send(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
1250 {
1251         struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
1252         struct hfi1_qp_priv *priv = qp->priv;
1253         struct ib_other_headers *ohdr = NULL;
1254         send_routine sr;
1255         int ret;
1256         u16 pkey;
1257         u32 slid;
1258         u8 l4 = 0;
1259
1260         /* locate the pkey within the headers */
1261         if (ps->s_txreq->phdr.hdr.hdr_type) {
1262                 struct hfi1_16b_header *hdr = &ps->s_txreq->phdr.hdr.opah;
1263
1264                 l4 = hfi1_16B_get_l4(hdr);
1265                 if (l4 == OPA_16B_L4_IB_LOCAL)
1266                         ohdr = &hdr->u.oth;
1267                 else if (l4 == OPA_16B_L4_IB_GLOBAL)
1268                         ohdr = &hdr->u.l.oth;
1269
1270                 slid = hfi1_16B_get_slid(hdr);
1271                 pkey = hfi1_16B_get_pkey(hdr);
1272         } else {
1273                 struct ib_header *hdr = &ps->s_txreq->phdr.hdr.ibh;
1274                 u8 lnh = ib_get_lnh(hdr);
1275
1276                 if (lnh == HFI1_LRH_GRH)
1277                         ohdr = &hdr->u.l.oth;
1278                 else
1279                         ohdr = &hdr->u.oth;
1280                 slid = ib_get_slid(hdr);
1281                 pkey = ib_bth_get_pkey(ohdr);
1282         }
1283
1284         if (likely(l4 != OPA_16B_L4_FM))
1285                 ps->opcode = ib_bth_get_opcode(ohdr);
1286         else
1287                 ps->opcode = IB_OPCODE_UD_SEND_ONLY;
1288
1289         sr = get_send_routine(qp, ps);
1290         ret = egress_pkey_check(dd->pport, slid, pkey,
1291                                 priv->s_sc, qp->s_pkey_index);
1292         if (unlikely(ret)) {
1293                 /*
1294                  * The value we are returning here does not get propagated to
1295                  * the verbs caller. Thus we need to complete the request with
1296                  * error otherwise the caller could be sitting waiting on the
1297                  * completion event. Only do this for PIO. SDMA has its own
1298                  * mechanism for handling the errors. So for SDMA we can just
1299                  * return.
1300                  */
1301                 if (sr == dd->process_pio_send) {
1302                         unsigned long flags;
1303
1304                         hfi1_cdbg(PIO, "%s() Failed. Completing with err",
1305                                   __func__);
1306                         spin_lock_irqsave(&qp->s_lock, flags);
1307                         rvt_send_complete(qp, qp->s_wqe, IB_WC_GENERAL_ERR);
1308                         spin_unlock_irqrestore(&qp->s_lock, flags);
1309                 }
1310                 return -EINVAL;
1311         }
1312         if (sr == dd->process_dma_send && iowait_pio_pending(&priv->s_iowait))
1313                 return pio_wait(qp,
1314                                 ps->s_txreq->psc,
1315                                 ps,
1316                                 HFI1_S_WAIT_PIO_DRAIN);
1317         return sr(qp, ps, 0);
1318 }
1319
1320 /**
1321  * hfi1_fill_device_attr - Fill in rvt dev info device attributes.
1322  * @dd: the device data structure
1323  */
1324 static void hfi1_fill_device_attr(struct hfi1_devdata *dd)
1325 {
1326         struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
1327         u32 ver = dd->dc8051_ver;
1328
1329         memset(&rdi->dparms.props, 0, sizeof(rdi->dparms.props));
1330
1331         rdi->dparms.props.fw_ver = ((u64)(dc8051_ver_maj(ver)) << 32) |
1332                 ((u64)(dc8051_ver_min(ver)) << 16) |
1333                 (u64)dc8051_ver_patch(ver);
1334
1335         rdi->dparms.props.device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
1336                         IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
1337                         IB_DEVICE_SYS_IMAGE_GUID | IB_DEVICE_RC_RNR_NAK_GEN |
1338                         IB_DEVICE_PORT_ACTIVE_EVENT | IB_DEVICE_SRQ_RESIZE |
1339                         IB_DEVICE_MEM_MGT_EXTENSIONS |
1340                         IB_DEVICE_RDMA_NETDEV_OPA_VNIC;
1341         rdi->dparms.props.page_size_cap = PAGE_SIZE;
1342         rdi->dparms.props.vendor_id = dd->oui1 << 16 | dd->oui2 << 8 | dd->oui3;
1343         rdi->dparms.props.vendor_part_id = dd->pcidev->device;
1344         rdi->dparms.props.hw_ver = dd->minrev;
1345         rdi->dparms.props.sys_image_guid = ib_hfi1_sys_image_guid;
1346         rdi->dparms.props.max_mr_size = U64_MAX;
1347         rdi->dparms.props.max_fast_reg_page_list_len = UINT_MAX;
1348         rdi->dparms.props.max_qp = hfi1_max_qps;
1349         rdi->dparms.props.max_qp_wr =
1350                 (hfi1_max_qp_wrs >= HFI1_QP_WQE_INVALID ?
1351                  HFI1_QP_WQE_INVALID - 1 : hfi1_max_qp_wrs);
1352         rdi->dparms.props.max_send_sge = hfi1_max_sges;
1353         rdi->dparms.props.max_recv_sge = hfi1_max_sges;
1354         rdi->dparms.props.max_sge_rd = hfi1_max_sges;
1355         rdi->dparms.props.max_cq = hfi1_max_cqs;
1356         rdi->dparms.props.max_ah = hfi1_max_ahs;
1357         rdi->dparms.props.max_cqe = hfi1_max_cqes;
1358         rdi->dparms.props.max_mr = rdi->lkey_table.max;
1359         rdi->dparms.props.max_fmr = rdi->lkey_table.max;
1360         rdi->dparms.props.max_map_per_fmr = 32767;
1361         rdi->dparms.props.max_pd = hfi1_max_pds;
1362         rdi->dparms.props.max_qp_rd_atom = HFI1_MAX_RDMA_ATOMIC;
1363         rdi->dparms.props.max_qp_init_rd_atom = 255;
1364         rdi->dparms.props.max_srq = hfi1_max_srqs;
1365         rdi->dparms.props.max_srq_wr = hfi1_max_srq_wrs;
1366         rdi->dparms.props.max_srq_sge = hfi1_max_srq_sges;
1367         rdi->dparms.props.atomic_cap = IB_ATOMIC_GLOB;
1368         rdi->dparms.props.max_pkeys = hfi1_get_npkeys(dd);
1369         rdi->dparms.props.max_mcast_grp = hfi1_max_mcast_grps;
1370         rdi->dparms.props.max_mcast_qp_attach = hfi1_max_mcast_qp_attached;
1371         rdi->dparms.props.max_total_mcast_qp_attach =
1372                                         rdi->dparms.props.max_mcast_qp_attach *
1373                                         rdi->dparms.props.max_mcast_grp;
1374 }
1375
1376 static inline u16 opa_speed_to_ib(u16 in)
1377 {
1378         u16 out = 0;
1379
1380         if (in & OPA_LINK_SPEED_25G)
1381                 out |= IB_SPEED_EDR;
1382         if (in & OPA_LINK_SPEED_12_5G)
1383                 out |= IB_SPEED_FDR;
1384
1385         return out;
1386 }
1387
1388 /*
1389  * Convert a single OPA link width (no multiple flags) to an IB value.
1390  * A zero OPA link width means link down, which means the IB width value
1391  * is a don't care.
1392  */
1393 static inline u16 opa_width_to_ib(u16 in)
1394 {
1395         switch (in) {
1396         case OPA_LINK_WIDTH_1X:
1397         /* map 2x and 3x to 1x as they don't exist in IB */
1398         case OPA_LINK_WIDTH_2X:
1399         case OPA_LINK_WIDTH_3X:
1400                 return IB_WIDTH_1X;
1401         default: /* link down or unknown, return our largest width */
1402         case OPA_LINK_WIDTH_4X:
1403                 return IB_WIDTH_4X;
1404         }
1405 }
1406
1407 static int query_port(struct rvt_dev_info *rdi, u8 port_num,
1408                       struct ib_port_attr *props)
1409 {
1410         struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
1411         struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
1412         struct hfi1_pportdata *ppd = &dd->pport[port_num - 1];
1413         u32 lid = ppd->lid;
1414
1415         /* props being zeroed by the caller, avoid zeroing it here */
1416         props->lid = lid ? lid : 0;
1417         props->lmc = ppd->lmc;
1418         /* OPA logical states match IB logical states */
1419         props->state = driver_lstate(ppd);
1420         props->phys_state = driver_pstate(ppd);
1421         props->gid_tbl_len = HFI1_GUIDS_PER_PORT;
1422         props->active_width = (u8)opa_width_to_ib(ppd->link_width_active);
1423         /* see rate_show() in ib core/sysfs.c */
1424         props->active_speed = (u8)opa_speed_to_ib(ppd->link_speed_active);
1425         props->max_vl_num = ppd->vls_supported;
1426
1427         /* Once we are a "first class" citizen and have added the OPA MTUs to
1428          * the core we can advertise the larger MTU enum to the ULPs, for now
1429          * advertise only 4K.
1430          *
1431          * Those applications which are either OPA aware or pass the MTU enum
1432          * from the Path Records to us will get the new 8k MTU.  Those that
1433          * attempt to process the MTU enum may fail in various ways.
1434          */
1435         props->max_mtu = mtu_to_enum((!valid_ib_mtu(hfi1_max_mtu) ?
1436                                       4096 : hfi1_max_mtu), IB_MTU_4096);
1437         props->active_mtu = !valid_ib_mtu(ppd->ibmtu) ? props->max_mtu :
1438                 mtu_to_enum(ppd->ibmtu, IB_MTU_4096);
1439
1440         return 0;
1441 }
1442
1443 static int modify_device(struct ib_device *device,
1444                          int device_modify_mask,
1445                          struct ib_device_modify *device_modify)
1446 {
1447         struct hfi1_devdata *dd = dd_from_ibdev(device);
1448         unsigned i;
1449         int ret;
1450
1451         if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1452                                    IB_DEVICE_MODIFY_NODE_DESC)) {
1453                 ret = -EOPNOTSUPP;
1454                 goto bail;
1455         }
1456
1457         if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC) {
1458                 memcpy(device->node_desc, device_modify->node_desc,
1459                        IB_DEVICE_NODE_DESC_MAX);
1460                 for (i = 0; i < dd->num_pports; i++) {
1461                         struct hfi1_ibport *ibp = &dd->pport[i].ibport_data;
1462
1463                         hfi1_node_desc_chg(ibp);
1464                 }
1465         }
1466
1467         if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID) {
1468                 ib_hfi1_sys_image_guid =
1469                         cpu_to_be64(device_modify->sys_image_guid);
1470                 for (i = 0; i < dd->num_pports; i++) {
1471                         struct hfi1_ibport *ibp = &dd->pport[i].ibport_data;
1472
1473                         hfi1_sys_guid_chg(ibp);
1474                 }
1475         }
1476
1477         ret = 0;
1478
1479 bail:
1480         return ret;
1481 }
1482
1483 static int shut_down_port(struct rvt_dev_info *rdi, u8 port_num)
1484 {
1485         struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
1486         struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
1487         struct hfi1_pportdata *ppd = &dd->pport[port_num - 1];
1488         int ret;
1489
1490         set_link_down_reason(ppd, OPA_LINKDOWN_REASON_UNKNOWN, 0,
1491                              OPA_LINKDOWN_REASON_UNKNOWN);
1492         ret = set_link_state(ppd, HLS_DN_DOWNDEF);
1493         return ret;
1494 }
1495
1496 static int hfi1_get_guid_be(struct rvt_dev_info *rdi, struct rvt_ibport *rvp,
1497                             int guid_index, __be64 *guid)
1498 {
1499         struct hfi1_ibport *ibp = container_of(rvp, struct hfi1_ibport, rvp);
1500
1501         if (guid_index >= HFI1_GUIDS_PER_PORT)
1502                 return -EINVAL;
1503
1504         *guid = get_sguid(ibp, guid_index);
1505         return 0;
1506 }
1507
1508 /*
1509  * convert ah port,sl to sc
1510  */
1511 u8 ah_to_sc(struct ib_device *ibdev, struct rdma_ah_attr *ah)
1512 {
1513         struct hfi1_ibport *ibp = to_iport(ibdev, rdma_ah_get_port_num(ah));
1514
1515         return ibp->sl_to_sc[rdma_ah_get_sl(ah)];
1516 }
1517
1518 static int hfi1_check_ah(struct ib_device *ibdev, struct rdma_ah_attr *ah_attr)
1519 {
1520         struct hfi1_ibport *ibp;
1521         struct hfi1_pportdata *ppd;
1522         struct hfi1_devdata *dd;
1523         u8 sc5;
1524         u8 sl;
1525
1526         if (hfi1_check_mcast(rdma_ah_get_dlid(ah_attr)) &&
1527             !(rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH))
1528                 return -EINVAL;
1529
1530         /* test the mapping for validity */
1531         ibp = to_iport(ibdev, rdma_ah_get_port_num(ah_attr));
1532         ppd = ppd_from_ibp(ibp);
1533         dd = dd_from_ppd(ppd);
1534
1535         sl = rdma_ah_get_sl(ah_attr);
1536         if (sl >= ARRAY_SIZE(ibp->sl_to_sc))
1537                 return -EINVAL;
1538
1539         sc5 = ibp->sl_to_sc[sl];
1540         if (sc_to_vlt(dd, sc5) > num_vls && sc_to_vlt(dd, sc5) != 0xf)
1541                 return -EINVAL;
1542         return 0;
1543 }
1544
1545 static void hfi1_notify_new_ah(struct ib_device *ibdev,
1546                                struct rdma_ah_attr *ah_attr,
1547                                struct rvt_ah *ah)
1548 {
1549         struct hfi1_ibport *ibp;
1550         struct hfi1_pportdata *ppd;
1551         struct hfi1_devdata *dd;
1552         u8 sc5;
1553         struct rdma_ah_attr *attr = &ah->attr;
1554
1555         /*
1556          * Do not trust reading anything from rvt_ah at this point as it is not
1557          * done being setup. We can however modify things which we need to set.
1558          */
1559
1560         ibp = to_iport(ibdev, rdma_ah_get_port_num(ah_attr));
1561         ppd = ppd_from_ibp(ibp);
1562         sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&ah->attr)];
1563         hfi1_update_ah_attr(ibdev, attr);
1564         hfi1_make_opa_lid(attr);
1565         dd = dd_from_ppd(ppd);
1566         ah->vl = sc_to_vlt(dd, sc5);
1567         if (ah->vl < num_vls || ah->vl == 15)
1568                 ah->log_pmtu = ilog2(dd->vld[ah->vl].mtu);
1569 }
1570
1571 /**
1572  * hfi1_get_npkeys - return the size of the PKEY table for context 0
1573  * @dd: the hfi1_ib device
1574  */
1575 unsigned hfi1_get_npkeys(struct hfi1_devdata *dd)
1576 {
1577         return ARRAY_SIZE(dd->pport[0].pkeys);
1578 }
1579
1580 static void init_ibport(struct hfi1_pportdata *ppd)
1581 {
1582         struct hfi1_ibport *ibp = &ppd->ibport_data;
1583         size_t sz = ARRAY_SIZE(ibp->sl_to_sc);
1584         int i;
1585
1586         for (i = 0; i < sz; i++) {
1587                 ibp->sl_to_sc[i] = i;
1588                 ibp->sc_to_sl[i] = i;
1589         }
1590
1591         for (i = 0; i < RVT_MAX_TRAP_LISTS ; i++)
1592                 INIT_LIST_HEAD(&ibp->rvp.trap_lists[i].list);
1593         timer_setup(&ibp->rvp.trap_timer, hfi1_handle_trap_timer, 0);
1594
1595         spin_lock_init(&ibp->rvp.lock);
1596         /* Set the prefix to the default value (see ch. 4.1.1) */
1597         ibp->rvp.gid_prefix = IB_DEFAULT_GID_PREFIX;
1598         ibp->rvp.sm_lid = 0;
1599         /*
1600          * Below should only set bits defined in OPA PortInfo.CapabilityMask
1601          * and PortInfo.CapabilityMask3
1602          */
1603         ibp->rvp.port_cap_flags = IB_PORT_AUTO_MIGR_SUP |
1604                 IB_PORT_CAP_MASK_NOTICE_SUP;
1605         ibp->rvp.port_cap3_flags = OPA_CAP_MASK3_IsSharedSpaceSupported;
1606         ibp->rvp.pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1607         ibp->rvp.pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1608         ibp->rvp.pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1609         ibp->rvp.pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1610         ibp->rvp.pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1611
1612         RCU_INIT_POINTER(ibp->rvp.qp[0], NULL);
1613         RCU_INIT_POINTER(ibp->rvp.qp[1], NULL);
1614 }
1615
1616 static void hfi1_get_dev_fw_str(struct ib_device *ibdev, char *str)
1617 {
1618         struct rvt_dev_info *rdi = ib_to_rvt(ibdev);
1619         struct hfi1_ibdev *dev = dev_from_rdi(rdi);
1620         u32 ver = dd_from_dev(dev)->dc8051_ver;
1621
1622         snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u.%u", dc8051_ver_maj(ver),
1623                  dc8051_ver_min(ver), dc8051_ver_patch(ver));
1624 }
1625
1626 static const char * const driver_cntr_names[] = {
1627         /* must be element 0*/
1628         "DRIVER_KernIntr",
1629         "DRIVER_ErrorIntr",
1630         "DRIVER_Tx_Errs",
1631         "DRIVER_Rcv_Errs",
1632         "DRIVER_HW_Errs",
1633         "DRIVER_NoPIOBufs",
1634         "DRIVER_CtxtsOpen",
1635         "DRIVER_RcvLen_Errs",
1636         "DRIVER_EgrBufFull",
1637         "DRIVER_EgrHdrFull"
1638 };
1639
1640 static DEFINE_MUTEX(cntr_names_lock); /* protects the *_cntr_names bufers */
1641 static const char **dev_cntr_names;
1642 static const char **port_cntr_names;
1643 int num_driver_cntrs = ARRAY_SIZE(driver_cntr_names);
1644 static int num_dev_cntrs;
1645 static int num_port_cntrs;
1646 static int cntr_names_initialized;
1647
1648 /*
1649  * Convert a list of names separated by '\n' into an array of NULL terminated
1650  * strings. Optionally some entries can be reserved in the array to hold extra
1651  * external strings.
1652  */
1653 static int init_cntr_names(const char *names_in,
1654                            const size_t names_len,
1655                            int num_extra_names,
1656                            int *num_cntrs,
1657                            const char ***cntr_names)
1658 {
1659         char *names_out, *p, **q;
1660         int i, n;
1661
1662         n = 0;
1663         for (i = 0; i < names_len; i++)
1664                 if (names_in[i] == '\n')
1665                         n++;
1666
1667         names_out = kmalloc((n + num_extra_names) * sizeof(char *) + names_len,
1668                             GFP_KERNEL);
1669         if (!names_out) {
1670                 *num_cntrs = 0;
1671                 *cntr_names = NULL;
1672                 return -ENOMEM;
1673         }
1674
1675         p = names_out + (n + num_extra_names) * sizeof(char *);
1676         memcpy(p, names_in, names_len);
1677
1678         q = (char **)names_out;
1679         for (i = 0; i < n; i++) {
1680                 q[i] = p;
1681                 p = strchr(p, '\n');
1682                 *p++ = '\0';
1683         }
1684
1685         *num_cntrs = n;
1686         *cntr_names = (const char **)names_out;
1687         return 0;
1688 }
1689
1690 static struct rdma_hw_stats *alloc_hw_stats(struct ib_device *ibdev,
1691                                             u8 port_num)
1692 {
1693         int i, err;
1694
1695         mutex_lock(&cntr_names_lock);
1696         if (!cntr_names_initialized) {
1697                 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1698
1699                 err = init_cntr_names(dd->cntrnames,
1700                                       dd->cntrnameslen,
1701                                       num_driver_cntrs,
1702                                       &num_dev_cntrs,
1703                                       &dev_cntr_names);
1704                 if (err) {
1705                         mutex_unlock(&cntr_names_lock);
1706                         return NULL;
1707                 }
1708
1709                 for (i = 0; i < num_driver_cntrs; i++)
1710                         dev_cntr_names[num_dev_cntrs + i] =
1711                                 driver_cntr_names[i];
1712
1713                 err = init_cntr_names(dd->portcntrnames,
1714                                       dd->portcntrnameslen,
1715                                       0,
1716                                       &num_port_cntrs,
1717                                       &port_cntr_names);
1718                 if (err) {
1719                         kfree(dev_cntr_names);
1720                         dev_cntr_names = NULL;
1721                         mutex_unlock(&cntr_names_lock);
1722                         return NULL;
1723                 }
1724                 cntr_names_initialized = 1;
1725         }
1726         mutex_unlock(&cntr_names_lock);
1727
1728         if (!port_num)
1729                 return rdma_alloc_hw_stats_struct(
1730                                 dev_cntr_names,
1731                                 num_dev_cntrs + num_driver_cntrs,
1732                                 RDMA_HW_STATS_DEFAULT_LIFESPAN);
1733         else
1734                 return rdma_alloc_hw_stats_struct(
1735                                 port_cntr_names,
1736                                 num_port_cntrs,
1737                                 RDMA_HW_STATS_DEFAULT_LIFESPAN);
1738 }
1739
1740 static u64 hfi1_sps_ints(void)
1741 {
1742         unsigned long flags;
1743         struct hfi1_devdata *dd;
1744         u64 sps_ints = 0;
1745
1746         spin_lock_irqsave(&hfi1_devs_lock, flags);
1747         list_for_each_entry(dd, &hfi1_dev_list, list) {
1748                 sps_ints += get_all_cpu_total(dd->int_counter);
1749         }
1750         spin_unlock_irqrestore(&hfi1_devs_lock, flags);
1751         return sps_ints;
1752 }
1753
1754 static int get_hw_stats(struct ib_device *ibdev, struct rdma_hw_stats *stats,
1755                         u8 port, int index)
1756 {
1757         u64 *values;
1758         int count;
1759
1760         if (!port) {
1761                 u64 *stats = (u64 *)&hfi1_stats;
1762                 int i;
1763
1764                 hfi1_read_cntrs(dd_from_ibdev(ibdev), NULL, &values);
1765                 values[num_dev_cntrs] = hfi1_sps_ints();
1766                 for (i = 1; i < num_driver_cntrs; i++)
1767                         values[num_dev_cntrs + i] = stats[i];
1768                 count = num_dev_cntrs + num_driver_cntrs;
1769         } else {
1770                 struct hfi1_ibport *ibp = to_iport(ibdev, port);
1771
1772                 hfi1_read_portcntrs(ppd_from_ibp(ibp), NULL, &values);
1773                 count = num_port_cntrs;
1774         }
1775
1776         memcpy(stats->value, values, count * sizeof(u64));
1777         return count;
1778 }
1779
1780 static const struct ib_device_ops hfi1_dev_ops = {
1781         .alloc_hw_stats = alloc_hw_stats,
1782         .alloc_rdma_netdev = hfi1_vnic_alloc_rn,
1783         .get_dev_fw_str = hfi1_get_dev_fw_str,
1784         .get_hw_stats = get_hw_stats,
1785         .init_port = hfi1_create_port_files,
1786         .modify_device = modify_device,
1787         /* keep process mad in the driver */
1788         .process_mad = hfi1_process_mad,
1789 };
1790
1791 /**
1792  * hfi1_register_ib_device - register our device with the infiniband core
1793  * @dd: the device data structure
1794  * Return 0 if successful, errno if unsuccessful.
1795  */
1796 int hfi1_register_ib_device(struct hfi1_devdata *dd)
1797 {
1798         struct hfi1_ibdev *dev = &dd->verbs_dev;
1799         struct ib_device *ibdev = &dev->rdi.ibdev;
1800         struct hfi1_pportdata *ppd = dd->pport;
1801         struct hfi1_ibport *ibp = &ppd->ibport_data;
1802         unsigned i;
1803         int ret;
1804
1805         for (i = 0; i < dd->num_pports; i++)
1806                 init_ibport(ppd + i);
1807
1808         /* Only need to initialize non-zero fields. */
1809
1810         timer_setup(&dev->mem_timer, mem_timer, 0);
1811
1812         seqlock_init(&dev->iowait_lock);
1813         seqlock_init(&dev->txwait_lock);
1814         INIT_LIST_HEAD(&dev->txwait);
1815         INIT_LIST_HEAD(&dev->memwait);
1816
1817         ret = verbs_txreq_init(dev);
1818         if (ret)
1819                 goto err_verbs_txreq;
1820
1821         /* Use first-port GUID as node guid */
1822         ibdev->node_guid = get_sguid(ibp, HFI1_PORT_GUID_INDEX);
1823
1824         /*
1825          * The system image GUID is supposed to be the same for all
1826          * HFIs in a single system but since there can be other
1827          * device types in the system, we can't be sure this is unique.
1828          */
1829         if (!ib_hfi1_sys_image_guid)
1830                 ib_hfi1_sys_image_guid = ibdev->node_guid;
1831         ibdev->owner = THIS_MODULE;
1832         ibdev->phys_port_cnt = dd->num_pports;
1833         ibdev->dev.parent = &dd->pcidev->dev;
1834
1835         ib_set_device_ops(ibdev, &hfi1_dev_ops);
1836
1837         strlcpy(ibdev->node_desc, init_utsname()->nodename,
1838                 sizeof(ibdev->node_desc));
1839
1840         /*
1841          * Fill in rvt info object.
1842          */
1843         dd->verbs_dev.rdi.driver_f.get_pci_dev = get_pci_dev;
1844         dd->verbs_dev.rdi.driver_f.check_ah = hfi1_check_ah;
1845         dd->verbs_dev.rdi.driver_f.notify_new_ah = hfi1_notify_new_ah;
1846         dd->verbs_dev.rdi.driver_f.get_guid_be = hfi1_get_guid_be;
1847         dd->verbs_dev.rdi.driver_f.query_port_state = query_port;
1848         dd->verbs_dev.rdi.driver_f.shut_down_port = shut_down_port;
1849         dd->verbs_dev.rdi.driver_f.cap_mask_chg = hfi1_cap_mask_chg;
1850         /*
1851          * Fill in rvt info device attributes.
1852          */
1853         hfi1_fill_device_attr(dd);
1854
1855         /* queue pair */
1856         dd->verbs_dev.rdi.dparms.qp_table_size = hfi1_qp_table_size;
1857         dd->verbs_dev.rdi.dparms.qpn_start = 0;
1858         dd->verbs_dev.rdi.dparms.qpn_inc = 1;
1859         dd->verbs_dev.rdi.dparms.qos_shift = dd->qos_shift;
1860         dd->verbs_dev.rdi.dparms.qpn_res_start = kdeth_qp << 16;
1861         dd->verbs_dev.rdi.dparms.qpn_res_end =
1862         dd->verbs_dev.rdi.dparms.qpn_res_start + 65535;
1863         dd->verbs_dev.rdi.dparms.max_rdma_atomic = HFI1_MAX_RDMA_ATOMIC;
1864         dd->verbs_dev.rdi.dparms.psn_mask = PSN_MASK;
1865         dd->verbs_dev.rdi.dparms.psn_shift = PSN_SHIFT;
1866         dd->verbs_dev.rdi.dparms.psn_modify_mask = PSN_MODIFY_MASK;
1867         dd->verbs_dev.rdi.dparms.core_cap_flags = RDMA_CORE_PORT_INTEL_OPA |
1868                                                 RDMA_CORE_CAP_OPA_AH;
1869         dd->verbs_dev.rdi.dparms.max_mad_size = OPA_MGMT_MAD_SIZE;
1870
1871         dd->verbs_dev.rdi.driver_f.qp_priv_alloc = qp_priv_alloc;
1872         dd->verbs_dev.rdi.driver_f.qp_priv_init = hfi1_qp_priv_init;
1873         dd->verbs_dev.rdi.driver_f.qp_priv_free = qp_priv_free;
1874         dd->verbs_dev.rdi.driver_f.free_all_qps = free_all_qps;
1875         dd->verbs_dev.rdi.driver_f.notify_qp_reset = notify_qp_reset;
1876         dd->verbs_dev.rdi.driver_f.do_send = hfi1_do_send_from_rvt;
1877         dd->verbs_dev.rdi.driver_f.schedule_send = hfi1_schedule_send;
1878         dd->verbs_dev.rdi.driver_f.schedule_send_no_lock = _hfi1_schedule_send;
1879         dd->verbs_dev.rdi.driver_f.get_pmtu_from_attr = get_pmtu_from_attr;
1880         dd->verbs_dev.rdi.driver_f.notify_error_qp = notify_error_qp;
1881         dd->verbs_dev.rdi.driver_f.flush_qp_waiters = flush_qp_waiters;
1882         dd->verbs_dev.rdi.driver_f.stop_send_queue = stop_send_queue;
1883         dd->verbs_dev.rdi.driver_f.quiesce_qp = quiesce_qp;
1884         dd->verbs_dev.rdi.driver_f.notify_error_qp = notify_error_qp;
1885         dd->verbs_dev.rdi.driver_f.mtu_from_qp = mtu_from_qp;
1886         dd->verbs_dev.rdi.driver_f.mtu_to_path_mtu = mtu_to_path_mtu;
1887         dd->verbs_dev.rdi.driver_f.check_modify_qp = hfi1_check_modify_qp;
1888         dd->verbs_dev.rdi.driver_f.modify_qp = hfi1_modify_qp;
1889         dd->verbs_dev.rdi.driver_f.notify_restart_rc = hfi1_restart_rc;
1890         dd->verbs_dev.rdi.driver_f.setup_wqe = hfi1_setup_wqe;
1891         dd->verbs_dev.rdi.driver_f.comp_vect_cpu_lookup =
1892                                                 hfi1_comp_vect_mappings_lookup;
1893
1894         /* completeion queue */
1895         dd->verbs_dev.rdi.ibdev.num_comp_vectors = dd->comp_vect_possible_cpus;
1896         dd->verbs_dev.rdi.dparms.node = dd->node;
1897
1898         /* misc settings */
1899         dd->verbs_dev.rdi.flags = 0; /* Let rdmavt handle it all */
1900         dd->verbs_dev.rdi.dparms.lkey_table_size = hfi1_lkey_table_size;
1901         dd->verbs_dev.rdi.dparms.nports = dd->num_pports;
1902         dd->verbs_dev.rdi.dparms.npkeys = hfi1_get_npkeys(dd);
1903         dd->verbs_dev.rdi.dparms.sge_copy_mode = sge_copy_mode;
1904         dd->verbs_dev.rdi.dparms.wss_threshold = wss_threshold;
1905         dd->verbs_dev.rdi.dparms.wss_clean_period = wss_clean_period;
1906         dd->verbs_dev.rdi.dparms.reserved_operations = 1;
1907         dd->verbs_dev.rdi.dparms.extra_rdma_atomic = HFI1_TID_RDMA_WRITE_CNT;
1908
1909         /* post send table */
1910         dd->verbs_dev.rdi.post_parms = hfi1_post_parms;
1911
1912         /* opcode translation table */
1913         dd->verbs_dev.rdi.wc_opcode = ib_hfi1_wc_opcode;
1914
1915         ppd = dd->pport;
1916         for (i = 0; i < dd->num_pports; i++, ppd++)
1917                 rvt_init_port(&dd->verbs_dev.rdi,
1918                               &ppd->ibport_data.rvp,
1919                               i,
1920                               ppd->pkeys);
1921
1922         rdma_set_device_sysfs_group(&dd->verbs_dev.rdi.ibdev,
1923                                     &ib_hfi1_attr_group);
1924
1925         ret = rvt_register_device(&dd->verbs_dev.rdi, RDMA_DRIVER_HFI1);
1926         if (ret)
1927                 goto err_verbs_txreq;
1928
1929         ret = hfi1_verbs_register_sysfs(dd);
1930         if (ret)
1931                 goto err_class;
1932
1933         return ret;
1934
1935 err_class:
1936         rvt_unregister_device(&dd->verbs_dev.rdi);
1937 err_verbs_txreq:
1938         verbs_txreq_exit(dev);
1939         dd_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1940         return ret;
1941 }
1942
1943 void hfi1_unregister_ib_device(struct hfi1_devdata *dd)
1944 {
1945         struct hfi1_ibdev *dev = &dd->verbs_dev;
1946
1947         hfi1_verbs_unregister_sysfs(dd);
1948
1949         rvt_unregister_device(&dd->verbs_dev.rdi);
1950
1951         if (!list_empty(&dev->txwait))
1952                 dd_dev_err(dd, "txwait list not empty!\n");
1953         if (!list_empty(&dev->memwait))
1954                 dd_dev_err(dd, "memwait list not empty!\n");
1955
1956         del_timer_sync(&dev->mem_timer);
1957         verbs_txreq_exit(dev);
1958
1959         mutex_lock(&cntr_names_lock);
1960         kfree(dev_cntr_names);
1961         kfree(port_cntr_names);
1962         dev_cntr_names = NULL;
1963         port_cntr_names = NULL;
1964         cntr_names_initialized = 0;
1965         mutex_unlock(&cntr_names_lock);
1966 }
1967
1968 void hfi1_cnp_rcv(struct hfi1_packet *packet)
1969 {
1970         struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
1971         struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1972         struct ib_header *hdr = packet->hdr;
1973         struct rvt_qp *qp = packet->qp;
1974         u32 lqpn, rqpn = 0;
1975         u16 rlid = 0;
1976         u8 sl, sc5, svc_type;
1977
1978         switch (packet->qp->ibqp.qp_type) {
1979         case IB_QPT_UC:
1980                 rlid = rdma_ah_get_dlid(&qp->remote_ah_attr);
1981                 rqpn = qp->remote_qpn;
1982                 svc_type = IB_CC_SVCTYPE_UC;
1983                 break;
1984         case IB_QPT_RC:
1985                 rlid = rdma_ah_get_dlid(&qp->remote_ah_attr);
1986                 rqpn = qp->remote_qpn;
1987                 svc_type = IB_CC_SVCTYPE_RC;
1988                 break;
1989         case IB_QPT_SMI:
1990         case IB_QPT_GSI:
1991         case IB_QPT_UD:
1992                 svc_type = IB_CC_SVCTYPE_UD;
1993                 break;
1994         default:
1995                 ibp->rvp.n_pkt_drops++;
1996                 return;
1997         }
1998
1999         sc5 = hfi1_9B_get_sc5(hdr, packet->rhf);
2000         sl = ibp->sc_to_sl[sc5];
2001         lqpn = qp->ibqp.qp_num;
2002
2003         process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
2004 }