drivers/infiniband/hw/hfi1/init.c

   1 /*
   2  * Copyright(c) 2015 - 2018 Intel Corporation.
   3  *
   4  * This file is provided under a dual BSD/GPLv2 license.  When using or
   5  * redistributing this file, you may do so under either license.
   6  *
   7  * GPL LICENSE SUMMARY
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * BSD LICENSE
  19  *
  20  * Redistribution and use in source and binary forms, with or without
  21  * modification, are permitted provided that the following conditions
  22  * are met:
  23  *
  24  *  - Redistributions of source code must retain the above copyright
  25  *    notice, this list of conditions and the following disclaimer.
  26  *  - Redistributions in binary form must reproduce the above copyright
  27  *    notice, this list of conditions and the following disclaimer in
  28  *    the documentation and/or other materials provided with the
  29  *    distribution.
  30  *  - Neither the name of Intel Corporation nor the names of its
  31  *    contributors may be used to endorse or promote products derived
  32  *    from this software without specific prior written permission.
  33  *
  34  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45  *
  46  */
  47
  48 #include <linux/pci.h>
  49 #include <linux/netdevice.h>
  50 #include <linux/vmalloc.h>
  51 #include <linux/delay.h>
  52 #include <linux/idr.h>
  53 #include <linux/module.h>
  54 #include <linux/printk.h>
  55 #include <linux/hrtimer.h>
  56 #include <linux/bitmap.h>
  57 #include <rdma/rdma_vt.h>
  58
  59 #include "hfi.h"
  60 #include "device.h"
  61 #include "common.h"
  62 #include "trace.h"
  63 #include "mad.h"
  64 #include "sdma.h"
  65 #include "debugfs.h"
  66 #include "verbs.h"
  67 #include "aspm.h"
  68 #include "affinity.h"
  69 #include "vnic.h"
  70 #include "exp_rcv.h"
  71
  72 #undef pr_fmt
  73 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  74
  75 #define HFI1_MAX_ACTIVE_WORKQUEUE_ENTRIES 5
  76 /*
  77  * min buffers we want to have per context, after driver
  78  */
  79 #define HFI1_MIN_USER_CTXT_BUFCNT 7
  80
  81 #define HFI1_MIN_HDRQ_EGRBUF_CNT 2
  82 #define HFI1_MAX_HDRQ_EGRBUF_CNT 16352
  83 #define HFI1_MIN_EAGER_BUFFER_SIZE (4 * 1024) /* 4KB */
  84 #define HFI1_MAX_EAGER_BUFFER_SIZE (256 * 1024) /* 256KB */
  85
  86 /*
  87  * Number of user receive contexts we are configured to use (to allow for more
  88  * pio buffers per ctxt, etc.)  Zero means use one user context per CPU.
  89  */
  90 int num_user_contexts = -1;
  91 module_param_named(num_user_contexts, num_user_contexts, int, 0444);
  92 MODULE_PARM_DESC(
  93         num_user_contexts, "Set max number of user contexts to use (default: -1 will use the real (non-HT) CPU count)");
  94
  95 uint krcvqs[RXE_NUM_DATA_VL];
  96 int krcvqsset;
  97 module_param_array(krcvqs, uint, &krcvqsset, S_IRUGO);
  98 MODULE_PARM_DESC(krcvqs, "Array of the number of non-control kernel receive queues by VL");
  99
 100 /* computed based on above array */
 101 unsigned long n_krcvqs;
 102
 103 static unsigned hfi1_rcvarr_split = 25;
 104 module_param_named(rcvarr_split, hfi1_rcvarr_split, uint, S_IRUGO);
 105 MODULE_PARM_DESC(rcvarr_split, "Percent of context's RcvArray entries used for Eager buffers");
 106
 107 static uint eager_buffer_size = (8 << 20); /* 8MB */
 108 module_param(eager_buffer_size, uint, S_IRUGO);
 109 MODULE_PARM_DESC(eager_buffer_size, "Size of the eager buffers, default: 8MB");
 110
 111 static uint rcvhdrcnt = 2048; /* 2x the max eager buffer count */
 112 module_param_named(rcvhdrcnt, rcvhdrcnt, uint, S_IRUGO);
 113 MODULE_PARM_DESC(rcvhdrcnt, "Receive header queue count (default 2048)");
 114
 115 static uint hfi1_hdrq_entsize = 32;
 116 module_param_named(hdrq_entsize, hfi1_hdrq_entsize, uint, S_IRUGO);
 117 MODULE_PARM_DESC(hdrq_entsize, "Size of header queue entries: 2 - 8B, 16 - 64B (default), 32 - 128B");
 118
 119 unsigned int user_credit_return_threshold = 33; /* default is 33% */
 120 module_param(user_credit_return_threshold, uint, S_IRUGO);
 121 MODULE_PARM_DESC(user_credit_return_threshold, "Credit return threshold for user send contexts, return when unreturned credits passes this many blocks (in percent of allocated blocks, 0 is off)");
 122
 123 static inline u64 encode_rcv_header_entry_size(u16 size);
 124
 125 static struct idr hfi1_unit_table;
 126
 127 static int hfi1_create_kctxt(struct hfi1_devdata *dd,
 128                              struct hfi1_pportdata *ppd)
 129 {
 130         struct hfi1_ctxtdata *rcd;
 131         int ret;
 132
 133         /* Control context has to be always 0 */
 134         BUILD_BUG_ON(HFI1_CTRL_CTXT != 0);
 135
 136         ret = hfi1_create_ctxtdata(ppd, dd->node, &rcd);
 137         if (ret < 0) {
 138                 dd_dev_err(dd, "Kernel receive context allocation failed\n");
 139                 return ret;
 140         }
 141
 142         /*
 143          * Set up the kernel context flags here and now because they use
 144          * default values for all receive side memories.  User contexts will
 145          * be handled as they are created.
 146          */
 147         rcd->flags = HFI1_CAP_KGET(MULTI_PKT_EGR) |
 148                 HFI1_CAP_KGET(NODROP_RHQ_FULL) |
 149                 HFI1_CAP_KGET(NODROP_EGR_FULL) |
 150                 HFI1_CAP_KGET(DMA_RTAIL);
 151
 152         /* Control context must use DMA_RTAIL */
 153         if (rcd->ctxt == HFI1_CTRL_CTXT)
 154                 rcd->flags |= HFI1_CAP_DMA_RTAIL;
 155         rcd->seq_cnt = 1;
 156
 157         rcd->sc = sc_alloc(dd, SC_ACK, rcd->rcvhdrqentsize, dd->node);
 158         if (!rcd->sc) {
 159                 dd_dev_err(dd, "Kernel send context allocation failed\n");
 160                 return -ENOMEM;
 161         }
 162         hfi1_init_ctxt(rcd->sc);
 163
 164         return 0;
 165 }
 166
 167 /*
 168  * Create the receive context array and one or more kernel contexts
 169  */
 170 int hfi1_create_kctxts(struct hfi1_devdata *dd)
 171 {
 172         u16 i;
 173         int ret;
 174
 175         dd->rcd = kcalloc_node(dd->num_rcv_contexts, sizeof(*dd->rcd),
 176                                GFP_KERNEL, dd->node);
 177         if (!dd->rcd)
 178                 return -ENOMEM;
 179
 180         for (i = 0; i < dd->first_dyn_alloc_ctxt; ++i) {
 181                 ret = hfi1_create_kctxt(dd, dd->pport);
 182                 if (ret)
 183                         goto bail;
 184         }
 185
 186         return 0;
 187 bail:
 188         for (i = 0; dd->rcd && i < dd->first_dyn_alloc_ctxt; ++i)
 189                 hfi1_free_ctxt(dd->rcd[i]);
 190
 191         /* All the contexts should be freed, free the array */
 192         kfree(dd->rcd);
 193         dd->rcd = NULL;
 194         return ret;
 195 }
 196
 197 /*
 198  * Helper routines for the receive context reference count (rcd and uctxt).
 199  */
 200 static void hfi1_rcd_init(struct hfi1_ctxtdata *rcd)
 201 {
 202         kref_init(&rcd->kref);
 203 }
 204
 205 /**
 206  * hfi1_rcd_free - When reference is zero clean up.
 207  * @kref: pointer to an initialized rcd data structure
 208  *
 209  */
 210 static void hfi1_rcd_free(struct kref *kref)
 211 {
 212         unsigned long flags;
 213         struct hfi1_ctxtdata *rcd =
 214                 container_of(kref, struct hfi1_ctxtdata, kref);
 215
 216         hfi1_free_ctxtdata(rcd->dd, rcd);
 217
 218         spin_lock_irqsave(&rcd->dd->uctxt_lock, flags);
 219         rcd->dd->rcd[rcd->ctxt] = NULL;
 220         spin_unlock_irqrestore(&rcd->dd->uctxt_lock, flags);
 221
 222         kfree(rcd);
 223 }
 224
 225 /**
 226  * hfi1_rcd_put - decrement reference for rcd
 227  * @rcd: pointer to an initialized rcd data structure
 228  *
 229  * Use this to put a reference after the init.
 230  */
 231 int hfi1_rcd_put(struct hfi1_ctxtdata *rcd)
 232 {
 233         if (rcd)
 234                 return kref_put(&rcd->kref, hfi1_rcd_free);
 235
 236         return 0;
 237 }
 238
 239 /**
 240  * hfi1_rcd_get - increment reference for rcd
 241  * @rcd: pointer to an initialized rcd data structure
 242  *
 243  * Use this to get a reference after the init.
 244  */
 245 void hfi1_rcd_get(struct hfi1_ctxtdata *rcd)
 246 {
 247         kref_get(&rcd->kref);
 248 }
 249
 250 /**
 251  * allocate_rcd_index - allocate an rcd index from the rcd array
 252  * @dd: pointer to a valid devdata structure
 253  * @rcd: rcd data structure to assign
 254  * @index: pointer to index that is allocated
 255  *
 256  * Find an empty index in the rcd array, and assign the given rcd to it.
 257  * If the array is full, we are EBUSY.
 258  *
 259  */
 260 static int allocate_rcd_index(struct hfi1_devdata *dd,
 261                               struct hfi1_ctxtdata *rcd, u16 *index)
 262 {
 263         unsigned long flags;
 264         u16 ctxt;
 265
 266         spin_lock_irqsave(&dd->uctxt_lock, flags);
 267         for (ctxt = 0; ctxt < dd->num_rcv_contexts; ctxt++)
 268                 if (!dd->rcd[ctxt])
 269                         break;
 270
 271         if (ctxt < dd->num_rcv_contexts) {
 272                 rcd->ctxt = ctxt;
 273                 dd->rcd[ctxt] = rcd;
 274                 hfi1_rcd_init(rcd);
 275         }
 276         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
 277
 278         if (ctxt >= dd->num_rcv_contexts)
 279                 return -EBUSY;
 280
 281         *index = ctxt;
 282
 283         return 0;
 284 }
 285
 286 /**
 287  * hfi1_rcd_get_by_index_safe - validate the ctxt index before accessing the
 288  * array
 289  * @dd: pointer to a valid devdata structure
 290  * @ctxt: the index of an possilbe rcd
 291  *
 292  * This is a wrapper for hfi1_rcd_get_by_index() to validate that the given
 293  * ctxt index is valid.
 294  *
 295  * The caller is responsible for making the _put().
 296  *
 297  */
 298 struct hfi1_ctxtdata *hfi1_rcd_get_by_index_safe(struct hfi1_devdata *dd,
 299                                                  u16 ctxt)
 300 {
 301         if (ctxt < dd->num_rcv_contexts)
 302                 return hfi1_rcd_get_by_index(dd, ctxt);
 303
 304         return NULL;
 305 }
 306
 307 /**
 308  * hfi1_rcd_get_by_index
 309  * @dd: pointer to a valid devdata structure
 310  * @ctxt: the index of an possilbe rcd
 311  *
 312  * We need to protect access to the rcd array.  If access is needed to
 313  * one or more index, get the protecting spinlock and then increment the
 314  * kref.
 315  *
 316  * The caller is responsible for making the _put().
 317  *
 318  */
 319 struct hfi1_ctxtdata *hfi1_rcd_get_by_index(struct hfi1_devdata *dd, u16 ctxt)
 320 {
 321         unsigned long flags;
 322         struct hfi1_ctxtdata *rcd = NULL;
 323
 324         spin_lock_irqsave(&dd->uctxt_lock, flags);
 325         if (dd->rcd[ctxt]) {
 326                 rcd = dd->rcd[ctxt];
 327                 hfi1_rcd_get(rcd);
 328         }
 329         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
 330
 331         return rcd;
 332 }
 333
 334 /*
 335  * Common code for user and kernel context create and setup.
 336  * NOTE: the initial kref is done here (hf1_rcd_init()).
 337  */
 338 int hfi1_create_ctxtdata(struct hfi1_pportdata *ppd, int numa,
 339                          struct hfi1_ctxtdata **context)
 340 {
 341         struct hfi1_devdata *dd = ppd->dd;
 342         struct hfi1_ctxtdata *rcd;
 343         unsigned kctxt_ngroups = 0;
 344         u32 base;
 345
 346         if (dd->rcv_entries.nctxt_extra >
 347             dd->num_rcv_contexts - dd->first_dyn_alloc_ctxt)
 348                 kctxt_ngroups = (dd->rcv_entries.nctxt_extra -
 349                          (dd->num_rcv_contexts - dd->first_dyn_alloc_ctxt));
 350         rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, numa);
 351         if (rcd) {
 352                 u32 rcvtids, max_entries;
 353                 u16 ctxt;
 354                 int ret;
 355
 356                 ret = allocate_rcd_index(dd, rcd, &ctxt);
 357                 if (ret) {
 358                         *context = NULL;
 359                         kfree(rcd);
 360                         return ret;
 361                 }
 362
 363                 INIT_LIST_HEAD(&rcd->qp_wait_list);
 364                 hfi1_exp_tid_group_init(rcd);
 365                 rcd->ppd = ppd;
 366                 rcd->dd = dd;
 367                 __set_bit(0, rcd->in_use_ctxts);
 368                 rcd->numa_id = numa;
 369                 rcd->rcv_array_groups = dd->rcv_entries.ngroups;
 370
 371                 mutex_init(&rcd->exp_lock);
 372
 373                 hfi1_cdbg(PROC, "setting up context %u\n", rcd->ctxt);
 374
 375                 /*
 376                  * Calculate the context's RcvArray entry starting point.
 377                  * We do this here because we have to take into account all
 378                  * the RcvArray entries that previous context would have
 379                  * taken and we have to account for any extra groups assigned
 380                  * to the static (kernel) or dynamic (vnic/user) contexts.
 381                  */
 382                 if (ctxt < dd->first_dyn_alloc_ctxt) {
 383                         if (ctxt < kctxt_ngroups) {
 384                                 base = ctxt * (dd->rcv_entries.ngroups + 1);
 385                                 rcd->rcv_array_groups++;
 386                         } else {
 387                                 base = kctxt_ngroups +
 388                                         (ctxt * dd->rcv_entries.ngroups);
 389                         }
 390                 } else {
 391                         u16 ct = ctxt - dd->first_dyn_alloc_ctxt;
 392
 393                         base = ((dd->n_krcv_queues * dd->rcv_entries.ngroups) +
 394                                 kctxt_ngroups);
 395                         if (ct < dd->rcv_entries.nctxt_extra) {
 396                                 base += ct * (dd->rcv_entries.ngroups + 1);
 397                                 rcd->rcv_array_groups++;
 398                         } else {
 399                                 base += dd->rcv_entries.nctxt_extra +
 400                                         (ct * dd->rcv_entries.ngroups);
 401                         }
 402                 }
 403                 rcd->eager_base = base * dd->rcv_entries.group_size;
 404
 405                 rcd->rcvhdrq_cnt = rcvhdrcnt;
 406                 rcd->rcvhdrqentsize = hfi1_hdrq_entsize;
 407                 /*
 408                  * Simple Eager buffer allocation: we have already pre-allocated
 409                  * the number of RcvArray entry groups. Each ctxtdata structure
 410                  * holds the number of groups for that context.
 411                  *
 412                  * To follow CSR requirements and maintain cacheline alignment,
 413                  * make sure all sizes and bases are multiples of group_size.
 414                  *
 415                  * The expected entry count is what is left after assigning
 416                  * eager.
 417                  */
 418                 max_entries = rcd->rcv_array_groups *
 419                         dd->rcv_entries.group_size;
 420                 rcvtids = ((max_entries * hfi1_rcvarr_split) / 100);
 421                 rcd->egrbufs.count = round_down(rcvtids,
 422                                                 dd->rcv_entries.group_size);
 423                 if (rcd->egrbufs.count > MAX_EAGER_ENTRIES) {
 424                         dd_dev_err(dd, "ctxt%u: requested too many RcvArray entries.\n",
 425                                    rcd->ctxt);
 426                         rcd->egrbufs.count = MAX_EAGER_ENTRIES;
 427                 }
 428                 hfi1_cdbg(PROC,
 429                           "ctxt%u: max Eager buffer RcvArray entries: %u\n",
 430                           rcd->ctxt, rcd->egrbufs.count);
 431
 432                 /*
 433                  * Allocate array that will hold the eager buffer accounting
 434                  * data.
 435                  * This will allocate the maximum possible buffer count based
 436                  * on the value of the RcvArray split parameter.
 437                  * The resulting value will be rounded down to the closest
 438                  * multiple of dd->rcv_entries.group_size.
 439                  */
 440                 rcd->egrbufs.buffers =
 441                         kcalloc_node(rcd->egrbufs.count,
 442                                      sizeof(*rcd->egrbufs.buffers),
 443                                      GFP_KERNEL, numa);
 444                 if (!rcd->egrbufs.buffers)
 445                         goto bail;
 446                 rcd->egrbufs.rcvtids =
 447                         kcalloc_node(rcd->egrbufs.count,
 448                                      sizeof(*rcd->egrbufs.rcvtids),
 449                                      GFP_KERNEL, numa);
 450                 if (!rcd->egrbufs.rcvtids)
 451                         goto bail;
 452                 rcd->egrbufs.size = eager_buffer_size;
 453                 /*
 454                  * The size of the buffers programmed into the RcvArray
 455                  * entries needs to be big enough to handle the highest
 456                  * MTU supported.
 457                  */
 458                 if (rcd->egrbufs.size < hfi1_max_mtu) {
 459                         rcd->egrbufs.size = __roundup_pow_of_two(hfi1_max_mtu);
 460                         hfi1_cdbg(PROC,
 461                                   "ctxt%u: eager bufs size too small. Adjusting to %zu\n",
 462                                     rcd->ctxt, rcd->egrbufs.size);
 463                 }
 464                 rcd->egrbufs.rcvtid_size = HFI1_MAX_EAGER_BUFFER_SIZE;
 465
 466                 /* Applicable only for statically created kernel contexts */
 467                 if (ctxt < dd->first_dyn_alloc_ctxt) {
 468                         rcd->opstats = kzalloc_node(sizeof(*rcd->opstats),
 469                                                     GFP_KERNEL, numa);
 470                         if (!rcd->opstats)
 471                                 goto bail;
 472                 }
 473
 474                 *context = rcd;
 475                 return 0;
 476         }
 477
 478 bail:
 479         *context = NULL;
 480         hfi1_free_ctxt(rcd);
 481         return -ENOMEM;
 482 }
 483
 484 /**
 485  * hfi1_free_ctxt
 486  * @rcd: pointer to an initialized rcd data structure
 487  *
 488  * This wrapper is the free function that matches hfi1_create_ctxtdata().
 489  * When a context is done being used (kernel or user), this function is called
 490  * for the "final" put to match the kref init from hf1i_create_ctxtdata().
 491  * Other users of the context do a get/put sequence to make sure that the
 492  * structure isn't removed while in use.
 493  */
 494 void hfi1_free_ctxt(struct hfi1_ctxtdata *rcd)
 495 {
 496         hfi1_rcd_put(rcd);
 497 }
 498
 499 /*
 500  * Convert a receive header entry size that to the encoding used in the CSR.
 501  *
 502  * Return a zero if the given size is invalid.
 503  */
 504 static inline u64 encode_rcv_header_entry_size(u16 size)
 505 {
 506         /* there are only 3 valid receive header entry sizes */
 507         if (size == 2)
 508                 return 1;
 509         if (size == 16)
 510                 return 2;
 511         else if (size == 32)
 512                 return 4;
 513         return 0; /* invalid */
 514 }
 515
 516 /*
 517  * Select the largest ccti value over all SLs to determine the intra-
 518  * packet gap for the link.
 519  *
 520  * called with cca_timer_lock held (to protect access to cca_timer
 521  * array), and rcu_read_lock() (to protect access to cc_state).
 522  */
 523 void set_link_ipg(struct hfi1_pportdata *ppd)
 524 {
 525         struct hfi1_devdata *dd = ppd->dd;
 526         struct cc_state *cc_state;
 527         int i;
 528         u16 cce, ccti_limit, max_ccti = 0;
 529         u16 shift, mult;
 530         u64 src;
 531         u32 current_egress_rate; /* Mbits /sec */
 532         u32 max_pkt_time;
 533         /*
 534          * max_pkt_time is the maximum packet egress time in units
 535          * of the fabric clock period 1/(805 MHz).
 536          */
 537
 538         cc_state = get_cc_state(ppd);
 539
 540         if (!cc_state)
 541                 /*
 542                  * This should _never_ happen - rcu_read_lock() is held,
 543                  * and set_link_ipg() should not be called if cc_state
 544                  * is NULL.
 545                  */
 546                 return;
 547
 548         for (i = 0; i < OPA_MAX_SLS; i++) {
 549                 u16 ccti = ppd->cca_timer[i].ccti;
 550
 551                 if (ccti > max_ccti)
 552                         max_ccti = ccti;
 553         }
 554
 555         ccti_limit = cc_state->cct.ccti_limit;
 556         if (max_ccti > ccti_limit)
 557                 max_ccti = ccti_limit;
 558
 559         cce = cc_state->cct.entries[max_ccti].entry;
 560         shift = (cce & 0xc000) >> 14;
 561         mult = (cce & 0x3fff);
 562
 563         current_egress_rate = active_egress_rate(ppd);
 564
 565         max_pkt_time = egress_cycles(ppd->ibmaxlen, current_egress_rate);
 566
 567         src = (max_pkt_time >> shift) * mult;
 568
 569         src &= SEND_STATIC_RATE_CONTROL_CSR_SRC_RELOAD_SMASK;
 570         src <<= SEND_STATIC_RATE_CONTROL_CSR_SRC_RELOAD_SHIFT;
 571
 572         write_csr(dd, SEND_STATIC_RATE_CONTROL, src);
 573 }
 574
 575 static enum hrtimer_restart cca_timer_fn(struct hrtimer *t)
 576 {
 577         struct cca_timer *cca_timer;
 578         struct hfi1_pportdata *ppd;
 579         int sl;
 580         u16 ccti_timer, ccti_min;
 581         struct cc_state *cc_state;
 582         unsigned long flags;
 583         enum hrtimer_restart ret = HRTIMER_NORESTART;
 584
 585         cca_timer = container_of(t, struct cca_timer, hrtimer);
 586         ppd = cca_timer->ppd;
 587         sl = cca_timer->sl;
 588
 589         rcu_read_lock();
 590
 591         cc_state = get_cc_state(ppd);
 592
 593         if (!cc_state) {
 594                 rcu_read_unlock();
 595                 return HRTIMER_NORESTART;
 596         }
 597
 598         /*
 599          * 1) decrement ccti for SL
 600          * 2) calculate IPG for link (set_link_ipg())
 601          * 3) restart timer, unless ccti is at min value
 602          */
 603
 604         ccti_min = cc_state->cong_setting.entries[sl].ccti_min;
 605         ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
 606
 607         spin_lock_irqsave(&ppd->cca_timer_lock, flags);
 608
 609         if (cca_timer->ccti > ccti_min) {
 610                 cca_timer->ccti--;
 611                 set_link_ipg(ppd);
 612         }
 613
 614         if (cca_timer->ccti > ccti_min) {
 615                 unsigned long nsec = 1024 * ccti_timer;
 616                 /* ccti_timer is in units of 1.024 usec */
 617                 hrtimer_forward_now(t, ns_to_ktime(nsec));
 618                 ret = HRTIMER_RESTART;
 619         }
 620
 621         spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
 622         rcu_read_unlock();
 623         return ret;
 624 }
 625
 626 /*
 627  * Common code for initializing the physical port structure.
 628  */
 629 void hfi1_init_pportdata(struct pci_dev *pdev, struct hfi1_pportdata *ppd,
 630                          struct hfi1_devdata *dd, u8 hw_pidx, u8 port)
 631 {
 632         int i;
 633         uint default_pkey_idx;
 634         struct cc_state *cc_state;
 635
 636         ppd->dd = dd;
 637         ppd->hw_pidx = hw_pidx;
 638         ppd->port = port; /* IB port number, not index */
 639         ppd->prev_link_width = LINK_WIDTH_DEFAULT;
 640         /*
 641          * There are C_VL_COUNT number of PortVLXmitWait counters.
 642          * Adding 1 to C_VL_COUNT to include the PortXmitWait counter.
 643          */
 644         for (i = 0; i < C_VL_COUNT + 1; i++) {
 645                 ppd->port_vl_xmit_wait_last[i] = 0;
 646                 ppd->vl_xmit_flit_cnt[i] = 0;
 647         }
 648
 649         default_pkey_idx = 1;
 650
 651         ppd->pkeys[default_pkey_idx] = DEFAULT_P_KEY;
 652         ppd->part_enforce |= HFI1_PART_ENFORCE_IN;
 653
 654         if (loopback) {
 655                 hfi1_early_err(&pdev->dev,
 656                                "Faking data partition 0x8001 in idx %u\n",
 657                                !default_pkey_idx);
 658                 ppd->pkeys[!default_pkey_idx] = 0x8001;
 659         }
 660
 661         INIT_WORK(&ppd->link_vc_work, handle_verify_cap);
 662         INIT_WORK(&ppd->link_up_work, handle_link_up);
 663         INIT_WORK(&ppd->link_down_work, handle_link_down);
 664         INIT_WORK(&ppd->freeze_work, handle_freeze);
 665         INIT_WORK(&ppd->link_downgrade_work, handle_link_downgrade);
 666         INIT_WORK(&ppd->sma_message_work, handle_sma_message);
 667         INIT_WORK(&ppd->link_bounce_work, handle_link_bounce);
 668         INIT_DELAYED_WORK(&ppd->start_link_work, handle_start_link);
 669         INIT_WORK(&ppd->linkstate_active_work, receive_interrupt_work);
 670         INIT_WORK(&ppd->qsfp_info.qsfp_work, qsfp_event);
 671
 672         mutex_init(&ppd->hls_lock);
 673         spin_lock_init(&ppd->qsfp_info.qsfp_lock);
 674
 675         ppd->qsfp_info.ppd = ppd;
 676         ppd->sm_trap_qp = 0x0;
 677         ppd->sa_qp = 0x1;
 678
 679         ppd->hfi1_wq = NULL;
 680
 681         spin_lock_init(&ppd->cca_timer_lock);
 682
 683         for (i = 0; i < OPA_MAX_SLS; i++) {
 684                 hrtimer_init(&ppd->cca_timer[i].hrtimer, CLOCK_MONOTONIC,
 685                              HRTIMER_MODE_REL);
 686                 ppd->cca_timer[i].ppd = ppd;
 687                 ppd->cca_timer[i].sl = i;
 688                 ppd->cca_timer[i].ccti = 0;
 689                 ppd->cca_timer[i].hrtimer.function = cca_timer_fn;
 690         }
 691
 692         ppd->cc_max_table_entries = IB_CC_TABLE_CAP_DEFAULT;
 693
 694         spin_lock_init(&ppd->cc_state_lock);
 695         spin_lock_init(&ppd->cc_log_lock);
 696         cc_state = kzalloc(sizeof(*cc_state), GFP_KERNEL);
 697         RCU_INIT_POINTER(ppd->cc_state, cc_state);
 698         if (!cc_state)
 699                 goto bail;
 700         return;
 701
 702 bail:
 703
 704         hfi1_early_err(&pdev->dev,
 705                        "Congestion Control Agent disabled for port %d\n", port);
 706 }
 707
 708 /*
 709  * Do initialization for device that is only needed on
 710  * first detect, not on resets.
 711  */
 712 static int loadtime_init(struct hfi1_devdata *dd)
 713 {
 714         return 0;
 715 }
 716
 717 /**
 718  * init_after_reset - re-initialize after a reset
 719  * @dd: the hfi1_ib device
 720  *
 721  * sanity check at least some of the values after reset, and
 722  * ensure no receive or transmit (explicitly, in case reset
 723  * failed
 724  */
 725 static int init_after_reset(struct hfi1_devdata *dd)
 726 {
 727         int i;
 728         struct hfi1_ctxtdata *rcd;
 729         /*
 730          * Ensure chip does no sends or receives, tail updates, or
 731          * pioavail updates while we re-initialize.  This is mostly
 732          * for the driver data structures, not chip registers.
 733          */
 734         for (i = 0; i < dd->num_rcv_contexts; i++) {
 735                 rcd = hfi1_rcd_get_by_index(dd, i);
 736                 hfi1_rcvctrl(dd, HFI1_RCVCTRL_CTXT_DIS |
 737                              HFI1_RCVCTRL_INTRAVAIL_DIS |
 738                              HFI1_RCVCTRL_TAILUPD_DIS, rcd);
 739                 hfi1_rcd_put(rcd);
 740         }
 741         pio_send_control(dd, PSC_GLOBAL_DISABLE);
 742         for (i = 0; i < dd->num_send_contexts; i++)
 743                 sc_disable(dd->send_contexts[i].sc);
 744
 745         return 0;
 746 }
 747
 748 static void enable_chip(struct hfi1_devdata *dd)
 749 {
 750         struct hfi1_ctxtdata *rcd;
 751         u32 rcvmask;
 752         u16 i;
 753
 754         /* enable PIO send */
 755         pio_send_control(dd, PSC_GLOBAL_ENABLE);
 756
 757         /*
 758          * Enable kernel ctxts' receive and receive interrupt.
 759          * Other ctxts done as user opens and initializes them.
 760          */
 761         for (i = 0; i < dd->first_dyn_alloc_ctxt; ++i) {
 762                 rcd = hfi1_rcd_get_by_index(dd, i);
 763                 if (!rcd)
 764                         continue;
 765                 rcvmask = HFI1_RCVCTRL_CTXT_ENB | HFI1_RCVCTRL_INTRAVAIL_ENB;
 766                 rcvmask |= HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) ?
 767                         HFI1_RCVCTRL_TAILUPD_ENB : HFI1_RCVCTRL_TAILUPD_DIS;
 768                 if (!HFI1_CAP_KGET_MASK(rcd->flags, MULTI_PKT_EGR))
 769                         rcvmask |= HFI1_RCVCTRL_ONE_PKT_EGR_ENB;
 770                 if (HFI1_CAP_KGET_MASK(rcd->flags, NODROP_RHQ_FULL))
 771                         rcvmask |= HFI1_RCVCTRL_NO_RHQ_DROP_ENB;
 772                 if (HFI1_CAP_KGET_MASK(rcd->flags, NODROP_EGR_FULL))
 773                         rcvmask |= HFI1_RCVCTRL_NO_EGR_DROP_ENB;
 774                 hfi1_rcvctrl(dd, rcvmask, rcd);
 775                 sc_enable(rcd->sc);
 776                 hfi1_rcd_put(rcd);
 777         }
 778 }
 779
 780 /**
 781  * create_workqueues - create per port workqueues
 782  * @dd: the hfi1_ib device
 783  */
 784 static int create_workqueues(struct hfi1_devdata *dd)
 785 {
 786         int pidx;
 787         struct hfi1_pportdata *ppd;
 788
 789         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 790                 ppd = dd->pport + pidx;
 791                 if (!ppd->hfi1_wq) {
 792                         ppd->hfi1_wq =
 793                                 alloc_workqueue(
 794                                     "hfi%d_%d",
 795                                     WQ_SYSFS | WQ_HIGHPRI | WQ_CPU_INTENSIVE,
 796                                     HFI1_MAX_ACTIVE_WORKQUEUE_ENTRIES,
 797                                     dd->unit, pidx);
 798                         if (!ppd->hfi1_wq)
 799                                 goto wq_error;
 800                 }
 801                 if (!ppd->link_wq) {
 802                         /*
 803                          * Make the link workqueue single-threaded to enforce
 804                          * serialization.
 805                          */
 806                         ppd->link_wq =
 807                                 alloc_workqueue(
 808                                     "hfi_link_%d_%d",
 809                                     WQ_SYSFS | WQ_MEM_RECLAIM | WQ_UNBOUND,
 810                                     1, /* max_active */
 811                                     dd->unit, pidx);
 812                         if (!ppd->link_wq)
 813                                 goto wq_error;
 814                 }
 815         }
 816         return 0;
 817 wq_error:
 818         pr_err("alloc_workqueue failed for port %d\n", pidx + 1);
 819         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 820                 ppd = dd->pport + pidx;
 821                 if (ppd->hfi1_wq) {
 822                         destroy_workqueue(ppd->hfi1_wq);
 823                         ppd->hfi1_wq = NULL;
 824                 }
 825                 if (ppd->link_wq) {
 826                         destroy_workqueue(ppd->link_wq);
 827                         ppd->link_wq = NULL;
 828                 }
 829         }
 830         return -ENOMEM;
 831 }
 832
 833 /**
 834  * hfi1_init - do the actual initialization sequence on the chip
 835  * @dd: the hfi1_ib device
 836  * @reinit: re-initializing, so don't allocate new memory
 837  *
 838  * Do the actual initialization sequence on the chip.  This is done
 839  * both from the init routine called from the PCI infrastructure, and
 840  * when we reset the chip, or detect that it was reset internally,
 841  * or it's administratively re-enabled.
 842  *
 843  * Memory allocation here and in called routines is only done in
 844  * the first case (reinit == 0).  We have to be careful, because even
 845  * without memory allocation, we need to re-write all the chip registers
 846  * TIDs, etc. after the reset or enable has completed.
 847  */
 848 int hfi1_init(struct hfi1_devdata *dd, int reinit)
 849 {
 850         int ret = 0, pidx, lastfail = 0;
 851         unsigned long len;
 852         u16 i;
 853         struct hfi1_ctxtdata *rcd;
 854         struct hfi1_pportdata *ppd;
 855
 856         /* Set up recv low level handlers */
 857         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_EXPECTED] =
 858                                                 kdeth_process_expected;
 859         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_EAGER] =
 860                                                 kdeth_process_eager;
 861         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_IB] = process_receive_ib;
 862         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_ERROR] =
 863                                                 process_receive_error;
 864         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_BYPASS] =
 865                                                 process_receive_bypass;
 866         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_INVALID5] =
 867                                                 process_receive_invalid;
 868         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_INVALID6] =
 869                                                 process_receive_invalid;
 870         dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_INVALID7] =
 871                                                 process_receive_invalid;
 872         dd->rhf_rcv_function_map = dd->normal_rhf_rcv_functions;
 873
 874         /* Set up send low level handlers */
 875         dd->process_pio_send = hfi1_verbs_send_pio;
 876         dd->process_dma_send = hfi1_verbs_send_dma;
 877         dd->pio_inline_send = pio_copy;
 878         dd->process_vnic_dma_send = hfi1_vnic_send_dma;
 879
 880         if (is_ax(dd)) {
 881                 atomic_set(&dd->drop_packet, DROP_PACKET_ON);
 882                 dd->do_drop = 1;
 883         } else {
 884                 atomic_set(&dd->drop_packet, DROP_PACKET_OFF);
 885                 dd->do_drop = 0;
 886         }
 887
 888         /* make sure the link is not "up" */
 889         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 890                 ppd = dd->pport + pidx;
 891                 ppd->linkup = 0;
 892         }
 893
 894         if (reinit)
 895                 ret = init_after_reset(dd);
 896         else
 897                 ret = loadtime_init(dd);
 898         if (ret)
 899                 goto done;
 900
 901         /* allocate dummy tail memory for all receive contexts */
 902         dd->rcvhdrtail_dummy_kvaddr = dma_zalloc_coherent(
 903                 &dd->pcidev->dev, sizeof(u64),
 904                 &dd->rcvhdrtail_dummy_dma,
 905                 GFP_KERNEL);
 906
 907         if (!dd->rcvhdrtail_dummy_kvaddr) {
 908                 dd_dev_err(dd, "cannot allocate dummy tail memory\n");
 909                 ret = -ENOMEM;
 910                 goto done;
 911         }
 912
 913         /* dd->rcd can be NULL if early initialization failed */
 914         for (i = 0; dd->rcd && i < dd->first_dyn_alloc_ctxt; ++i) {
 915                 /*
 916                  * Set up the (kernel) rcvhdr queue and egr TIDs.  If doing
 917                  * re-init, the simplest way to handle this is to free
 918                  * existing, and re-allocate.
 919                  * Need to re-create rest of ctxt 0 ctxtdata as well.
 920                  */
 921                 rcd = hfi1_rcd_get_by_index(dd, i);
 922                 if (!rcd)
 923                         continue;
 924
 925                 rcd->do_interrupt = &handle_receive_interrupt;
 926
 927                 lastfail = hfi1_create_rcvhdrq(dd, rcd);
 928                 if (!lastfail)
 929                         lastfail = hfi1_setup_eagerbufs(rcd);
 930                 if (lastfail) {
 931                         dd_dev_err(dd,
 932                                    "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n");
 933                         ret = lastfail;
 934                 }
 935                 hfi1_rcd_put(rcd);
 936         }
 937
 938         /* Allocate enough memory for user event notification. */
 939         len = PAGE_ALIGN(dd->chip_rcv_contexts * HFI1_MAX_SHARED_CTXTS *
 940                          sizeof(*dd->events));
 941         dd->events = vmalloc_user(len);
 942         if (!dd->events)
 943                 dd_dev_err(dd, "Failed to allocate user events page\n");
 944         /*
 945          * Allocate a page for device and port status.
 946          * Page will be shared amongst all user processes.
 947          */
 948         dd->status = vmalloc_user(PAGE_SIZE);
 949         if (!dd->status)
 950                 dd_dev_err(dd, "Failed to allocate dev status page\n");
 951         else
 952                 dd->freezelen = PAGE_SIZE - (sizeof(*dd->status) -
 953                                              sizeof(dd->status->freezemsg));
 954         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 955                 ppd = dd->pport + pidx;
 956                 if (dd->status)
 957                         /* Currently, we only have one port */
 958                         ppd->statusp = &dd->status->port;
 959
 960                 set_mtu(ppd);
 961         }
 962
 963         /* enable chip even if we have an error, so we can debug cause */
 964         enable_chip(dd);
 965
 966 done:
 967         /*
 968          * Set status even if port serdes is not initialized
 969          * so that diags will work.
 970          */
 971         if (dd->status)
 972                 dd->status->dev |= HFI1_STATUS_CHIP_PRESENT |
 973                         HFI1_STATUS_INITTED;
 974         if (!ret) {
 975                 /* enable all interrupts from the chip */
 976                 set_intr_state(dd, 1);
 977
 978                 /* chip is OK for user apps; mark it as initialized */
 979                 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 980                         ppd = dd->pport + pidx;
 981
 982                         /*
 983                          * start the serdes - must be after interrupts are
 984                          * enabled so we are notified when the link goes up
 985                          */
 986                         lastfail = bringup_serdes(ppd);
 987                         if (lastfail)
 988                                 dd_dev_info(dd,
 989                                             "Failed to bring up port %u\n",
 990                                             ppd->port);
 991
 992                         /*
 993                          * Set status even if port serdes is not initialized
 994                          * so that diags will work.
 995                          */
 996                         if (ppd->statusp)
 997                                 *ppd->statusp |= HFI1_STATUS_CHIP_PRESENT |
 998                                                         HFI1_STATUS_INITTED;
 999                         if (!ppd->link_speed_enabled)
1000                                 continue;
1001                 }
1002         }
1003
1004         /* if ret is non-zero, we probably should do some cleanup here... */
1005         return ret;
1006 }
1007
1008 static inline struct hfi1_devdata *__hfi1_lookup(int unit)
1009 {
1010         return idr_find(&hfi1_unit_table, unit);
1011 }
1012
1013 struct hfi1_devdata *hfi1_lookup(int unit)
1014 {
1015         struct hfi1_devdata *dd;
1016         unsigned long flags;
1017
1018         spin_lock_irqsave(&hfi1_devs_lock, flags);
1019         dd = __hfi1_lookup(unit);
1020         spin_unlock_irqrestore(&hfi1_devs_lock, flags);
1021
1022         return dd;
1023 }
1024
1025 /*
1026  * Stop the timers during unit shutdown, or after an error late
1027  * in initialization.
1028  */
1029 static void stop_timers(struct hfi1_devdata *dd)
1030 {
1031         struct hfi1_pportdata *ppd;
1032         int pidx;
1033
1034         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1035                 ppd = dd->pport + pidx;
1036                 if (ppd->led_override_timer.function) {
1037                         del_timer_sync(&ppd->led_override_timer);
1038                         atomic_set(&ppd->led_override_timer_active, 0);
1039                 }
1040         }
1041 }
1042
1043 /**
1044  * shutdown_device - shut down a device
1045  * @dd: the hfi1_ib device
1046  *
1047  * This is called to make the device quiet when we are about to
1048  * unload the driver, and also when the device is administratively
1049  * disabled.   It does not free any data structures.
1050  * Everything it does has to be setup again by hfi1_init(dd, 1)
1051  */
1052 static void shutdown_device(struct hfi1_devdata *dd)
1053 {
1054         struct hfi1_pportdata *ppd;
1055         struct hfi1_ctxtdata *rcd;
1056         unsigned pidx;
1057         int i;
1058
1059         if (dd->flags & HFI1_SHUTDOWN)
1060                 return;
1061         dd->flags |= HFI1_SHUTDOWN;
1062
1063         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1064                 ppd = dd->pport + pidx;
1065
1066                 ppd->linkup = 0;
1067                 if (ppd->statusp)
1068                         *ppd->statusp &= ~(HFI1_STATUS_IB_CONF |
1069                                            HFI1_STATUS_IB_READY);
1070         }
1071         dd->flags &= ~HFI1_INITTED;
1072
1073         /* mask and clean up interrupts, but not errors */
1074         set_intr_state(dd, 0);
1075         hfi1_clean_up_interrupts(dd);
1076
1077         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1078                 ppd = dd->pport + pidx;
1079                 for (i = 0; i < dd->num_rcv_contexts; i++) {
1080                         rcd = hfi1_rcd_get_by_index(dd, i);
1081                         hfi1_rcvctrl(dd, HFI1_RCVCTRL_TAILUPD_DIS |
1082                                      HFI1_RCVCTRL_CTXT_DIS |
1083                                      HFI1_RCVCTRL_INTRAVAIL_DIS |
1084                                      HFI1_RCVCTRL_PKEY_DIS |
1085                                      HFI1_RCVCTRL_ONE_PKT_EGR_DIS, rcd);
1086                         hfi1_rcd_put(rcd);
1087                 }
1088                 /*
1089                  * Gracefully stop all sends allowing any in progress to
1090                  * trickle out first.
1091                  */
1092                 for (i = 0; i < dd->num_send_contexts; i++)
1093                         sc_flush(dd->send_contexts[i].sc);
1094         }
1095
1096         /*
1097          * Enough for anything that's going to trickle out to have actually
1098          * done so.
1099          */
1100         udelay(20);
1101
1102         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1103                 ppd = dd->pport + pidx;
1104
1105                 /* disable all contexts */
1106                 for (i = 0; i < dd->num_send_contexts; i++)
1107                         sc_disable(dd->send_contexts[i].sc);
1108                 /* disable the send device */
1109                 pio_send_control(dd, PSC_GLOBAL_DISABLE);
1110
1111                 shutdown_led_override(ppd);
1112
1113                 /*
1114                  * Clear SerdesEnable.
1115                  * We can't count on interrupts since we are stopping.
1116                  */
1117                 hfi1_quiet_serdes(ppd);
1118
1119                 if (ppd->hfi1_wq) {
1120                         destroy_workqueue(ppd->hfi1_wq);
1121                         ppd->hfi1_wq = NULL;
1122                 }
1123                 if (ppd->link_wq) {
1124                         destroy_workqueue(ppd->link_wq);
1125                         ppd->link_wq = NULL;
1126                 }
1127         }
1128         sdma_exit(dd);
1129 }
1130
1131 /**
1132  * hfi1_free_ctxtdata - free a context's allocated data
1133  * @dd: the hfi1_ib device
1134  * @rcd: the ctxtdata structure
1135  *
1136  * free up any allocated data for a context
1137  * It should never change any chip state, or global driver state.
1138  */
1139 void hfi1_free_ctxtdata(struct hfi1_devdata *dd, struct hfi1_ctxtdata *rcd)
1140 {
1141         u32 e;
1142
1143         if (!rcd)
1144                 return;
1145
1146         if (rcd->rcvhdrq) {
1147                 dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size,
1148                                   rcd->rcvhdrq, rcd->rcvhdrq_dma);
1149                 rcd->rcvhdrq = NULL;
1150                 if (rcd->rcvhdrtail_kvaddr) {
1151                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1152                                           (void *)rcd->rcvhdrtail_kvaddr,
1153                                           rcd->rcvhdrqtailaddr_dma);
1154                         rcd->rcvhdrtail_kvaddr = NULL;
1155                 }
1156         }
1157
1158         /* all the RcvArray entries should have been cleared by now */
1159         kfree(rcd->egrbufs.rcvtids);
1160         rcd->egrbufs.rcvtids = NULL;
1161
1162         for (e = 0; e < rcd->egrbufs.alloced; e++) {
1163                 if (rcd->egrbufs.buffers[e].dma)
1164                         dma_free_coherent(&dd->pcidev->dev,
1165                                           rcd->egrbufs.buffers[e].len,
1166                                           rcd->egrbufs.buffers[e].addr,
1167                                           rcd->egrbufs.buffers[e].dma);
1168         }
1169         kfree(rcd->egrbufs.buffers);
1170         rcd->egrbufs.alloced = 0;
1171         rcd->egrbufs.buffers = NULL;
1172
1173         sc_free(rcd->sc);
1174         rcd->sc = NULL;
1175
1176         vfree(rcd->subctxt_uregbase);
1177         vfree(rcd->subctxt_rcvegrbuf);
1178         vfree(rcd->subctxt_rcvhdr_base);
1179         kfree(rcd->opstats);
1180
1181         rcd->subctxt_uregbase = NULL;
1182         rcd->subctxt_rcvegrbuf = NULL;
1183         rcd->subctxt_rcvhdr_base = NULL;
1184         rcd->opstats = NULL;
1185 }
1186
1187 /*
1188  * Release our hold on the shared asic data.  If we are the last one,
1189  * return the structure to be finalized outside the lock.  Must be
1190  * holding hfi1_devs_lock.
1191  */
1192 static struct hfi1_asic_data *release_asic_data(struct hfi1_devdata *dd)
1193 {
1194         struct hfi1_asic_data *ad;
1195         int other;
1196
1197         if (!dd->asic_data)
1198                 return NULL;
1199         dd->asic_data->dds[dd->hfi1_id] = NULL;
1200         other = dd->hfi1_id ? 0 : 1;
1201         ad = dd->asic_data;
1202         dd->asic_data = NULL;
1203         /* return NULL if the other dd still has a link */
1204         return ad->dds[other] ? NULL : ad;
1205 }
1206
1207 static void finalize_asic_data(struct hfi1_devdata *dd,
1208                                struct hfi1_asic_data *ad)
1209 {
1210         clean_up_i2c(dd, ad);
1211         kfree(ad);
1212 }
1213
1214 /**
1215  * hfi1_clean_devdata - cleans up per-unit data structure
1216  * @dd: pointer to a valid devdata structure
1217  *
1218  * It cleans up all data structures set up by
1219  * by hfi1_alloc_devdata().
1220  */
1221 static void hfi1_clean_devdata(struct hfi1_devdata *dd)
1222 {
1223         struct hfi1_asic_data *ad;
1224         unsigned long flags;
1225
1226         spin_lock_irqsave(&hfi1_devs_lock, flags);
1227         if (!list_empty(&dd->list)) {
1228                 idr_remove(&hfi1_unit_table, dd->unit);
1229                 list_del_init(&dd->list);
1230         }
1231         ad = release_asic_data(dd);
1232         spin_unlock_irqrestore(&hfi1_devs_lock, flags);
1233
1234         finalize_asic_data(dd, ad);
1235         free_platform_config(dd);
1236         rcu_barrier(); /* wait for rcu callbacks to complete */
1237         free_percpu(dd->int_counter);
1238         free_percpu(dd->rcv_limit);
1239         free_percpu(dd->send_schedule);
1240         free_percpu(dd->tx_opstats);
1241         dd->int_counter   = NULL;
1242         dd->rcv_limit     = NULL;
1243         dd->send_schedule = NULL;
1244         dd->tx_opstats    = NULL;
1245         kfree(dd->comp_vect);
1246         dd->comp_vect = NULL;
1247         sdma_clean(dd, dd->num_sdma);
1248         rvt_dealloc_device(&dd->verbs_dev.rdi);
1249 }
1250
1251 static void __hfi1_free_devdata(struct kobject *kobj)
1252 {
1253         struct hfi1_devdata *dd =
1254                 container_of(kobj, struct hfi1_devdata, kobj);
1255
1256         hfi1_clean_devdata(dd);
1257 }
1258
1259 static struct kobj_type hfi1_devdata_type = {
1260         .release = __hfi1_free_devdata,
1261 };
1262
1263 void hfi1_free_devdata(struct hfi1_devdata *dd)
1264 {
1265         kobject_put(&dd->kobj);
1266 }
1267
1268 /*
1269  * Allocate our primary per-unit data structure.  Must be done via verbs
1270  * allocator, because the verbs cleanup process both does cleanup and
1271  * free of the data structure.
1272  * "extra" is for chip-specific data.
1273  *
1274  * Use the idr mechanism to get a unit number for this unit.
1275  */
1276 struct hfi1_devdata *hfi1_alloc_devdata(struct pci_dev *pdev, size_t extra)
1277 {
1278         unsigned long flags;
1279         struct hfi1_devdata *dd;
1280         int ret, nports;
1281
1282         /* extra is * number of ports */
1283         nports = extra / sizeof(struct hfi1_pportdata);
1284
1285         dd = (struct hfi1_devdata *)rvt_alloc_device(sizeof(*dd) + extra,
1286                                                      nports);
1287         if (!dd)
1288                 return ERR_PTR(-ENOMEM);
1289         dd->num_pports = nports;
1290         dd->pport = (struct hfi1_pportdata *)(dd + 1);
1291         dd->pcidev = pdev;
1292         pci_set_drvdata(pdev, dd);
1293
1294         INIT_LIST_HEAD(&dd->list);
1295         idr_preload(GFP_KERNEL);
1296         spin_lock_irqsave(&hfi1_devs_lock, flags);
1297
1298         ret = idr_alloc(&hfi1_unit_table, dd, 0, 0, GFP_NOWAIT);
1299         if (ret >= 0) {
1300                 dd->unit = ret;
1301                 list_add(&dd->list, &hfi1_dev_list);
1302         }
1303         dd->node = -1;
1304
1305         spin_unlock_irqrestore(&hfi1_devs_lock, flags);
1306         idr_preload_end();
1307
1308         if (ret < 0) {
1309                 hfi1_early_err(&pdev->dev,
1310                                "Could not allocate unit ID: error %d\n", -ret);
1311                 goto bail;
1312         }
1313         rvt_set_ibdev_name(&dd->verbs_dev.rdi, "%s_%d", class_name(), dd->unit);
1314
1315         /*
1316          * Initialize all locks for the device. This needs to be as early as
1317          * possible so locks are usable.
1318          */
1319         spin_lock_init(&dd->sc_lock);
1320         spin_lock_init(&dd->sendctrl_lock);
1321         spin_lock_init(&dd->rcvctrl_lock);
1322         spin_lock_init(&dd->uctxt_lock);
1323         spin_lock_init(&dd->hfi1_diag_trans_lock);
1324         spin_lock_init(&dd->sc_init_lock);
1325         spin_lock_init(&dd->dc8051_memlock);
1326         seqlock_init(&dd->sc2vl_lock);
1327         spin_lock_init(&dd->sde_map_lock);
1328         spin_lock_init(&dd->pio_map_lock);
1329         mutex_init(&dd->dc8051_lock);
1330         init_waitqueue_head(&dd->event_queue);
1331
1332         dd->int_counter = alloc_percpu(u64);
1333         if (!dd->int_counter) {
1334                 ret = -ENOMEM;
1335                 goto bail;
1336         }
1337
1338         dd->rcv_limit = alloc_percpu(u64);
1339         if (!dd->rcv_limit) {
1340                 ret = -ENOMEM;
1341                 goto bail;
1342         }
1343
1344         dd->send_schedule = alloc_percpu(u64);
1345         if (!dd->send_schedule) {
1346                 ret = -ENOMEM;
1347                 goto bail;
1348         }
1349
1350         dd->tx_opstats = alloc_percpu(struct hfi1_opcode_stats_perctx);
1351         if (!dd->tx_opstats) {
1352                 ret = -ENOMEM;
1353                 goto bail;
1354         }
1355
1356         dd->comp_vect = kzalloc(sizeof(*dd->comp_vect), GFP_KERNEL);
1357         if (!dd->comp_vect) {
1358                 ret = -ENOMEM;
1359                 goto bail;
1360         }
1361
1362         kobject_init(&dd->kobj, &hfi1_devdata_type);
1363         return dd;
1364
1365 bail:
1366         hfi1_clean_devdata(dd);
1367         return ERR_PTR(ret);
1368 }
1369
1370 /*
1371  * Called from freeze mode handlers, and from PCI error
1372  * reporting code.  Should be paranoid about state of
1373  * system and data structures.
1374  */
1375 void hfi1_disable_after_error(struct hfi1_devdata *dd)
1376 {
1377         if (dd->flags & HFI1_INITTED) {
1378                 u32 pidx;
1379
1380                 dd->flags &= ~HFI1_INITTED;
1381                 if (dd->pport)
1382                         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1383                                 struct hfi1_pportdata *ppd;
1384
1385                                 ppd = dd->pport + pidx;
1386                                 if (dd->flags & HFI1_PRESENT)
1387                                         set_link_state(ppd, HLS_DN_DISABLE);
1388
1389                                 if (ppd->statusp)
1390                                         *ppd->statusp &= ~HFI1_STATUS_IB_READY;
1391                         }
1392         }
1393
1394         /*
1395          * Mark as having had an error for driver, and also
1396          * for /sys and status word mapped to user programs.
1397          * This marks unit as not usable, until reset.
1398          */
1399         if (dd->status)
1400                 dd->status->dev |= HFI1_STATUS_HWERROR;
1401 }
1402
1403 static void remove_one(struct pci_dev *);
1404 static int init_one(struct pci_dev *, const struct pci_device_id *);
1405 static void shutdown_one(struct pci_dev *);
1406
1407 #define DRIVER_LOAD_MSG "Intel " DRIVER_NAME " loaded: "
1408 #define PFX DRIVER_NAME ": "
1409
1410 const struct pci_device_id hfi1_pci_tbl[] = {
1411         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL0) },
1412         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL1) },
1413         { 0, }
1414 };
1415
1416 MODULE_DEVICE_TABLE(pci, hfi1_pci_tbl);
1417
1418 static struct pci_driver hfi1_pci_driver = {
1419         .name = DRIVER_NAME,
1420         .probe = init_one,
1421         .remove = remove_one,
1422         .shutdown = shutdown_one,
1423         .id_table = hfi1_pci_tbl,
1424         .err_handler = &hfi1_pci_err_handler,
1425 };
1426
1427 static void __init compute_krcvqs(void)
1428 {
1429         int i;
1430
1431         for (i = 0; i < krcvqsset; i++)
1432                 n_krcvqs += krcvqs[i];
1433 }
1434
1435 /*
1436  * Do all the generic driver unit- and chip-independent memory
1437  * allocation and initialization.
1438  */
1439 static int __init hfi1_mod_init(void)
1440 {
1441         int ret;
1442
1443         ret = dev_init();
1444         if (ret)
1445                 goto bail;
1446
1447         ret = node_affinity_init();
1448         if (ret)
1449                 goto bail;
1450
1451         /* validate max MTU before any devices start */
1452         if (!valid_opa_max_mtu(hfi1_max_mtu)) {
1453                 pr_err("Invalid max_mtu 0x%x, using 0x%x instead\n",
1454                        hfi1_max_mtu, HFI1_DEFAULT_MAX_MTU);
1455                 hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU;
1456         }
1457         /* valid CUs run from 1-128 in powers of 2 */
1458         if (hfi1_cu > 128 || !is_power_of_2(hfi1_cu))
1459                 hfi1_cu = 1;
1460         /* valid credit return threshold is 0-100, variable is unsigned */
1461         if (user_credit_return_threshold > 100)
1462                 user_credit_return_threshold = 100;
1463
1464         compute_krcvqs();
1465         /*
1466          * sanitize receive interrupt count, time must wait until after
1467          * the hardware type is known
1468          */
1469         if (rcv_intr_count > RCV_HDR_HEAD_COUNTER_MASK)
1470                 rcv_intr_count = RCV_HDR_HEAD_COUNTER_MASK;
1471         /* reject invalid combinations */
1472         if (rcv_intr_count == 0 && rcv_intr_timeout == 0) {
1473                 pr_err("Invalid mode: both receive interrupt count and available timeout are zero - setting interrupt count to 1\n");
1474                 rcv_intr_count = 1;
1475         }
1476         if (rcv_intr_count > 1 && rcv_intr_timeout == 0) {
1477                 /*
1478                  * Avoid indefinite packet delivery by requiring a timeout
1479                  * if count is > 1.
1480                  */
1481                 pr_err("Invalid mode: receive interrupt count greater than 1 and available timeout is zero - setting available timeout to 1\n");
1482                 rcv_intr_timeout = 1;
1483         }
1484         if (rcv_intr_dynamic && !(rcv_intr_count > 1 && rcv_intr_timeout > 0)) {
1485                 /*
1486                  * The dynamic algorithm expects a non-zero timeout
1487                  * and a count > 1.
1488                  */
1489                 pr_err("Invalid mode: dynamic receive interrupt mitigation with invalid count and timeout - turning dynamic off\n");
1490                 rcv_intr_dynamic = 0;
1491         }
1492
1493         /* sanitize link CRC options */
1494         link_crc_mask &= SUPPORTED_CRCS;
1495
1496         /*
1497          * These must be called before the driver is registered with
1498          * the PCI subsystem.
1499          */
1500         idr_init(&hfi1_unit_table);
1501
1502         hfi1_dbg_init();
1503         ret = hfi1_wss_init();
1504         if (ret < 0)
1505                 goto bail_wss;
1506         ret = pci_register_driver(&hfi1_pci_driver);
1507         if (ret < 0) {
1508                 pr_err("Unable to register driver: error %d\n", -ret);
1509                 goto bail_dev;
1510         }
1511         goto bail; /* all OK */
1512
1513 bail_dev:
1514         hfi1_wss_exit();
1515 bail_wss:
1516         hfi1_dbg_exit();
1517         idr_destroy(&hfi1_unit_table);
1518         dev_cleanup();
1519 bail:
1520         return ret;
1521 }
1522
1523 module_init(hfi1_mod_init);
1524
1525 /*
1526  * Do the non-unit driver cleanup, memory free, etc. at unload.
1527  */
1528 static void __exit hfi1_mod_cleanup(void)
1529 {
1530         pci_unregister_driver(&hfi1_pci_driver);
1531         node_affinity_destroy_all();
1532         hfi1_wss_exit();
1533         hfi1_dbg_exit();
1534
1535         idr_destroy(&hfi1_unit_table);
1536         dispose_firmware();     /* asymmetric with obtain_firmware() */
1537         dev_cleanup();
1538 }
1539
1540 module_exit(hfi1_mod_cleanup);
1541
1542 /* this can only be called after a successful initialization */
1543 static void cleanup_device_data(struct hfi1_devdata *dd)
1544 {
1545         int ctxt;
1546         int pidx;
1547
1548         /* users can't do anything more with chip */
1549         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1550                 struct hfi1_pportdata *ppd = &dd->pport[pidx];
1551                 struct cc_state *cc_state;
1552                 int i;
1553
1554                 if (ppd->statusp)
1555                         *ppd->statusp &= ~HFI1_STATUS_CHIP_PRESENT;
1556
1557                 for (i = 0; i < OPA_MAX_SLS; i++)
1558                         hrtimer_cancel(&ppd->cca_timer[i].hrtimer);
1559
1560                 spin_lock(&ppd->cc_state_lock);
1561                 cc_state = get_cc_state_protected(ppd);
1562                 RCU_INIT_POINTER(ppd->cc_state, NULL);
1563                 spin_unlock(&ppd->cc_state_lock);
1564
1565                 if (cc_state)
1566                         kfree_rcu(cc_state, rcu);
1567         }
1568
1569         free_credit_return(dd);
1570
1571         if (dd->rcvhdrtail_dummy_kvaddr) {
1572                 dma_free_coherent(&dd->pcidev->dev, sizeof(u64),
1573                                   (void *)dd->rcvhdrtail_dummy_kvaddr,
1574                                   dd->rcvhdrtail_dummy_dma);
1575                 dd->rcvhdrtail_dummy_kvaddr = NULL;
1576         }
1577
1578         /*
1579          * Free any resources still in use (usually just kernel contexts)
1580          * at unload; we do for ctxtcnt, because that's what we allocate.
1581          */
1582         for (ctxt = 0; dd->rcd && ctxt < dd->num_rcv_contexts; ctxt++) {
1583                 struct hfi1_ctxtdata *rcd = dd->rcd[ctxt];
1584
1585                 if (rcd) {
1586                         hfi1_clear_tids(rcd);
1587                         hfi1_free_ctxt(rcd);
1588                 }
1589         }
1590
1591         kfree(dd->rcd);
1592         dd->rcd = NULL;
1593
1594         free_pio_map(dd);
1595         /* must follow rcv context free - need to remove rcv's hooks */
1596         for (ctxt = 0; ctxt < dd->num_send_contexts; ctxt++)
1597                 sc_free(dd->send_contexts[ctxt].sc);
1598         dd->num_send_contexts = 0;
1599         kfree(dd->send_contexts);
1600         dd->send_contexts = NULL;
1601         kfree(dd->hw_to_sw);
1602         dd->hw_to_sw = NULL;
1603         kfree(dd->boardname);
1604         vfree(dd->events);
1605         vfree(dd->status);
1606 }
1607
1608 /*
1609  * Clean up on unit shutdown, or error during unit load after
1610  * successful initialization.
1611  */
1612 static void postinit_cleanup(struct hfi1_devdata *dd)
1613 {
1614         hfi1_start_cleanup(dd);
1615         hfi1_comp_vectors_clean_up(dd);
1616         hfi1_dev_affinity_clean_up(dd);
1617
1618         hfi1_pcie_ddcleanup(dd);
1619         hfi1_pcie_cleanup(dd->pcidev);
1620
1621         cleanup_device_data(dd);
1622
1623         hfi1_free_devdata(dd);
1624 }
1625
1626 static int init_validate_rcvhdrcnt(struct device *dev, uint thecnt)
1627 {
1628         if (thecnt <= HFI1_MIN_HDRQ_EGRBUF_CNT) {
1629                 hfi1_early_err(dev, "Receive header queue count too small\n");
1630                 return -EINVAL;
1631         }
1632
1633         if (thecnt > HFI1_MAX_HDRQ_EGRBUF_CNT) {
1634                 hfi1_early_err(dev,
1635                                "Receive header queue count cannot be greater than %u\n",
1636                                HFI1_MAX_HDRQ_EGRBUF_CNT);
1637                 return -EINVAL;
1638         }
1639
1640         if (thecnt % HDRQ_INCREMENT) {
1641                 hfi1_early_err(dev, "Receive header queue count %d must be divisible by %lu\n",
1642                                thecnt, HDRQ_INCREMENT);
1643                 return -EINVAL;
1644         }
1645
1646         return 0;
1647 }
1648
1649 static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1650 {
1651         int ret = 0, j, pidx, initfail;
1652         struct hfi1_devdata *dd;
1653         struct hfi1_pportdata *ppd;
1654
1655         /* First, lock the non-writable module parameters */
1656         HFI1_CAP_LOCK();
1657
1658         /* Validate dev ids */
1659         if (!(ent->device == PCI_DEVICE_ID_INTEL0 ||
1660               ent->device == PCI_DEVICE_ID_INTEL1)) {
1661                 hfi1_early_err(&pdev->dev,
1662                                "Failing on unknown Intel deviceid 0x%x\n",
1663                                ent->device);
1664                 ret = -ENODEV;
1665                 goto bail;
1666         }
1667
1668         /* Validate some global module parameters */
1669         ret = init_validate_rcvhdrcnt(&pdev->dev, rcvhdrcnt);
1670         if (ret)
1671                 goto bail;
1672
1673         /* use the encoding function as a sanitization check */
1674         if (!encode_rcv_header_entry_size(hfi1_hdrq_entsize)) {
1675                 hfi1_early_err(&pdev->dev, "Invalid HdrQ Entry size %u\n",
1676                                hfi1_hdrq_entsize);
1677                 ret = -EINVAL;
1678                 goto bail;
1679         }
1680
1681         /* The receive eager buffer size must be set before the receive
1682          * contexts are created.
1683          *
1684          * Set the eager buffer size.  Validate that it falls in a range
1685          * allowed by the hardware - all powers of 2 between the min and
1686          * max.  The maximum valid MTU is within the eager buffer range
1687          * so we do not need to cap the max_mtu by an eager buffer size
1688          * setting.
1689          */
1690         if (eager_buffer_size) {
1691                 if (!is_power_of_2(eager_buffer_size))
1692                         eager_buffer_size =
1693                                 roundup_pow_of_two(eager_buffer_size);
1694                 eager_buffer_size =
1695                         clamp_val(eager_buffer_size,
1696                                   MIN_EAGER_BUFFER * 8,
1697                                   MAX_EAGER_BUFFER_TOTAL);
1698                 hfi1_early_info(&pdev->dev, "Eager buffer size %u\n",
1699                                 eager_buffer_size);
1700         } else {
1701                 hfi1_early_err(&pdev->dev, "Invalid Eager buffer size of 0\n");
1702                 ret = -EINVAL;
1703                 goto bail;
1704         }
1705
1706         /* restrict value of hfi1_rcvarr_split */
1707         hfi1_rcvarr_split = clamp_val(hfi1_rcvarr_split, 0, 100);
1708
1709         ret = hfi1_pcie_init(pdev, ent);
1710         if (ret)
1711                 goto bail;
1712
1713         /*
1714          * Do device-specific initialization, function table setup, dd
1715          * allocation, etc.
1716          */
1717         dd = hfi1_init_dd(pdev, ent);
1718
1719         if (IS_ERR(dd)) {
1720                 ret = PTR_ERR(dd);
1721                 goto clean_bail; /* error already printed */
1722         }
1723
1724         ret = create_workqueues(dd);
1725         if (ret)
1726                 goto clean_bail;
1727
1728         /* do the generic initialization */
1729         initfail = hfi1_init(dd, 0);
1730
1731         /* setup vnic */
1732         hfi1_vnic_setup(dd);
1733
1734         ret = hfi1_register_ib_device(dd);
1735
1736         /*
1737          * Now ready for use.  this should be cleared whenever we
1738          * detect a reset, or initiate one.  If earlier failure,
1739          * we still create devices, so diags, etc. can be used
1740          * to determine cause of problem.
1741          */
1742         if (!initfail && !ret) {
1743                 dd->flags |= HFI1_INITTED;
1744                 /* create debufs files after init and ib register */
1745                 hfi1_dbg_ibdev_init(&dd->verbs_dev);
1746         }
1747
1748         j = hfi1_device_create(dd);
1749         if (j)
1750                 dd_dev_err(dd, "Failed to create /dev devices: %d\n", -j);
1751
1752         if (initfail || ret) {
1753                 hfi1_clean_up_interrupts(dd);
1754                 stop_timers(dd);
1755                 flush_workqueue(ib_wq);
1756                 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1757                         hfi1_quiet_serdes(dd->pport + pidx);
1758                         ppd = dd->pport + pidx;
1759                         if (ppd->hfi1_wq) {
1760                                 destroy_workqueue(ppd->hfi1_wq);
1761                                 ppd->hfi1_wq = NULL;
1762                         }
1763                         if (ppd->link_wq) {
1764                                 destroy_workqueue(ppd->link_wq);
1765                                 ppd->link_wq = NULL;
1766                         }
1767                 }
1768                 if (!j)
1769                         hfi1_device_remove(dd);
1770                 if (!ret)
1771                         hfi1_unregister_ib_device(dd);
1772                 hfi1_vnic_cleanup(dd);
1773                 postinit_cleanup(dd);
1774                 if (initfail)
1775                         ret = initfail;
1776                 goto bail;      /* everything already cleaned */
1777         }
1778
1779         sdma_start(dd);
1780
1781         return 0;
1782
1783 clean_bail:
1784         hfi1_pcie_cleanup(pdev);
1785 bail:
1786         return ret;
1787 }
1788
1789 static void wait_for_clients(struct hfi1_devdata *dd)
1790 {
1791         /*
1792          * Remove the device init value and complete the device if there is
1793          * no clients or wait for active clients to finish.
1794          */
1795         if (atomic_dec_and_test(&dd->user_refcount))
1796                 complete(&dd->user_comp);
1797
1798         wait_for_completion(&dd->user_comp);
1799 }
1800
1801 static void remove_one(struct pci_dev *pdev)
1802 {
1803         struct hfi1_devdata *dd = pci_get_drvdata(pdev);
1804
1805         /* close debugfs files before ib unregister */
1806         hfi1_dbg_ibdev_exit(&dd->verbs_dev);
1807
1808         /* remove the /dev hfi1 interface */
1809         hfi1_device_remove(dd);
1810
1811         /* wait for existing user space clients to finish */
1812         wait_for_clients(dd);
1813
1814         /* unregister from IB core */
1815         hfi1_unregister_ib_device(dd);
1816
1817         /* cleanup vnic */
1818         hfi1_vnic_cleanup(dd);
1819
1820         /*
1821          * Disable the IB link, disable interrupts on the device,
1822          * clear dma engines, etc.
1823          */
1824         shutdown_device(dd);
1825
1826         stop_timers(dd);
1827
1828         /* wait until all of our (qsfp) queue_work() calls complete */
1829         flush_workqueue(ib_wq);
1830
1831         postinit_cleanup(dd);
1832 }
1833
1834 static void shutdown_one(struct pci_dev *pdev)
1835 {
1836         struct hfi1_devdata *dd = pci_get_drvdata(pdev);
1837
1838         shutdown_device(dd);
1839 }
1840
1841 /**
1842  * hfi1_create_rcvhdrq - create a receive header queue
1843  * @dd: the hfi1_ib device
1844  * @rcd: the context data
1845  *
1846  * This must be contiguous memory (from an i/o perspective), and must be
1847  * DMA'able (which means for some systems, it will go through an IOMMU,
1848  * or be forced into a low address range).
1849  */
1850 int hfi1_create_rcvhdrq(struct hfi1_devdata *dd, struct hfi1_ctxtdata *rcd)
1851 {
1852         unsigned amt;
1853         u64 reg;
1854
1855         if (!rcd->rcvhdrq) {
1856                 dma_addr_t dma_hdrqtail;
1857                 gfp_t gfp_flags;
1858
1859                 /*
1860                  * rcvhdrqentsize is in DWs, so we have to convert to bytes
1861                  * (* sizeof(u32)).
1862                  */
1863                 amt = PAGE_ALIGN(rcd->rcvhdrq_cnt * rcd->rcvhdrqentsize *
1864                                  sizeof(u32));
1865
1866                 if (rcd->ctxt < dd->first_dyn_alloc_ctxt || rcd->is_vnic)
1867                         gfp_flags = GFP_KERNEL;
1868                 else
1869                         gfp_flags = GFP_USER;
1870                 rcd->rcvhdrq = dma_zalloc_coherent(
1871                         &dd->pcidev->dev, amt, &rcd->rcvhdrq_dma,
1872                         gfp_flags | __GFP_COMP);
1873
1874                 if (!rcd->rcvhdrq) {
1875                         dd_dev_err(dd,
1876                                    "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n",
1877                                    amt, rcd->ctxt);
1878                         goto bail;
1879                 }
1880
1881                 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
1882                         rcd->rcvhdrtail_kvaddr = dma_zalloc_coherent(
1883                                 &dd->pcidev->dev, PAGE_SIZE, &dma_hdrqtail,
1884                                 gfp_flags);
1885                         if (!rcd->rcvhdrtail_kvaddr)
1886                                 goto bail_free;
1887                         rcd->rcvhdrqtailaddr_dma = dma_hdrqtail;
1888                 }
1889
1890                 rcd->rcvhdrq_size = amt;
1891         }
1892         /*
1893          * These values are per-context:
1894          *      RcvHdrCnt
1895          *      RcvHdrEntSize
1896          *      RcvHdrSize
1897          */
1898         reg = ((u64)(rcd->rcvhdrq_cnt >> HDRQ_SIZE_SHIFT)
1899                         & RCV_HDR_CNT_CNT_MASK)
1900                 << RCV_HDR_CNT_CNT_SHIFT;
1901         write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_CNT, reg);
1902         reg = (encode_rcv_header_entry_size(rcd->rcvhdrqentsize)
1903                         & RCV_HDR_ENT_SIZE_ENT_SIZE_MASK)
1904                 << RCV_HDR_ENT_SIZE_ENT_SIZE_SHIFT;
1905         write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_ENT_SIZE, reg);
1906         reg = (dd->rcvhdrsize & RCV_HDR_SIZE_HDR_SIZE_MASK)
1907                 << RCV_HDR_SIZE_HDR_SIZE_SHIFT;
1908         write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_SIZE, reg);
1909
1910         /*
1911          * Program dummy tail address for every receive context
1912          * before enabling any receive context
1913          */
1914         write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_TAIL_ADDR,
1915                         dd->rcvhdrtail_dummy_dma);
1916
1917         return 0;
1918
1919 bail_free:
1920         dd_dev_err(dd,
1921                    "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n",
1922                    rcd->ctxt);
1923         dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq,
1924                           rcd->rcvhdrq_dma);
1925         rcd->rcvhdrq = NULL;
1926 bail:
1927         return -ENOMEM;
1928 }
1929
1930 /**
1931  * allocate eager buffers, both kernel and user contexts.
1932  * @rcd: the context we are setting up.
1933  *
1934  * Allocate the eager TID buffers and program them into hip.
1935  * They are no longer completely contiguous, we do multiple allocation
1936  * calls.  Otherwise we get the OOM code involved, by asking for too
1937  * much per call, with disastrous results on some kernels.
1938  */
1939 int hfi1_setup_eagerbufs(struct hfi1_ctxtdata *rcd)
1940 {
1941         struct hfi1_devdata *dd = rcd->dd;
1942         u32 max_entries, egrtop, alloced_bytes = 0, idx = 0;
1943         gfp_t gfp_flags;
1944         u16 order;
1945         int ret = 0;
1946         u16 round_mtu = roundup_pow_of_two(hfi1_max_mtu);
1947
1948         /*
1949          * GFP_USER, but without GFP_FS, so buffer cache can be
1950          * coalesced (we hope); otherwise, even at order 4,
1951          * heavy filesystem activity makes these fail, and we can
1952          * use compound pages.
1953          */
1954         gfp_flags = __GFP_RECLAIM | __GFP_IO | __GFP_COMP;
1955
1956         /*
1957          * The minimum size of the eager buffers is a groups of MTU-sized
1958          * buffers.
1959          * The global eager_buffer_size parameter is checked against the
1960          * theoretical lower limit of the value. Here, we check against the
1961          * MTU.
1962          */
1963         if (rcd->egrbufs.size < (round_mtu * dd->rcv_entries.group_size))
1964                 rcd->egrbufs.size = round_mtu * dd->rcv_entries.group_size;
1965         /*
1966          * If using one-pkt-per-egr-buffer, lower the eager buffer
1967          * size to the max MTU (page-aligned).
1968          */
1969         if (!HFI1_CAP_KGET_MASK(rcd->flags, MULTI_PKT_EGR))
1970                 rcd->egrbufs.rcvtid_size = round_mtu;
1971
1972         /*
1973          * Eager buffers sizes of 1MB or less require smaller TID sizes
1974          * to satisfy the "multiple of 8 RcvArray entries" requirement.
1975          */
1976         if (rcd->egrbufs.size <= (1 << 20))
1977                 rcd->egrbufs.rcvtid_size = max((unsigned long)round_mtu,
1978                         rounddown_pow_of_two(rcd->egrbufs.size / 8));
1979
1980         while (alloced_bytes < rcd->egrbufs.size &&
1981                rcd->egrbufs.alloced < rcd->egrbufs.count) {
1982                 rcd->egrbufs.buffers[idx].addr =
1983                         dma_zalloc_coherent(&dd->pcidev->dev,
1984                                             rcd->egrbufs.rcvtid_size,
1985                                             &rcd->egrbufs.buffers[idx].dma,
1986                                             gfp_flags);
1987                 if (rcd->egrbufs.buffers[idx].addr) {
1988                         rcd->egrbufs.buffers[idx].len =
1989                                 rcd->egrbufs.rcvtid_size;
1990                         rcd->egrbufs.rcvtids[rcd->egrbufs.alloced].addr =
1991                                 rcd->egrbufs.buffers[idx].addr;
1992                         rcd->egrbufs.rcvtids[rcd->egrbufs.alloced].dma =
1993                                 rcd->egrbufs.buffers[idx].dma;
1994                         rcd->egrbufs.alloced++;
1995                         alloced_bytes += rcd->egrbufs.rcvtid_size;
1996                         idx++;
1997                 } else {
1998                         u32 new_size, i, j;
1999                         u64 offset = 0;
2000
2001                         /*
2002                          * Fail the eager buffer allocation if:
2003                          *   - we are already using the lowest acceptable size
2004                          *   - we are using one-pkt-per-egr-buffer (this implies
2005                          *     that we are accepting only one size)
2006                          */
2007                         if (rcd->egrbufs.rcvtid_size == round_mtu ||
2008                             !HFI1_CAP_KGET_MASK(rcd->flags, MULTI_PKT_EGR)) {
2009                                 dd_dev_err(dd, "ctxt%u: Failed to allocate eager buffers\n",
2010                                            rcd->ctxt);
2011                                 ret = -ENOMEM;
2012                                 goto bail_rcvegrbuf_phys;
2013                         }
2014
2015                         new_size = rcd->egrbufs.rcvtid_size / 2;
2016
2017                         /*
2018                          * If the first attempt to allocate memory failed, don't
2019                          * fail everything but continue with the next lower
2020                          * size.
2021                          */
2022                         if (idx == 0) {
2023                                 rcd->egrbufs.rcvtid_size = new_size;
2024                                 continue;
2025                         }
2026
2027                         /*
2028                          * Re-partition already allocated buffers to a smaller
2029                          * size.
2030                          */
2031                         rcd->egrbufs.alloced = 0;
2032                         for (i = 0, j = 0, offset = 0; j < idx; i++) {
2033                                 if (i >= rcd->egrbufs.count)
2034                                         break;
2035                                 rcd->egrbufs.rcvtids[i].dma =
2036                                         rcd->egrbufs.buffers[j].dma + offset;
2037                                 rcd->egrbufs.rcvtids[i].addr =
2038                                         rcd->egrbufs.buffers[j].addr + offset;
2039                                 rcd->egrbufs.alloced++;
2040                                 if ((rcd->egrbufs.buffers[j].dma + offset +
2041                                      new_size) ==
2042                                     (rcd->egrbufs.buffers[j].dma +
2043                                      rcd->egrbufs.buffers[j].len)) {
2044                                         j++;
2045                                         offset = 0;
2046                                 } else {
2047                                         offset += new_size;
2048                                 }
2049                         }
2050                         rcd->egrbufs.rcvtid_size = new_size;
2051                 }
2052         }
2053         rcd->egrbufs.numbufs = idx;
2054         rcd->egrbufs.size = alloced_bytes;
2055
2056         hfi1_cdbg(PROC,
2057                   "ctxt%u: Alloced %u rcv tid entries @ %uKB, total %zuKB\n",
2058                   rcd->ctxt, rcd->egrbufs.alloced,
2059                   rcd->egrbufs.rcvtid_size / 1024, rcd->egrbufs.size / 1024);
2060
2061         /*
2062          * Set the contexts rcv array head update threshold to the closest
2063          * power of 2 (so we can use a mask instead of modulo) below half
2064          * the allocated entries.
2065          */
2066         rcd->egrbufs.threshold =
2067                 rounddown_pow_of_two(rcd->egrbufs.alloced / 2);
2068         /*
2069          * Compute the expected RcvArray entry base. This is done after
2070          * allocating the eager buffers in order to maximize the
2071          * expected RcvArray entries for the context.
2072          */
2073         max_entries = rcd->rcv_array_groups * dd->rcv_entries.group_size;
2074         egrtop = roundup(rcd->egrbufs.alloced, dd->rcv_entries.group_size);
2075         rcd->expected_count = max_entries - egrtop;
2076         if (rcd->expected_count > MAX_TID_PAIR_ENTRIES * 2)
2077                 rcd->expected_count = MAX_TID_PAIR_ENTRIES * 2;
2078
2079         rcd->expected_base = rcd->eager_base + egrtop;
2080         hfi1_cdbg(PROC, "ctxt%u: eager:%u, exp:%u, egrbase:%u, expbase:%u\n",
2081                   rcd->ctxt, rcd->egrbufs.alloced, rcd->expected_count,
2082                   rcd->eager_base, rcd->expected_base);
2083
2084         if (!hfi1_rcvbuf_validate(rcd->egrbufs.rcvtid_size, PT_EAGER, &order)) {
2085                 hfi1_cdbg(PROC,
2086                           "ctxt%u: current Eager buffer size is invalid %u\n",
2087                           rcd->ctxt, rcd->egrbufs.rcvtid_size);
2088                 ret = -EINVAL;
2089                 goto bail_rcvegrbuf_phys;
2090         }
2091
2092         for (idx = 0; idx < rcd->egrbufs.alloced; idx++) {
2093                 hfi1_put_tid(dd, rcd->eager_base + idx, PT_EAGER,
2094                              rcd->egrbufs.rcvtids[idx].dma, order);
2095                 cond_resched();
2096         }
2097
2098         return 0;
2099
2100 bail_rcvegrbuf_phys:
2101         for (idx = 0; idx < rcd->egrbufs.alloced &&
2102              rcd->egrbufs.buffers[idx].addr;
2103              idx++) {
2104                 dma_free_coherent(&dd->pcidev->dev,
2105                                   rcd->egrbufs.buffers[idx].len,
2106                                   rcd->egrbufs.buffers[idx].addr,
2107                                   rcd->egrbufs.buffers[idx].dma);
2108                 rcd->egrbufs.buffers[idx].addr = NULL;
2109                 rcd->egrbufs.buffers[idx].dma = 0;
2110                 rcd->egrbufs.buffers[idx].len = 0;
2111         }
2112
2113         return ret;
2114 }