1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 * Copyright 2018-2019 Amazon.com, Inc. or its affiliates. All rights reserved.
6 #ifndef _EFA_ADMIN_CMDS_H_
7 #define _EFA_ADMIN_CMDS_H_
9 #define EFA_ADMIN_API_VERSION_MAJOR 0
10 #define EFA_ADMIN_API_VERSION_MINOR 1
12 /* EFA admin queue opcodes */
13 enum efa_admin_aq_opcode {
14 EFA_ADMIN_CREATE_QP = 1,
15 EFA_ADMIN_MODIFY_QP = 2,
16 EFA_ADMIN_QUERY_QP = 3,
17 EFA_ADMIN_DESTROY_QP = 4,
18 EFA_ADMIN_CREATE_AH = 5,
19 EFA_ADMIN_DESTROY_AH = 6,
21 EFA_ADMIN_DEREG_MR = 8,
22 EFA_ADMIN_CREATE_CQ = 9,
23 EFA_ADMIN_DESTROY_CQ = 10,
24 EFA_ADMIN_GET_FEATURE = 11,
25 EFA_ADMIN_SET_FEATURE = 12,
26 EFA_ADMIN_GET_STATS = 13,
27 EFA_ADMIN_ALLOC_PD = 14,
28 EFA_ADMIN_DEALLOC_PD = 15,
29 EFA_ADMIN_ALLOC_UAR = 16,
30 EFA_ADMIN_DEALLOC_UAR = 17,
31 EFA_ADMIN_MAX_OPCODE = 17,
34 enum efa_admin_aq_feature_id {
35 EFA_ADMIN_DEVICE_ATTR = 1,
36 EFA_ADMIN_AENQ_CONFIG = 2,
37 EFA_ADMIN_NETWORK_ATTR = 3,
38 EFA_ADMIN_QUEUE_ATTR = 4,
39 EFA_ADMIN_HW_HINTS = 5,
40 EFA_ADMIN_FEATURES_OPCODE_NUM = 8,
43 /* QP transport type */
44 enum efa_admin_qp_type {
45 /* Unreliable Datagram */
46 EFA_ADMIN_QP_TYPE_UD = 1,
47 /* Scalable Reliable Datagram */
48 EFA_ADMIN_QP_TYPE_SRD = 2,
52 enum efa_admin_qp_state {
53 EFA_ADMIN_QP_STATE_RESET = 0,
54 EFA_ADMIN_QP_STATE_INIT = 1,
55 EFA_ADMIN_QP_STATE_RTR = 2,
56 EFA_ADMIN_QP_STATE_RTS = 3,
57 EFA_ADMIN_QP_STATE_SQD = 4,
58 EFA_ADMIN_QP_STATE_SQE = 5,
59 EFA_ADMIN_QP_STATE_ERR = 6,
62 enum efa_admin_get_stats_type {
63 EFA_ADMIN_GET_STATS_TYPE_BASIC = 0,
66 enum efa_admin_get_stats_scope {
67 EFA_ADMIN_GET_STATS_SCOPE_ALL = 0,
68 EFA_ADMIN_GET_STATS_SCOPE_QUEUE = 1,
71 enum efa_admin_modify_qp_mask_bits {
72 EFA_ADMIN_QP_STATE_BIT = 0,
73 EFA_ADMIN_CUR_QP_STATE_BIT = 1,
74 EFA_ADMIN_QKEY_BIT = 2,
75 EFA_ADMIN_SQ_PSN_BIT = 3,
76 EFA_ADMIN_SQ_DRAINED_ASYNC_NOTIFY_BIT = 4,
80 * QP allocation sizes, converted by fabric QueuePair (QP) create command
81 * from QP capabilities.
83 struct efa_admin_qp_alloc_size {
84 /* Send descriptor ring size in bytes */
85 u32 send_queue_ring_size;
87 /* Max number of WQEs that can be outstanding on send queue. */
91 * Recv descriptor ring size in bytes, sufficient for user-provided
94 u32 recv_queue_ring_size;
96 /* Max number of WQEs that can be outstanding on recv queue */
100 struct efa_admin_create_qp_cmd {
101 /* Common Admin Queue descriptor */
102 struct efa_admin_aq_common_desc aq_common_desc;
104 /* Protection Domain associated with this QP */
111 * 0 : sq_virt - If set, SQ ring base address is
112 * virtual (IOVA returned by MR registration)
113 * 1 : rq_virt - If set, RQ ring base address is
114 * virtual (IOVA returned by MR registration)
115 * 7:2 : reserved - MBZ
120 * Send queue (SQ) ring base physical address. This field is not
121 * used if this is a Low Latency Queue(LLQ).
125 /* Receive queue (RQ) ring base address. */
128 /* Index of CQ to be associated with Send Queue completions */
131 /* Index of CQ to be associated with Recv Queue completions */
135 * Memory registration key for the SQ ring, used only when not in
136 * LLQ mode and base address is virtual
141 * Memory registration key for the RQ ring, used only when base
146 /* Requested QP allocation sizes */
147 struct efa_admin_qp_alloc_size qp_alloc_size;
159 struct efa_admin_create_qp_resp {
160 /* Common Admin Queue completion descriptor */
161 struct efa_admin_acq_common_desc acq_common_desc;
163 /* Opaque handle to be used for consequent operations on the QP */
166 /* QP number in the given EFA virtual device */
172 /* Index of sub-CQ for Send Queue completions */
175 /* Index of sub-CQ for Receive Queue completions */
178 /* SQ doorbell address, as offset to PCIe DB BAR */
181 /* RQ doorbell address, as offset to PCIe DB BAR */
185 * low latency send queue ring base address as an offset to PCIe
188 u32 llq_descriptors_offset;
191 struct efa_admin_modify_qp_cmd {
192 /* Common Admin Queue descriptor */
193 struct efa_admin_aq_common_desc aq_common_desc;
196 * Mask indicating which fields should be updated see enum
197 * efa_admin_modify_qp_mask_bits
201 /* QP handle returned by create_qp command */
207 /* Override current QP state (before applying the transition) */
216 /* Enable async notification when SQ is drained */
217 u8 sq_drained_async_notify;
226 struct efa_admin_modify_qp_resp {
227 /* Common Admin Queue completion descriptor */
228 struct efa_admin_acq_common_desc acq_common_desc;
231 struct efa_admin_query_qp_cmd {
232 /* Common Admin Queue descriptor */
233 struct efa_admin_aq_common_desc aq_common_desc;
235 /* QP handle returned by create_qp command */
239 struct efa_admin_query_qp_resp {
240 /* Common Admin Queue completion descriptor */
241 struct efa_admin_acq_common_desc acq_common_desc;
252 /* Indicates that draining is in progress */
262 struct efa_admin_destroy_qp_cmd {
263 /* Common Admin Queue descriptor */
264 struct efa_admin_aq_common_desc aq_common_desc;
266 /* QP handle returned by create_qp command */
270 struct efa_admin_destroy_qp_resp {
271 /* Common Admin Queue completion descriptor */
272 struct efa_admin_acq_common_desc acq_common_desc;
276 * Create Address Handle command parameters. Must not be called more than
277 * once for the same destination
279 struct efa_admin_create_ah_cmd {
280 /* Common Admin Queue descriptor */
281 struct efa_admin_aq_common_desc aq_common_desc;
283 /* Destination address in network byte order */
292 struct efa_admin_create_ah_resp {
293 /* Common Admin Queue completion descriptor */
294 struct efa_admin_acq_common_desc acq_common_desc;
296 /* Target interface address handle (opaque) */
302 struct efa_admin_destroy_ah_cmd {
303 /* Common Admin Queue descriptor */
304 struct efa_admin_aq_common_desc aq_common_desc;
306 /* Target interface address handle (opaque) */
313 struct efa_admin_destroy_ah_resp {
314 /* Common Admin Queue completion descriptor */
315 struct efa_admin_acq_common_desc acq_common_desc;
319 * Registration of MemoryRegion, required for QP working with Virtual
320 * Addresses. In standard verbs semantics, region length is limited to 2GB
321 * space, but EFA offers larger MR support for large memory space, to ease
322 * on users working with very large datasets (i.e. full GPU memory mapping).
324 struct efa_admin_reg_mr_cmd {
325 /* Common Admin Queue descriptor */
326 struct efa_admin_aq_common_desc aq_common_desc;
328 /* Protection Domain */
334 /* Physical Buffer List, each element is page-aligned. */
337 * Inline array of guest-physical page addresses of user
338 * memory pages (optimization for short region
341 u64 inline_pbl_array[4];
343 /* points to PBL (direct or indirect, chained if needed) */
344 struct efa_admin_ctrl_buff_info pbl;
347 /* Memory region length, in bytes. */
351 * flags and page size
352 * 4:0 : phys_page_size_shift - page size is (1 <<
353 * phys_page_size_shift). Page size is used for
354 * building the Virtual to Physical address mapping
355 * 6:5 : reserved - MBZ
356 * 7 : mem_addr_phy_mode_en - Enable bit for physical
357 * memory registration (no translation), can be used
358 * only by privileged clients. If set, PBL must
359 * contain a single entry.
365 * 0 : local_write_enable - Write permissions: value
366 * of 1 needed for RQ buffers and for RDMA write
367 * 7:1 : reserved1 - remote access flags, etc
373 /* number of pages in PBL (redundant, could be calculated) */
377 * IO Virtual Address associated with this MR. If
378 * mem_addr_phy_mode_en is set, contains the physical address of
384 struct efa_admin_reg_mr_resp {
385 /* Common Admin Queue completion descriptor */
386 struct efa_admin_acq_common_desc acq_common_desc;
389 * L_Key, to be used in conjunction with local buffer references in
390 * SQ and RQ WQE, or with virtual RQ/CQ rings
395 * R_Key, to be used in RDMA messages to refer to remotely accessed
401 struct efa_admin_dereg_mr_cmd {
402 /* Common Admin Queue descriptor */
403 struct efa_admin_aq_common_desc aq_common_desc;
405 /* L_Key, memory region's l_key */
409 struct efa_admin_dereg_mr_resp {
410 /* Common Admin Queue completion descriptor */
411 struct efa_admin_acq_common_desc acq_common_desc;
414 struct efa_admin_create_cq_cmd {
415 struct efa_admin_aq_common_desc aq_common_desc;
419 * 5 : interrupt_mode_enabled - if set, cq operates
420 * in interrupt mode (i.e. CQ events and MSI-X are
421 * generated), otherwise - polling
422 * 6 : virt - If set, ring base address is virtual
423 * (IOVA returned by MR registration)
429 * 4:0 : cq_entry_size_words - size of CQ entry in
430 * 32-bit words, valid values: 4, 8.
435 /* completion queue depth in # of entries. must be power of 2 */
438 /* msix vector assigned to this cq */
442 * CQ ring base address, virtual or physical depending on 'virt'
445 struct efa_common_mem_addr cq_ba;
448 * Memory registration key for the ring, used only when base
454 * number of sub cqs - must be equal to sub_cqs_per_cq of queue
463 struct efa_admin_create_cq_resp {
464 struct efa_admin_acq_common_desc acq_common_desc;
468 /* actual cq depth in number of entries */
472 struct efa_admin_destroy_cq_cmd {
473 struct efa_admin_aq_common_desc aq_common_desc;
480 struct efa_admin_destroy_cq_resp {
481 struct efa_admin_acq_common_desc acq_common_desc;
485 * EFA AQ Get Statistics command. Extended statistics are placed in control
486 * buffer pointed by AQ entry
488 struct efa_admin_aq_get_stats_cmd {
489 struct efa_admin_aq_common_desc aq_common_descriptor;
492 /* command specific inline data */
493 u32 inline_data_w1[3];
495 struct efa_admin_ctrl_buff_info control_buffer;
498 /* stats type as defined in enum efa_admin_get_stats_type */
501 /* stats scope defined in enum efa_admin_get_stats_scope */
507 struct efa_admin_basic_stats {
519 struct efa_admin_acq_get_stats_resp {
520 struct efa_admin_acq_common_desc acq_common_desc;
522 struct efa_admin_basic_stats basic_stats;
525 struct efa_admin_get_set_feature_common_desc {
527 * 1:0 : select - 0x1 - current value; 0x3 - default
533 /* as appears in efa_admin_aq_feature_id */
540 struct efa_admin_feature_device_attr_desc {
541 /* Bitmap of efa_admin_aq_feature_id */
542 u64 supported_features;
544 /* Bitmap of supported page sizes in MR registrations */
549 u32 admin_api_version;
553 /* Bar used for SQ and RQ doorbells */
556 /* Indicates how many bits are used physical address access */
559 /* Indicates how many bits are used virtual address access */
563 struct efa_admin_feature_queue_attr_desc {
564 /* The maximum number of queue pairs supported */
569 /* max send wr used in inline-buf */
574 /* The maximum number of completion queues supported per VF */
579 /* Number of sub-CQs to be created for each CQ */
585 * Maximum number of SGEs (buffs) allowed for a single send work
586 * queue element (WQE)
588 u16 max_wr_send_sges;
590 /* Maximum number of SGEs allowed for a single recv WQE */
591 u16 max_wr_recv_sges;
593 /* The maximum number of memory regions supported */
596 /* The maximum number of pages can be registered */
599 /* The maximum number of protection domains supported */
602 /* The maximum number of address handles supported */
605 /* The maximum size of LLQ in bytes */
609 struct efa_admin_feature_aenq_desc {
610 /* bitmask for AENQ groups the device can report */
611 u32 supported_groups;
613 /* bitmask for AENQ groups to report */
617 struct efa_admin_feature_network_attr_desc {
618 /* Raw address data in network byte order */
625 * When hint value is 0, hints capabilities are not supported or driver
626 * should use its own predefined value
628 struct efa_admin_hw_hints {
630 u16 mmio_read_timeout;
633 u16 driver_watchdog_timeout;
636 u16 admin_completion_timeout;
638 /* poll interval in ms */
642 struct efa_admin_get_feature_cmd {
643 struct efa_admin_aq_common_desc aq_common_descriptor;
645 struct efa_admin_ctrl_buff_info control_buffer;
647 struct efa_admin_get_set_feature_common_desc feature_common;
652 struct efa_admin_get_feature_resp {
653 struct efa_admin_acq_common_desc acq_common_desc;
658 struct efa_admin_feature_device_attr_desc device_attr;
660 struct efa_admin_feature_aenq_desc aenq;
662 struct efa_admin_feature_network_attr_desc network_attr;
664 struct efa_admin_feature_queue_attr_desc queue_attr;
666 struct efa_admin_hw_hints hw_hints;
670 struct efa_admin_set_feature_cmd {
671 struct efa_admin_aq_common_desc aq_common_descriptor;
673 struct efa_admin_ctrl_buff_info control_buffer;
675 struct efa_admin_get_set_feature_common_desc feature_common;
680 /* AENQ configuration */
681 struct efa_admin_feature_aenq_desc aenq;
685 struct efa_admin_set_feature_resp {
686 struct efa_admin_acq_common_desc acq_common_desc;
693 struct efa_admin_alloc_pd_cmd {
694 struct efa_admin_aq_common_desc aq_common_descriptor;
697 struct efa_admin_alloc_pd_resp {
698 struct efa_admin_acq_common_desc acq_common_desc;
707 struct efa_admin_dealloc_pd_cmd {
708 struct efa_admin_aq_common_desc aq_common_descriptor;
717 struct efa_admin_dealloc_pd_resp {
718 struct efa_admin_acq_common_desc acq_common_desc;
721 struct efa_admin_alloc_uar_cmd {
722 struct efa_admin_aq_common_desc aq_common_descriptor;
725 struct efa_admin_alloc_uar_resp {
726 struct efa_admin_acq_common_desc acq_common_desc;
735 struct efa_admin_dealloc_uar_cmd {
736 struct efa_admin_aq_common_desc aq_common_descriptor;
745 struct efa_admin_dealloc_uar_resp {
746 struct efa_admin_acq_common_desc acq_common_desc;
749 /* asynchronous event notification groups */
750 enum efa_admin_aenq_group {
751 EFA_ADMIN_FATAL_ERROR = 1,
752 EFA_ADMIN_WARNING = 2,
753 EFA_ADMIN_NOTIFICATION = 3,
754 EFA_ADMIN_KEEP_ALIVE = 4,
755 EFA_ADMIN_AENQ_GROUPS_NUM = 5,
758 enum efa_admin_aenq_notification_syndrom {
759 EFA_ADMIN_SUSPEND = 0,
760 EFA_ADMIN_RESUME = 1,
761 EFA_ADMIN_UPDATE_HINTS = 2,
764 struct efa_admin_mmio_req_read_less_resp {
769 /* value is valid when poll is cleared */
774 #define EFA_ADMIN_CREATE_QP_CMD_SQ_VIRT_MASK BIT(0)
775 #define EFA_ADMIN_CREATE_QP_CMD_RQ_VIRT_SHIFT 1
776 #define EFA_ADMIN_CREATE_QP_CMD_RQ_VIRT_MASK BIT(1)
779 #define EFA_ADMIN_REG_MR_CMD_PHYS_PAGE_SIZE_SHIFT_MASK GENMASK(4, 0)
780 #define EFA_ADMIN_REG_MR_CMD_MEM_ADDR_PHY_MODE_EN_SHIFT 7
781 #define EFA_ADMIN_REG_MR_CMD_MEM_ADDR_PHY_MODE_EN_MASK BIT(7)
782 #define EFA_ADMIN_REG_MR_CMD_LOCAL_WRITE_ENABLE_MASK BIT(0)
785 #define EFA_ADMIN_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_SHIFT 5
786 #define EFA_ADMIN_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK BIT(5)
787 #define EFA_ADMIN_CREATE_CQ_CMD_VIRT_SHIFT 6
788 #define EFA_ADMIN_CREATE_CQ_CMD_VIRT_MASK BIT(6)
789 #define EFA_ADMIN_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK GENMASK(4, 0)
791 /* get_set_feature_common_desc */
792 #define EFA_ADMIN_GET_SET_FEATURE_COMMON_DESC_SELECT_MASK GENMASK(1, 0)
794 #endif /* _EFA_ADMIN_CMDS_H_ */