2 * Broadcom NetXtreme-E RoCE driver.
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * Description: Main component of the bnxt_re driver
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/ethtool.h>
42 #include <linux/mutex.h>
43 #include <linux/list.h>
44 #include <linux/rculist.h>
45 #include <linux/spinlock.h>
46 #include <linux/pci.h>
47 #include <net/dcbnl.h>
49 #include <net/addrconf.h>
50 #include <linux/if_ether.h>
52 #include <rdma/ib_verbs.h>
53 #include <rdma/ib_user_verbs.h>
54 #include <rdma/ib_umem.h>
55 #include <rdma/ib_addr.h>
59 #include "qplib_res.h"
62 #include "qplib_rcfw.h"
65 #include <rdma/bnxt_re-abi.h>
67 #include "hw_counters.h"
69 static char version[] =
72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
74 MODULE_LICENSE("Dual BSD/GPL");
77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
78 /* Mutex to protect the list of bnxt_re devices added */
79 static DEFINE_MUTEX(bnxt_re_dev_lock);
80 static struct workqueue_struct *bnxt_re_wq;
81 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev);
82 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev);
83 static void bnxt_re_stop_irq(void *handle);
84 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev);
86 static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode)
88 struct bnxt_qplib_chip_ctx *cctx;
90 cctx = rdev->chip_ctx;
91 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
92 mode : BNXT_QPLIB_WQE_MODE_STATIC;
95 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
97 struct bnxt_qplib_chip_ctx *chip_ctx;
101 chip_ctx = rdev->chip_ctx;
102 rdev->chip_ctx = NULL;
103 rdev->rcfw.res = NULL;
104 rdev->qplib_res.cctx = NULL;
105 rdev->qplib_res.pdev = NULL;
106 rdev->qplib_res.netdev = NULL;
110 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode)
112 struct bnxt_qplib_chip_ctx *chip_ctx;
113 struct bnxt_en_dev *en_dev;
116 en_dev = rdev->en_dev;
117 bp = netdev_priv(en_dev->net);
119 chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL);
122 chip_ctx->chip_num = bp->chip_num;
123 chip_ctx->hw_stats_size = bp->hw_ring_stats_size;
125 rdev->chip_ctx = chip_ctx;
126 /* rest members to follow eventually */
128 rdev->qplib_res.cctx = rdev->chip_ctx;
129 rdev->rcfw.res = &rdev->qplib_res;
131 bnxt_re_set_drv_mode(rdev, wqe_mode);
132 if (bnxt_qplib_determine_atomics(en_dev->pdev))
133 ibdev_info(&rdev->ibdev,
134 "platform doesn't support global atomics.");
138 /* SR-IOV helper functions */
140 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
144 bp = netdev_priv(rdev->en_dev->net);
149 /* Set the maximum number of each resource that the driver actually wants
150 * to allocate. This may be up to the maximum number the firmware has
151 * reserved for the function. The driver may choose to allocate fewer
152 * resources than the firmware maximum.
154 static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev)
156 struct bnxt_qplib_dev_attr *attr;
157 struct bnxt_qplib_ctx *ctx;
160 attr = &rdev->dev_attr;
161 ctx = &rdev->qplib_ctx;
163 ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
165 ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
166 /* Use max_mr from fw since max_mrw does not get set */
167 ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr);
168 ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
170 ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq);
171 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
172 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
173 rdev->qplib_ctx.tqm_ctx.qcount[i] =
174 rdev->dev_attr.tqm_alloc_reqs[i];
177 static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf)
179 struct bnxt_qplib_vf_res *vf_res;
184 vf_res = &qplib_ctx->vf_res;
186 * Reserve a set of resources for the PF. Divide the remaining
187 * resources among the VFs
189 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
191 num_vf = 100 * num_vf;
192 vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf;
193 vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf;
194 vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf;
196 * The driver allows many more MRs than other resources. If the
197 * firmware does also, then reserve a fixed amount for the PF and
198 * divide the rest among VFs. VFs may use many MRs for NFS
199 * mounts, ISER, NVME applications, etc. If the firmware severely
200 * restricts the number of MRs, then let PF have half and divide
201 * the rest among VFs, as for the other resource types.
203 if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) {
204 mrws = qplib_ctx->mrw_count * vf_pct;
207 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF;
209 vf_res->max_mrw_per_vf = (mrws / nvfs);
210 vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF;
213 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
217 memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res));
218 bnxt_re_limit_pf_res(rdev);
220 num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
221 BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs;
223 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs);
226 /* for handling bnxt_en callbacks later */
227 static void bnxt_re_stop(void *p)
229 struct bnxt_re_dev *rdev = p;
236 /* L2 driver invokes this callback during device error/crash or device
237 * reset. Current RoCE driver doesn't recover the device in case of
238 * error. Handle the error by dispatching fatal events to all qps
239 * ie. by calling bnxt_re_dev_stop and release the MSIx vectors as
240 * L2 driver want to modify the MSIx table.
242 bp = netdev_priv(rdev->netdev);
244 ibdev_info(&rdev->ibdev, "Handle device stop call from L2 driver");
245 /* Check the current device state from L2 structure and move the
246 * device to detached state if FW_FATAL_COND is set.
247 * This prevents more commands to HW during clean-up,
248 * in case the device is already in error.
250 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))
251 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
253 bnxt_re_dev_stop(rdev);
254 bnxt_re_stop_irq(rdev);
255 /* Move the device states to detached and avoid sending any more
258 set_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags);
259 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
262 static void bnxt_re_start(void *p)
266 static void bnxt_re_sriov_config(void *p, int num_vfs)
268 struct bnxt_re_dev *rdev = p;
273 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
275 rdev->num_vfs = num_vfs;
276 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {
277 bnxt_re_set_resource_limits(rdev);
278 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
283 static void bnxt_re_shutdown(void *p)
285 struct bnxt_re_dev *rdev = p;
290 /* Release the MSIx vectors before queuing unregister */
291 bnxt_re_stop_irq(rdev);
292 ib_unregister_device_queued(&rdev->ibdev);
295 static void bnxt_re_stop_irq(void *handle)
297 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
298 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
299 struct bnxt_qplib_nq *nq;
302 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
303 nq = &rdev->nq[indx - 1];
304 bnxt_qplib_nq_stop_irq(nq, false);
307 bnxt_qplib_rcfw_stop_irq(rcfw, false);
310 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
312 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
313 struct bnxt_msix_entry *msix_ent = rdev->msix_entries;
314 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
315 struct bnxt_qplib_nq *nq;
319 /* Not setting the f/w timeout bit in rcfw.
320 * During the driver unload the first command
321 * to f/w will timeout and that will set the
324 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n");
328 /* Vectors may change after restart, so update with new vectors
329 * in device sctructure.
331 for (indx = 0; indx < rdev->num_msix; indx++)
332 rdev->msix_entries[indx].vector = ent[indx].vector;
334 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
336 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
337 nq = &rdev->nq[indx - 1];
338 rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
339 msix_ent[indx].vector, false);
341 ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n",
346 static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
347 .ulp_async_notifier = NULL,
348 .ulp_stop = bnxt_re_stop,
349 .ulp_start = bnxt_re_start,
350 .ulp_sriov_config = bnxt_re_sriov_config,
351 .ulp_shutdown = bnxt_re_shutdown,
352 .ulp_irq_stop = bnxt_re_stop_irq,
353 .ulp_irq_restart = bnxt_re_start_irq
356 /* RoCE -> Net driver */
358 /* Driver registration routines used to let the networking driver (bnxt_en)
359 * to know that the RoCE driver is now installed
361 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev)
363 struct bnxt_en_dev *en_dev;
369 en_dev = rdev->en_dev;
371 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
376 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
378 struct bnxt_en_dev *en_dev;
384 en_dev = rdev->en_dev;
386 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
387 &bnxt_re_ulp_ops, rdev);
388 rdev->qplib_res.pdev = rdev->en_dev->pdev;
392 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev)
394 struct bnxt_en_dev *en_dev;
400 en_dev = rdev->en_dev;
403 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
408 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
410 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
411 struct bnxt_en_dev *en_dev;
416 en_dev = rdev->en_dev;
418 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
420 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
423 if (num_msix_got < BNXT_RE_MIN_MSIX) {
427 if (num_msix_got != num_msix_want) {
428 ibdev_warn(&rdev->ibdev,
429 "Requested %d MSI-X vectors, got %d\n",
430 num_msix_want, num_msix_got);
432 rdev->num_msix = num_msix_got;
437 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
438 u16 opcd, u16 crid, u16 trid)
440 hdr->req_type = cpu_to_le16(opcd);
441 hdr->cmpl_ring = cpu_to_le16(crid);
442 hdr->target_id = cpu_to_le16(trid);
445 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
446 int msg_len, void *resp, int resp_max_len,
450 fw_msg->msg_len = msg_len;
452 fw_msg->resp_max_len = resp_max_len;
453 fw_msg->timeout = timeout;
456 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev,
457 u16 fw_ring_id, int type)
459 struct bnxt_en_dev *en_dev = rdev->en_dev;
460 struct hwrm_ring_free_input req = {0};
461 struct hwrm_ring_free_output resp;
462 struct bnxt_fw_msg fw_msg;
468 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
471 memset(&fw_msg, 0, sizeof(fw_msg));
473 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
474 req.ring_type = type;
475 req.ring_id = cpu_to_le16(fw_ring_id);
476 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
477 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
478 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
480 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x",
485 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev,
486 struct bnxt_re_ring_attr *ring_attr,
489 struct bnxt_en_dev *en_dev = rdev->en_dev;
490 struct hwrm_ring_alloc_input req = {0};
491 struct hwrm_ring_alloc_output resp;
492 struct bnxt_fw_msg fw_msg;
498 memset(&fw_msg, 0, sizeof(fw_msg));
499 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
501 req.page_tbl_addr = cpu_to_le64(ring_attr->dma_arr[0]);
502 if (ring_attr->pages > 1) {
503 /* Page size is in log2 units */
504 req.page_size = BNXT_PAGE_SHIFT;
505 req.page_tbl_depth = 1;
508 /* Association of ring index with doorbell index and MSIX number */
509 req.logical_id = cpu_to_le16(ring_attr->lrid);
510 req.length = cpu_to_le32(ring_attr->depth + 1);
511 req.ring_type = ring_attr->type;
512 req.int_mode = ring_attr->mode;
513 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
514 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
515 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
517 *fw_ring_id = le16_to_cpu(resp.ring_id);
522 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
525 struct bnxt_en_dev *en_dev = rdev->en_dev;
526 struct hwrm_stat_ctx_free_input req = {0};
527 struct bnxt_fw_msg fw_msg;
533 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
536 memset(&fw_msg, 0, sizeof(fw_msg));
538 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
539 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
540 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
541 sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
542 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
544 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x",
550 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
552 u32 *fw_stats_ctx_id)
554 struct bnxt_qplib_chip_ctx *chip_ctx = rdev->chip_ctx;
555 struct hwrm_stat_ctx_alloc_output resp = {0};
556 struct hwrm_stat_ctx_alloc_input req = {0};
557 struct bnxt_en_dev *en_dev = rdev->en_dev;
558 struct bnxt_fw_msg fw_msg;
561 *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
566 memset(&fw_msg, 0, sizeof(fw_msg));
568 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
569 req.update_period_ms = cpu_to_le32(1000);
570 req.stats_dma_addr = cpu_to_le64(dma_map);
571 req.stats_dma_length = cpu_to_le16(chip_ctx->hw_stats_size);
572 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
573 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
574 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
575 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
577 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
584 static bool is_bnxt_re_dev(struct net_device *netdev)
586 struct ethtool_drvinfo drvinfo;
588 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
589 memset(&drvinfo, 0, sizeof(drvinfo));
590 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
592 if (strcmp(drvinfo.driver, "bnxt_en"))
599 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
601 struct ib_device *ibdev =
602 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE);
606 return container_of(ibdev, struct bnxt_re_dev, ibdev);
609 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
611 struct bnxt_en_dev *en_dev;
612 struct pci_dev *pdev;
614 en_dev = bnxt_ulp_probe(netdev);
620 return ERR_PTR(-EINVAL);
622 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
624 "%s: probe error: RoCE is not supported on this device",
625 ROCE_DRV_MODULE_NAME);
626 return ERR_PTR(-ENODEV);
634 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
637 struct bnxt_re_dev *rdev =
638 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
640 return sysfs_emit(buf, "0x%x\n", rdev->en_dev->pdev->vendor);
642 static DEVICE_ATTR_RO(hw_rev);
644 static ssize_t hca_type_show(struct device *device,
645 struct device_attribute *attr, char *buf)
647 struct bnxt_re_dev *rdev =
648 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
650 return sysfs_emit(buf, "%s\n", rdev->ibdev.node_desc);
652 static DEVICE_ATTR_RO(hca_type);
654 static struct attribute *bnxt_re_attributes[] = {
655 &dev_attr_hw_rev.attr,
656 &dev_attr_hca_type.attr,
660 static const struct attribute_group bnxt_re_dev_attr_group = {
661 .attrs = bnxt_re_attributes,
664 static const struct ib_device_ops bnxt_re_dev_ops = {
665 .owner = THIS_MODULE,
666 .driver_id = RDMA_DRIVER_BNXT_RE,
667 .uverbs_abi_ver = BNXT_RE_ABI_VERSION,
669 .add_gid = bnxt_re_add_gid,
670 .alloc_hw_port_stats = bnxt_re_ib_alloc_hw_port_stats,
671 .alloc_mr = bnxt_re_alloc_mr,
672 .alloc_pd = bnxt_re_alloc_pd,
673 .alloc_ucontext = bnxt_re_alloc_ucontext,
674 .create_ah = bnxt_re_create_ah,
675 .create_cq = bnxt_re_create_cq,
676 .create_qp = bnxt_re_create_qp,
677 .create_srq = bnxt_re_create_srq,
678 .create_user_ah = bnxt_re_create_ah,
679 .dealloc_driver = bnxt_re_dealloc_driver,
680 .dealloc_pd = bnxt_re_dealloc_pd,
681 .dealloc_ucontext = bnxt_re_dealloc_ucontext,
682 .del_gid = bnxt_re_del_gid,
683 .dereg_mr = bnxt_re_dereg_mr,
684 .destroy_ah = bnxt_re_destroy_ah,
685 .destroy_cq = bnxt_re_destroy_cq,
686 .destroy_qp = bnxt_re_destroy_qp,
687 .destroy_srq = bnxt_re_destroy_srq,
688 .device_group = &bnxt_re_dev_attr_group,
689 .get_dev_fw_str = bnxt_re_query_fw_str,
690 .get_dma_mr = bnxt_re_get_dma_mr,
691 .get_hw_stats = bnxt_re_ib_get_hw_stats,
692 .get_link_layer = bnxt_re_get_link_layer,
693 .get_port_immutable = bnxt_re_get_port_immutable,
694 .map_mr_sg = bnxt_re_map_mr_sg,
695 .mmap = bnxt_re_mmap,
696 .modify_ah = bnxt_re_modify_ah,
697 .modify_qp = bnxt_re_modify_qp,
698 .modify_srq = bnxt_re_modify_srq,
699 .poll_cq = bnxt_re_poll_cq,
700 .post_recv = bnxt_re_post_recv,
701 .post_send = bnxt_re_post_send,
702 .post_srq_recv = bnxt_re_post_srq_recv,
703 .query_ah = bnxt_re_query_ah,
704 .query_device = bnxt_re_query_device,
705 .query_pkey = bnxt_re_query_pkey,
706 .query_port = bnxt_re_query_port,
707 .query_qp = bnxt_re_query_qp,
708 .query_srq = bnxt_re_query_srq,
709 .reg_user_mr = bnxt_re_reg_user_mr,
710 .req_notify_cq = bnxt_re_req_notify_cq,
711 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah),
712 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq),
713 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd),
714 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq),
715 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx),
718 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
720 struct ib_device *ibdev = &rdev->ibdev;
724 ibdev->node_type = RDMA_NODE_IB_CA;
725 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
726 strlen(BNXT_RE_DESC) + 5);
727 ibdev->phys_port_cnt = 1;
729 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
731 ibdev->num_comp_vectors = rdev->num_msix - 1;
732 ibdev->dev.parent = &rdev->en_dev->pdev->dev;
733 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
735 ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
736 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);
740 dma_set_max_seg_size(&rdev->en_dev->pdev->dev, UINT_MAX);
741 return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev);
744 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
746 dev_put(rdev->netdev);
748 mutex_lock(&bnxt_re_dev_lock);
749 list_del_rcu(&rdev->list);
750 mutex_unlock(&bnxt_re_dev_lock);
755 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
756 struct bnxt_en_dev *en_dev)
758 struct bnxt_re_dev *rdev;
760 /* Allocate bnxt_re_dev instance here */
761 rdev = ib_alloc_device(bnxt_re_dev, ibdev);
763 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!",
764 ROCE_DRV_MODULE_NAME);
768 rdev->netdev = netdev;
769 dev_hold(rdev->netdev);
770 rdev->en_dev = en_dev;
771 rdev->id = rdev->en_dev->pdev->devfn;
772 INIT_LIST_HEAD(&rdev->qp_list);
773 mutex_init(&rdev->qp_lock);
774 atomic_set(&rdev->qp_count, 0);
775 atomic_set(&rdev->cq_count, 0);
776 atomic_set(&rdev->srq_count, 0);
777 atomic_set(&rdev->mr_count, 0);
778 atomic_set(&rdev->mw_count, 0);
779 rdev->cosq[0] = 0xFFFF;
780 rdev->cosq[1] = 0xFFFF;
782 mutex_lock(&bnxt_re_dev_lock);
783 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
784 mutex_unlock(&bnxt_re_dev_lock);
788 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
791 switch (unaffi_async->event) {
792 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
794 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
796 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
798 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
800 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
802 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
804 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
806 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
808 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
810 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
812 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
820 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
821 struct bnxt_re_qp *qp)
823 struct ib_event event;
826 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR &&
827 rdma_is_kernel_res(&qp->ib_qp.res)) {
828 flags = bnxt_re_lock_cqs(qp);
829 bnxt_qplib_add_flush_qp(&qp->qplib_qp);
830 bnxt_re_unlock_cqs(qp, flags);
833 memset(&event, 0, sizeof(event));
834 if (qp->qplib_qp.srq) {
835 event.device = &qp->rdev->ibdev;
836 event.element.qp = &qp->ib_qp;
837 event.event = IB_EVENT_QP_LAST_WQE_REACHED;
840 if (event.device && qp->ib_qp.event_handler)
841 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
846 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
853 return rc; /* QP was already dead, still return success */
855 event = affi_async->event;
856 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
857 struct bnxt_qplib_qp *lib_qp = obj;
858 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
860 rc = bnxt_re_handle_qp_async_event(affi_async, qp);
865 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
866 void *aeqe, void *obj)
868 struct creq_qp_event *affi_async;
869 struct creq_func_event *unaffi_async;
873 type = ((struct creq_base *)aeqe)->type;
874 if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
876 rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
879 rc = bnxt_re_handle_affi_async_event(affi_async, obj);
885 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
886 struct bnxt_qplib_srq *handle, u8 event)
888 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
890 struct ib_event ib_event;
893 ib_event.device = &srq->rdev->ibdev;
894 ib_event.element.srq = &srq->ib_srq;
895 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
896 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
898 ib_event.event = IB_EVENT_SRQ_ERR;
900 if (srq->ib_srq.event_handler) {
901 /* Lock event_handler? */
902 (*srq->ib_srq.event_handler)(&ib_event,
903 srq->ib_srq.srq_context);
908 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
909 struct bnxt_qplib_cq *handle)
911 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
914 if (cq->ib_cq.comp_handler) {
915 /* Lock comp_handler? */
916 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
922 #define BNXT_RE_GEN_P5_PF_NQ_DB 0x10000
923 #define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000
924 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
926 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
927 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB :
928 BNXT_RE_GEN_P5_PF_NQ_DB) :
929 rdev->msix_entries[indx].db_offset;
932 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
936 for (i = 1; i < rdev->num_msix; i++)
937 bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
939 if (rdev->qplib_res.rcfw)
940 bnxt_qplib_cleanup_res(&rdev->qplib_res);
943 static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
945 int num_vec_enabled = 0;
949 bnxt_qplib_init_res(&rdev->qplib_res);
951 for (i = 1; i < rdev->num_msix ; i++) {
952 db_offt = bnxt_re_get_nqdb_offset(rdev, i);
953 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
954 i - 1, rdev->msix_entries[i].vector,
955 db_offt, &bnxt_re_cqn_handler,
956 &bnxt_re_srqn_handler);
958 ibdev_err(&rdev->ibdev,
959 "Failed to enable NQ with rc = 0x%x", rc);
966 for (i = num_vec_enabled; i >= 0; i--)
967 bnxt_qplib_disable_nq(&rdev->nq[i]);
971 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
976 for (i = 0; i < rdev->num_msix - 1; i++) {
977 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
978 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
979 bnxt_qplib_free_nq(&rdev->nq[i]);
980 rdev->nq[i].res = NULL;
984 static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
986 bnxt_re_free_nq_res(rdev);
988 if (rdev->qplib_res.dpi_tbl.max) {
989 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
990 &rdev->qplib_res.dpi_tbl,
991 &rdev->dpi_privileged);
993 if (rdev->qplib_res.rcfw) {
994 bnxt_qplib_free_res(&rdev->qplib_res);
995 rdev->qplib_res.rcfw = NULL;
999 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
1001 struct bnxt_re_ring_attr rattr = {};
1002 int num_vec_created = 0;
1006 /* Configure and allocate resources for qplib */
1007 rdev->qplib_res.rcfw = &rdev->rcfw;
1008 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1013 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
1014 rdev->netdev, &rdev->dev_attr);
1018 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
1019 &rdev->dpi_privileged,
1024 for (i = 0; i < rdev->num_msix - 1; i++) {
1025 struct bnxt_qplib_nq *nq;
1028 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
1029 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]);
1031 ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x",
1035 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1036 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1037 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count;
1039 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1040 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1;
1041 rattr.lrid = rdev->msix_entries[i + 1].ring_idx;
1042 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id);
1044 ibdev_err(&rdev->ibdev,
1045 "Failed to allocate NQ fw id with rc = 0x%x",
1047 bnxt_qplib_free_nq(&rdev->nq[i]);
1054 for (i = num_vec_created - 1; i >= 0; i--) {
1055 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1056 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
1057 bnxt_qplib_free_nq(&rdev->nq[i]);
1059 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
1060 &rdev->qplib_res.dpi_tbl,
1061 &rdev->dpi_privileged);
1063 bnxt_qplib_free_res(&rdev->qplib_res);
1066 rdev->qplib_res.rcfw = NULL;
1070 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
1071 u8 port_num, enum ib_event_type event)
1073 struct ib_event ib_event;
1075 ib_event.device = ibdev;
1077 ib_event.element.qp = qp;
1078 ib_event.event = event;
1079 if (qp->event_handler)
1080 qp->event_handler(&ib_event, qp->qp_context);
1083 ib_event.element.port_num = port_num;
1084 ib_event.event = event;
1085 ib_dispatch_event(&ib_event);
1089 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
1090 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
1093 struct hwrm_queue_pri2cos_qcfg_input req = {0};
1094 struct bnxt *bp = netdev_priv(rdev->netdev);
1095 struct hwrm_queue_pri2cos_qcfg_output resp;
1096 struct bnxt_en_dev *en_dev = rdev->en_dev;
1097 struct bnxt_fw_msg fw_msg;
1099 u8 *qcfgmap, *tmp_map;
1105 memset(&fw_msg, 0, sizeof(fw_msg));
1106 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1107 HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
1108 flags |= (dir & 0x01);
1109 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
1110 req.flags = cpu_to_le32(flags);
1111 req.port_id = bp->pf.port_id;
1113 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1114 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1115 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1119 if (resp.queue_cfg_info) {
1120 ibdev_warn(&rdev->ibdev,
1121 "Asymmetric cos queue configuration detected");
1122 ibdev_warn(&rdev->ibdev,
1123 " on device, QoS may not be fully functional\n");
1125 qcfgmap = &resp.pri0_cos_queue_id;
1126 tmp_map = (u8 *)cid_map;
1127 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1128 tmp_map[i] = qcfgmap[i];
1133 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
1134 struct bnxt_re_qp *qp)
1136 return (qp->ib_qp.qp_type == IB_QPT_GSI) ||
1137 (qp == rdev->gsi_ctx.gsi_sqp);
1140 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
1142 int mask = IB_QP_STATE;
1143 struct ib_qp_attr qp_attr;
1144 struct bnxt_re_qp *qp;
1146 qp_attr.qp_state = IB_QPS_ERR;
1147 mutex_lock(&rdev->qp_lock);
1148 list_for_each_entry(qp, &rdev->qp_list, list) {
1149 /* Modify the state of all QPs except QP1/Shadow QP */
1150 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
1151 if (qp->qplib_qp.state !=
1152 CMDQ_MODIFY_QP_NEW_STATE_RESET &&
1153 qp->qplib_qp.state !=
1154 CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1155 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
1156 1, IB_EVENT_QP_FATAL);
1157 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
1162 mutex_unlock(&rdev->qp_lock);
1165 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
1167 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
1168 struct bnxt_qplib_gid gid;
1172 if (!ib_device_try_get(&rdev->ibdev))
1176 ibdev_err(&rdev->ibdev, "QPLIB: SGID table not allocated");
1181 for (index = 0; index < sgid_tbl->active; index++) {
1182 gid_idx = sgid_tbl->hw_id[index];
1184 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
1185 sizeof(bnxt_qplib_gid_zero)))
1187 /* need to modify the VLAN enable setting of non VLAN GID only
1188 * as setting is done for VLAN GID while adding GID
1190 if (sgid_tbl->vlan[index])
1193 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
1195 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
1196 rdev->qplib_res.netdev->dev_addr);
1199 ib_device_put(&rdev->ibdev);
1203 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
1205 u32 prio_map = 0, tmp_map = 0;
1206 struct net_device *netdev;
1209 netdev = rdev->netdev;
1211 memset(&app, 0, sizeof(app));
1212 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
1213 app.protocol = ETH_P_IBOE;
1214 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1217 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
1218 app.protocol = ROCE_V2_UDP_DPORT;
1219 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1220 prio_map |= tmp_map;
1225 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
1230 for (prio = 0, id = 0; prio < 8; prio++) {
1231 if (prio_map & (1 << prio)) {
1232 cosq[id] = cid_map[prio];
1234 if (id == 2) /* Max 2 tcs supported */
1240 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
1246 /* Get priority for roce */
1247 prio_map = bnxt_re_get_priority_mask(rdev);
1249 if (prio_map == rdev->cur_prio_map)
1251 rdev->cur_prio_map = prio_map;
1252 /* Get cosq id for this priority */
1253 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
1255 ibdev_warn(&rdev->ibdev, "no cos for p_mask %x\n", prio_map);
1258 /* Parse CoS IDs for app priority */
1259 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
1262 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
1264 ibdev_warn(&rdev->ibdev, "no tc for cos{%x, %x}\n",
1265 rdev->cosq[0], rdev->cosq[1]);
1269 /* Actual priorities are not programmed as they are already
1270 * done by L2 driver; just enable or disable priority vlan tagging
1272 if ((prio_map == 0 && rdev->qplib_res.prio) ||
1273 (prio_map != 0 && !rdev->qplib_res.prio)) {
1274 rdev->qplib_res.prio = prio_map ? true : false;
1276 bnxt_re_update_gid(rdev);
1282 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev)
1284 struct bnxt_en_dev *en_dev = rdev->en_dev;
1285 struct hwrm_ver_get_output resp = {0};
1286 struct hwrm_ver_get_input req = {0};
1287 struct bnxt_fw_msg fw_msg;
1290 memset(&fw_msg, 0, sizeof(fw_msg));
1291 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1292 HWRM_VER_GET, -1, -1);
1293 req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
1294 req.hwrm_intf_min = HWRM_VERSION_MINOR;
1295 req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
1296 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1297 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1298 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1300 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x",
1304 rdev->qplib_ctx.hwrm_intf_ver =
1305 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 |
1306 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 |
1307 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 |
1308 le16_to_cpu(resp.hwrm_intf_patch);
1311 static int bnxt_re_ib_init(struct bnxt_re_dev *rdev)
1316 /* Register ib dev */
1317 rc = bnxt_re_register_ib(rdev);
1319 pr_err("Failed to register with IB: %#x\n", rc);
1322 dev_info(rdev_to_dev(rdev), "Device registered successfully");
1323 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1324 &rdev->active_width);
1325 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
1327 event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ?
1328 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
1330 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event);
1335 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev)
1340 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
1341 cancel_delayed_work_sync(&rdev->worker);
1343 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
1345 bnxt_re_cleanup_res(rdev);
1346 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
1347 bnxt_re_free_res(rdev);
1349 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
1350 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
1352 ibdev_warn(&rdev->ibdev,
1353 "Failed to deinitialize RCFW: %#x", rc);
1354 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1355 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1356 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1357 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1358 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1359 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1361 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
1362 rc = bnxt_re_free_msix(rdev);
1364 ibdev_warn(&rdev->ibdev,
1365 "Failed to free MSI-X vectors: %#x", rc);
1368 bnxt_re_destroy_chip_ctx(rdev);
1369 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
1370 rc = bnxt_re_unregister_netdev(rdev);
1372 ibdev_warn(&rdev->ibdev,
1373 "Failed to unregister with netdev: %#x", rc);
1377 /* worker thread for polling periodic events. Now used for QoS programming*/
1378 static void bnxt_re_worker(struct work_struct *work)
1380 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
1383 bnxt_re_setup_qos(rdev);
1384 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1387 static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode)
1389 struct bnxt_qplib_creq_ctx *creq;
1390 struct bnxt_re_ring_attr rattr;
1396 /* Registered a new RoCE device instance to netdev */
1397 memset(&rattr, 0, sizeof(rattr));
1398 rc = bnxt_re_register_netdev(rdev);
1401 ibdev_err(&rdev->ibdev,
1402 "Failed to register with netedev: %#x\n", rc);
1405 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1407 rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode);
1409 ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
1413 /* Check whether VF or PF */
1414 bnxt_re_get_sriov_func_type(rdev);
1416 rc = bnxt_re_request_msix(rdev);
1418 ibdev_err(&rdev->ibdev,
1419 "Failed to get MSI-X vectors: %#x\n", rc);
1423 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
1425 bnxt_re_query_hwrm_intf_version(rdev);
1427 /* Establish RCFW Communication Channel to initialize the context
1428 * memory for the function and all child VFs
1430 rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw,
1432 BNXT_RE_MAX_QPC_COUNT);
1434 ibdev_err(&rdev->ibdev,
1435 "Failed to allocate RCFW Channel: %#x\n", rc);
1439 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1440 creq = &rdev->rcfw.creq;
1441 rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1442 rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count;
1444 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1445 rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1;
1446 rattr.lrid = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
1447 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id);
1449 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc);
1452 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX);
1453 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector;
1454 rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw,
1455 vid, db_offt, rdev->is_virtfn,
1456 &bnxt_re_aeq_handler);
1458 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n",
1463 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1468 bnxt_re_set_resource_limits(rdev);
1470 rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0,
1471 bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx));
1473 ibdev_err(&rdev->ibdev,
1474 "Failed to allocate QPLIB context: %#x\n", rc);
1477 rc = bnxt_re_net_stats_ctx_alloc(rdev,
1478 rdev->qplib_ctx.stats.dma_map,
1479 &rdev->qplib_ctx.stats.fw_id);
1481 ibdev_err(&rdev->ibdev,
1482 "Failed to allocate stats context: %#x\n", rc);
1486 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
1489 ibdev_err(&rdev->ibdev,
1490 "Failed to initialize RCFW: %#x\n", rc);
1493 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
1495 /* Resources based on the 'new' device caps */
1496 rc = bnxt_re_alloc_res(rdev);
1498 ibdev_err(&rdev->ibdev,
1499 "Failed to allocate resources: %#x\n", rc);
1502 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
1503 rc = bnxt_re_init_res(rdev);
1505 ibdev_err(&rdev->ibdev,
1506 "Failed to initialize resources: %#x\n", rc);
1510 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
1512 if (!rdev->is_virtfn) {
1513 rc = bnxt_re_setup_qos(rdev);
1515 ibdev_info(&rdev->ibdev,
1516 "RoCE priority not yet configured\n");
1518 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
1519 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
1520 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1525 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1527 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1529 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1531 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1532 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1534 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1536 bnxt_re_dev_uninit(rdev);
1541 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
1543 struct net_device *netdev = rdev->netdev;
1545 bnxt_re_dev_remove(rdev);
1551 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
1553 struct bnxt_en_dev *en_dev;
1556 if (!is_bnxt_re_dev(netdev))
1559 en_dev = bnxt_re_dev_probe(netdev);
1560 if (IS_ERR(en_dev)) {
1561 if (en_dev != ERR_PTR(-ENODEV))
1562 ibdev_err(&(*rdev)->ibdev, "%s: Failed to probe\n",
1563 ROCE_DRV_MODULE_NAME);
1564 rc = PTR_ERR(en_dev);
1567 *rdev = bnxt_re_dev_add(netdev, en_dev);
1577 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev)
1579 bnxt_re_dev_uninit(rdev);
1580 pci_dev_put(rdev->en_dev->pdev);
1581 bnxt_re_dev_unreg(rdev);
1584 static int bnxt_re_add_device(struct bnxt_re_dev **rdev,
1585 struct net_device *netdev, u8 wqe_mode)
1589 rc = bnxt_re_dev_reg(rdev, netdev);
1593 pr_err("Failed to register with the device %s: %#x\n",
1598 pci_dev_get((*rdev)->en_dev->pdev);
1599 rc = bnxt_re_dev_init(*rdev, wqe_mode);
1601 pci_dev_put((*rdev)->en_dev->pdev);
1602 bnxt_re_dev_unreg(*rdev);
1608 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev)
1610 struct bnxt_re_dev *rdev =
1611 container_of(ib_dev, struct bnxt_re_dev, ibdev);
1613 dev_info(rdev_to_dev(rdev), "Unregistering Device");
1616 bnxt_re_remove_device(rdev);
1620 /* Handle all deferred netevents tasks */
1621 static void bnxt_re_task(struct work_struct *work)
1623 struct bnxt_re_work *re_work;
1624 struct bnxt_re_dev *rdev;
1627 re_work = container_of(work, struct bnxt_re_work, work);
1628 rdev = re_work->rdev;
1630 if (re_work->event == NETDEV_REGISTER) {
1631 rc = bnxt_re_ib_init(rdev);
1633 ibdev_err(&rdev->ibdev,
1634 "Failed to register with IB: %#x", rc);
1636 bnxt_re_remove_device(rdev);
1643 if (!ib_device_try_get(&rdev->ibdev))
1646 switch (re_work->event) {
1648 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1649 IB_EVENT_PORT_ACTIVE);
1652 bnxt_re_dev_stop(rdev);
1655 if (!netif_carrier_ok(rdev->netdev))
1656 bnxt_re_dev_stop(rdev);
1657 else if (netif_carrier_ok(rdev->netdev))
1658 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1659 IB_EVENT_PORT_ACTIVE);
1660 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1661 &rdev->active_width);
1666 ib_device_put(&rdev->ibdev);
1668 put_device(&rdev->ibdev.dev);
1673 * "Notifier chain callback can be invoked for the same chain from
1674 * different CPUs at the same time".
1676 * For cases when the netdev is already present, our call to the
1677 * register_netdevice_notifier() will actually get the rtnl_lock()
1678 * before sending NETDEV_REGISTER and (if up) NETDEV_UP
1681 * But for cases when the netdev is not already present, the notifier
1682 * chain is subjected to be invoked from different CPUs simultaneously.
1684 * This is protected by the netdev_mutex.
1686 static int bnxt_re_netdev_event(struct notifier_block *notifier,
1687 unsigned long event, void *ptr)
1689 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
1690 struct bnxt_re_work *re_work;
1691 struct bnxt_re_dev *rdev;
1693 bool sch_work = false;
1694 bool release = true;
1696 real_dev = rdma_vlan_dev_real_dev(netdev);
1700 rdev = bnxt_re_from_netdev(real_dev);
1701 if (!rdev && event != NETDEV_REGISTER)
1704 if (real_dev != netdev)
1708 case NETDEV_REGISTER:
1711 rc = bnxt_re_add_device(&rdev, real_dev,
1712 BNXT_QPLIB_WQE_MODE_STATIC);
1718 case NETDEV_UNREGISTER:
1719 ib_unregister_device_queued(&rdev->ibdev);
1727 /* Allocate for the deferred task */
1728 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
1730 get_device(&rdev->ibdev.dev);
1731 re_work->rdev = rdev;
1732 re_work->event = event;
1733 re_work->vlan_dev = (real_dev == netdev ?
1735 INIT_WORK(&re_work->work, bnxt_re_task);
1736 queue_work(bnxt_re_wq, &re_work->work);
1741 if (rdev && release)
1742 ib_device_put(&rdev->ibdev);
1746 static struct notifier_block bnxt_re_netdev_notifier = {
1747 .notifier_call = bnxt_re_netdev_event
1750 static int __init bnxt_re_mod_init(void)
1754 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
1756 bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
1760 INIT_LIST_HEAD(&bnxt_re_dev_list);
1762 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
1764 pr_err("%s: Cannot register to netdevice_notifier",
1765 ROCE_DRV_MODULE_NAME);
1771 destroy_workqueue(bnxt_re_wq);
1776 static void __exit bnxt_re_mod_exit(void)
1778 struct bnxt_re_dev *rdev;
1780 unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
1782 destroy_workqueue(bnxt_re_wq);
1783 list_for_each_entry(rdev, &bnxt_re_dev_list, list) {
1784 /* VF device removal should be called before the removal
1785 * of PF device. Queue VFs unregister first, so that VFs
1786 * shall be removed before the PF during the call of
1787 * ib_unregister_driver.
1789 if (rdev->is_virtfn)
1790 ib_unregister_device(&rdev->ibdev);
1792 ib_unregister_driver(RDMA_DRIVER_BNXT_RE);
1795 module_init(bnxt_re_mod_init);
1796 module_exit(bnxt_re_mod_exit);