1 // SPDX-License-Identifier: GPL-2.0-only
3 * opt3001.c - Texas Instruments OPT3001 Light Sensor
5 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
7 * Author: Andreas Dannenberg <dannenberg@ti.com>
8 * Based on previous work from: Felipe Balbi <balbi@ti.com>
11 #include <linux/bitops.h>
12 #include <linux/delay.h>
13 #include <linux/device.h>
14 #include <linux/i2c.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/slab.h>
21 #include <linux/types.h>
23 #include <linux/iio/events.h>
24 #include <linux/iio/iio.h>
25 #include <linux/iio/sysfs.h>
27 #define OPT3001_RESULT 0x00
28 #define OPT3001_CONFIGURATION 0x01
29 #define OPT3001_LOW_LIMIT 0x02
30 #define OPT3001_HIGH_LIMIT 0x03
31 #define OPT3001_MANUFACTURER_ID 0x7e
32 #define OPT3001_DEVICE_ID 0x7f
34 #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12)
35 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12)
37 #define OPT3001_CONFIGURATION_CT BIT(11)
39 #define OPT3001_CONFIGURATION_M_MASK (3 << 9)
40 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
41 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9)
42 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
44 #define OPT3001_CONFIGURATION_OVF BIT(8)
45 #define OPT3001_CONFIGURATION_CRF BIT(7)
46 #define OPT3001_CONFIGURATION_FH BIT(6)
47 #define OPT3001_CONFIGURATION_FL BIT(5)
48 #define OPT3001_CONFIGURATION_L BIT(4)
49 #define OPT3001_CONFIGURATION_POL BIT(3)
50 #define OPT3001_CONFIGURATION_ME BIT(2)
52 #define OPT3001_CONFIGURATION_FC_MASK (3 << 0)
54 /* The end-of-conversion enable is located in the low-limit register */
55 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000
57 #define OPT3001_REG_EXPONENT(n) ((n) >> 12)
58 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff)
60 #define OPT3001_INT_TIME_LONG 800000
61 #define OPT3001_INT_TIME_SHORT 100000
64 * Time to wait for conversion result to be ready. The device datasheet
65 * sect. 6.5 states results are ready after total integration time plus 3ms.
66 * This results in worst-case max values of 113ms or 883ms, respectively.
67 * Add some slack to be on the safe side.
69 #define OPT3001_RESULT_READY_SHORT 150
70 #define OPT3001_RESULT_READY_LONG 1000
73 struct i2c_client *client;
77 bool ok_to_ignore_lock;
79 wait_queue_head_t result_ready_queue;
85 u16 high_thresh_mantissa;
86 u16 low_thresh_mantissa;
94 struct opt3001_scale {
99 static const struct opt3001_scale opt3001_scales[] = {
146 static int opt3001_find_scale(const struct opt3001 *opt, int val,
147 int val2, u8 *exponent)
151 for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {
152 const struct opt3001_scale *scale = &opt3001_scales[i];
155 * Combine the integer and micro parts for comparison
156 * purposes. Use milli lux precision to avoid 32-bit integer
159 if ((val * 1000 + val2 / 1000) <=
160 (scale->val * 1000 + scale->val2 / 1000)) {
169 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,
170 u16 mantissa, int *val, int *val2)
174 lux = 10 * (mantissa << exponent);
176 *val2 = (lux - (*val * 1000)) * 1000;
179 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)
181 *reg &= ~OPT3001_CONFIGURATION_M_MASK;
186 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
188 static struct attribute *opt3001_attributes[] = {
189 &iio_const_attr_integration_time_available.dev_attr.attr,
193 static const struct attribute_group opt3001_attribute_group = {
194 .attrs = opt3001_attributes,
197 static const struct iio_event_spec opt3001_event_spec[] = {
199 .type = IIO_EV_TYPE_THRESH,
200 .dir = IIO_EV_DIR_RISING,
201 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
202 BIT(IIO_EV_INFO_ENABLE),
205 .type = IIO_EV_TYPE_THRESH,
206 .dir = IIO_EV_DIR_FALLING,
207 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
208 BIT(IIO_EV_INFO_ENABLE),
212 static const struct iio_chan_spec opt3001_channels[] = {
215 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
216 BIT(IIO_CHAN_INFO_INT_TIME),
217 .event_spec = opt3001_event_spec,
218 .num_event_specs = ARRAY_SIZE(opt3001_event_spec),
220 IIO_CHAN_SOFT_TIMESTAMP(1),
223 static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
234 * Enable the end-of-conversion interrupt mechanism. Note that
235 * doing so will overwrite the low-level limit value however we
236 * will restore this value later on.
238 ret = i2c_smbus_write_word_swapped(opt->client,
240 OPT3001_LOW_LIMIT_EOC_ENABLE);
242 dev_err(opt->dev, "failed to write register %02x\n",
247 /* Allow IRQ to access the device despite lock being set */
248 opt->ok_to_ignore_lock = true;
251 /* Reset data-ready indicator flag */
252 opt->result_ready = false;
254 /* Configure for single-conversion mode and start a new conversion */
255 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
257 dev_err(opt->dev, "failed to read register %02x\n",
258 OPT3001_CONFIGURATION);
263 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE);
265 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
268 dev_err(opt->dev, "failed to write register %02x\n",
269 OPT3001_CONFIGURATION);
274 /* Wait for the IRQ to indicate the conversion is complete */
275 ret = wait_event_timeout(opt->result_ready_queue,
277 msecs_to_jiffies(OPT3001_RESULT_READY_LONG));
279 /* Sleep for result ready time */
280 timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?
281 OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG;
284 /* Check result ready flag */
285 ret = i2c_smbus_read_word_swapped(opt->client,
286 OPT3001_CONFIGURATION);
288 dev_err(opt->dev, "failed to read register %02x\n",
289 OPT3001_CONFIGURATION);
293 if (!(ret & OPT3001_CONFIGURATION_CRF)) {
299 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
301 dev_err(opt->dev, "failed to read register %02x\n",
306 opt->result_ready = true;
311 /* Disallow IRQ to access the device while lock is active */
312 opt->ok_to_ignore_lock = false;
321 * Disable the end-of-conversion interrupt mechanism by
322 * restoring the low-level limit value (clearing
323 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing
324 * those enable bits would affect the actual limit value due to
325 * bit-overlap and therefore can't be done.
327 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
328 ret = i2c_smbus_write_word_swapped(opt->client,
332 dev_err(opt->dev, "failed to write register %02x\n",
338 exponent = OPT3001_REG_EXPONENT(opt->result);
339 mantissa = OPT3001_REG_MANTISSA(opt->result);
341 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);
343 return IIO_VAL_INT_PLUS_MICRO;
346 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)
349 *val2 = opt->int_time;
351 return IIO_VAL_INT_PLUS_MICRO;
354 static int opt3001_set_int_time(struct opt3001 *opt, int time)
359 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
361 dev_err(opt->dev, "failed to read register %02x\n",
362 OPT3001_CONFIGURATION);
369 case OPT3001_INT_TIME_SHORT:
370 reg &= ~OPT3001_CONFIGURATION_CT;
371 opt->int_time = OPT3001_INT_TIME_SHORT;
373 case OPT3001_INT_TIME_LONG:
374 reg |= OPT3001_CONFIGURATION_CT;
375 opt->int_time = OPT3001_INT_TIME_LONG;
381 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
385 static int opt3001_read_raw(struct iio_dev *iio,
386 struct iio_chan_spec const *chan, int *val, int *val2,
389 struct opt3001 *opt = iio_priv(iio);
392 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
395 if (chan->type != IIO_LIGHT)
398 mutex_lock(&opt->lock);
401 case IIO_CHAN_INFO_PROCESSED:
402 ret = opt3001_get_lux(opt, val, val2);
404 case IIO_CHAN_INFO_INT_TIME:
405 ret = opt3001_get_int_time(opt, val, val2);
411 mutex_unlock(&opt->lock);
416 static int opt3001_write_raw(struct iio_dev *iio,
417 struct iio_chan_spec const *chan, int val, int val2,
420 struct opt3001 *opt = iio_priv(iio);
423 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
426 if (chan->type != IIO_LIGHT)
429 if (mask != IIO_CHAN_INFO_INT_TIME)
435 mutex_lock(&opt->lock);
436 ret = opt3001_set_int_time(opt, val2);
437 mutex_unlock(&opt->lock);
442 static int opt3001_read_event_value(struct iio_dev *iio,
443 const struct iio_chan_spec *chan, enum iio_event_type type,
444 enum iio_event_direction dir, enum iio_event_info info,
447 struct opt3001 *opt = iio_priv(iio);
448 int ret = IIO_VAL_INT_PLUS_MICRO;
450 mutex_lock(&opt->lock);
453 case IIO_EV_DIR_RISING:
454 opt3001_to_iio_ret(opt, opt->high_thresh_exp,
455 opt->high_thresh_mantissa, val, val2);
457 case IIO_EV_DIR_FALLING:
458 opt3001_to_iio_ret(opt, opt->low_thresh_exp,
459 opt->low_thresh_mantissa, val, val2);
465 mutex_unlock(&opt->lock);
470 static int opt3001_write_event_value(struct iio_dev *iio,
471 const struct iio_chan_spec *chan, enum iio_event_type type,
472 enum iio_event_direction dir, enum iio_event_info info,
475 struct opt3001 *opt = iio_priv(iio);
487 mutex_lock(&opt->lock);
489 ret = opt3001_find_scale(opt, val, val2, &exponent);
491 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);
495 mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;
496 value = (exponent << 12) | mantissa;
499 case IIO_EV_DIR_RISING:
500 reg = OPT3001_HIGH_LIMIT;
501 opt->high_thresh_mantissa = mantissa;
502 opt->high_thresh_exp = exponent;
504 case IIO_EV_DIR_FALLING:
505 reg = OPT3001_LOW_LIMIT;
506 opt->low_thresh_mantissa = mantissa;
507 opt->low_thresh_exp = exponent;
514 ret = i2c_smbus_write_word_swapped(opt->client, reg, value);
516 dev_err(opt->dev, "failed to write register %02x\n", reg);
521 mutex_unlock(&opt->lock);
526 static int opt3001_read_event_config(struct iio_dev *iio,
527 const struct iio_chan_spec *chan, enum iio_event_type type,
528 enum iio_event_direction dir)
530 struct opt3001 *opt = iio_priv(iio);
532 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;
535 static int opt3001_write_event_config(struct iio_dev *iio,
536 const struct iio_chan_spec *chan, enum iio_event_type type,
537 enum iio_event_direction dir, int state)
539 struct opt3001 *opt = iio_priv(iio);
544 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
547 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)
550 mutex_lock(&opt->lock);
552 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS
553 : OPT3001_CONFIGURATION_M_SHUTDOWN;
555 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
557 dev_err(opt->dev, "failed to read register %02x\n",
558 OPT3001_CONFIGURATION);
563 opt3001_set_mode(opt, ®, mode);
565 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
568 dev_err(opt->dev, "failed to write register %02x\n",
569 OPT3001_CONFIGURATION);
574 mutex_unlock(&opt->lock);
579 static const struct iio_info opt3001_info = {
580 .attrs = &opt3001_attribute_group,
581 .read_raw = opt3001_read_raw,
582 .write_raw = opt3001_write_raw,
583 .read_event_value = opt3001_read_event_value,
584 .write_event_value = opt3001_write_event_value,
585 .read_event_config = opt3001_read_event_config,
586 .write_event_config = opt3001_write_event_config,
589 static int opt3001_read_id(struct opt3001 *opt)
591 char manufacturer[2];
595 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);
597 dev_err(opt->dev, "failed to read register %02x\n",
598 OPT3001_MANUFACTURER_ID);
602 manufacturer[0] = ret >> 8;
603 manufacturer[1] = ret & 0xff;
605 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);
607 dev_err(opt->dev, "failed to read register %02x\n",
614 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],
615 manufacturer[1], device_id);
620 static int opt3001_configure(struct opt3001 *opt)
625 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
627 dev_err(opt->dev, "failed to read register %02x\n",
628 OPT3001_CONFIGURATION);
634 /* Enable automatic full-scale setting mode */
635 reg &= ~OPT3001_CONFIGURATION_RN_MASK;
636 reg |= OPT3001_CONFIGURATION_RN_AUTO;
638 /* Reflect status of the device's integration time setting */
639 if (reg & OPT3001_CONFIGURATION_CT)
640 opt->int_time = OPT3001_INT_TIME_LONG;
642 opt->int_time = OPT3001_INT_TIME_SHORT;
644 /* Ensure device is in shutdown initially */
645 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN);
647 /* Configure for latched window-style comparison operation */
648 reg |= OPT3001_CONFIGURATION_L;
649 reg &= ~OPT3001_CONFIGURATION_POL;
650 reg &= ~OPT3001_CONFIGURATION_ME;
651 reg &= ~OPT3001_CONFIGURATION_FC_MASK;
653 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
656 dev_err(opt->dev, "failed to write register %02x\n",
657 OPT3001_CONFIGURATION);
661 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);
663 dev_err(opt->dev, "failed to read register %02x\n",
668 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
669 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);
671 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);
673 dev_err(opt->dev, "failed to read register %02x\n",
678 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
679 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);
684 static irqreturn_t opt3001_irq(int irq, void *_iio)
686 struct iio_dev *iio = _iio;
687 struct opt3001 *opt = iio_priv(iio);
690 if (!opt->ok_to_ignore_lock)
691 mutex_lock(&opt->lock);
693 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
695 dev_err(opt->dev, "failed to read register %02x\n",
696 OPT3001_CONFIGURATION);
700 if ((ret & OPT3001_CONFIGURATION_M_MASK) ==
701 OPT3001_CONFIGURATION_M_CONTINUOUS) {
702 if (ret & OPT3001_CONFIGURATION_FH)
704 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
707 iio_get_time_ns(iio));
708 if (ret & OPT3001_CONFIGURATION_FL)
710 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
713 iio_get_time_ns(iio));
714 } else if (ret & OPT3001_CONFIGURATION_CRF) {
715 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
717 dev_err(opt->dev, "failed to read register %02x\n",
722 opt->result_ready = true;
723 wake_up(&opt->result_ready_queue);
727 if (!opt->ok_to_ignore_lock)
728 mutex_unlock(&opt->lock);
733 static int opt3001_probe(struct i2c_client *client,
734 const struct i2c_device_id *id)
736 struct device *dev = &client->dev;
740 int irq = client->irq;
743 iio = devm_iio_device_alloc(dev, sizeof(*opt));
748 opt->client = client;
751 mutex_init(&opt->lock);
752 init_waitqueue_head(&opt->result_ready_queue);
753 i2c_set_clientdata(client, iio);
755 ret = opt3001_read_id(opt);
759 ret = opt3001_configure(opt);
763 iio->name = client->name;
764 iio->channels = opt3001_channels;
765 iio->num_channels = ARRAY_SIZE(opt3001_channels);
766 iio->dev.parent = dev;
767 iio->modes = INDIO_DIRECT_MODE;
768 iio->info = &opt3001_info;
770 ret = devm_iio_device_register(dev, iio);
772 dev_err(dev, "failed to register IIO device\n");
776 /* Make use of INT pin only if valid IRQ no. is given */
778 ret = request_threaded_irq(irq, NULL, opt3001_irq,
779 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
782 dev_err(dev, "failed to request IRQ #%d\n", irq);
787 dev_dbg(opt->dev, "enabling interrupt-less operation\n");
793 static int opt3001_remove(struct i2c_client *client)
795 struct iio_dev *iio = i2c_get_clientdata(client);
796 struct opt3001 *opt = iio_priv(iio);
801 free_irq(client->irq, iio);
803 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
805 dev_err(opt->dev, "failed to read register %02x\n",
806 OPT3001_CONFIGURATION);
811 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN);
813 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
816 dev_err(opt->dev, "failed to write register %02x\n",
817 OPT3001_CONFIGURATION);
824 static const struct i2c_device_id opt3001_id[] = {
826 { } /* Terminating Entry */
828 MODULE_DEVICE_TABLE(i2c, opt3001_id);
830 static const struct of_device_id opt3001_of_match[] = {
831 { .compatible = "ti,opt3001" },
834 MODULE_DEVICE_TABLE(of, opt3001_of_match);
836 static struct i2c_driver opt3001_driver = {
837 .probe = opt3001_probe,
838 .remove = opt3001_remove,
839 .id_table = opt3001_id,
843 .of_match_table = of_match_ptr(opt3001_of_match),
847 module_i2c_driver(opt3001_driver);
849 MODULE_LICENSE("GPL v2");
850 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
851 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");