drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3 * Copyright (C) 2012 Invensense, Inc.
   4 */
   5
   6 #include <linux/module.h>
   7 #include <linux/slab.h>
   8 #include <linux/i2c.h>
   9 #include <linux/err.h>
  10 #include <linux/delay.h>
  11 #include <linux/sysfs.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/irq.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/iio/iio.h>
  16 #include <linux/acpi.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/regulator/consumer.h>
  19 #include "inv_mpu_iio.h"
  20 #include "inv_mpu_magn.h"
  21
  22 /*
  23  * this is the gyro scale translated from dynamic range plus/minus
  24  * {250, 500, 1000, 2000} to rad/s
  25  */
  26 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
  27
  28 /*
  29  * this is the accel scale translated from dynamic range plus/minus
  30  * {2, 4, 8, 16} to m/s^2
  31  */
  32 static const int accel_scale[] = {598, 1196, 2392, 4785};
  33
  34 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
  35         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  36         .lpf                    = INV_MPU6050_REG_CONFIG,
  37         .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
  38         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  39         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  40         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  41         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  42         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  43         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  44         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  45         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  46         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  47         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  48         .int_status             = INV_MPU6050_REG_INT_STATUS,
  49         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  50         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  51         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  52         .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
  53         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  54         .i2c_if                 = INV_ICM20602_REG_I2C_IF,
  55 };
  56
  57 static const struct inv_mpu6050_reg_map reg_set_6500 = {
  58         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  59         .lpf                    = INV_MPU6050_REG_CONFIG,
  60         .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
  61         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  62         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  63         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  64         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  65         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  66         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  67         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  68         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  69         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  70         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  71         .int_status             = INV_MPU6050_REG_INT_STATUS,
  72         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  73         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  74         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  75         .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
  76         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  77         .i2c_if                 = 0,
  78 };
  79
  80 static const struct inv_mpu6050_reg_map reg_set_6050 = {
  81         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  82         .lpf                    = INV_MPU6050_REG_CONFIG,
  83         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  84         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  85         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  86         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  87         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  88         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  89         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  90         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  91         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  92         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  93         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  94         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  95         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  96         .accl_offset            = INV_MPU6050_REG_ACCEL_OFFSET,
  97         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  98         .i2c_if                 = 0,
  99 };
 100
 101 static const struct inv_mpu6050_chip_config chip_config_6050 = {
 102         .fsr = INV_MPU6050_FSR_2000DPS,
 103         .lpf = INV_MPU6050_FILTER_20HZ,
 104         .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE),
 105         .gyro_fifo_enable = false,
 106         .accl_fifo_enable = false,
 107         .temp_fifo_enable = false,
 108         .magn_fifo_enable = false,
 109         .accl_fs = INV_MPU6050_FS_02G,
 110         .user_ctrl = 0,
 111 };
 112
 113 /* Indexed by enum inv_devices */
 114 static const struct inv_mpu6050_hw hw_info[] = {
 115         {
 116                 .whoami = INV_MPU6050_WHOAMI_VALUE,
 117                 .name = "MPU6050",
 118                 .reg = &reg_set_6050,
 119                 .config = &chip_config_6050,
 120                 .fifo_size = 1024,
 121                 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
 122         },
 123         {
 124                 .whoami = INV_MPU6500_WHOAMI_VALUE,
 125                 .name = "MPU6500",
 126                 .reg = &reg_set_6500,
 127                 .config = &chip_config_6050,
 128                 .fifo_size = 512,
 129                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 130         },
 131         {
 132                 .whoami = INV_MPU6515_WHOAMI_VALUE,
 133                 .name = "MPU6515",
 134                 .reg = &reg_set_6500,
 135                 .config = &chip_config_6050,
 136                 .fifo_size = 512,
 137                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 138         },
 139         {
 140                 .whoami = INV_MPU6000_WHOAMI_VALUE,
 141                 .name = "MPU6000",
 142                 .reg = &reg_set_6050,
 143                 .config = &chip_config_6050,
 144                 .fifo_size = 1024,
 145                 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
 146         },
 147         {
 148                 .whoami = INV_MPU9150_WHOAMI_VALUE,
 149                 .name = "MPU9150",
 150                 .reg = &reg_set_6050,
 151                 .config = &chip_config_6050,
 152                 .fifo_size = 1024,
 153                 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
 154         },
 155         {
 156                 .whoami = INV_MPU9250_WHOAMI_VALUE,
 157                 .name = "MPU9250",
 158                 .reg = &reg_set_6500,
 159                 .config = &chip_config_6050,
 160                 .fifo_size = 512,
 161                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 162         },
 163         {
 164                 .whoami = INV_MPU9255_WHOAMI_VALUE,
 165                 .name = "MPU9255",
 166                 .reg = &reg_set_6500,
 167                 .config = &chip_config_6050,
 168                 .fifo_size = 512,
 169                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 170         },
 171         {
 172                 .whoami = INV_ICM20608_WHOAMI_VALUE,
 173                 .name = "ICM20608",
 174                 .reg = &reg_set_6500,
 175                 .config = &chip_config_6050,
 176                 .fifo_size = 512,
 177                 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
 178         },
 179         {
 180                 .whoami = INV_ICM20602_WHOAMI_VALUE,
 181                 .name = "ICM20602",
 182                 .reg = &reg_set_icm20602,
 183                 .config = &chip_config_6050,
 184                 .fifo_size = 1008,
 185                 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
 186         },
 187 };
 188
 189 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
 190 {
 191         unsigned int d, mgmt_1;
 192         int result;
 193         /*
 194          * switch clock needs to be careful. Only when gyro is on, can
 195          * clock source be switched to gyro. Otherwise, it must be set to
 196          * internal clock
 197          */
 198         if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
 199                 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
 200                 if (result)
 201                         return result;
 202
 203                 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
 204         }
 205
 206         if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
 207                 /*
 208                  * turning off gyro requires switch to internal clock first.
 209                  * Then turn off gyro engine
 210                  */
 211                 mgmt_1 |= INV_CLK_INTERNAL;
 212                 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
 213                 if (result)
 214                         return result;
 215         }
 216
 217         result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
 218         if (result)
 219                 return result;
 220         if (en)
 221                 d &= ~mask;
 222         else
 223                 d |= mask;
 224         result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
 225         if (result)
 226                 return result;
 227
 228         if (en) {
 229                 /* Wait for output to stabilize */
 230                 msleep(INV_MPU6050_TEMP_UP_TIME);
 231                 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
 232                         /* switch internal clock to PLL */
 233                         mgmt_1 |= INV_CLK_PLL;
 234                         result = regmap_write(st->map,
 235                                               st->reg->pwr_mgmt_1, mgmt_1);
 236                         if (result)
 237                                 return result;
 238                 }
 239         }
 240
 241         return 0;
 242 }
 243
 244 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
 245 {
 246         int result;
 247
 248         if (power_on) {
 249                 if (!st->powerup_count) {
 250                         result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
 251                         if (result)
 252                                 return result;
 253                         usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
 254                                      INV_MPU6050_REG_UP_TIME_MAX);
 255                 }
 256                 st->powerup_count++;
 257         } else {
 258                 if (st->powerup_count == 1) {
 259                         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
 260                                               INV_MPU6050_BIT_SLEEP);
 261                         if (result)
 262                                 return result;
 263                 }
 264                 st->powerup_count--;
 265         }
 266
 267         dev_dbg(regmap_get_device(st->map), "set power %d, count=%u\n",
 268                 power_on, st->powerup_count);
 269
 270         return 0;
 271 }
 272 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
 273
 274 /**
 275  *  inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
 276  *
 277  *  MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
 278  *  MPU6500 and above have a dedicated register for accelerometer
 279  */
 280 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
 281                                     enum inv_mpu6050_filter_e val)
 282 {
 283         int result;
 284
 285         result = regmap_write(st->map, st->reg->lpf, val);
 286         if (result)
 287                 return result;
 288
 289         switch (st->chip_type) {
 290         case INV_MPU6050:
 291         case INV_MPU6000:
 292         case INV_MPU9150:
 293                 /* old chips, nothing to do */
 294                 result = 0;
 295                 break;
 296         default:
 297                 /* set accel lpf */
 298                 result = regmap_write(st->map, st->reg->accel_lpf, val);
 299                 break;
 300         }
 301
 302         return result;
 303 }
 304
 305 /**
 306  *  inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
 307  *
 308  *  Initial configuration:
 309  *  FSR: ± 2000DPS
 310  *  DLPF: 20Hz
 311  *  FIFO rate: 50Hz
 312  *  Clock source: Gyro PLL
 313  */
 314 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
 315 {
 316         int result;
 317         u8 d;
 318         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 319
 320         result = inv_mpu6050_set_power_itg(st, true);
 321         if (result)
 322                 return result;
 323         d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 324         result = regmap_write(st->map, st->reg->gyro_config, d);
 325         if (result)
 326                 goto error_power_off;
 327
 328         result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
 329         if (result)
 330                 goto error_power_off;
 331
 332         d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE);
 333         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 334         if (result)
 335                 goto error_power_off;
 336
 337         d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 338         result = regmap_write(st->map, st->reg->accl_config, d);
 339         if (result)
 340                 goto error_power_off;
 341
 342         result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
 343         if (result)
 344                 return result;
 345
 346         memcpy(&st->chip_config, hw_info[st->chip_type].config,
 347                sizeof(struct inv_mpu6050_chip_config));
 348
 349         /*
 350          * Internal chip period is 1ms (1kHz).
 351          * Let's use at the beginning the theorical value before measuring
 352          * with interrupt timestamps.
 353          */
 354         st->chip_period = NSEC_PER_MSEC;
 355
 356         /* magn chip init, noop if not present in the chip */
 357         result = inv_mpu_magn_probe(st);
 358         if (result)
 359                 goto error_power_off;
 360
 361         return inv_mpu6050_set_power_itg(st, false);
 362
 363 error_power_off:
 364         inv_mpu6050_set_power_itg(st, false);
 365         return result;
 366 }
 367
 368 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state  *st, int reg,
 369                                 int axis, int val)
 370 {
 371         int ind, result;
 372         __be16 d = cpu_to_be16(val);
 373
 374         ind = (axis - IIO_MOD_X) * 2;
 375         result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2);
 376         if (result)
 377                 return -EINVAL;
 378
 379         return 0;
 380 }
 381
 382 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state  *st, int reg,
 383                                    int axis, int *val)
 384 {
 385         int ind, result;
 386         __be16 d;
 387
 388         ind = (axis - IIO_MOD_X) * 2;
 389         result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
 390         if (result)
 391                 return -EINVAL;
 392         *val = (short)be16_to_cpup(&d);
 393
 394         return IIO_VAL_INT;
 395 }
 396
 397 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
 398                                          struct iio_chan_spec const *chan,
 399                                          int *val)
 400 {
 401         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 402         int result;
 403         int ret;
 404
 405         result = inv_mpu6050_set_power_itg(st, true);
 406         if (result)
 407                 return result;
 408
 409         switch (chan->type) {
 410         case IIO_ANGL_VEL:
 411                 result = inv_mpu6050_switch_engine(st, true,
 412                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 413                 if (result)
 414                         goto error_power_off;
 415                 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
 416                                               chan->channel2, val);
 417                 result = inv_mpu6050_switch_engine(st, false,
 418                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 419                 if (result)
 420                         goto error_power_off;
 421                 break;
 422         case IIO_ACCEL:
 423                 result = inv_mpu6050_switch_engine(st, true,
 424                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 425                 if (result)
 426                         goto error_power_off;
 427                 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
 428                                               chan->channel2, val);
 429                 result = inv_mpu6050_switch_engine(st, false,
 430                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 431                 if (result)
 432                         goto error_power_off;
 433                 break;
 434         case IIO_TEMP:
 435                 /* wait for stablization */
 436                 msleep(INV_MPU6050_SENSOR_UP_TIME);
 437                 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
 438                                               IIO_MOD_X, val);
 439                 break;
 440         case IIO_MAGN:
 441                 ret = inv_mpu_magn_read(st, chan->channel2, val);
 442                 break;
 443         default:
 444                 ret = -EINVAL;
 445                 break;
 446         }
 447
 448         result = inv_mpu6050_set_power_itg(st, false);
 449         if (result)
 450                 goto error_power_off;
 451
 452         return ret;
 453
 454 error_power_off:
 455         inv_mpu6050_set_power_itg(st, false);
 456         return result;
 457 }
 458
 459 static int
 460 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
 461                      struct iio_chan_spec const *chan,
 462                      int *val, int *val2, long mask)
 463 {
 464         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 465         int ret = 0;
 466
 467         switch (mask) {
 468         case IIO_CHAN_INFO_RAW:
 469                 ret = iio_device_claim_direct_mode(indio_dev);
 470                 if (ret)
 471                         return ret;
 472                 mutex_lock(&st->lock);
 473                 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
 474                 mutex_unlock(&st->lock);
 475                 iio_device_release_direct_mode(indio_dev);
 476                 return ret;
 477         case IIO_CHAN_INFO_SCALE:
 478                 switch (chan->type) {
 479                 case IIO_ANGL_VEL:
 480                         mutex_lock(&st->lock);
 481                         *val  = 0;
 482                         *val2 = gyro_scale_6050[st->chip_config.fsr];
 483                         mutex_unlock(&st->lock);
 484
 485                         return IIO_VAL_INT_PLUS_NANO;
 486                 case IIO_ACCEL:
 487                         mutex_lock(&st->lock);
 488                         *val = 0;
 489                         *val2 = accel_scale[st->chip_config.accl_fs];
 490                         mutex_unlock(&st->lock);
 491
 492                         return IIO_VAL_INT_PLUS_MICRO;
 493                 case IIO_TEMP:
 494                         *val = st->hw->temp.scale / 1000000;
 495                         *val2 = st->hw->temp.scale % 1000000;
 496                         return IIO_VAL_INT_PLUS_MICRO;
 497                 case IIO_MAGN:
 498                         return inv_mpu_magn_get_scale(st, chan, val, val2);
 499                 default:
 500                         return -EINVAL;
 501                 }
 502         case IIO_CHAN_INFO_OFFSET:
 503                 switch (chan->type) {
 504                 case IIO_TEMP:
 505                         *val = st->hw->temp.offset;
 506                         return IIO_VAL_INT;
 507                 default:
 508                         return -EINVAL;
 509                 }
 510         case IIO_CHAN_INFO_CALIBBIAS:
 511                 switch (chan->type) {
 512                 case IIO_ANGL_VEL:
 513                         mutex_lock(&st->lock);
 514                         ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
 515                                                 chan->channel2, val);
 516                         mutex_unlock(&st->lock);
 517                         return IIO_VAL_INT;
 518                 case IIO_ACCEL:
 519                         mutex_lock(&st->lock);
 520                         ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
 521                                                 chan->channel2, val);
 522                         mutex_unlock(&st->lock);
 523                         return IIO_VAL_INT;
 524
 525                 default:
 526                         return -EINVAL;
 527                 }
 528         default:
 529                 return -EINVAL;
 530         }
 531 }
 532
 533 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
 534 {
 535         int result, i;
 536         u8 d;
 537
 538         for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
 539                 if (gyro_scale_6050[i] == val) {
 540                         d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 541                         result = regmap_write(st->map, st->reg->gyro_config, d);
 542                         if (result)
 543                                 return result;
 544
 545                         st->chip_config.fsr = i;
 546                         return 0;
 547                 }
 548         }
 549
 550         return -EINVAL;
 551 }
 552
 553 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
 554                                  struct iio_chan_spec const *chan, long mask)
 555 {
 556         switch (mask) {
 557         case IIO_CHAN_INFO_SCALE:
 558                 switch (chan->type) {
 559                 case IIO_ANGL_VEL:
 560                         return IIO_VAL_INT_PLUS_NANO;
 561                 default:
 562                         return IIO_VAL_INT_PLUS_MICRO;
 563                 }
 564         default:
 565                 return IIO_VAL_INT_PLUS_MICRO;
 566         }
 567
 568         return -EINVAL;
 569 }
 570
 571 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
 572 {
 573         int result, i;
 574         u8 d;
 575
 576         for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
 577                 if (accel_scale[i] == val) {
 578                         d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 579                         result = regmap_write(st->map, st->reg->accl_config, d);
 580                         if (result)
 581                                 return result;
 582
 583                         st->chip_config.accl_fs = i;
 584                         return 0;
 585                 }
 586         }
 587
 588         return -EINVAL;
 589 }
 590
 591 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
 592                                  struct iio_chan_spec const *chan,
 593                                  int val, int val2, long mask)
 594 {
 595         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 596         int result;
 597
 598         /*
 599          * we should only update scale when the chip is disabled, i.e.
 600          * not running
 601          */
 602         result = iio_device_claim_direct_mode(indio_dev);
 603         if (result)
 604                 return result;
 605
 606         mutex_lock(&st->lock);
 607         result = inv_mpu6050_set_power_itg(st, true);
 608         if (result)
 609                 goto error_write_raw_unlock;
 610
 611         switch (mask) {
 612         case IIO_CHAN_INFO_SCALE:
 613                 switch (chan->type) {
 614                 case IIO_ANGL_VEL:
 615                         result = inv_mpu6050_write_gyro_scale(st, val2);
 616                         break;
 617                 case IIO_ACCEL:
 618                         result = inv_mpu6050_write_accel_scale(st, val2);
 619                         break;
 620                 default:
 621                         result = -EINVAL;
 622                         break;
 623                 }
 624                 break;
 625         case IIO_CHAN_INFO_CALIBBIAS:
 626                 switch (chan->type) {
 627                 case IIO_ANGL_VEL:
 628                         result = inv_mpu6050_sensor_set(st,
 629                                                         st->reg->gyro_offset,
 630                                                         chan->channel2, val);
 631                         break;
 632                 case IIO_ACCEL:
 633                         result = inv_mpu6050_sensor_set(st,
 634                                                         st->reg->accl_offset,
 635                                                         chan->channel2, val);
 636                         break;
 637                 default:
 638                         result = -EINVAL;
 639                         break;
 640                 }
 641                 break;
 642         default:
 643                 result = -EINVAL;
 644                 break;
 645         }
 646
 647         result |= inv_mpu6050_set_power_itg(st, false);
 648 error_write_raw_unlock:
 649         mutex_unlock(&st->lock);
 650         iio_device_release_direct_mode(indio_dev);
 651
 652         return result;
 653 }
 654
 655 /**
 656  *  inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
 657  *
 658  *                  Based on the Nyquist principle, the sampling rate must
 659  *                  exceed twice of the bandwidth of the signal, or there
 660  *                  would be alising. This function basically search for the
 661  *                  correct low pass parameters based on the fifo rate, e.g,
 662  *                  sampling frequency.
 663  *
 664  *  lpf is set automatically when setting sampling rate to avoid any aliases.
 665  */
 666 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
 667 {
 668         static const int hz[] = {188, 98, 42, 20, 10, 5};
 669         static const int d[] = {
 670                 INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
 671                 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
 672                 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
 673         };
 674         int i, h, result;
 675         u8 data;
 676
 677         h = (rate >> 1);
 678         i = 0;
 679         while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
 680                 i++;
 681         data = d[i];
 682         result = inv_mpu6050_set_lpf_regs(st, data);
 683         if (result)
 684                 return result;
 685         st->chip_config.lpf = data;
 686
 687         return 0;
 688 }
 689
 690 /**
 691  * inv_mpu6050_fifo_rate_store() - Set fifo rate.
 692  */
 693 static ssize_t
 694 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
 695                             const char *buf, size_t count)
 696 {
 697         int fifo_rate;
 698         u8 d;
 699         int result;
 700         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 701         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 702
 703         if (kstrtoint(buf, 10, &fifo_rate))
 704                 return -EINVAL;
 705         if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
 706             fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
 707                 return -EINVAL;
 708
 709         result = iio_device_claim_direct_mode(indio_dev);
 710         if (result)
 711                 return result;
 712
 713         /* compute the chip sample rate divider */
 714         d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
 715         /* compute back the fifo rate to handle truncation cases */
 716         fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
 717
 718         mutex_lock(&st->lock);
 719         if (d == st->chip_config.divider) {
 720                 result = 0;
 721                 goto fifo_rate_fail_unlock;
 722         }
 723         result = inv_mpu6050_set_power_itg(st, true);
 724         if (result)
 725                 goto fifo_rate_fail_unlock;
 726
 727         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 728         if (result)
 729                 goto fifo_rate_fail_power_off;
 730         st->chip_config.divider = d;
 731
 732         result = inv_mpu6050_set_lpf(st, fifo_rate);
 733         if (result)
 734                 goto fifo_rate_fail_power_off;
 735
 736         /* update rate for magn, noop if not present in chip */
 737         result = inv_mpu_magn_set_rate(st, fifo_rate);
 738         if (result)
 739                 goto fifo_rate_fail_power_off;
 740
 741 fifo_rate_fail_power_off:
 742         result |= inv_mpu6050_set_power_itg(st, false);
 743 fifo_rate_fail_unlock:
 744         mutex_unlock(&st->lock);
 745         iio_device_release_direct_mode(indio_dev);
 746         if (result)
 747                 return result;
 748
 749         return count;
 750 }
 751
 752 /**
 753  * inv_fifo_rate_show() - Get the current sampling rate.
 754  */
 755 static ssize_t
 756 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
 757                    char *buf)
 758 {
 759         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 760         unsigned fifo_rate;
 761
 762         mutex_lock(&st->lock);
 763         fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
 764         mutex_unlock(&st->lock);
 765
 766         return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
 767 }
 768
 769 /**
 770  * inv_attr_show() - calling this function will show current
 771  *                    parameters.
 772  *
 773  * Deprecated in favor of IIO mounting matrix API.
 774  *
 775  * See inv_get_mount_matrix()
 776  */
 777 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
 778                              char *buf)
 779 {
 780         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 781         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 782         s8 *m;
 783
 784         switch (this_attr->address) {
 785         /*
 786          * In MPU6050, the two matrix are the same because gyro and accel
 787          * are integrated in one chip
 788          */
 789         case ATTR_GYRO_MATRIX:
 790         case ATTR_ACCL_MATRIX:
 791                 m = st->plat_data.orientation;
 792
 793                 return scnprintf(buf, PAGE_SIZE,
 794                         "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
 795                         m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
 796         default:
 797                 return -EINVAL;
 798         }
 799 }
 800
 801 /**
 802  * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
 803  *                                  MPU6050 device.
 804  * @indio_dev: The IIO device
 805  * @trig: The new trigger
 806  *
 807  * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
 808  * device, -EINVAL otherwise.
 809  */
 810 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
 811                                         struct iio_trigger *trig)
 812 {
 813         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 814
 815         if (st->trig != trig)
 816                 return -EINVAL;
 817
 818         return 0;
 819 }
 820
 821 static const struct iio_mount_matrix *
 822 inv_get_mount_matrix(const struct iio_dev *indio_dev,
 823                      const struct iio_chan_spec *chan)
 824 {
 825         struct inv_mpu6050_state *data = iio_priv(indio_dev);
 826         const struct iio_mount_matrix *matrix;
 827
 828         if (chan->type == IIO_MAGN)
 829                 matrix = &data->magn_orient;
 830         else
 831                 matrix = &data->orientation;
 832
 833         return matrix;
 834 }
 835
 836 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
 837         IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
 838         { }
 839 };
 840
 841 #define INV_MPU6050_CHAN(_type, _channel2, _index)                    \
 842         {                                                             \
 843                 .type = _type,                                        \
 844                 .modified = 1,                                        \
 845                 .channel2 = _channel2,                                \
 846                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 847                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |        \
 848                                       BIT(IIO_CHAN_INFO_CALIBBIAS),   \
 849                 .scan_index = _index,                                 \
 850                 .scan_type = {                                        \
 851                                 .sign = 's',                          \
 852                                 .realbits = 16,                       \
 853                                 .storagebits = 16,                    \
 854                                 .shift = 0,                           \
 855                                 .endianness = IIO_BE,                 \
 856                              },                                       \
 857                 .ext_info = inv_ext_info,                             \
 858         }
 859
 860 #define INV_MPU6050_TEMP_CHAN(_index)                           \
 861         {                                                       \
 862                 .type = IIO_TEMP,                               \
 863                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)    \
 864                                 | BIT(IIO_CHAN_INFO_OFFSET)     \
 865                                 | BIT(IIO_CHAN_INFO_SCALE),     \
 866                 .scan_index = _index,                           \
 867                 .scan_type = {                                  \
 868                         .sign = 's',                            \
 869                         .realbits = 16,                         \
 870                         .storagebits = 16,                      \
 871                         .shift = 0,                             \
 872                         .endianness = IIO_BE,                   \
 873                 },                                              \
 874         }
 875
 876 static const struct iio_chan_spec inv_mpu_channels[] = {
 877         IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
 878
 879         INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
 880
 881         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
 882         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
 883         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
 884
 885         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
 886         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
 887         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
 888 };
 889
 890 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL       \
 891         (BIT(INV_MPU6050_SCAN_ACCL_X)           \
 892         | BIT(INV_MPU6050_SCAN_ACCL_Y)          \
 893         | BIT(INV_MPU6050_SCAN_ACCL_Z))
 894
 895 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO        \
 896         (BIT(INV_MPU6050_SCAN_GYRO_X)           \
 897         | BIT(INV_MPU6050_SCAN_GYRO_Y)          \
 898         | BIT(INV_MPU6050_SCAN_GYRO_Z))
 899
 900 #define INV_MPU6050_SCAN_MASK_TEMP              (BIT(INV_MPU6050_SCAN_TEMP))
 901
 902 static const unsigned long inv_mpu_scan_masks[] = {
 903         /* 3-axis accel */
 904         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
 905         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
 906         /* 3-axis gyro */
 907         INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
 908         INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
 909         /* 6-axis accel + gyro */
 910         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
 911         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
 912                 | INV_MPU6050_SCAN_MASK_TEMP,
 913         0,
 914 };
 915
 916 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index)                    \
 917         {                                                               \
 918                 .type = IIO_MAGN,                                       \
 919                 .modified = 1,                                          \
 920                 .channel2 = _chan2,                                     \
 921                 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) |        \
 922                                       BIT(IIO_CHAN_INFO_RAW),           \
 923                 .scan_index = _index,                                   \
 924                 .scan_type = {                                          \
 925                         .sign = 's',                                    \
 926                         .realbits = _bits,                              \
 927                         .storagebits = 16,                              \
 928                         .shift = 0,                                     \
 929                         .endianness = IIO_BE,                           \
 930                 },                                                      \
 931                 .ext_info = inv_ext_info,                               \
 932         }
 933
 934 static const struct iio_chan_spec inv_mpu9150_channels[] = {
 935         IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
 936
 937         INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
 938
 939         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
 940         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
 941         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
 942
 943         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
 944         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
 945         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
 946
 947         /* Magnetometer resolution is 13 bits */
 948         INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
 949         INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
 950         INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
 951 };
 952
 953 static const struct iio_chan_spec inv_mpu9250_channels[] = {
 954         IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
 955
 956         INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
 957
 958         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
 959         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
 960         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
 961
 962         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
 963         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
 964         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
 965
 966         /* Magnetometer resolution is 16 bits */
 967         INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
 968         INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
 969         INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
 970 };
 971
 972 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN        \
 973         (BIT(INV_MPU9X50_SCAN_MAGN_X)           \
 974         | BIT(INV_MPU9X50_SCAN_MAGN_Y)          \
 975         | BIT(INV_MPU9X50_SCAN_MAGN_Z))
 976
 977 static const unsigned long inv_mpu9x50_scan_masks[] = {
 978         /* 3-axis accel */
 979         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
 980         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
 981         /* 3-axis gyro */
 982         INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
 983         INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
 984         /* 3-axis magn */
 985         INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
 986         INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
 987         /* 6-axis accel + gyro */
 988         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
 989         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
 990                 | INV_MPU6050_SCAN_MASK_TEMP,
 991         /* 6-axis accel + magn */
 992         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
 993         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
 994                 | INV_MPU6050_SCAN_MASK_TEMP,
 995         /* 6-axis gyro + magn */
 996         INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
 997         INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
 998                 | INV_MPU6050_SCAN_MASK_TEMP,
 999         /* 9-axis accel + gyro + magn */
1000         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1001                 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1002         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1003                 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1004                 | INV_MPU6050_SCAN_MASK_TEMP,
1005         0,
1006 };
1007
1008 static const unsigned long inv_icm20602_scan_masks[] = {
1009         /* 3-axis accel + temp (mandatory) */
1010         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1011         /* 3-axis gyro + temp (mandatory) */
1012         INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1013         /* 6-axis accel + gyro + temp (mandatory) */
1014         INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1015                 | INV_MPU6050_SCAN_MASK_TEMP,
1016         0,
1017 };
1018
1019 /*
1020  * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1021  * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1022  * low-pass filter. Specifically, each of these sampling rates are about twice
1023  * the bandwidth of a corresponding low-pass filter, which should eliminate
1024  * aliasing following the Nyquist principle. By picking a frequency different
1025  * from these, the user risks aliasing effects.
1026  */
1027 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1028 static IIO_CONST_ATTR(in_anglvel_scale_available,
1029                                           "0.000133090 0.000266181 0.000532362 0.001064724");
1030 static IIO_CONST_ATTR(in_accel_scale_available,
1031                                           "0.000598 0.001196 0.002392 0.004785");
1032 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1033         inv_mpu6050_fifo_rate_store);
1034
1035 /* Deprecated: kept for userspace backward compatibility. */
1036 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1037         ATTR_GYRO_MATRIX);
1038 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1039         ATTR_ACCL_MATRIX);
1040
1041 static struct attribute *inv_attributes[] = {
1042         &iio_dev_attr_in_gyro_matrix.dev_attr.attr,  /* deprecated */
1043         &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1044         &iio_dev_attr_sampling_frequency.dev_attr.attr,
1045         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1046         &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1047         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1048         NULL,
1049 };
1050
1051 static const struct attribute_group inv_attribute_group = {
1052         .attrs = inv_attributes
1053 };
1054
1055 static const struct iio_info mpu_info = {
1056         .read_raw = &inv_mpu6050_read_raw,
1057         .write_raw = &inv_mpu6050_write_raw,
1058         .write_raw_get_fmt = &inv_write_raw_get_fmt,
1059         .attrs = &inv_attribute_group,
1060         .validate_trigger = inv_mpu6050_validate_trigger,
1061 };
1062
1063 /**
1064  *  inv_check_and_setup_chip() - check and setup chip.
1065  */
1066 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1067 {
1068         int result;
1069         unsigned int regval;
1070         int i;
1071
1072         st->hw  = &hw_info[st->chip_type];
1073         st->reg = hw_info[st->chip_type].reg;
1074
1075         /* check chip self-identification */
1076         result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, &regval);
1077         if (result)
1078                 return result;
1079         if (regval != st->hw->whoami) {
1080                 /* check whoami against all possible values */
1081                 for (i = 0; i < INV_NUM_PARTS; ++i) {
1082                         if (regval == hw_info[i].whoami) {
1083                                 dev_warn(regmap_get_device(st->map),
1084                                         "whoami mismatch got %#02x (%s)"
1085                                         "expected %#02hhx (%s)\n",
1086                                         regval, hw_info[i].name,
1087                                         st->hw->whoami, st->hw->name);
1088                                 break;
1089                         }
1090                 }
1091                 if (i >= INV_NUM_PARTS) {
1092                         dev_err(regmap_get_device(st->map),
1093                                 "invalid whoami %#02x expected %#02hhx (%s)\n",
1094                                 regval, st->hw->whoami, st->hw->name);
1095                         return -ENODEV;
1096                 }
1097         }
1098
1099         /* reset to make sure previous state are not there */
1100         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1101                               INV_MPU6050_BIT_H_RESET);
1102         if (result)
1103                 return result;
1104         msleep(INV_MPU6050_POWER_UP_TIME);
1105
1106         /*
1107          * Turn power on. After reset, the sleep bit could be on
1108          * or off depending on the OTP settings. Turning power on
1109          * make it in a definite state as well as making the hardware
1110          * state align with the software state
1111          */
1112         result = inv_mpu6050_set_power_itg(st, true);
1113         if (result)
1114                 return result;
1115
1116         result = inv_mpu6050_switch_engine(st, false,
1117                                            INV_MPU6050_BIT_PWR_ACCL_STBY);
1118         if (result)
1119                 goto error_power_off;
1120         result = inv_mpu6050_switch_engine(st, false,
1121                                            INV_MPU6050_BIT_PWR_GYRO_STBY);
1122         if (result)
1123                 goto error_power_off;
1124
1125         return inv_mpu6050_set_power_itg(st, false);
1126
1127 error_power_off:
1128         inv_mpu6050_set_power_itg(st, false);
1129         return result;
1130 }
1131
1132 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1133 {
1134         int result;
1135
1136         result = regulator_enable(st->vddio_supply);
1137         if (result) {
1138                 dev_err(regmap_get_device(st->map),
1139                         "Failed to enable vddio regulator: %d\n", result);
1140         } else {
1141                 /* Give the device a little bit of time to start up. */
1142                 usleep_range(35000, 70000);
1143         }
1144
1145         return result;
1146 }
1147
1148 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1149 {
1150         int result;
1151
1152         result = regulator_disable(st->vddio_supply);
1153         if (result)
1154                 dev_err(regmap_get_device(st->map),
1155                         "Failed to disable vddio regulator: %d\n", result);
1156
1157         return result;
1158 }
1159
1160 static void inv_mpu_core_disable_regulator_action(void *_data)
1161 {
1162         struct inv_mpu6050_state *st = _data;
1163         int result;
1164
1165         result = regulator_disable(st->vdd_supply);
1166         if (result)
1167                 dev_err(regmap_get_device(st->map),
1168                         "Failed to disable vdd regulator: %d\n", result);
1169
1170         inv_mpu_core_disable_regulator_vddio(st);
1171 }
1172
1173 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1174                 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1175 {
1176         struct inv_mpu6050_state *st;
1177         struct iio_dev *indio_dev;
1178         struct inv_mpu6050_platform_data *pdata;
1179         struct device *dev = regmap_get_device(regmap);
1180         int result;
1181         struct irq_data *desc;
1182         int irq_type;
1183
1184         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1185         if (!indio_dev)
1186                 return -ENOMEM;
1187
1188         BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1189         if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1190                 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1191                                 chip_type, name);
1192                 return -ENODEV;
1193         }
1194         st = iio_priv(indio_dev);
1195         mutex_init(&st->lock);
1196         st->chip_type = chip_type;
1197         st->powerup_count = 0;
1198         st->irq = irq;
1199         st->map = regmap;
1200
1201         pdata = dev_get_platdata(dev);
1202         if (!pdata) {
1203                 result = iio_read_mount_matrix(dev, "mount-matrix",
1204                                                &st->orientation);
1205                 if (result) {
1206                         dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1207                                 result);
1208                         return result;
1209                 }
1210         } else {
1211                 st->plat_data = *pdata;
1212         }
1213
1214         desc = irq_get_irq_data(irq);
1215         if (!desc) {
1216                 dev_err(dev, "Could not find IRQ %d\n", irq);
1217                 return -EINVAL;
1218         }
1219
1220         irq_type = irqd_get_trigger_type(desc);
1221         if (!irq_type)
1222                 irq_type = IRQF_TRIGGER_RISING;
1223         if (irq_type & IRQF_TRIGGER_RISING)     // rising or both-edge
1224                 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1225         else if (irq_type == IRQF_TRIGGER_FALLING)
1226                 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1227         else if (irq_type == IRQF_TRIGGER_HIGH)
1228                 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1229                         INV_MPU6050_LATCH_INT_EN;
1230         else if (irq_type == IRQF_TRIGGER_LOW)
1231                 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1232                         INV_MPU6050_LATCH_INT_EN;
1233         else {
1234                 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1235                         irq_type);
1236                 return -EINVAL;
1237         }
1238
1239         st->vdd_supply = devm_regulator_get(dev, "vdd");
1240         if (IS_ERR(st->vdd_supply)) {
1241                 if (PTR_ERR(st->vdd_supply) != -EPROBE_DEFER)
1242                         dev_err(dev, "Failed to get vdd regulator %d\n",
1243                                 (int)PTR_ERR(st->vdd_supply));
1244
1245                 return PTR_ERR(st->vdd_supply);
1246         }
1247
1248         st->vddio_supply = devm_regulator_get(dev, "vddio");
1249         if (IS_ERR(st->vddio_supply)) {
1250                 if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER)
1251                         dev_err(dev, "Failed to get vddio regulator %d\n",
1252                                 (int)PTR_ERR(st->vddio_supply));
1253
1254                 return PTR_ERR(st->vddio_supply);
1255         }
1256
1257         result = regulator_enable(st->vdd_supply);
1258         if (result) {
1259                 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1260                 return result;
1261         }
1262
1263         result = inv_mpu_core_enable_regulator_vddio(st);
1264         if (result) {
1265                 regulator_disable(st->vdd_supply);
1266                 return result;
1267         }
1268
1269         result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1270                                  st);
1271         if (result) {
1272                 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1273                         result);
1274                 return result;
1275         }
1276
1277         /* fill magnetometer orientation */
1278         result = inv_mpu_magn_set_orient(st);
1279         if (result)
1280                 return result;
1281
1282         /* power is turned on inside check chip type*/
1283         result = inv_check_and_setup_chip(st);
1284         if (result)
1285                 return result;
1286
1287         result = inv_mpu6050_init_config(indio_dev);
1288         if (result) {
1289                 dev_err(dev, "Could not initialize device.\n");
1290                 return result;
1291         }
1292
1293         dev_set_drvdata(dev, indio_dev);
1294         indio_dev->dev.parent = dev;
1295         /* name will be NULL when enumerated via ACPI */
1296         if (name)
1297                 indio_dev->name = name;
1298         else
1299                 indio_dev->name = dev_name(dev);
1300
1301         /* requires parent device set in indio_dev */
1302         if (inv_mpu_bus_setup)
1303                 inv_mpu_bus_setup(indio_dev);
1304
1305         switch (chip_type) {
1306         case INV_MPU9150:
1307                 indio_dev->channels = inv_mpu9150_channels;
1308                 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
1309                 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1310                 break;
1311         case INV_MPU9250:
1312         case INV_MPU9255:
1313                 indio_dev->channels = inv_mpu9250_channels;
1314                 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
1315                 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1316                 break;
1317         case INV_ICM20602:
1318                 indio_dev->channels = inv_mpu_channels;
1319                 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1320                 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1321                 break;
1322         default:
1323                 indio_dev->channels = inv_mpu_channels;
1324                 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1325                 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1326                 break;
1327         }
1328         /*
1329          * Use magnetometer inside the chip only if there is no i2c
1330          * auxiliary device in use. Otherwise Going back to 6-axis only.
1331          */
1332         if (st->magn_disabled) {
1333                 indio_dev->channels = inv_mpu_channels;
1334                 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1335                 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1336         }
1337
1338         indio_dev->info = &mpu_info;
1339         indio_dev->modes = INDIO_BUFFER_TRIGGERED;
1340
1341         result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1342                                                  iio_pollfunc_store_time,
1343                                                  inv_mpu6050_read_fifo,
1344                                                  NULL);
1345         if (result) {
1346                 dev_err(dev, "configure buffer fail %d\n", result);
1347                 return result;
1348         }
1349         result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1350         if (result) {
1351                 dev_err(dev, "trigger probe fail %d\n", result);
1352                 return result;
1353         }
1354
1355         result = devm_iio_device_register(dev, indio_dev);
1356         if (result) {
1357                 dev_err(dev, "IIO register fail %d\n", result);
1358                 return result;
1359         }
1360
1361         return 0;
1362 }
1363 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1364
1365 #ifdef CONFIG_PM_SLEEP
1366
1367 static int inv_mpu_resume(struct device *dev)
1368 {
1369         struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1370         int result;
1371
1372         mutex_lock(&st->lock);
1373         result = inv_mpu_core_enable_regulator_vddio(st);
1374         if (result)
1375                 goto out_unlock;
1376
1377         result = inv_mpu6050_set_power_itg(st, true);
1378 out_unlock:
1379         mutex_unlock(&st->lock);
1380
1381         return result;
1382 }
1383
1384 static int inv_mpu_suspend(struct device *dev)
1385 {
1386         struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1387         int result;
1388
1389         mutex_lock(&st->lock);
1390         result = inv_mpu6050_set_power_itg(st, false);
1391         inv_mpu_core_disable_regulator_vddio(st);
1392         mutex_unlock(&st->lock);
1393
1394         return result;
1395 }
1396 #endif /* CONFIG_PM_SLEEP */
1397
1398 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
1399 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1400
1401 MODULE_AUTHOR("Invensense Corporation");
1402 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1403 MODULE_LICENSE("GPL");