drivers/iio/gyro/bmg160_core.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * BMG160 Gyro Sensor driver
   4  * Copyright (c) 2014, Intel Corporation.
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/delay.h>
  10 #include <linux/slab.h>
  11 #include <linux/acpi.h>
  12 #include <linux/pm.h>
  13 #include <linux/pm_runtime.h>
  14 #include <linux/iio/iio.h>
  15 #include <linux/iio/sysfs.h>
  16 #include <linux/iio/buffer.h>
  17 #include <linux/iio/trigger.h>
  18 #include <linux/iio/events.h>
  19 #include <linux/iio/trigger_consumer.h>
  20 #include <linux/iio/triggered_buffer.h>
  21 #include <linux/regmap.h>
  22 #include <linux/regulator/consumer.h>
  23 #include "bmg160.h"
  24
  25 #define BMG160_IRQ_NAME         "bmg160_event"
  26
  27 #define BMG160_REG_CHIP_ID              0x00
  28 #define BMG160_CHIP_ID_VAL              0x0F
  29
  30 #define BMG160_REG_PMU_LPW              0x11
  31 #define BMG160_MODE_NORMAL              0x00
  32 #define BMG160_MODE_DEEP_SUSPEND        0x20
  33 #define BMG160_MODE_SUSPEND             0x80
  34
  35 #define BMG160_REG_RANGE                0x0F
  36
  37 #define BMG160_RANGE_2000DPS            0
  38 #define BMG160_RANGE_1000DPS            1
  39 #define BMG160_RANGE_500DPS             2
  40 #define BMG160_RANGE_250DPS             3
  41 #define BMG160_RANGE_125DPS             4
  42
  43 #define BMG160_REG_PMU_BW               0x10
  44 #define BMG160_NO_FILTER                0
  45 #define BMG160_DEF_BW                   100
  46 #define BMG160_REG_PMU_BW_RES           BIT(7)
  47
  48 #define BMG160_GYRO_REG_RESET           0x14
  49 #define BMG160_GYRO_RESET_VAL           0xb6
  50
  51 #define BMG160_REG_INT_MAP_0            0x17
  52 #define BMG160_INT_MAP_0_BIT_ANY        BIT(1)
  53
  54 #define BMG160_REG_INT_MAP_1            0x18
  55 #define BMG160_INT_MAP_1_BIT_NEW_DATA   BIT(0)
  56
  57 #define BMG160_REG_INT_RST_LATCH        0x21
  58 #define BMG160_INT_MODE_LATCH_RESET     0x80
  59 #define BMG160_INT_MODE_LATCH_INT       0x0F
  60 #define BMG160_INT_MODE_NON_LATCH_INT   0x00
  61
  62 #define BMG160_REG_INT_EN_0             0x15
  63 #define BMG160_DATA_ENABLE_INT          BIT(7)
  64
  65 #define BMG160_REG_INT_EN_1             0x16
  66 #define BMG160_INT1_BIT_OD              BIT(1)
  67
  68 #define BMG160_REG_XOUT_L               0x02
  69 #define BMG160_AXIS_TO_REG(axis)        (BMG160_REG_XOUT_L + (axis * 2))
  70
  71 #define BMG160_REG_SLOPE_THRES          0x1B
  72 #define BMG160_SLOPE_THRES_MASK 0x0F
  73
  74 #define BMG160_REG_MOTION_INTR          0x1C
  75 #define BMG160_INT_MOTION_X             BIT(0)
  76 #define BMG160_INT_MOTION_Y             BIT(1)
  77 #define BMG160_INT_MOTION_Z             BIT(2)
  78 #define BMG160_ANY_DUR_MASK             0x30
  79 #define BMG160_ANY_DUR_SHIFT            4
  80
  81 #define BMG160_REG_INT_STATUS_2 0x0B
  82 #define BMG160_ANY_MOTION_MASK          0x07
  83 #define BMG160_ANY_MOTION_BIT_X         BIT(0)
  84 #define BMG160_ANY_MOTION_BIT_Y         BIT(1)
  85 #define BMG160_ANY_MOTION_BIT_Z         BIT(2)
  86
  87 #define BMG160_REG_TEMP         0x08
  88 #define BMG160_TEMP_CENTER_VAL          23
  89
  90 #define BMG160_MAX_STARTUP_TIME_MS      80
  91
  92 #define BMG160_AUTO_SUSPEND_DELAY_MS    2000
  93
  94 struct bmg160_data {
  95         struct regmap *regmap;
  96         struct regulator_bulk_data regulators[2];
  97         struct iio_trigger *dready_trig;
  98         struct iio_trigger *motion_trig;
  99         struct iio_mount_matrix orientation;
 100         struct mutex mutex;
 101         s16 buffer[8];
 102         u32 dps_range;
 103         int ev_enable_state;
 104         int slope_thres;
 105         bool dready_trigger_on;
 106         bool motion_trigger_on;
 107         int irq;
 108 };
 109
 110 enum bmg160_axis {
 111         AXIS_X,
 112         AXIS_Y,
 113         AXIS_Z,
 114         AXIS_MAX,
 115 };
 116
 117 static const struct {
 118         int odr;
 119         int filter;
 120         int bw_bits;
 121 } bmg160_samp_freq_table[] = { {100, 32, 0x07},
 122                                {200, 64, 0x06},
 123                                {100, 12, 0x05},
 124                                {200, 23, 0x04},
 125                                {400, 47, 0x03},
 126                                {1000, 116, 0x02},
 127                                {2000, 230, 0x01} };
 128
 129 static const struct {
 130         int scale;
 131         int dps_range;
 132 } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
 133                            { 532, BMG160_RANGE_1000DPS},
 134                            { 266, BMG160_RANGE_500DPS},
 135                            { 133, BMG160_RANGE_250DPS},
 136                            { 66, BMG160_RANGE_125DPS} };
 137
 138 static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
 139 {
 140         struct device *dev = regmap_get_device(data->regmap);
 141         int ret;
 142
 143         ret = regmap_write(data->regmap, BMG160_REG_PMU_LPW, mode);
 144         if (ret < 0) {
 145                 dev_err(dev, "Error writing reg_pmu_lpw\n");
 146                 return ret;
 147         }
 148
 149         return 0;
 150 }
 151
 152 static int bmg160_convert_freq_to_bit(int val)
 153 {
 154         int i;
 155
 156         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 157                 if (bmg160_samp_freq_table[i].odr == val)
 158                         return bmg160_samp_freq_table[i].bw_bits;
 159         }
 160
 161         return -EINVAL;
 162 }
 163
 164 static int bmg160_set_bw(struct bmg160_data *data, int val)
 165 {
 166         struct device *dev = regmap_get_device(data->regmap);
 167         int ret;
 168         int bw_bits;
 169
 170         bw_bits = bmg160_convert_freq_to_bit(val);
 171         if (bw_bits < 0)
 172                 return bw_bits;
 173
 174         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW, bw_bits);
 175         if (ret < 0) {
 176                 dev_err(dev, "Error writing reg_pmu_bw\n");
 177                 return ret;
 178         }
 179
 180         return 0;
 181 }
 182
 183 static int bmg160_get_filter(struct bmg160_data *data, int *val)
 184 {
 185         struct device *dev = regmap_get_device(data->regmap);
 186         int ret;
 187         int i;
 188         unsigned int bw_bits;
 189
 190         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
 191         if (ret < 0) {
 192                 dev_err(dev, "Error reading reg_pmu_bw\n");
 193                 return ret;
 194         }
 195
 196         /* Ignore the readonly reserved bit. */
 197         bw_bits &= ~BMG160_REG_PMU_BW_RES;
 198
 199         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 200                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits)
 201                         break;
 202         }
 203
 204         *val = bmg160_samp_freq_table[i].filter;
 205
 206         return ret ? ret : IIO_VAL_INT;
 207 }
 208
 209
 210 static int bmg160_set_filter(struct bmg160_data *data, int val)
 211 {
 212         struct device *dev = regmap_get_device(data->regmap);
 213         int ret;
 214         int i;
 215
 216         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 217                 if (bmg160_samp_freq_table[i].filter == val)
 218                         break;
 219         }
 220
 221         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW,
 222                            bmg160_samp_freq_table[i].bw_bits);
 223         if (ret < 0) {
 224                 dev_err(dev, "Error writing reg_pmu_bw\n");
 225                 return ret;
 226         }
 227
 228         return 0;
 229 }
 230
 231 static int bmg160_chip_init(struct bmg160_data *data)
 232 {
 233         struct device *dev = regmap_get_device(data->regmap);
 234         int ret;
 235         unsigned int val;
 236
 237         /*
 238          * Reset chip to get it in a known good state. A delay of 30ms after
 239          * reset is required according to the datasheet.
 240          */
 241         regmap_write(data->regmap, BMG160_GYRO_REG_RESET,
 242                      BMG160_GYRO_RESET_VAL);
 243         usleep_range(30000, 30700);
 244
 245         ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val);
 246         if (ret < 0) {
 247                 dev_err(dev, "Error reading reg_chip_id\n");
 248                 return ret;
 249         }
 250
 251         dev_dbg(dev, "Chip Id %x\n", val);
 252         if (val != BMG160_CHIP_ID_VAL) {
 253                 dev_err(dev, "invalid chip %x\n", val);
 254                 return -ENODEV;
 255         }
 256
 257         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
 258         if (ret < 0)
 259                 return ret;
 260
 261         /* Wait upto 500 ms to be ready after changing mode */
 262         usleep_range(500, 1000);
 263
 264         /* Set Bandwidth */
 265         ret = bmg160_set_bw(data, BMG160_DEF_BW);
 266         if (ret < 0)
 267                 return ret;
 268
 269         /* Set Default Range */
 270         ret = regmap_write(data->regmap, BMG160_REG_RANGE, BMG160_RANGE_500DPS);
 271         if (ret < 0) {
 272                 dev_err(dev, "Error writing reg_range\n");
 273                 return ret;
 274         }
 275         data->dps_range = BMG160_RANGE_500DPS;
 276
 277         ret = regmap_read(data->regmap, BMG160_REG_SLOPE_THRES, &val);
 278         if (ret < 0) {
 279                 dev_err(dev, "Error reading reg_slope_thres\n");
 280                 return ret;
 281         }
 282         data->slope_thres = val;
 283
 284         /* Set default interrupt mode */
 285         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_EN_1,
 286                                  BMG160_INT1_BIT_OD, 0);
 287         if (ret < 0) {
 288                 dev_err(dev, "Error updating bits in reg_int_en_1\n");
 289                 return ret;
 290         }
 291
 292         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 293                            BMG160_INT_MODE_LATCH_INT |
 294                            BMG160_INT_MODE_LATCH_RESET);
 295         if (ret < 0) {
 296                 dev_err(dev,
 297                         "Error writing reg_motion_intr\n");
 298                 return ret;
 299         }
 300
 301         return 0;
 302 }
 303
 304 static int bmg160_set_power_state(struct bmg160_data *data, bool on)
 305 {
 306 #ifdef CONFIG_PM
 307         struct device *dev = regmap_get_device(data->regmap);
 308         int ret;
 309
 310         if (on)
 311                 ret = pm_runtime_get_sync(dev);
 312         else {
 313                 pm_runtime_mark_last_busy(dev);
 314                 ret = pm_runtime_put_autosuspend(dev);
 315         }
 316
 317         if (ret < 0) {
 318                 dev_err(dev, "Failed: bmg160_set_power_state for %d\n", on);
 319
 320                 if (on)
 321                         pm_runtime_put_noidle(dev);
 322
 323                 return ret;
 324         }
 325 #endif
 326
 327         return 0;
 328 }
 329
 330 static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
 331                                              bool status)
 332 {
 333         struct device *dev = regmap_get_device(data->regmap);
 334         int ret;
 335
 336         /* Enable/Disable INT_MAP0 mapping */
 337         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_0,
 338                                  BMG160_INT_MAP_0_BIT_ANY,
 339                                  (status ? BMG160_INT_MAP_0_BIT_ANY : 0));
 340         if (ret < 0) {
 341                 dev_err(dev, "Error updating bits reg_int_map0\n");
 342                 return ret;
 343         }
 344
 345         /* Enable/Disable slope interrupts */
 346         if (status) {
 347                 /* Update slope thres */
 348                 ret = regmap_write(data->regmap, BMG160_REG_SLOPE_THRES,
 349                                    data->slope_thres);
 350                 if (ret < 0) {
 351                         dev_err(dev, "Error writing reg_slope_thres\n");
 352                         return ret;
 353                 }
 354
 355                 ret = regmap_write(data->regmap, BMG160_REG_MOTION_INTR,
 356                                    BMG160_INT_MOTION_X | BMG160_INT_MOTION_Y |
 357                                    BMG160_INT_MOTION_Z);
 358                 if (ret < 0) {
 359                         dev_err(dev, "Error writing reg_motion_intr\n");
 360                         return ret;
 361                 }
 362
 363                 /*
 364                  * New data interrupt is always non-latched,
 365                  * which will have higher priority, so no need
 366                  * to set latched mode, we will be flooded anyway with INTR
 367                  */
 368                 if (!data->dready_trigger_on) {
 369                         ret = regmap_write(data->regmap,
 370                                            BMG160_REG_INT_RST_LATCH,
 371                                            BMG160_INT_MODE_LATCH_INT |
 372                                            BMG160_INT_MODE_LATCH_RESET);
 373                         if (ret < 0) {
 374                                 dev_err(dev, "Error writing reg_rst_latch\n");
 375                                 return ret;
 376                         }
 377                 }
 378
 379                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
 380                                    BMG160_DATA_ENABLE_INT);
 381
 382         } else {
 383                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
 384         }
 385
 386         if (ret < 0) {
 387                 dev_err(dev, "Error writing reg_int_en0\n");
 388                 return ret;
 389         }
 390
 391         return 0;
 392 }
 393
 394 static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
 395                                            bool status)
 396 {
 397         struct device *dev = regmap_get_device(data->regmap);
 398         int ret;
 399
 400         /* Enable/Disable INT_MAP1 mapping */
 401         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_1,
 402                                  BMG160_INT_MAP_1_BIT_NEW_DATA,
 403                                  (status ? BMG160_INT_MAP_1_BIT_NEW_DATA : 0));
 404         if (ret < 0) {
 405                 dev_err(dev, "Error updating bits in reg_int_map1\n");
 406                 return ret;
 407         }
 408
 409         if (status) {
 410                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 411                                    BMG160_INT_MODE_NON_LATCH_INT |
 412                                    BMG160_INT_MODE_LATCH_RESET);
 413                 if (ret < 0) {
 414                         dev_err(dev, "Error writing reg_rst_latch\n");
 415                         return ret;
 416                 }
 417
 418                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
 419                                    BMG160_DATA_ENABLE_INT);
 420
 421         } else {
 422                 /* Restore interrupt mode */
 423                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 424                                    BMG160_INT_MODE_LATCH_INT |
 425                                    BMG160_INT_MODE_LATCH_RESET);
 426                 if (ret < 0) {
 427                         dev_err(dev, "Error writing reg_rst_latch\n");
 428                         return ret;
 429                 }
 430
 431                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
 432         }
 433
 434         if (ret < 0) {
 435                 dev_err(dev, "Error writing reg_int_en0\n");
 436                 return ret;
 437         }
 438
 439         return 0;
 440 }
 441
 442 static int bmg160_get_bw(struct bmg160_data *data, int *val)
 443 {
 444         struct device *dev = regmap_get_device(data->regmap);
 445         int i;
 446         unsigned int bw_bits;
 447         int ret;
 448
 449         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
 450         if (ret < 0) {
 451                 dev_err(dev, "Error reading reg_pmu_bw\n");
 452                 return ret;
 453         }
 454
 455         /* Ignore the readonly reserved bit. */
 456         bw_bits &= ~BMG160_REG_PMU_BW_RES;
 457
 458         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 459                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits) {
 460                         *val = bmg160_samp_freq_table[i].odr;
 461                         return IIO_VAL_INT;
 462                 }
 463         }
 464
 465         return -EINVAL;
 466 }
 467
 468 static int bmg160_set_scale(struct bmg160_data *data, int val)
 469 {
 470         struct device *dev = regmap_get_device(data->regmap);
 471         int ret, i;
 472
 473         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
 474                 if (bmg160_scale_table[i].scale == val) {
 475                         ret = regmap_write(data->regmap, BMG160_REG_RANGE,
 476                                            bmg160_scale_table[i].dps_range);
 477                         if (ret < 0) {
 478                                 dev_err(dev, "Error writing reg_range\n");
 479                                 return ret;
 480                         }
 481                         data->dps_range = bmg160_scale_table[i].dps_range;
 482                         return 0;
 483                 }
 484         }
 485
 486         return -EINVAL;
 487 }
 488
 489 static int bmg160_get_temp(struct bmg160_data *data, int *val)
 490 {
 491         struct device *dev = regmap_get_device(data->regmap);
 492         int ret;
 493         unsigned int raw_val;
 494
 495         mutex_lock(&data->mutex);
 496         ret = bmg160_set_power_state(data, true);
 497         if (ret < 0) {
 498                 mutex_unlock(&data->mutex);
 499                 return ret;
 500         }
 501
 502         ret = regmap_read(data->regmap, BMG160_REG_TEMP, &raw_val);
 503         if (ret < 0) {
 504                 dev_err(dev, "Error reading reg_temp\n");
 505                 bmg160_set_power_state(data, false);
 506                 mutex_unlock(&data->mutex);
 507                 return ret;
 508         }
 509
 510         *val = sign_extend32(raw_val, 7);
 511         ret = bmg160_set_power_state(data, false);
 512         mutex_unlock(&data->mutex);
 513         if (ret < 0)
 514                 return ret;
 515
 516         return IIO_VAL_INT;
 517 }
 518
 519 static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
 520 {
 521         struct device *dev = regmap_get_device(data->regmap);
 522         int ret;
 523         __le16 raw_val;
 524
 525         mutex_lock(&data->mutex);
 526         ret = bmg160_set_power_state(data, true);
 527         if (ret < 0) {
 528                 mutex_unlock(&data->mutex);
 529                 return ret;
 530         }
 531
 532         ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(axis), &raw_val,
 533                                sizeof(raw_val));
 534         if (ret < 0) {
 535                 dev_err(dev, "Error reading axis %d\n", axis);
 536                 bmg160_set_power_state(data, false);
 537                 mutex_unlock(&data->mutex);
 538                 return ret;
 539         }
 540
 541         *val = sign_extend32(le16_to_cpu(raw_val), 15);
 542         ret = bmg160_set_power_state(data, false);
 543         mutex_unlock(&data->mutex);
 544         if (ret < 0)
 545                 return ret;
 546
 547         return IIO_VAL_INT;
 548 }
 549
 550 static int bmg160_read_raw(struct iio_dev *indio_dev,
 551                            struct iio_chan_spec const *chan,
 552                            int *val, int *val2, long mask)
 553 {
 554         struct bmg160_data *data = iio_priv(indio_dev);
 555         int ret;
 556
 557         switch (mask) {
 558         case IIO_CHAN_INFO_RAW:
 559                 switch (chan->type) {
 560                 case IIO_TEMP:
 561                         return bmg160_get_temp(data, val);
 562                 case IIO_ANGL_VEL:
 563                         if (iio_buffer_enabled(indio_dev))
 564                                 return -EBUSY;
 565                         else
 566                                 return bmg160_get_axis(data, chan->scan_index,
 567                                                        val);
 568                 default:
 569                         return -EINVAL;
 570                 }
 571         case IIO_CHAN_INFO_OFFSET:
 572                 if (chan->type == IIO_TEMP) {
 573                         *val = BMG160_TEMP_CENTER_VAL;
 574                         return IIO_VAL_INT;
 575                 } else
 576                         return -EINVAL;
 577         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 578                 return bmg160_get_filter(data, val);
 579         case IIO_CHAN_INFO_SCALE:
 580                 switch (chan->type) {
 581                 case IIO_TEMP:
 582                         *val = 500;
 583                         return IIO_VAL_INT;
 584                 case IIO_ANGL_VEL:
 585                 {
 586                         int i;
 587
 588                         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
 589                                 if (bmg160_scale_table[i].dps_range ==
 590                                                         data->dps_range) {
 591                                         *val = 0;
 592                                         *val2 = bmg160_scale_table[i].scale;
 593                                         return IIO_VAL_INT_PLUS_MICRO;
 594                                 }
 595                         }
 596                         return -EINVAL;
 597                 }
 598                 default:
 599                         return -EINVAL;
 600                 }
 601         case IIO_CHAN_INFO_SAMP_FREQ:
 602                 *val2 = 0;
 603                 mutex_lock(&data->mutex);
 604                 ret = bmg160_get_bw(data, val);
 605                 mutex_unlock(&data->mutex);
 606                 return ret;
 607         default:
 608                 return -EINVAL;
 609         }
 610 }
 611
 612 static int bmg160_write_raw(struct iio_dev *indio_dev,
 613                             struct iio_chan_spec const *chan,
 614                             int val, int val2, long mask)
 615 {
 616         struct bmg160_data *data = iio_priv(indio_dev);
 617         int ret;
 618
 619         switch (mask) {
 620         case IIO_CHAN_INFO_SAMP_FREQ:
 621                 mutex_lock(&data->mutex);
 622                 /*
 623                  * Section 4.2 of spec
 624                  * In suspend mode, the only supported operations are reading
 625                  * registers as well as writing to the (0x14) softreset
 626                  * register. Since we will be in suspend mode by default, change
 627                  * mode to power on for other writes.
 628                  */
 629                 ret = bmg160_set_power_state(data, true);
 630                 if (ret < 0) {
 631                         mutex_unlock(&data->mutex);
 632                         return ret;
 633                 }
 634                 ret = bmg160_set_bw(data, val);
 635                 if (ret < 0) {
 636                         bmg160_set_power_state(data, false);
 637                         mutex_unlock(&data->mutex);
 638                         return ret;
 639                 }
 640                 ret = bmg160_set_power_state(data, false);
 641                 mutex_unlock(&data->mutex);
 642                 return ret;
 643         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 644                 if (val2)
 645                         return -EINVAL;
 646
 647                 mutex_lock(&data->mutex);
 648                 ret = bmg160_set_power_state(data, true);
 649                 if (ret < 0) {
 650                         bmg160_set_power_state(data, false);
 651                         mutex_unlock(&data->mutex);
 652                         return ret;
 653                 }
 654                 ret = bmg160_set_filter(data, val);
 655                 if (ret < 0) {
 656                         bmg160_set_power_state(data, false);
 657                         mutex_unlock(&data->mutex);
 658                         return ret;
 659                 }
 660                 ret = bmg160_set_power_state(data, false);
 661                 mutex_unlock(&data->mutex);
 662                 return ret;
 663         case IIO_CHAN_INFO_SCALE:
 664                 if (val)
 665                         return -EINVAL;
 666
 667                 mutex_lock(&data->mutex);
 668                 /* Refer to comments above for the suspend mode ops */
 669                 ret = bmg160_set_power_state(data, true);
 670                 if (ret < 0) {
 671                         mutex_unlock(&data->mutex);
 672                         return ret;
 673                 }
 674                 ret = bmg160_set_scale(data, val2);
 675                 if (ret < 0) {
 676                         bmg160_set_power_state(data, false);
 677                         mutex_unlock(&data->mutex);
 678                         return ret;
 679                 }
 680                 ret = bmg160_set_power_state(data, false);
 681                 mutex_unlock(&data->mutex);
 682                 return ret;
 683         default:
 684                 return -EINVAL;
 685         }
 686
 687         return -EINVAL;
 688 }
 689
 690 static int bmg160_read_event(struct iio_dev *indio_dev,
 691                              const struct iio_chan_spec *chan,
 692                              enum iio_event_type type,
 693                              enum iio_event_direction dir,
 694                              enum iio_event_info info,
 695                              int *val, int *val2)
 696 {
 697         struct bmg160_data *data = iio_priv(indio_dev);
 698
 699         *val2 = 0;
 700         switch (info) {
 701         case IIO_EV_INFO_VALUE:
 702                 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
 703                 break;
 704         default:
 705                 return -EINVAL;
 706         }
 707
 708         return IIO_VAL_INT;
 709 }
 710
 711 static int bmg160_write_event(struct iio_dev *indio_dev,
 712                               const struct iio_chan_spec *chan,
 713                               enum iio_event_type type,
 714                               enum iio_event_direction dir,
 715                               enum iio_event_info info,
 716                               int val, int val2)
 717 {
 718         struct bmg160_data *data = iio_priv(indio_dev);
 719
 720         switch (info) {
 721         case IIO_EV_INFO_VALUE:
 722                 if (data->ev_enable_state)
 723                         return -EBUSY;
 724                 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
 725                 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
 726                 break;
 727         default:
 728                 return -EINVAL;
 729         }
 730
 731         return 0;
 732 }
 733
 734 static int bmg160_read_event_config(struct iio_dev *indio_dev,
 735                                     const struct iio_chan_spec *chan,
 736                                     enum iio_event_type type,
 737                                     enum iio_event_direction dir)
 738 {
 739
 740         struct bmg160_data *data = iio_priv(indio_dev);
 741
 742         return data->ev_enable_state;
 743 }
 744
 745 static int bmg160_write_event_config(struct iio_dev *indio_dev,
 746                                      const struct iio_chan_spec *chan,
 747                                      enum iio_event_type type,
 748                                      enum iio_event_direction dir,
 749                                      int state)
 750 {
 751         struct bmg160_data *data = iio_priv(indio_dev);
 752         int ret;
 753
 754         if (state && data->ev_enable_state)
 755                 return 0;
 756
 757         mutex_lock(&data->mutex);
 758
 759         if (!state && data->motion_trigger_on) {
 760                 data->ev_enable_state = 0;
 761                 mutex_unlock(&data->mutex);
 762                 return 0;
 763         }
 764         /*
 765          * We will expect the enable and disable to do operation in
 766          * in reverse order. This will happen here anyway as our
 767          * resume operation uses sync mode runtime pm calls, the
 768          * suspend operation will be delayed by autosuspend delay
 769          * So the disable operation will still happen in reverse of
 770          * enable operation. When runtime pm is disabled the mode
 771          * is always on so sequence doesn't matter
 772          */
 773         ret = bmg160_set_power_state(data, state);
 774         if (ret < 0) {
 775                 mutex_unlock(&data->mutex);
 776                 return ret;
 777         }
 778
 779         ret =  bmg160_setup_any_motion_interrupt(data, state);
 780         if (ret < 0) {
 781                 bmg160_set_power_state(data, false);
 782                 mutex_unlock(&data->mutex);
 783                 return ret;
 784         }
 785
 786         data->ev_enable_state = state;
 787         mutex_unlock(&data->mutex);
 788
 789         return 0;
 790 }
 791
 792 static const struct iio_mount_matrix *
 793 bmg160_get_mount_matrix(const struct iio_dev *indio_dev,
 794                          const struct iio_chan_spec *chan)
 795 {
 796         struct bmg160_data *data = iio_priv(indio_dev);
 797
 798         return &data->orientation;
 799 }
 800
 801 static const struct iio_chan_spec_ext_info bmg160_ext_info[] = {
 802         IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmg160_get_mount_matrix),
 803         { }
 804 };
 805
 806 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
 807
 808 static IIO_CONST_ATTR(in_anglvel_scale_available,
 809                       "0.001065 0.000532 0.000266 0.000133 0.000066");
 810
 811 static struct attribute *bmg160_attributes[] = {
 812         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 813         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
 814         NULL,
 815 };
 816
 817 static const struct attribute_group bmg160_attrs_group = {
 818         .attrs = bmg160_attributes,
 819 };
 820
 821 static const struct iio_event_spec bmg160_event = {
 822                 .type = IIO_EV_TYPE_ROC,
 823                 .dir = IIO_EV_DIR_EITHER,
 824                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
 825                                        BIT(IIO_EV_INFO_ENABLE)
 826 };
 827
 828 #define BMG160_CHANNEL(_axis) {                                 \
 829         .type = IIO_ANGL_VEL,                                           \
 830         .modified = 1,                                                  \
 831         .channel2 = IIO_MOD_##_axis,                                    \
 832         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),                   \
 833         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |          \
 834                 BIT(IIO_CHAN_INFO_SAMP_FREQ) |                          \
 835                 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),       \
 836         .scan_index = AXIS_##_axis,                                     \
 837         .scan_type = {                                                  \
 838                 .sign = 's',                                            \
 839                 .realbits = 16,                                 \
 840                 .storagebits = 16,                                      \
 841                 .endianness = IIO_LE,                                   \
 842         },                                                              \
 843         .ext_info = bmg160_ext_info,                                    \
 844         .event_spec = &bmg160_event,                                    \
 845         .num_event_specs = 1                                            \
 846 }
 847
 848 static const struct iio_chan_spec bmg160_channels[] = {
 849         {
 850                 .type = IIO_TEMP,
 851                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 852                                       BIT(IIO_CHAN_INFO_SCALE) |
 853                                       BIT(IIO_CHAN_INFO_OFFSET),
 854                 .scan_index = -1,
 855         },
 856         BMG160_CHANNEL(X),
 857         BMG160_CHANNEL(Y),
 858         BMG160_CHANNEL(Z),
 859         IIO_CHAN_SOFT_TIMESTAMP(3),
 860 };
 861
 862 static const struct iio_info bmg160_info = {
 863         .attrs                  = &bmg160_attrs_group,
 864         .read_raw               = bmg160_read_raw,
 865         .write_raw              = bmg160_write_raw,
 866         .read_event_value       = bmg160_read_event,
 867         .write_event_value      = bmg160_write_event,
 868         .write_event_config     = bmg160_write_event_config,
 869         .read_event_config      = bmg160_read_event_config,
 870 };
 871
 872 static const unsigned long bmg160_accel_scan_masks[] = {
 873                                         BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
 874                                         0};
 875
 876 static irqreturn_t bmg160_trigger_handler(int irq, void *p)
 877 {
 878         struct iio_poll_func *pf = p;
 879         struct iio_dev *indio_dev = pf->indio_dev;
 880         struct bmg160_data *data = iio_priv(indio_dev);
 881         int ret;
 882
 883         mutex_lock(&data->mutex);
 884         ret = regmap_bulk_read(data->regmap, BMG160_REG_XOUT_L,
 885                                data->buffer, AXIS_MAX * 2);
 886         mutex_unlock(&data->mutex);
 887         if (ret < 0)
 888                 goto err;
 889
 890         iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
 891                                            pf->timestamp);
 892 err:
 893         iio_trigger_notify_done(indio_dev->trig);
 894
 895         return IRQ_HANDLED;
 896 }
 897
 898 static void bmg160_trig_reen(struct iio_trigger *trig)
 899 {
 900         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
 901         struct bmg160_data *data = iio_priv(indio_dev);
 902         struct device *dev = regmap_get_device(data->regmap);
 903         int ret;
 904
 905         /* new data interrupts don't need ack */
 906         if (data->dready_trigger_on)
 907                 return;
 908
 909         /* Set latched mode interrupt and clear any latched interrupt */
 910         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 911                            BMG160_INT_MODE_LATCH_INT |
 912                            BMG160_INT_MODE_LATCH_RESET);
 913         if (ret < 0)
 914                 dev_err(dev, "Error writing reg_rst_latch\n");
 915 }
 916
 917 static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
 918                                              bool state)
 919 {
 920         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
 921         struct bmg160_data *data = iio_priv(indio_dev);
 922         int ret;
 923
 924         mutex_lock(&data->mutex);
 925
 926         if (!state && data->ev_enable_state && data->motion_trigger_on) {
 927                 data->motion_trigger_on = false;
 928                 mutex_unlock(&data->mutex);
 929                 return 0;
 930         }
 931
 932         /*
 933          * Refer to comment in bmg160_write_event_config for
 934          * enable/disable operation order
 935          */
 936         ret = bmg160_set_power_state(data, state);
 937         if (ret < 0) {
 938                 mutex_unlock(&data->mutex);
 939                 return ret;
 940         }
 941         if (data->motion_trig == trig)
 942                 ret =  bmg160_setup_any_motion_interrupt(data, state);
 943         else
 944                 ret = bmg160_setup_new_data_interrupt(data, state);
 945         if (ret < 0) {
 946                 bmg160_set_power_state(data, false);
 947                 mutex_unlock(&data->mutex);
 948                 return ret;
 949         }
 950         if (data->motion_trig == trig)
 951                 data->motion_trigger_on = state;
 952         else
 953                 data->dready_trigger_on = state;
 954
 955         mutex_unlock(&data->mutex);
 956
 957         return 0;
 958 }
 959
 960 static const struct iio_trigger_ops bmg160_trigger_ops = {
 961         .set_trigger_state = bmg160_data_rdy_trigger_set_state,
 962         .reenable = bmg160_trig_reen,
 963 };
 964
 965 static irqreturn_t bmg160_event_handler(int irq, void *private)
 966 {
 967         struct iio_dev *indio_dev = private;
 968         struct bmg160_data *data = iio_priv(indio_dev);
 969         struct device *dev = regmap_get_device(data->regmap);
 970         int ret;
 971         int dir;
 972         unsigned int val;
 973
 974         ret = regmap_read(data->regmap, BMG160_REG_INT_STATUS_2, &val);
 975         if (ret < 0) {
 976                 dev_err(dev, "Error reading reg_int_status2\n");
 977                 goto ack_intr_status;
 978         }
 979
 980         if (val & 0x08)
 981                 dir = IIO_EV_DIR_RISING;
 982         else
 983                 dir = IIO_EV_DIR_FALLING;
 984
 985         if (val & BMG160_ANY_MOTION_BIT_X)
 986                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
 987                                                              0,
 988                                                              IIO_MOD_X,
 989                                                              IIO_EV_TYPE_ROC,
 990                                                              dir),
 991                                iio_get_time_ns(indio_dev));
 992         if (val & BMG160_ANY_MOTION_BIT_Y)
 993                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
 994                                                              0,
 995                                                              IIO_MOD_Y,
 996                                                              IIO_EV_TYPE_ROC,
 997                                                              dir),
 998                                iio_get_time_ns(indio_dev));
 999         if (val & BMG160_ANY_MOTION_BIT_Z)
1000                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
1001                                                              0,
1002                                                              IIO_MOD_Z,
1003                                                              IIO_EV_TYPE_ROC,
1004                                                              dir),
1005                                iio_get_time_ns(indio_dev));
1006
1007 ack_intr_status:
1008         if (!data->dready_trigger_on) {
1009                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
1010                                    BMG160_INT_MODE_LATCH_INT |
1011                                    BMG160_INT_MODE_LATCH_RESET);
1012                 if (ret < 0)
1013                         dev_err(dev, "Error writing reg_rst_latch\n");
1014         }
1015
1016         return IRQ_HANDLED;
1017 }
1018
1019 static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
1020 {
1021         struct iio_dev *indio_dev = private;
1022         struct bmg160_data *data = iio_priv(indio_dev);
1023
1024         if (data->dready_trigger_on)
1025                 iio_trigger_poll(data->dready_trig);
1026         else if (data->motion_trigger_on)
1027                 iio_trigger_poll(data->motion_trig);
1028
1029         if (data->ev_enable_state)
1030                 return IRQ_WAKE_THREAD;
1031         else
1032                 return IRQ_HANDLED;
1033
1034 }
1035
1036 static int bmg160_buffer_preenable(struct iio_dev *indio_dev)
1037 {
1038         struct bmg160_data *data = iio_priv(indio_dev);
1039
1040         return bmg160_set_power_state(data, true);
1041 }
1042
1043 static int bmg160_buffer_postdisable(struct iio_dev *indio_dev)
1044 {
1045         struct bmg160_data *data = iio_priv(indio_dev);
1046
1047         return bmg160_set_power_state(data, false);
1048 }
1049
1050 static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = {
1051         .preenable = bmg160_buffer_preenable,
1052         .postdisable = bmg160_buffer_postdisable,
1053 };
1054
1055 static const char *bmg160_match_acpi_device(struct device *dev)
1056 {
1057         const struct acpi_device_id *id;
1058
1059         id = acpi_match_device(dev->driver->acpi_match_table, dev);
1060         if (!id)
1061                 return NULL;
1062
1063         return dev_name(dev);
1064 }
1065
1066 static void bmg160_disable_regulators(void *d)
1067 {
1068         struct bmg160_data *data = d;
1069
1070         regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
1071 }
1072
1073 int bmg160_core_probe(struct device *dev, struct regmap *regmap, int irq,
1074                       const char *name)
1075 {
1076         struct bmg160_data *data;
1077         struct iio_dev *indio_dev;
1078         int ret;
1079
1080         indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1081         if (!indio_dev)
1082                 return -ENOMEM;
1083
1084         data = iio_priv(indio_dev);
1085         dev_set_drvdata(dev, indio_dev);
1086         data->irq = irq;
1087         data->regmap = regmap;
1088
1089         data->regulators[0].supply = "vdd";
1090         data->regulators[1].supply = "vddio";
1091         ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->regulators),
1092                                       data->regulators);
1093         if (ret)
1094                 return dev_err_probe(dev, ret, "Failed to get regulators\n");
1095
1096         ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
1097                                     data->regulators);
1098         if (ret)
1099                 return ret;
1100
1101         ret = devm_add_action_or_reset(dev, bmg160_disable_regulators, data);
1102         if (ret)
1103                 return ret;
1104
1105         ret = iio_read_mount_matrix(dev, "mount-matrix",
1106                                 &data->orientation);
1107         if (ret)
1108                 return ret;
1109
1110         ret = bmg160_chip_init(data);
1111         if (ret < 0)
1112                 return ret;
1113
1114         mutex_init(&data->mutex);
1115
1116         if (ACPI_HANDLE(dev))
1117                 name = bmg160_match_acpi_device(dev);
1118
1119         indio_dev->channels = bmg160_channels;
1120         indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
1121         indio_dev->name = name;
1122         indio_dev->available_scan_masks = bmg160_accel_scan_masks;
1123         indio_dev->modes = INDIO_DIRECT_MODE;
1124         indio_dev->info = &bmg160_info;
1125
1126         if (data->irq > 0) {
1127                 ret = devm_request_threaded_irq(dev,
1128                                                 data->irq,
1129                                                 bmg160_data_rdy_trig_poll,
1130                                                 bmg160_event_handler,
1131                                                 IRQF_TRIGGER_RISING,
1132                                                 BMG160_IRQ_NAME,
1133                                                 indio_dev);
1134                 if (ret)
1135                         return ret;
1136
1137                 data->dready_trig = devm_iio_trigger_alloc(dev,
1138                                                            "%s-dev%d",
1139                                                            indio_dev->name,
1140                                                            indio_dev->id);
1141                 if (!data->dready_trig)
1142                         return -ENOMEM;
1143
1144                 data->motion_trig = devm_iio_trigger_alloc(dev,
1145                                                           "%s-any-motion-dev%d",
1146                                                           indio_dev->name,
1147                                                           indio_dev->id);
1148                 if (!data->motion_trig)
1149                         return -ENOMEM;
1150
1151                 data->dready_trig->ops = &bmg160_trigger_ops;
1152                 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1153                 ret = iio_trigger_register(data->dready_trig);
1154                 if (ret)
1155                         return ret;
1156
1157                 data->motion_trig->ops = &bmg160_trigger_ops;
1158                 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1159                 ret = iio_trigger_register(data->motion_trig);
1160                 if (ret) {
1161                         data->motion_trig = NULL;
1162                         goto err_trigger_unregister;
1163                 }
1164         }
1165
1166         ret = iio_triggered_buffer_setup(indio_dev,
1167                                          iio_pollfunc_store_time,
1168                                          bmg160_trigger_handler,
1169                                          &bmg160_buffer_setup_ops);
1170         if (ret < 0) {
1171                 dev_err(dev,
1172                         "iio triggered buffer setup failed\n");
1173                 goto err_trigger_unregister;
1174         }
1175
1176         ret = pm_runtime_set_active(dev);
1177         if (ret)
1178                 goto err_buffer_cleanup;
1179
1180         pm_runtime_enable(dev);
1181         pm_runtime_set_autosuspend_delay(dev,
1182                                          BMG160_AUTO_SUSPEND_DELAY_MS);
1183         pm_runtime_use_autosuspend(dev);
1184
1185         ret = iio_device_register(indio_dev);
1186         if (ret < 0) {
1187                 dev_err(dev, "unable to register iio device\n");
1188                 goto err_buffer_cleanup;
1189         }
1190
1191         return 0;
1192
1193 err_buffer_cleanup:
1194         iio_triggered_buffer_cleanup(indio_dev);
1195 err_trigger_unregister:
1196         if (data->dready_trig)
1197                 iio_trigger_unregister(data->dready_trig);
1198         if (data->motion_trig)
1199                 iio_trigger_unregister(data->motion_trig);
1200
1201         return ret;
1202 }
1203 EXPORT_SYMBOL_GPL(bmg160_core_probe);
1204
1205 void bmg160_core_remove(struct device *dev)
1206 {
1207         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1208         struct bmg160_data *data = iio_priv(indio_dev);
1209
1210         iio_device_unregister(indio_dev);
1211
1212         pm_runtime_disable(dev);
1213         pm_runtime_set_suspended(dev);
1214         pm_runtime_put_noidle(dev);
1215
1216         iio_triggered_buffer_cleanup(indio_dev);
1217
1218         if (data->dready_trig) {
1219                 iio_trigger_unregister(data->dready_trig);
1220                 iio_trigger_unregister(data->motion_trig);
1221         }
1222
1223         mutex_lock(&data->mutex);
1224         bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1225         mutex_unlock(&data->mutex);
1226 }
1227 EXPORT_SYMBOL_GPL(bmg160_core_remove);
1228
1229 #ifdef CONFIG_PM_SLEEP
1230 static int bmg160_suspend(struct device *dev)
1231 {
1232         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1233         struct bmg160_data *data = iio_priv(indio_dev);
1234
1235         mutex_lock(&data->mutex);
1236         bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1237         mutex_unlock(&data->mutex);
1238
1239         return 0;
1240 }
1241
1242 static int bmg160_resume(struct device *dev)
1243 {
1244         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1245         struct bmg160_data *data = iio_priv(indio_dev);
1246
1247         mutex_lock(&data->mutex);
1248         if (data->dready_trigger_on || data->motion_trigger_on ||
1249                                                         data->ev_enable_state)
1250                 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1251         mutex_unlock(&data->mutex);
1252
1253         return 0;
1254 }
1255 #endif
1256
1257 #ifdef CONFIG_PM
1258 static int bmg160_runtime_suspend(struct device *dev)
1259 {
1260         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1261         struct bmg160_data *data = iio_priv(indio_dev);
1262         int ret;
1263
1264         ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1265         if (ret < 0) {
1266                 dev_err(dev, "set mode failed\n");
1267                 return -EAGAIN;
1268         }
1269
1270         return 0;
1271 }
1272
1273 static int bmg160_runtime_resume(struct device *dev)
1274 {
1275         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1276         struct bmg160_data *data = iio_priv(indio_dev);
1277         int ret;
1278
1279         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1280         if (ret < 0)
1281                 return ret;
1282
1283         msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1284
1285         return 0;
1286 }
1287 #endif
1288
1289 const struct dev_pm_ops bmg160_pm_ops = {
1290         SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1291         SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1292                            bmg160_runtime_resume, NULL)
1293 };
1294 EXPORT_SYMBOL_GPL(bmg160_pm_ops);
1295
1296 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1297 MODULE_LICENSE("GPL v2");
1298 MODULE_DESCRIPTION("BMG160 Gyro driver");