drivers/iio/gyro/bmg160_core.c

   1 /*
   2  * BMG160 Gyro Sensor driver
   3  * Copyright (c) 2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/slab.h>
  19 #include <linux/acpi.h>
  20 #include <linux/pm.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/iio/iio.h>
  23 #include <linux/iio/sysfs.h>
  24 #include <linux/iio/buffer.h>
  25 #include <linux/iio/trigger.h>
  26 #include <linux/iio/events.h>
  27 #include <linux/iio/trigger_consumer.h>
  28 #include <linux/iio/triggered_buffer.h>
  29 #include <linux/regmap.h>
  30 #include "bmg160.h"
  31
  32 #define BMG160_IRQ_NAME         "bmg160_event"
  33
  34 #define BMG160_REG_CHIP_ID              0x00
  35 #define BMG160_CHIP_ID_VAL              0x0F
  36
  37 #define BMG160_REG_PMU_LPW              0x11
  38 #define BMG160_MODE_NORMAL              0x00
  39 #define BMG160_MODE_DEEP_SUSPEND        0x20
  40 #define BMG160_MODE_SUSPEND             0x80
  41
  42 #define BMG160_REG_RANGE                0x0F
  43
  44 #define BMG160_RANGE_2000DPS            0
  45 #define BMG160_RANGE_1000DPS            1
  46 #define BMG160_RANGE_500DPS             2
  47 #define BMG160_RANGE_250DPS             3
  48 #define BMG160_RANGE_125DPS             4
  49
  50 #define BMG160_REG_PMU_BW               0x10
  51 #define BMG160_NO_FILTER                0
  52 #define BMG160_DEF_BW                   100
  53 #define BMG160_REG_PMU_BW_RES           BIT(7)
  54
  55 #define BMG160_GYRO_REG_RESET           0x14
  56 #define BMG160_GYRO_RESET_VAL           0xb6
  57
  58 #define BMG160_REG_INT_MAP_0            0x17
  59 #define BMG160_INT_MAP_0_BIT_ANY        BIT(1)
  60
  61 #define BMG160_REG_INT_MAP_1            0x18
  62 #define BMG160_INT_MAP_1_BIT_NEW_DATA   BIT(0)
  63
  64 #define BMG160_REG_INT_RST_LATCH        0x21
  65 #define BMG160_INT_MODE_LATCH_RESET     0x80
  66 #define BMG160_INT_MODE_LATCH_INT       0x0F
  67 #define BMG160_INT_MODE_NON_LATCH_INT   0x00
  68
  69 #define BMG160_REG_INT_EN_0             0x15
  70 #define BMG160_DATA_ENABLE_INT          BIT(7)
  71
  72 #define BMG160_REG_INT_EN_1             0x16
  73 #define BMG160_INT1_BIT_OD              BIT(1)
  74
  75 #define BMG160_REG_XOUT_L               0x02
  76 #define BMG160_AXIS_TO_REG(axis)        (BMG160_REG_XOUT_L + (axis * 2))
  77
  78 #define BMG160_REG_SLOPE_THRES          0x1B
  79 #define BMG160_SLOPE_THRES_MASK 0x0F
  80
  81 #define BMG160_REG_MOTION_INTR          0x1C
  82 #define BMG160_INT_MOTION_X             BIT(0)
  83 #define BMG160_INT_MOTION_Y             BIT(1)
  84 #define BMG160_INT_MOTION_Z             BIT(2)
  85 #define BMG160_ANY_DUR_MASK             0x30
  86 #define BMG160_ANY_DUR_SHIFT            4
  87
  88 #define BMG160_REG_INT_STATUS_2 0x0B
  89 #define BMG160_ANY_MOTION_MASK          0x07
  90 #define BMG160_ANY_MOTION_BIT_X         BIT(0)
  91 #define BMG160_ANY_MOTION_BIT_Y         BIT(1)
  92 #define BMG160_ANY_MOTION_BIT_Z         BIT(2)
  93
  94 #define BMG160_REG_TEMP         0x08
  95 #define BMG160_TEMP_CENTER_VAL          23
  96
  97 #define BMG160_MAX_STARTUP_TIME_MS      80
  98
  99 #define BMG160_AUTO_SUSPEND_DELAY_MS    2000
 100
 101 struct bmg160_data {
 102         struct regmap *regmap;
 103         struct iio_trigger *dready_trig;
 104         struct iio_trigger *motion_trig;
 105         struct iio_mount_matrix orientation;
 106         struct mutex mutex;
 107         s16 buffer[8];
 108         u32 dps_range;
 109         int ev_enable_state;
 110         int slope_thres;
 111         bool dready_trigger_on;
 112         bool motion_trigger_on;
 113         int irq;
 114 };
 115
 116 enum bmg160_axis {
 117         AXIS_X,
 118         AXIS_Y,
 119         AXIS_Z,
 120         AXIS_MAX,
 121 };
 122
 123 static const struct {
 124         int odr;
 125         int filter;
 126         int bw_bits;
 127 } bmg160_samp_freq_table[] = { {100, 32, 0x07},
 128                                {200, 64, 0x06},
 129                                {100, 12, 0x05},
 130                                {200, 23, 0x04},
 131                                {400, 47, 0x03},
 132                                {1000, 116, 0x02},
 133                                {2000, 230, 0x01} };
 134
 135 static const struct {
 136         int scale;
 137         int dps_range;
 138 } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
 139                            { 532, BMG160_RANGE_1000DPS},
 140                            { 266, BMG160_RANGE_500DPS},
 141                            { 133, BMG160_RANGE_250DPS},
 142                            { 66, BMG160_RANGE_125DPS} };
 143
 144 static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
 145 {
 146         struct device *dev = regmap_get_device(data->regmap);
 147         int ret;
 148
 149         ret = regmap_write(data->regmap, BMG160_REG_PMU_LPW, mode);
 150         if (ret < 0) {
 151                 dev_err(dev, "Error writing reg_pmu_lpw\n");
 152                 return ret;
 153         }
 154
 155         return 0;
 156 }
 157
 158 static int bmg160_convert_freq_to_bit(int val)
 159 {
 160         int i;
 161
 162         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 163                 if (bmg160_samp_freq_table[i].odr == val)
 164                         return bmg160_samp_freq_table[i].bw_bits;
 165         }
 166
 167         return -EINVAL;
 168 }
 169
 170 static int bmg160_set_bw(struct bmg160_data *data, int val)
 171 {
 172         struct device *dev = regmap_get_device(data->regmap);
 173         int ret;
 174         int bw_bits;
 175
 176         bw_bits = bmg160_convert_freq_to_bit(val);
 177         if (bw_bits < 0)
 178                 return bw_bits;
 179
 180         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW, bw_bits);
 181         if (ret < 0) {
 182                 dev_err(dev, "Error writing reg_pmu_bw\n");
 183                 return ret;
 184         }
 185
 186         return 0;
 187 }
 188
 189 static int bmg160_get_filter(struct bmg160_data *data, int *val)
 190 {
 191         struct device *dev = regmap_get_device(data->regmap);
 192         int ret;
 193         int i;
 194         unsigned int bw_bits;
 195
 196         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
 197         if (ret < 0) {
 198                 dev_err(dev, "Error reading reg_pmu_bw\n");
 199                 return ret;
 200         }
 201
 202         /* Ignore the readonly reserved bit. */
 203         bw_bits &= ~BMG160_REG_PMU_BW_RES;
 204
 205         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 206                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits)
 207                         break;
 208         }
 209
 210         *val = bmg160_samp_freq_table[i].filter;
 211
 212         return ret ? ret : IIO_VAL_INT;
 213 }
 214
 215
 216 static int bmg160_set_filter(struct bmg160_data *data, int val)
 217 {
 218         struct device *dev = regmap_get_device(data->regmap);
 219         int ret;
 220         int i;
 221
 222         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 223                 if (bmg160_samp_freq_table[i].filter == val)
 224                         break;
 225         }
 226
 227         ret = regmap_write(data->regmap, BMG160_REG_PMU_BW,
 228                            bmg160_samp_freq_table[i].bw_bits);
 229         if (ret < 0) {
 230                 dev_err(dev, "Error writing reg_pmu_bw\n");
 231                 return ret;
 232         }
 233
 234         return 0;
 235 }
 236
 237 static int bmg160_chip_init(struct bmg160_data *data)
 238 {
 239         struct device *dev = regmap_get_device(data->regmap);
 240         int ret;
 241         unsigned int val;
 242
 243         /*
 244          * Reset chip to get it in a known good state. A delay of 30ms after
 245          * reset is required according to the datasheet.
 246          */
 247         regmap_write(data->regmap, BMG160_GYRO_REG_RESET,
 248                      BMG160_GYRO_RESET_VAL);
 249         usleep_range(30000, 30700);
 250
 251         ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val);
 252         if (ret < 0) {
 253                 dev_err(dev, "Error reading reg_chip_id\n");
 254                 return ret;
 255         }
 256
 257         dev_dbg(dev, "Chip Id %x\n", val);
 258         if (val != BMG160_CHIP_ID_VAL) {
 259                 dev_err(dev, "invalid chip %x\n", val);
 260                 return -ENODEV;
 261         }
 262
 263         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
 264         if (ret < 0)
 265                 return ret;
 266
 267         /* Wait upto 500 ms to be ready after changing mode */
 268         usleep_range(500, 1000);
 269
 270         /* Set Bandwidth */
 271         ret = bmg160_set_bw(data, BMG160_DEF_BW);
 272         if (ret < 0)
 273                 return ret;
 274
 275         /* Set Default Range */
 276         ret = regmap_write(data->regmap, BMG160_REG_RANGE, BMG160_RANGE_500DPS);
 277         if (ret < 0) {
 278                 dev_err(dev, "Error writing reg_range\n");
 279                 return ret;
 280         }
 281         data->dps_range = BMG160_RANGE_500DPS;
 282
 283         ret = regmap_read(data->regmap, BMG160_REG_SLOPE_THRES, &val);
 284         if (ret < 0) {
 285                 dev_err(dev, "Error reading reg_slope_thres\n");
 286                 return ret;
 287         }
 288         data->slope_thres = val;
 289
 290         /* Set default interrupt mode */
 291         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_EN_1,
 292                                  BMG160_INT1_BIT_OD, 0);
 293         if (ret < 0) {
 294                 dev_err(dev, "Error updating bits in reg_int_en_1\n");
 295                 return ret;
 296         }
 297
 298         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 299                            BMG160_INT_MODE_LATCH_INT |
 300                            BMG160_INT_MODE_LATCH_RESET);
 301         if (ret < 0) {
 302                 dev_err(dev,
 303                         "Error writing reg_motion_intr\n");
 304                 return ret;
 305         }
 306
 307         return 0;
 308 }
 309
 310 static int bmg160_set_power_state(struct bmg160_data *data, bool on)
 311 {
 312 #ifdef CONFIG_PM
 313         struct device *dev = regmap_get_device(data->regmap);
 314         int ret;
 315
 316         if (on)
 317                 ret = pm_runtime_get_sync(dev);
 318         else {
 319                 pm_runtime_mark_last_busy(dev);
 320                 ret = pm_runtime_put_autosuspend(dev);
 321         }
 322
 323         if (ret < 0) {
 324                 dev_err(dev, "Failed: bmg160_set_power_state for %d\n", on);
 325
 326                 if (on)
 327                         pm_runtime_put_noidle(dev);
 328
 329                 return ret;
 330         }
 331 #endif
 332
 333         return 0;
 334 }
 335
 336 static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
 337                                              bool status)
 338 {
 339         struct device *dev = regmap_get_device(data->regmap);
 340         int ret;
 341
 342         /* Enable/Disable INT_MAP0 mapping */
 343         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_0,
 344                                  BMG160_INT_MAP_0_BIT_ANY,
 345                                  (status ? BMG160_INT_MAP_0_BIT_ANY : 0));
 346         if (ret < 0) {
 347                 dev_err(dev, "Error updating bits reg_int_map0\n");
 348                 return ret;
 349         }
 350
 351         /* Enable/Disable slope interrupts */
 352         if (status) {
 353                 /* Update slope thres */
 354                 ret = regmap_write(data->regmap, BMG160_REG_SLOPE_THRES,
 355                                    data->slope_thres);
 356                 if (ret < 0) {
 357                         dev_err(dev, "Error writing reg_slope_thres\n");
 358                         return ret;
 359                 }
 360
 361                 ret = regmap_write(data->regmap, BMG160_REG_MOTION_INTR,
 362                                    BMG160_INT_MOTION_X | BMG160_INT_MOTION_Y |
 363                                    BMG160_INT_MOTION_Z);
 364                 if (ret < 0) {
 365                         dev_err(dev, "Error writing reg_motion_intr\n");
 366                         return ret;
 367                 }
 368
 369                 /*
 370                  * New data interrupt is always non-latched,
 371                  * which will have higher priority, so no need
 372                  * to set latched mode, we will be flooded anyway with INTR
 373                  */
 374                 if (!data->dready_trigger_on) {
 375                         ret = regmap_write(data->regmap,
 376                                            BMG160_REG_INT_RST_LATCH,
 377                                            BMG160_INT_MODE_LATCH_INT |
 378                                            BMG160_INT_MODE_LATCH_RESET);
 379                         if (ret < 0) {
 380                                 dev_err(dev, "Error writing reg_rst_latch\n");
 381                                 return ret;
 382                         }
 383                 }
 384
 385                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
 386                                    BMG160_DATA_ENABLE_INT);
 387
 388         } else {
 389                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
 390         }
 391
 392         if (ret < 0) {
 393                 dev_err(dev, "Error writing reg_int_en0\n");
 394                 return ret;
 395         }
 396
 397         return 0;
 398 }
 399
 400 static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
 401                                            bool status)
 402 {
 403         struct device *dev = regmap_get_device(data->regmap);
 404         int ret;
 405
 406         /* Enable/Disable INT_MAP1 mapping */
 407         ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_1,
 408                                  BMG160_INT_MAP_1_BIT_NEW_DATA,
 409                                  (status ? BMG160_INT_MAP_1_BIT_NEW_DATA : 0));
 410         if (ret < 0) {
 411                 dev_err(dev, "Error updating bits in reg_int_map1\n");
 412                 return ret;
 413         }
 414
 415         if (status) {
 416                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 417                                    BMG160_INT_MODE_NON_LATCH_INT |
 418                                    BMG160_INT_MODE_LATCH_RESET);
 419                 if (ret < 0) {
 420                         dev_err(dev, "Error writing reg_rst_latch\n");
 421                         return ret;
 422                 }
 423
 424                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
 425                                    BMG160_DATA_ENABLE_INT);
 426
 427         } else {
 428                 /* Restore interrupt mode */
 429                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 430                                    BMG160_INT_MODE_LATCH_INT |
 431                                    BMG160_INT_MODE_LATCH_RESET);
 432                 if (ret < 0) {
 433                         dev_err(dev, "Error writing reg_rst_latch\n");
 434                         return ret;
 435                 }
 436
 437                 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
 438         }
 439
 440         if (ret < 0) {
 441                 dev_err(dev, "Error writing reg_int_en0\n");
 442                 return ret;
 443         }
 444
 445         return 0;
 446 }
 447
 448 static int bmg160_get_bw(struct bmg160_data *data, int *val)
 449 {
 450         struct device *dev = regmap_get_device(data->regmap);
 451         int i;
 452         unsigned int bw_bits;
 453         int ret;
 454
 455         ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
 456         if (ret < 0) {
 457                 dev_err(dev, "Error reading reg_pmu_bw\n");
 458                 return ret;
 459         }
 460
 461         /* Ignore the readonly reserved bit. */
 462         bw_bits &= ~BMG160_REG_PMU_BW_RES;
 463
 464         for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
 465                 if (bmg160_samp_freq_table[i].bw_bits == bw_bits) {
 466                         *val = bmg160_samp_freq_table[i].odr;
 467                         return IIO_VAL_INT;
 468                 }
 469         }
 470
 471         return -EINVAL;
 472 }
 473
 474 static int bmg160_set_scale(struct bmg160_data *data, int val)
 475 {
 476         struct device *dev = regmap_get_device(data->regmap);
 477         int ret, i;
 478
 479         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
 480                 if (bmg160_scale_table[i].scale == val) {
 481                         ret = regmap_write(data->regmap, BMG160_REG_RANGE,
 482                                            bmg160_scale_table[i].dps_range);
 483                         if (ret < 0) {
 484                                 dev_err(dev, "Error writing reg_range\n");
 485                                 return ret;
 486                         }
 487                         data->dps_range = bmg160_scale_table[i].dps_range;
 488                         return 0;
 489                 }
 490         }
 491
 492         return -EINVAL;
 493 }
 494
 495 static int bmg160_get_temp(struct bmg160_data *data, int *val)
 496 {
 497         struct device *dev = regmap_get_device(data->regmap);
 498         int ret;
 499         unsigned int raw_val;
 500
 501         mutex_lock(&data->mutex);
 502         ret = bmg160_set_power_state(data, true);
 503         if (ret < 0) {
 504                 mutex_unlock(&data->mutex);
 505                 return ret;
 506         }
 507
 508         ret = regmap_read(data->regmap, BMG160_REG_TEMP, &raw_val);
 509         if (ret < 0) {
 510                 dev_err(dev, "Error reading reg_temp\n");
 511                 bmg160_set_power_state(data, false);
 512                 mutex_unlock(&data->mutex);
 513                 return ret;
 514         }
 515
 516         *val = sign_extend32(raw_val, 7);
 517         ret = bmg160_set_power_state(data, false);
 518         mutex_unlock(&data->mutex);
 519         if (ret < 0)
 520                 return ret;
 521
 522         return IIO_VAL_INT;
 523 }
 524
 525 static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
 526 {
 527         struct device *dev = regmap_get_device(data->regmap);
 528         int ret;
 529         __le16 raw_val;
 530
 531         mutex_lock(&data->mutex);
 532         ret = bmg160_set_power_state(data, true);
 533         if (ret < 0) {
 534                 mutex_unlock(&data->mutex);
 535                 return ret;
 536         }
 537
 538         ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(axis), &raw_val,
 539                                sizeof(raw_val));
 540         if (ret < 0) {
 541                 dev_err(dev, "Error reading axis %d\n", axis);
 542                 bmg160_set_power_state(data, false);
 543                 mutex_unlock(&data->mutex);
 544                 return ret;
 545         }
 546
 547         *val = sign_extend32(le16_to_cpu(raw_val), 15);
 548         ret = bmg160_set_power_state(data, false);
 549         mutex_unlock(&data->mutex);
 550         if (ret < 0)
 551                 return ret;
 552
 553         return IIO_VAL_INT;
 554 }
 555
 556 static int bmg160_read_raw(struct iio_dev *indio_dev,
 557                            struct iio_chan_spec const *chan,
 558                            int *val, int *val2, long mask)
 559 {
 560         struct bmg160_data *data = iio_priv(indio_dev);
 561         int ret;
 562
 563         switch (mask) {
 564         case IIO_CHAN_INFO_RAW:
 565                 switch (chan->type) {
 566                 case IIO_TEMP:
 567                         return bmg160_get_temp(data, val);
 568                 case IIO_ANGL_VEL:
 569                         if (iio_buffer_enabled(indio_dev))
 570                                 return -EBUSY;
 571                         else
 572                                 return bmg160_get_axis(data, chan->scan_index,
 573                                                        val);
 574                 default:
 575                         return -EINVAL;
 576                 }
 577         case IIO_CHAN_INFO_OFFSET:
 578                 if (chan->type == IIO_TEMP) {
 579                         *val = BMG160_TEMP_CENTER_VAL;
 580                         return IIO_VAL_INT;
 581                 } else
 582                         return -EINVAL;
 583         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 584                 return bmg160_get_filter(data, val);
 585         case IIO_CHAN_INFO_SCALE:
 586                 switch (chan->type) {
 587                 case IIO_TEMP:
 588                         *val = 500;
 589                         return IIO_VAL_INT;
 590                 case IIO_ANGL_VEL:
 591                 {
 592                         int i;
 593
 594                         for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
 595                                 if (bmg160_scale_table[i].dps_range ==
 596                                                         data->dps_range) {
 597                                         *val = 0;
 598                                         *val2 = bmg160_scale_table[i].scale;
 599                                         return IIO_VAL_INT_PLUS_MICRO;
 600                                 }
 601                         }
 602                         return -EINVAL;
 603                 }
 604                 default:
 605                         return -EINVAL;
 606                 }
 607         case IIO_CHAN_INFO_SAMP_FREQ:
 608                 *val2 = 0;
 609                 mutex_lock(&data->mutex);
 610                 ret = bmg160_get_bw(data, val);
 611                 mutex_unlock(&data->mutex);
 612                 return ret;
 613         default:
 614                 return -EINVAL;
 615         }
 616 }
 617
 618 static int bmg160_write_raw(struct iio_dev *indio_dev,
 619                             struct iio_chan_spec const *chan,
 620                             int val, int val2, long mask)
 621 {
 622         struct bmg160_data *data = iio_priv(indio_dev);
 623         int ret;
 624
 625         switch (mask) {
 626         case IIO_CHAN_INFO_SAMP_FREQ:
 627                 mutex_lock(&data->mutex);
 628                 /*
 629                  * Section 4.2 of spec
 630                  * In suspend mode, the only supported operations are reading
 631                  * registers as well as writing to the (0x14) softreset
 632                  * register. Since we will be in suspend mode by default, change
 633                  * mode to power on for other writes.
 634                  */
 635                 ret = bmg160_set_power_state(data, true);
 636                 if (ret < 0) {
 637                         mutex_unlock(&data->mutex);
 638                         return ret;
 639                 }
 640                 ret = bmg160_set_bw(data, val);
 641                 if (ret < 0) {
 642                         bmg160_set_power_state(data, false);
 643                         mutex_unlock(&data->mutex);
 644                         return ret;
 645                 }
 646                 ret = bmg160_set_power_state(data, false);
 647                 mutex_unlock(&data->mutex);
 648                 return ret;
 649         case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 650                 if (val2)
 651                         return -EINVAL;
 652
 653                 mutex_lock(&data->mutex);
 654                 ret = bmg160_set_power_state(data, true);
 655                 if (ret < 0) {
 656                         bmg160_set_power_state(data, false);
 657                         mutex_unlock(&data->mutex);
 658                         return ret;
 659                 }
 660                 ret = bmg160_set_filter(data, val);
 661                 if (ret < 0) {
 662                         bmg160_set_power_state(data, false);
 663                         mutex_unlock(&data->mutex);
 664                         return ret;
 665                 }
 666                 ret = bmg160_set_power_state(data, false);
 667                 mutex_unlock(&data->mutex);
 668                 return ret;
 669         case IIO_CHAN_INFO_SCALE:
 670                 if (val)
 671                         return -EINVAL;
 672
 673                 mutex_lock(&data->mutex);
 674                 /* Refer to comments above for the suspend mode ops */
 675                 ret = bmg160_set_power_state(data, true);
 676                 if (ret < 0) {
 677                         mutex_unlock(&data->mutex);
 678                         return ret;
 679                 }
 680                 ret = bmg160_set_scale(data, val2);
 681                 if (ret < 0) {
 682                         bmg160_set_power_state(data, false);
 683                         mutex_unlock(&data->mutex);
 684                         return ret;
 685                 }
 686                 ret = bmg160_set_power_state(data, false);
 687                 mutex_unlock(&data->mutex);
 688                 return ret;
 689         default:
 690                 return -EINVAL;
 691         }
 692
 693         return -EINVAL;
 694 }
 695
 696 static int bmg160_read_event(struct iio_dev *indio_dev,
 697                              const struct iio_chan_spec *chan,
 698                              enum iio_event_type type,
 699                              enum iio_event_direction dir,
 700                              enum iio_event_info info,
 701                              int *val, int *val2)
 702 {
 703         struct bmg160_data *data = iio_priv(indio_dev);
 704
 705         *val2 = 0;
 706         switch (info) {
 707         case IIO_EV_INFO_VALUE:
 708                 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
 709                 break;
 710         default:
 711                 return -EINVAL;
 712         }
 713
 714         return IIO_VAL_INT;
 715 }
 716
 717 static int bmg160_write_event(struct iio_dev *indio_dev,
 718                               const struct iio_chan_spec *chan,
 719                               enum iio_event_type type,
 720                               enum iio_event_direction dir,
 721                               enum iio_event_info info,
 722                               int val, int val2)
 723 {
 724         struct bmg160_data *data = iio_priv(indio_dev);
 725
 726         switch (info) {
 727         case IIO_EV_INFO_VALUE:
 728                 if (data->ev_enable_state)
 729                         return -EBUSY;
 730                 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
 731                 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
 732                 break;
 733         default:
 734                 return -EINVAL;
 735         }
 736
 737         return 0;
 738 }
 739
 740 static int bmg160_read_event_config(struct iio_dev *indio_dev,
 741                                     const struct iio_chan_spec *chan,
 742                                     enum iio_event_type type,
 743                                     enum iio_event_direction dir)
 744 {
 745
 746         struct bmg160_data *data = iio_priv(indio_dev);
 747
 748         return data->ev_enable_state;
 749 }
 750
 751 static int bmg160_write_event_config(struct iio_dev *indio_dev,
 752                                      const struct iio_chan_spec *chan,
 753                                      enum iio_event_type type,
 754                                      enum iio_event_direction dir,
 755                                      int state)
 756 {
 757         struct bmg160_data *data = iio_priv(indio_dev);
 758         int ret;
 759
 760         if (state && data->ev_enable_state)
 761                 return 0;
 762
 763         mutex_lock(&data->mutex);
 764
 765         if (!state && data->motion_trigger_on) {
 766                 data->ev_enable_state = 0;
 767                 mutex_unlock(&data->mutex);
 768                 return 0;
 769         }
 770         /*
 771          * We will expect the enable and disable to do operation in
 772          * in reverse order. This will happen here anyway as our
 773          * resume operation uses sync mode runtime pm calls, the
 774          * suspend operation will be delayed by autosuspend delay
 775          * So the disable operation will still happen in reverse of
 776          * enable operation. When runtime pm is disabled the mode
 777          * is always on so sequence doesn't matter
 778          */
 779         ret = bmg160_set_power_state(data, state);
 780         if (ret < 0) {
 781                 mutex_unlock(&data->mutex);
 782                 return ret;
 783         }
 784
 785         ret =  bmg160_setup_any_motion_interrupt(data, state);
 786         if (ret < 0) {
 787                 bmg160_set_power_state(data, false);
 788                 mutex_unlock(&data->mutex);
 789                 return ret;
 790         }
 791
 792         data->ev_enable_state = state;
 793         mutex_unlock(&data->mutex);
 794
 795         return 0;
 796 }
 797
 798 static const struct iio_mount_matrix *
 799 bmg160_get_mount_matrix(const struct iio_dev *indio_dev,
 800                          const struct iio_chan_spec *chan)
 801 {
 802         struct bmg160_data *data = iio_priv(indio_dev);
 803
 804         return &data->orientation;
 805 }
 806
 807 static const struct iio_chan_spec_ext_info bmg160_ext_info[] = {
 808         IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmg160_get_mount_matrix),
 809         { }
 810 };
 811
 812 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
 813
 814 static IIO_CONST_ATTR(in_anglvel_scale_available,
 815                       "0.001065 0.000532 0.000266 0.000133 0.000066");
 816
 817 static struct attribute *bmg160_attributes[] = {
 818         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 819         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
 820         NULL,
 821 };
 822
 823 static const struct attribute_group bmg160_attrs_group = {
 824         .attrs = bmg160_attributes,
 825 };
 826
 827 static const struct iio_event_spec bmg160_event = {
 828                 .type = IIO_EV_TYPE_ROC,
 829                 .dir = IIO_EV_DIR_EITHER,
 830                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
 831                                        BIT(IIO_EV_INFO_ENABLE)
 832 };
 833
 834 #define BMG160_CHANNEL(_axis) {                                 \
 835         .type = IIO_ANGL_VEL,                                           \
 836         .modified = 1,                                                  \
 837         .channel2 = IIO_MOD_##_axis,                                    \
 838         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),                   \
 839         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |          \
 840                 BIT(IIO_CHAN_INFO_SAMP_FREQ) |                          \
 841                 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),       \
 842         .scan_index = AXIS_##_axis,                                     \
 843         .scan_type = {                                                  \
 844                 .sign = 's',                                            \
 845                 .realbits = 16,                                 \
 846                 .storagebits = 16,                                      \
 847                 .endianness = IIO_LE,                                   \
 848         },                                                              \
 849         .ext_info = bmg160_ext_info,                                    \
 850         .event_spec = &bmg160_event,                                    \
 851         .num_event_specs = 1                                            \
 852 }
 853
 854 static const struct iio_chan_spec bmg160_channels[] = {
 855         {
 856                 .type = IIO_TEMP,
 857                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 858                                       BIT(IIO_CHAN_INFO_SCALE) |
 859                                       BIT(IIO_CHAN_INFO_OFFSET),
 860                 .scan_index = -1,
 861         },
 862         BMG160_CHANNEL(X),
 863         BMG160_CHANNEL(Y),
 864         BMG160_CHANNEL(Z),
 865         IIO_CHAN_SOFT_TIMESTAMP(3),
 866 };
 867
 868 static const struct iio_info bmg160_info = {
 869         .attrs                  = &bmg160_attrs_group,
 870         .read_raw               = bmg160_read_raw,
 871         .write_raw              = bmg160_write_raw,
 872         .read_event_value       = bmg160_read_event,
 873         .write_event_value      = bmg160_write_event,
 874         .write_event_config     = bmg160_write_event_config,
 875         .read_event_config      = bmg160_read_event_config,
 876 };
 877
 878 static const unsigned long bmg160_accel_scan_masks[] = {
 879                                         BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
 880                                         0};
 881
 882 static irqreturn_t bmg160_trigger_handler(int irq, void *p)
 883 {
 884         struct iio_poll_func *pf = p;
 885         struct iio_dev *indio_dev = pf->indio_dev;
 886         struct bmg160_data *data = iio_priv(indio_dev);
 887         int ret;
 888
 889         mutex_lock(&data->mutex);
 890         ret = regmap_bulk_read(data->regmap, BMG160_REG_XOUT_L,
 891                                data->buffer, AXIS_MAX * 2);
 892         mutex_unlock(&data->mutex);
 893         if (ret < 0)
 894                 goto err;
 895
 896         iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
 897                                            pf->timestamp);
 898 err:
 899         iio_trigger_notify_done(indio_dev->trig);
 900
 901         return IRQ_HANDLED;
 902 }
 903
 904 static int bmg160_trig_try_reen(struct iio_trigger *trig)
 905 {
 906         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
 907         struct bmg160_data *data = iio_priv(indio_dev);
 908         struct device *dev = regmap_get_device(data->regmap);
 909         int ret;
 910
 911         /* new data interrupts don't need ack */
 912         if (data->dready_trigger_on)
 913                 return 0;
 914
 915         /* Set latched mode interrupt and clear any latched interrupt */
 916         ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
 917                            BMG160_INT_MODE_LATCH_INT |
 918                            BMG160_INT_MODE_LATCH_RESET);
 919         if (ret < 0) {
 920                 dev_err(dev, "Error writing reg_rst_latch\n");
 921                 return ret;
 922         }
 923
 924         return 0;
 925 }
 926
 927 static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
 928                                              bool state)
 929 {
 930         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
 931         struct bmg160_data *data = iio_priv(indio_dev);
 932         int ret;
 933
 934         mutex_lock(&data->mutex);
 935
 936         if (!state && data->ev_enable_state && data->motion_trigger_on) {
 937                 data->motion_trigger_on = false;
 938                 mutex_unlock(&data->mutex);
 939                 return 0;
 940         }
 941
 942         /*
 943          * Refer to comment in bmg160_write_event_config for
 944          * enable/disable operation order
 945          */
 946         ret = bmg160_set_power_state(data, state);
 947         if (ret < 0) {
 948                 mutex_unlock(&data->mutex);
 949                 return ret;
 950         }
 951         if (data->motion_trig == trig)
 952                 ret =  bmg160_setup_any_motion_interrupt(data, state);
 953         else
 954                 ret = bmg160_setup_new_data_interrupt(data, state);
 955         if (ret < 0) {
 956                 bmg160_set_power_state(data, false);
 957                 mutex_unlock(&data->mutex);
 958                 return ret;
 959         }
 960         if (data->motion_trig == trig)
 961                 data->motion_trigger_on = state;
 962         else
 963                 data->dready_trigger_on = state;
 964
 965         mutex_unlock(&data->mutex);
 966
 967         return 0;
 968 }
 969
 970 static const struct iio_trigger_ops bmg160_trigger_ops = {
 971         .set_trigger_state = bmg160_data_rdy_trigger_set_state,
 972         .try_reenable = bmg160_trig_try_reen,
 973 };
 974
 975 static irqreturn_t bmg160_event_handler(int irq, void *private)
 976 {
 977         struct iio_dev *indio_dev = private;
 978         struct bmg160_data *data = iio_priv(indio_dev);
 979         struct device *dev = regmap_get_device(data->regmap);
 980         int ret;
 981         int dir;
 982         unsigned int val;
 983
 984         ret = regmap_read(data->regmap, BMG160_REG_INT_STATUS_2, &val);
 985         if (ret < 0) {
 986                 dev_err(dev, "Error reading reg_int_status2\n");
 987                 goto ack_intr_status;
 988         }
 989
 990         if (val & 0x08)
 991                 dir = IIO_EV_DIR_RISING;
 992         else
 993                 dir = IIO_EV_DIR_FALLING;
 994
 995         if (val & BMG160_ANY_MOTION_BIT_X)
 996                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
 997                                                              0,
 998                                                              IIO_MOD_X,
 999                                                              IIO_EV_TYPE_ROC,
1000                                                              dir),
1001                                iio_get_time_ns(indio_dev));
1002         if (val & BMG160_ANY_MOTION_BIT_Y)
1003                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
1004                                                              0,
1005                                                              IIO_MOD_Y,
1006                                                              IIO_EV_TYPE_ROC,
1007                                                              dir),
1008                                iio_get_time_ns(indio_dev));
1009         if (val & BMG160_ANY_MOTION_BIT_Z)
1010                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
1011                                                              0,
1012                                                              IIO_MOD_Z,
1013                                                              IIO_EV_TYPE_ROC,
1014                                                              dir),
1015                                iio_get_time_ns(indio_dev));
1016
1017 ack_intr_status:
1018         if (!data->dready_trigger_on) {
1019                 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
1020                                    BMG160_INT_MODE_LATCH_INT |
1021                                    BMG160_INT_MODE_LATCH_RESET);
1022                 if (ret < 0)
1023                         dev_err(dev, "Error writing reg_rst_latch\n");
1024         }
1025
1026         return IRQ_HANDLED;
1027 }
1028
1029 static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
1030 {
1031         struct iio_dev *indio_dev = private;
1032         struct bmg160_data *data = iio_priv(indio_dev);
1033
1034         if (data->dready_trigger_on)
1035                 iio_trigger_poll(data->dready_trig);
1036         else if (data->motion_trigger_on)
1037                 iio_trigger_poll(data->motion_trig);
1038
1039         if (data->ev_enable_state)
1040                 return IRQ_WAKE_THREAD;
1041         else
1042                 return IRQ_HANDLED;
1043
1044 }
1045
1046 static int bmg160_buffer_preenable(struct iio_dev *indio_dev)
1047 {
1048         struct bmg160_data *data = iio_priv(indio_dev);
1049
1050         return bmg160_set_power_state(data, true);
1051 }
1052
1053 static int bmg160_buffer_postdisable(struct iio_dev *indio_dev)
1054 {
1055         struct bmg160_data *data = iio_priv(indio_dev);
1056
1057         return bmg160_set_power_state(data, false);
1058 }
1059
1060 static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = {
1061         .preenable = bmg160_buffer_preenable,
1062         .postenable = iio_triggered_buffer_postenable,
1063         .predisable = iio_triggered_buffer_predisable,
1064         .postdisable = bmg160_buffer_postdisable,
1065 };
1066
1067 static const char *bmg160_match_acpi_device(struct device *dev)
1068 {
1069         const struct acpi_device_id *id;
1070
1071         id = acpi_match_device(dev->driver->acpi_match_table, dev);
1072         if (!id)
1073                 return NULL;
1074
1075         return dev_name(dev);
1076 }
1077
1078 int bmg160_core_probe(struct device *dev, struct regmap *regmap, int irq,
1079                       const char *name)
1080 {
1081         struct bmg160_data *data;
1082         struct iio_dev *indio_dev;
1083         int ret;
1084
1085         indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1086         if (!indio_dev)
1087                 return -ENOMEM;
1088
1089         data = iio_priv(indio_dev);
1090         dev_set_drvdata(dev, indio_dev);
1091         data->irq = irq;
1092         data->regmap = regmap;
1093
1094         ret = iio_read_mount_matrix(dev, "mount-matrix",
1095                                 &data->orientation);
1096         if (ret)
1097                 return ret;
1098
1099         ret = bmg160_chip_init(data);
1100         if (ret < 0)
1101                 return ret;
1102
1103         mutex_init(&data->mutex);
1104
1105         if (ACPI_HANDLE(dev))
1106                 name = bmg160_match_acpi_device(dev);
1107
1108         indio_dev->dev.parent = dev;
1109         indio_dev->channels = bmg160_channels;
1110         indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
1111         indio_dev->name = name;
1112         indio_dev->available_scan_masks = bmg160_accel_scan_masks;
1113         indio_dev->modes = INDIO_DIRECT_MODE;
1114         indio_dev->info = &bmg160_info;
1115
1116         if (data->irq > 0) {
1117                 ret = devm_request_threaded_irq(dev,
1118                                                 data->irq,
1119                                                 bmg160_data_rdy_trig_poll,
1120                                                 bmg160_event_handler,
1121                                                 IRQF_TRIGGER_RISING,
1122                                                 BMG160_IRQ_NAME,
1123                                                 indio_dev);
1124                 if (ret)
1125                         return ret;
1126
1127                 data->dready_trig = devm_iio_trigger_alloc(dev,
1128                                                            "%s-dev%d",
1129                                                            indio_dev->name,
1130                                                            indio_dev->id);
1131                 if (!data->dready_trig)
1132                         return -ENOMEM;
1133
1134                 data->motion_trig = devm_iio_trigger_alloc(dev,
1135                                                           "%s-any-motion-dev%d",
1136                                                           indio_dev->name,
1137                                                           indio_dev->id);
1138                 if (!data->motion_trig)
1139                         return -ENOMEM;
1140
1141                 data->dready_trig->dev.parent = dev;
1142                 data->dready_trig->ops = &bmg160_trigger_ops;
1143                 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1144                 ret = iio_trigger_register(data->dready_trig);
1145                 if (ret)
1146                         return ret;
1147
1148                 data->motion_trig->dev.parent = dev;
1149                 data->motion_trig->ops = &bmg160_trigger_ops;
1150                 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1151                 ret = iio_trigger_register(data->motion_trig);
1152                 if (ret) {
1153                         data->motion_trig = NULL;
1154                         goto err_trigger_unregister;
1155                 }
1156         }
1157
1158         ret = iio_triggered_buffer_setup(indio_dev,
1159                                          iio_pollfunc_store_time,
1160                                          bmg160_trigger_handler,
1161                                          &bmg160_buffer_setup_ops);
1162         if (ret < 0) {
1163                 dev_err(dev,
1164                         "iio triggered buffer setup failed\n");
1165                 goto err_trigger_unregister;
1166         }
1167
1168         ret = pm_runtime_set_active(dev);
1169         if (ret)
1170                 goto err_buffer_cleanup;
1171
1172         pm_runtime_enable(dev);
1173         pm_runtime_set_autosuspend_delay(dev,
1174                                          BMG160_AUTO_SUSPEND_DELAY_MS);
1175         pm_runtime_use_autosuspend(dev);
1176
1177         ret = iio_device_register(indio_dev);
1178         if (ret < 0) {
1179                 dev_err(dev, "unable to register iio device\n");
1180                 goto err_buffer_cleanup;
1181         }
1182
1183         return 0;
1184
1185 err_buffer_cleanup:
1186         iio_triggered_buffer_cleanup(indio_dev);
1187 err_trigger_unregister:
1188         if (data->dready_trig)
1189                 iio_trigger_unregister(data->dready_trig);
1190         if (data->motion_trig)
1191                 iio_trigger_unregister(data->motion_trig);
1192
1193         return ret;
1194 }
1195 EXPORT_SYMBOL_GPL(bmg160_core_probe);
1196
1197 void bmg160_core_remove(struct device *dev)
1198 {
1199         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1200         struct bmg160_data *data = iio_priv(indio_dev);
1201
1202         iio_device_unregister(indio_dev);
1203
1204         pm_runtime_disable(dev);
1205         pm_runtime_set_suspended(dev);
1206         pm_runtime_put_noidle(dev);
1207
1208         iio_triggered_buffer_cleanup(indio_dev);
1209
1210         if (data->dready_trig) {
1211                 iio_trigger_unregister(data->dready_trig);
1212                 iio_trigger_unregister(data->motion_trig);
1213         }
1214
1215         mutex_lock(&data->mutex);
1216         bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1217         mutex_unlock(&data->mutex);
1218 }
1219 EXPORT_SYMBOL_GPL(bmg160_core_remove);
1220
1221 #ifdef CONFIG_PM_SLEEP
1222 static int bmg160_suspend(struct device *dev)
1223 {
1224         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1225         struct bmg160_data *data = iio_priv(indio_dev);
1226
1227         mutex_lock(&data->mutex);
1228         bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1229         mutex_unlock(&data->mutex);
1230
1231         return 0;
1232 }
1233
1234 static int bmg160_resume(struct device *dev)
1235 {
1236         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1237         struct bmg160_data *data = iio_priv(indio_dev);
1238
1239         mutex_lock(&data->mutex);
1240         if (data->dready_trigger_on || data->motion_trigger_on ||
1241                                                         data->ev_enable_state)
1242                 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1243         mutex_unlock(&data->mutex);
1244
1245         return 0;
1246 }
1247 #endif
1248
1249 #ifdef CONFIG_PM
1250 static int bmg160_runtime_suspend(struct device *dev)
1251 {
1252         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1253         struct bmg160_data *data = iio_priv(indio_dev);
1254         int ret;
1255
1256         ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1257         if (ret < 0) {
1258                 dev_err(dev, "set mode failed\n");
1259                 return -EAGAIN;
1260         }
1261
1262         return 0;
1263 }
1264
1265 static int bmg160_runtime_resume(struct device *dev)
1266 {
1267         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1268         struct bmg160_data *data = iio_priv(indio_dev);
1269         int ret;
1270
1271         ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1272         if (ret < 0)
1273                 return ret;
1274
1275         msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1276
1277         return 0;
1278 }
1279 #endif
1280
1281 const struct dev_pm_ops bmg160_pm_ops = {
1282         SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1283         SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1284                            bmg160_runtime_resume, NULL)
1285 };
1286 EXPORT_SYMBOL_GPL(bmg160_pm_ops);
1287
1288 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1289 MODULE_LICENSE("GPL v2");
1290 MODULE_DESCRIPTION("BMG160 Gyro driver");