1 // SPDX-License-Identifier: GPL-2.0-only
3 * LTC2632 Digital to analog convertors spi driver
5 * Copyright 2017 Maxime Roussin-BĂ©langer
6 * expanded by Silvan Murer <silvan.murer@gmail.com>
9 #include <linux/device.h>
10 #include <linux/spi/spi.h>
11 #include <linux/module.h>
12 #include <linux/iio/iio.h>
13 #include <linux/regulator/consumer.h>
15 #define LTC2632_ADDR_DAC0 0x0
16 #define LTC2632_ADDR_DAC1 0x1
18 #define LTC2632_CMD_WRITE_INPUT_N 0x0
19 #define LTC2632_CMD_UPDATE_DAC_N 0x1
20 #define LTC2632_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
21 #define LTC2632_CMD_WRITE_INPUT_N_UPDATE_N 0x3
22 #define LTC2632_CMD_POWERDOWN_DAC_N 0x4
23 #define LTC2632_CMD_POWERDOWN_CHIP 0x5
24 #define LTC2632_CMD_INTERNAL_REFER 0x6
25 #define LTC2632_CMD_EXTERNAL_REFER 0x7
28 * struct ltc2632_chip_info - chip specific information
29 * @channels: channel spec for the DAC
30 * @vref_mv: internal reference voltage
32 struct ltc2632_chip_info {
33 const struct iio_chan_spec *channels;
34 const size_t num_channels;
39 * struct ltc2632_state - driver instance specific data
40 * @spi_dev: pointer to the spi_device struct
41 * @powerdown_cache_mask used to show current channel powerdown state
42 * @vref_mv used reference voltage (internal or external)
43 * @vref_reg regulator for the reference voltage
45 struct ltc2632_state {
46 struct spi_device *spi_dev;
47 unsigned int powerdown_cache_mask;
49 struct regulator *vref_reg;
52 enum ltc2632_supported_device_ids {
67 static int ltc2632_spi_write(struct spi_device *spi,
68 u8 cmd, u8 addr, u16 val, u8 shift)
74 * The input shift register is 24 bits wide.
75 * The next four are the command bits, C3 to C0,
76 * followed by the 4-bit DAC address, A3 to A0, and then the
77 * 12-, 10-, 8-bit data-word. The data-word comprises the 12-,
78 * 10-, 8-bit input code followed by 4, 6, or 8 don't care bits.
80 data = (cmd << 20) | (addr << 16) | (val << shift);
85 return spi_write(spi, msg, sizeof(msg));
88 static int ltc2632_read_raw(struct iio_dev *indio_dev,
89 struct iio_chan_spec const *chan,
94 const struct ltc2632_state *st = iio_priv(indio_dev);
97 case IIO_CHAN_INFO_SCALE:
99 *val2 = chan->scan_type.realbits;
100 return IIO_VAL_FRACTIONAL_LOG2;
105 static int ltc2632_write_raw(struct iio_dev *indio_dev,
106 struct iio_chan_spec const *chan,
111 struct ltc2632_state *st = iio_priv(indio_dev);
114 case IIO_CHAN_INFO_RAW:
115 if (val >= (1 << chan->scan_type.realbits) || val < 0)
118 return ltc2632_spi_write(st->spi_dev,
119 LTC2632_CMD_WRITE_INPUT_N_UPDATE_N,
121 chan->scan_type.shift);
127 static ssize_t ltc2632_read_dac_powerdown(struct iio_dev *indio_dev,
129 const struct iio_chan_spec *chan,
132 struct ltc2632_state *st = iio_priv(indio_dev);
134 return sprintf(buf, "%d\n",
135 !!(st->powerdown_cache_mask & (1 << chan->channel)));
138 static ssize_t ltc2632_write_dac_powerdown(struct iio_dev *indio_dev,
140 const struct iio_chan_spec *chan,
146 struct ltc2632_state *st = iio_priv(indio_dev);
148 ret = strtobool(buf, &pwr_down);
153 st->powerdown_cache_mask |= (1 << chan->channel);
155 st->powerdown_cache_mask &= ~(1 << chan->channel);
157 ret = ltc2632_spi_write(st->spi_dev,
158 LTC2632_CMD_POWERDOWN_DAC_N,
159 chan->channel, 0, 0);
161 return ret ? ret : len;
164 static const struct iio_info ltc2632_info = {
165 .write_raw = ltc2632_write_raw,
166 .read_raw = ltc2632_read_raw,
169 static const struct iio_chan_spec_ext_info ltc2632_ext_info[] = {
172 .read = ltc2632_read_dac_powerdown,
173 .write = ltc2632_write_dac_powerdown,
174 .shared = IIO_SEPARATE,
179 #define LTC2632_CHANNEL(_chan, _bits) { \
180 .type = IIO_VOLTAGE, \
183 .channel = (_chan), \
184 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
185 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
186 .address = (_chan), \
188 .realbits = (_bits), \
189 .shift = 16 - (_bits), \
191 .ext_info = ltc2632_ext_info, \
194 #define DECLARE_LTC2632_CHANNELS(_name, _bits) \
195 const struct iio_chan_spec _name ## _channels[] = { \
196 LTC2632_CHANNEL(0, _bits), \
197 LTC2632_CHANNEL(1, _bits), \
198 LTC2632_CHANNEL(2, _bits), \
199 LTC2632_CHANNEL(3, _bits), \
200 LTC2632_CHANNEL(4, _bits), \
201 LTC2632_CHANNEL(5, _bits), \
202 LTC2632_CHANNEL(6, _bits), \
203 LTC2632_CHANNEL(7, _bits), \
206 static DECLARE_LTC2632_CHANNELS(ltc2632x12, 12);
207 static DECLARE_LTC2632_CHANNELS(ltc2632x10, 10);
208 static DECLARE_LTC2632_CHANNELS(ltc2632x8, 8);
210 static const struct ltc2632_chip_info ltc2632_chip_info_tbl[] = {
212 .channels = ltc2632x12_channels,
217 .channels = ltc2632x10_channels,
222 .channels = ltc2632x8_channels,
227 .channels = ltc2632x12_channels,
232 .channels = ltc2632x10_channels,
237 .channels = ltc2632x8_channels,
242 .channels = ltc2632x12_channels,
247 .channels = ltc2632x10_channels,
252 .channels = ltc2632x8_channels,
257 .channels = ltc2632x12_channels,
262 .channels = ltc2632x10_channels,
267 .channels = ltc2632x8_channels,
273 static int ltc2632_probe(struct spi_device *spi)
275 struct ltc2632_state *st;
276 struct iio_dev *indio_dev;
277 struct ltc2632_chip_info *chip_info;
280 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
284 st = iio_priv(indio_dev);
286 spi_set_drvdata(spi, indio_dev);
289 chip_info = (struct ltc2632_chip_info *)
290 spi_get_device_id(spi)->driver_data;
292 st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref");
293 if (PTR_ERR(st->vref_reg) == -ENODEV) {
294 /* use internal reference voltage */
296 st->vref_mv = chip_info->vref_mv;
298 ret = ltc2632_spi_write(spi, LTC2632_CMD_INTERNAL_REFER,
302 "Set internal reference command failed, %d\n",
306 } else if (IS_ERR(st->vref_reg)) {
308 "Error getting voltage reference regulator\n");
309 return PTR_ERR(st->vref_reg);
311 /* use external reference voltage */
312 ret = regulator_enable(st->vref_reg);
315 "enable reference regulator failed, %d\n",
319 st->vref_mv = regulator_get_voltage(st->vref_reg) / 1000;
321 ret = ltc2632_spi_write(spi, LTC2632_CMD_EXTERNAL_REFER,
325 "Set external reference command failed, %d\n",
331 indio_dev->dev.parent = &spi->dev;
332 indio_dev->name = dev_of_node(&spi->dev) ? dev_of_node(&spi->dev)->name
333 : spi_get_device_id(spi)->name;
334 indio_dev->info = <c2632_info;
335 indio_dev->modes = INDIO_DIRECT_MODE;
336 indio_dev->channels = chip_info->channels;
337 indio_dev->num_channels = chip_info->num_channels;
339 return iio_device_register(indio_dev);
342 static int ltc2632_remove(struct spi_device *spi)
344 struct iio_dev *indio_dev = spi_get_drvdata(spi);
345 struct ltc2632_state *st = iio_priv(indio_dev);
347 iio_device_unregister(indio_dev);
350 regulator_disable(st->vref_reg);
355 static const struct spi_device_id ltc2632_id[] = {
356 { "ltc2632-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L12] },
357 { "ltc2632-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L10] },
358 { "ltc2632-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L8] },
359 { "ltc2632-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H12] },
360 { "ltc2632-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H10] },
361 { "ltc2632-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H8] },
362 { "ltc2636-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L12] },
363 { "ltc2636-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L10] },
364 { "ltc2636-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L8] },
365 { "ltc2636-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H12] },
366 { "ltc2636-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H10] },
367 { "ltc2636-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H8] },
370 MODULE_DEVICE_TABLE(spi, ltc2632_id);
372 static const struct of_device_id ltc2632_of_match[] = {
374 .compatible = "lltc,ltc2632-l12",
375 .data = <c2632_chip_info_tbl[ID_LTC2632L12]
377 .compatible = "lltc,ltc2632-l10",
378 .data = <c2632_chip_info_tbl[ID_LTC2632L10]
380 .compatible = "lltc,ltc2632-l8",
381 .data = <c2632_chip_info_tbl[ID_LTC2632L8]
383 .compatible = "lltc,ltc2632-h12",
384 .data = <c2632_chip_info_tbl[ID_LTC2632H12]
386 .compatible = "lltc,ltc2632-h10",
387 .data = <c2632_chip_info_tbl[ID_LTC2632H10]
389 .compatible = "lltc,ltc2632-h8",
390 .data = <c2632_chip_info_tbl[ID_LTC2632H8]
392 .compatible = "lltc,ltc2636-l12",
393 .data = <c2632_chip_info_tbl[ID_LTC2636L12]
395 .compatible = "lltc,ltc2636-l10",
396 .data = <c2632_chip_info_tbl[ID_LTC2636L10]
398 .compatible = "lltc,ltc2636-l8",
399 .data = <c2632_chip_info_tbl[ID_LTC2636L8]
401 .compatible = "lltc,ltc2636-h12",
402 .data = <c2632_chip_info_tbl[ID_LTC2636H12]
404 .compatible = "lltc,ltc2636-h10",
405 .data = <c2632_chip_info_tbl[ID_LTC2636H10]
407 .compatible = "lltc,ltc2636-h8",
408 .data = <c2632_chip_info_tbl[ID_LTC2636H8]
412 MODULE_DEVICE_TABLE(of, ltc2632_of_match);
414 static struct spi_driver ltc2632_driver = {
417 .of_match_table = of_match_ptr(ltc2632_of_match),
419 .probe = ltc2632_probe,
420 .remove = ltc2632_remove,
421 .id_table = ltc2632_id,
423 module_spi_driver(ltc2632_driver);
425 MODULE_AUTHOR("Maxime Roussin-Belanger <maxime.roussinbelanger@gmail.com>");
426 MODULE_DESCRIPTION("LTC2632 DAC SPI driver");
427 MODULE_LICENSE("GPL v2");