1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This file is part of AD5686 DAC driver
5 * Copyright 2018 Analog Devices Inc.
8 #ifndef __DRIVERS_IIO_DAC_AD5686_H__
9 #define __DRIVERS_IIO_DAC_AD5686_H__
11 #include <linux/types.h>
12 #include <linux/cache.h>
13 #include <linux/mutex.h>
14 #include <linux/kernel.h>
16 #define AD5310_CMD(x) ((x) << 12)
18 #define AD5683_DATA(x) ((x) << 4)
20 #define AD5686_ADDR(x) ((x) << 16)
21 #define AD5686_CMD(x) ((x) << 20)
23 #define AD5686_ADDR_DAC(chan) (0x1 << (chan))
24 #define AD5686_ADDR_ALL_DAC 0xF
26 #define AD5686_CMD_NOOP 0x0
27 #define AD5686_CMD_WRITE_INPUT_N 0x1
28 #define AD5686_CMD_UPDATE_DAC_N 0x2
29 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3
30 #define AD5686_CMD_POWERDOWN_DAC 0x4
31 #define AD5686_CMD_LDAC_MASK 0x5
32 #define AD5686_CMD_RESET 0x6
33 #define AD5686_CMD_INTERNAL_REFER_SETUP 0x7
34 #define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8
35 #define AD5686_CMD_READBACK_ENABLE 0x9
37 #define AD5686_LDAC_PWRDN_NONE 0x0
38 #define AD5686_LDAC_PWRDN_1K 0x1
39 #define AD5686_LDAC_PWRDN_100K 0x2
40 #define AD5686_LDAC_PWRDN_3STATE 0x3
42 #define AD5686_CMD_CONTROL_REG 0x4
43 #define AD5686_CMD_READBACK_ENABLE_V2 0x5
45 #define AD5310_REF_BIT_MSK BIT(8)
46 #define AD5683_REF_BIT_MSK BIT(12)
47 #define AD5693_REF_BIT_MSK BIT(12)
50 * ad5686_supported_device_ids:
52 enum ad5686_supported_device_ids {
85 enum ad5686_regmap_type {
94 typedef int (*ad5686_write_func)(struct ad5686_state *st,
95 u8 cmd, u8 addr, u16 val);
97 typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
100 * struct ad5686_chip_info - chip specific information
101 * @int_vref_mv: AD5620/40/60: the internal reference voltage
102 * @num_channels: number of channels
103 * @channel: channel specification
104 * @regmap_type: register map layout variant
107 struct ad5686_chip_info {
109 unsigned int num_channels;
110 const struct iio_chan_spec *channels;
111 enum ad5686_regmap_type regmap_type;
115 * struct ad5446_state - driver instance specific data
117 * @chip_info: chip model specific constants, available modes etc
118 * @reg: supply regulator
119 * @vref_mv: actual reference voltage used
120 * @pwr_down_mask: power down mask
121 * @pwr_down_mode: current power down mode
122 * @use_internal_vref: set to true if the internal reference voltage is used
123 * @lock lock to protect the data buffer during regmap ops
124 * @data: spi transfer buffers
127 struct ad5686_state {
129 const struct ad5686_chip_info *chip_info;
130 struct regulator *reg;
131 unsigned short vref_mv;
132 unsigned int pwr_down_mask;
133 unsigned int pwr_down_mode;
134 ad5686_write_func write;
135 ad5686_read_func read;
136 bool use_internal_vref;
140 * DMA (thus cache coherency maintenance) requires the
141 * transfer buffers to live in their own cache lines.
148 } data[3] ____cacheline_aligned;
152 int ad5686_probe(struct device *dev,
153 enum ad5686_supported_device_ids chip_type,
154 const char *name, ad5686_write_func write,
155 ad5686_read_func read);
157 void ad5686_remove(struct device *dev);
160 #endif /* __DRIVERS_IIO_DAC_AD5686_H__ */