2 * AD5421 Digital to analog converters driver
4 * Copyright 2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/device.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/events.h>
22 #include <linux/iio/dac/ad5421.h>
25 #define AD5421_REG_DAC_DATA 0x1
26 #define AD5421_REG_CTRL 0x2
27 #define AD5421_REG_OFFSET 0x3
28 #define AD5421_REG_GAIN 0x4
29 /* load dac and fault shared the same register number. Writing to it will cause
30 * a dac load command, reading from it will return the fault status register */
31 #define AD5421_REG_LOAD_DAC 0x5
32 #define AD5421_REG_FAULT 0x5
33 #define AD5421_REG_FORCE_ALARM_CURRENT 0x6
34 #define AD5421_REG_RESET 0x7
35 #define AD5421_REG_START_CONVERSION 0x8
36 #define AD5421_REG_NOOP 0x9
38 #define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
39 #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
40 #define AD5421_CTRL_MIN_CURRENT BIT(9)
41 #define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
42 #define AD5421_CTRL_ADC_ENABLE BIT(7)
43 #define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
45 #define AD5421_FAULT_SPI BIT(15)
46 #define AD5421_FAULT_PEC BIT(14)
47 #define AD5421_FAULT_OVER_CURRENT BIT(13)
48 #define AD5421_FAULT_UNDER_CURRENT BIT(12)
49 #define AD5421_FAULT_TEMP_OVER_140 BIT(11)
50 #define AD5421_FAULT_TEMP_OVER_100 BIT(10)
51 #define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
52 #define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
54 /* These bits will cause the fault pin to go high */
55 #define AD5421_FAULT_TRIGGER_IRQ \
56 (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
57 AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
60 * struct ad5421_state - driver instance specific data
62 * @ctrl: control register cache
63 * @current_range: current range which the device is configured for
64 * @data: spi transfer buffers
65 * @fault_mask: software masking of events
68 struct spi_device *spi;
70 enum ad5421_current_range current_range;
71 unsigned int fault_mask;
74 * DMA (thus cache coherency maintenance) requires the
75 * transfer buffers to live in their own cache lines.
80 } data[2] ____cacheline_aligned;
83 static const struct iio_event_spec ad5421_current_event[] = {
85 .type = IIO_EV_TYPE_THRESH,
86 .dir = IIO_EV_DIR_RISING,
87 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
88 BIT(IIO_EV_INFO_ENABLE),
90 .type = IIO_EV_TYPE_THRESH,
91 .dir = IIO_EV_DIR_FALLING,
92 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
93 BIT(IIO_EV_INFO_ENABLE),
97 static const struct iio_event_spec ad5421_temp_event[] = {
99 .type = IIO_EV_TYPE_THRESH,
100 .dir = IIO_EV_DIR_RISING,
101 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
102 BIT(IIO_EV_INFO_ENABLE),
106 static const struct iio_chan_spec ad5421_channels[] = {
112 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
113 BIT(IIO_CHAN_INFO_CALIBSCALE) |
114 BIT(IIO_CHAN_INFO_CALIBBIAS),
115 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
116 BIT(IIO_CHAN_INFO_OFFSET),
117 .scan_type = IIO_ST('u', 16, 16, 0),
118 .event_spec = ad5421_current_event,
119 .num_event_specs = ARRAY_SIZE(ad5421_current_event),
124 .event_spec = ad5421_temp_event,
125 .num_event_specs = ARRAY_SIZE(ad5421_temp_event),
129 static int ad5421_write_unlocked(struct iio_dev *indio_dev,
130 unsigned int reg, unsigned int val)
132 struct ad5421_state *st = iio_priv(indio_dev);
134 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
136 return spi_write(st->spi, &st->data[0].d8[1], 3);
139 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
144 mutex_lock(&indio_dev->mlock);
145 ret = ad5421_write_unlocked(indio_dev, reg, val);
146 mutex_unlock(&indio_dev->mlock);
151 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
153 struct ad5421_state *st = iio_priv(indio_dev);
155 struct spi_transfer t[] = {
157 .tx_buf = &st->data[0].d8[1],
161 .rx_buf = &st->data[1].d8[1],
166 mutex_lock(&indio_dev->mlock);
168 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
170 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
172 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
174 mutex_unlock(&indio_dev->mlock);
179 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
182 struct ad5421_state *st = iio_priv(indio_dev);
185 mutex_lock(&indio_dev->mlock);
190 ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
192 mutex_unlock(&indio_dev->mlock);
197 static irqreturn_t ad5421_fault_handler(int irq, void *data)
199 struct iio_dev *indio_dev = data;
200 struct ad5421_state *st = iio_priv(indio_dev);
202 unsigned int old_fault = 0;
205 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
209 /* If we had a fault, this might mean that the DAC has lost its state
210 * and has been reset. Make sure that the control register actually
211 * contains what we expect it to contain. Otherwise the watchdog might
212 * be enabled and we get watchdog timeout faults, which will render the
214 ad5421_update_ctrl(indio_dev, 0, 0);
217 /* The fault pin stays high as long as a fault condition is present and
218 * it is not possible to mask fault conditions. For certain fault
219 * conditions for example like over-temperature it takes some time
220 * until the fault condition disappears. If we would exit the interrupt
221 * handler immediately after handling the event it would be entered
222 * again instantly. Thus we fall back to polling in case we detect that
223 * a interrupt condition is still present.
226 /* 0xffff is a invalid value for the register and will only be
227 * read if there has been a communication error */
231 /* we are only interested in new events */
232 events = (old_fault ^ fault) & fault;
233 events &= st->fault_mask;
235 if (events & AD5421_FAULT_OVER_CURRENT) {
236 iio_push_event(indio_dev,
237 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
244 if (events & AD5421_FAULT_UNDER_CURRENT) {
245 iio_push_event(indio_dev,
246 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
253 if (events & AD5421_FAULT_TEMP_OVER_140) {
254 iio_push_event(indio_dev,
255 IIO_UNMOD_EVENT_CODE(IIO_TEMP,
263 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
265 /* still active? go to sleep for some time */
266 if (fault & AD5421_FAULT_TRIGGER_IRQ)
269 } while (fault & AD5421_FAULT_TRIGGER_IRQ);
275 static void ad5421_get_current_min_max(struct ad5421_state *st,
276 unsigned int *min, unsigned int *max)
278 /* The current range is configured using external pins, which are
279 * usually hard-wired and not run-time switchable. */
280 switch (st->current_range) {
281 case AD5421_CURRENT_RANGE_4mA_20mA:
285 case AD5421_CURRENT_RANGE_3mA8_21mA:
289 case AD5421_CURRENT_RANGE_3mA2_24mA:
300 static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
302 unsigned int min, max;
304 ad5421_get_current_min_max(st, &min, &max);
305 return (min * (1 << 16)) / (max - min);
308 static int ad5421_read_raw(struct iio_dev *indio_dev,
309 struct iio_chan_spec const *chan, int *val, int *val2, long m)
311 struct ad5421_state *st = iio_priv(indio_dev);
312 unsigned int min, max;
315 if (chan->type != IIO_CURRENT)
319 case IIO_CHAN_INFO_RAW:
320 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
325 case IIO_CHAN_INFO_SCALE:
326 ad5421_get_current_min_max(st, &min, &max);
328 *val2 = (1 << 16) * 1000;
329 return IIO_VAL_FRACTIONAL;
330 case IIO_CHAN_INFO_OFFSET:
331 *val = ad5421_get_offset(st);
333 case IIO_CHAN_INFO_CALIBBIAS:
334 ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
339 case IIO_CHAN_INFO_CALIBSCALE:
340 ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
350 static int ad5421_write_raw(struct iio_dev *indio_dev,
351 struct iio_chan_spec const *chan, int val, int val2, long mask)
353 const unsigned int max_val = 1 << 16;
356 case IIO_CHAN_INFO_RAW:
357 if (val >= max_val || val < 0)
360 return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
361 case IIO_CHAN_INFO_CALIBBIAS:
363 if (val >= max_val || val < 0)
366 return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
367 case IIO_CHAN_INFO_CALIBSCALE:
368 if (val >= max_val || val < 0)
371 return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
379 static int ad5421_write_event_config(struct iio_dev *indio_dev,
380 const struct iio_chan_spec *chan, enum iio_event_type type,
381 enum iio_event_direction dir, int state)
383 struct ad5421_state *st = iio_priv(indio_dev);
386 switch (chan->type) {
388 if (dir == IIO_EV_DIR_RISING)
389 mask = AD5421_FAULT_OVER_CURRENT;
391 mask = AD5421_FAULT_UNDER_CURRENT;
394 mask = AD5421_FAULT_TEMP_OVER_140;
400 mutex_lock(&indio_dev->mlock);
402 st->fault_mask |= mask;
404 st->fault_mask &= ~mask;
405 mutex_unlock(&indio_dev->mlock);
410 static int ad5421_read_event_config(struct iio_dev *indio_dev,
411 const struct iio_chan_spec *chan, enum iio_event_type type,
412 enum iio_event_direction dir)
414 struct ad5421_state *st = iio_priv(indio_dev);
417 switch (chan->type) {
419 if (dir == IIO_EV_DIR_RISING)
420 mask = AD5421_FAULT_OVER_CURRENT;
422 mask = AD5421_FAULT_UNDER_CURRENT;
425 mask = AD5421_FAULT_TEMP_OVER_140;
431 return (bool)(st->fault_mask & mask);
434 static int ad5421_read_event_value(struct iio_dev *indio_dev,
435 const struct iio_chan_spec *chan, enum iio_event_type type,
436 enum iio_event_direction dir, enum iio_event_info info, int *val,
441 switch (chan->type) {
443 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
458 static const struct iio_info ad5421_info = {
459 .read_raw = ad5421_read_raw,
460 .write_raw = ad5421_write_raw,
461 .read_event_config_new = ad5421_read_event_config,
462 .write_event_config_new = ad5421_write_event_config,
463 .read_event_value_new = ad5421_read_event_value,
464 .driver_module = THIS_MODULE,
467 static int ad5421_probe(struct spi_device *spi)
469 struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
470 struct iio_dev *indio_dev;
471 struct ad5421_state *st;
474 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
475 if (indio_dev == NULL) {
476 dev_err(&spi->dev, "Failed to allocate iio device\n");
480 st = iio_priv(indio_dev);
481 spi_set_drvdata(spi, indio_dev);
485 indio_dev->dev.parent = &spi->dev;
486 indio_dev->name = "ad5421";
487 indio_dev->info = &ad5421_info;
488 indio_dev->modes = INDIO_DIRECT_MODE;
489 indio_dev->channels = ad5421_channels;
490 indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
492 st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
493 AD5421_CTRL_AUTO_FAULT_READBACK;
496 st->current_range = pdata->current_range;
497 if (pdata->external_vref)
498 st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
500 st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
503 /* write initial ctrl register value */
504 ad5421_update_ctrl(indio_dev, 0, 0);
507 ret = devm_request_threaded_irq(&spi->dev, spi->irq,
509 ad5421_fault_handler,
510 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
517 return iio_device_register(indio_dev);
520 static int ad5421_remove(struct spi_device *spi)
522 struct iio_dev *indio_dev = spi_get_drvdata(spi);
524 iio_device_unregister(indio_dev);
529 static struct spi_driver ad5421_driver = {
532 .owner = THIS_MODULE,
534 .probe = ad5421_probe,
535 .remove = ad5421_remove,
537 module_spi_driver(ad5421_driver);
539 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
540 MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
541 MODULE_LICENSE("GPL v2");
542 MODULE_ALIAS("spi:ad5421");