1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
5 * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
7 * Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf
10 #include <linux/module.h>
11 #include <linux/interrupt.h>
12 #include <linux/completion.h>
13 #include <linux/clk.h>
14 #include <linux/spi/spi.h>
15 #include <linux/iio/iio.h>
16 #include <linux/iio/buffer.h>
17 #include <linux/iio/trigger.h>
18 #include <linux/iio/triggered_buffer.h>
19 #include <linux/iio/trigger_consumer.h>
20 #include <linux/regulator/consumer.h>
22 #define ADC12138_MODE_AUTO_CAL 0x08
23 #define ADC12138_MODE_READ_STATUS 0x0c
24 #define ADC12138_MODE_ACQUISITION_TIME_6 0x0e
25 #define ADC12138_MODE_ACQUISITION_TIME_10 0x4e
26 #define ADC12138_MODE_ACQUISITION_TIME_18 0x8e
27 #define ADC12138_MODE_ACQUISITION_TIME_34 0xce
29 #define ADC12138_STATUS_CAL BIT(6)
38 struct spi_device *spi;
40 /* conversion clock */
42 /* positive analog voltage reference */
43 struct regulator *vref_p;
44 /* negative analog voltage reference */
45 struct regulator *vref_n;
47 struct completion complete;
48 /* The number of cclk periods for the S/H's acquisition time */
49 unsigned int acquisition_time;
51 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
52 * Less may be need if not all channels are enabled, as long as
53 * the 8 byte alignment of the timestamp is maintained.
55 __be16 data[20] __aligned(8);
57 u8 tx_buf[2] ____cacheline_aligned;
61 #define ADC12138_VOLTAGE_CHANNEL(chan) \
63 .type = IIO_VOLTAGE, \
66 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
67 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
68 | BIT(IIO_CHAN_INFO_OFFSET), \
75 .endianness = IIO_BE, \
79 #define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
81 .type = IIO_VOLTAGE, \
84 .channel2 = (chan2), \
86 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
87 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
88 | BIT(IIO_CHAN_INFO_OFFSET), \
95 .endianness = IIO_BE, \
99 static const struct iio_chan_spec adc12132_channels[] = {
100 ADC12138_VOLTAGE_CHANNEL(0),
101 ADC12138_VOLTAGE_CHANNEL(1),
102 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
103 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
104 IIO_CHAN_SOFT_TIMESTAMP(4),
107 static const struct iio_chan_spec adc12138_channels[] = {
108 ADC12138_VOLTAGE_CHANNEL(0),
109 ADC12138_VOLTAGE_CHANNEL(1),
110 ADC12138_VOLTAGE_CHANNEL(2),
111 ADC12138_VOLTAGE_CHANNEL(3),
112 ADC12138_VOLTAGE_CHANNEL(4),
113 ADC12138_VOLTAGE_CHANNEL(5),
114 ADC12138_VOLTAGE_CHANNEL(6),
115 ADC12138_VOLTAGE_CHANNEL(7),
116 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
117 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
118 ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
119 ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
120 ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
121 ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
122 ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
123 ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
124 IIO_CHAN_SOFT_TIMESTAMP(16),
127 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
128 void *rx_buf, int len)
130 struct spi_transfer xfer = {
131 .tx_buf = adc->tx_buf,
132 .rx_buf = adc->rx_buf,
137 /* Skip unused bits for ADC12130 and ADC12132 */
138 if (adc->id != adc12138)
139 mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
141 adc->tx_buf[0] = mode;
143 ret = spi_sync_transfer(adc->spi, &xfer, 1);
147 memcpy(rx_buf, adc->rx_buf, len);
152 static int adc12138_read_status(struct adc12138 *adc)
157 ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
162 return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
165 static int __adc12138_start_conv(struct adc12138 *adc,
166 struct iio_chan_spec const *channel,
170 static const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
171 u8 mode = (ch_to_mux[channel->channel] << 4) |
172 (channel->differential ? 0 : 0x80);
174 return adc12138_mode_programming(adc, mode, data, len);
177 static int adc12138_start_conv(struct adc12138 *adc,
178 struct iio_chan_spec const *channel)
182 return __adc12138_start_conv(adc, channel, &trash, 1);
185 static int adc12138_start_and_read_conv(struct adc12138 *adc,
186 struct iio_chan_spec const *channel,
189 return __adc12138_start_conv(adc, channel, data, 2);
192 static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
194 /* Issue a read status instruction and read previous conversion data */
195 return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
196 value, sizeof(*value));
199 static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
201 if (!wait_for_completion_timeout(&adc->complete, timeout))
207 static int adc12138_adc_conversion(struct adc12138 *adc,
208 struct iio_chan_spec const *channel,
213 reinit_completion(&adc->complete);
215 ret = adc12138_start_conv(adc, channel);
219 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
223 return adc12138_read_conv_data(adc, value);
226 static int adc12138_read_raw(struct iio_dev *iio,
227 struct iio_chan_spec const *channel, int *value,
228 int *shift, long mask)
230 struct adc12138 *adc = iio_priv(iio);
235 case IIO_CHAN_INFO_RAW:
236 mutex_lock(&adc->lock);
237 ret = adc12138_adc_conversion(adc, channel, &data);
238 mutex_unlock(&adc->lock);
242 *value = sign_extend32(be16_to_cpu(data) >> 3, 12);
245 case IIO_CHAN_INFO_SCALE:
246 ret = regulator_get_voltage(adc->vref_p);
251 if (!IS_ERR(adc->vref_n)) {
252 ret = regulator_get_voltage(adc->vref_n);
258 /* convert regulator output voltage to mV */
260 *shift = channel->scan_type.realbits - 1;
262 return IIO_VAL_FRACTIONAL_LOG2;
263 case IIO_CHAN_INFO_OFFSET:
264 if (!IS_ERR(adc->vref_n)) {
265 *value = regulator_get_voltage(adc->vref_n);
272 /* convert regulator output voltage to mV */
281 static const struct iio_info adc12138_info = {
282 .read_raw = adc12138_read_raw,
285 static int adc12138_init(struct adc12138 *adc)
292 reinit_completion(&adc->complete);
294 ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
298 /* data output at this time has no significance */
299 status = adc12138_read_status(adc);
303 adc12138_wait_eoc(adc, msecs_to_jiffies(100));
305 status = adc12138_read_status(adc);
306 if (status & ADC12138_STATUS_CAL) {
307 dev_warn(&adc->spi->dev,
308 "Auto Cal sequence is still in progress: %#x\n",
313 switch (adc->acquisition_time) {
315 mode = ADC12138_MODE_ACQUISITION_TIME_6;
318 mode = ADC12138_MODE_ACQUISITION_TIME_10;
321 mode = ADC12138_MODE_ACQUISITION_TIME_18;
324 mode = ADC12138_MODE_ACQUISITION_TIME_34;
330 return adc12138_mode_programming(adc, mode, &trash, 1);
333 static irqreturn_t adc12138_trigger_handler(int irq, void *p)
335 struct iio_poll_func *pf = p;
336 struct iio_dev *indio_dev = pf->indio_dev;
337 struct adc12138 *adc = iio_priv(indio_dev);
343 mutex_lock(&adc->lock);
345 for_each_set_bit(scan_index, indio_dev->active_scan_mask,
346 indio_dev->masklength) {
347 const struct iio_chan_spec *scan_chan =
348 &indio_dev->channels[scan_index];
350 reinit_completion(&adc->complete);
352 ret = adc12138_start_and_read_conv(adc, scan_chan,
353 i ? &adc->data[i - 1] : &trash);
355 dev_warn(&adc->spi->dev,
356 "failed to start conversion\n");
360 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
362 dev_warn(&adc->spi->dev, "wait eoc timeout\n");
370 ret = adc12138_read_conv_data(adc, &adc->data[i - 1]);
372 dev_warn(&adc->spi->dev,
373 "failed to get conversion data\n");
378 iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
379 iio_get_time_ns(indio_dev));
381 mutex_unlock(&adc->lock);
383 iio_trigger_notify_done(indio_dev->trig);
388 static irqreturn_t adc12138_eoc_handler(int irq, void *p)
390 struct iio_dev *indio_dev = p;
391 struct adc12138 *adc = iio_priv(indio_dev);
393 complete(&adc->complete);
398 static int adc12138_probe(struct spi_device *spi)
400 struct iio_dev *indio_dev;
401 struct adc12138 *adc;
404 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
408 adc = iio_priv(indio_dev);
410 adc->id = spi_get_device_id(spi)->driver_data;
411 mutex_init(&adc->lock);
412 init_completion(&adc->complete);
414 indio_dev->name = spi_get_device_id(spi)->name;
415 indio_dev->info = &adc12138_info;
416 indio_dev->modes = INDIO_DIRECT_MODE;
421 indio_dev->channels = adc12132_channels;
422 indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
425 indio_dev->channels = adc12138_channels;
426 indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
432 ret = of_property_read_u32(spi->dev.of_node, "ti,acquisition-time",
433 &adc->acquisition_time);
435 adc->acquisition_time = 10;
437 adc->cclk = devm_clk_get(&spi->dev, NULL);
438 if (IS_ERR(adc->cclk))
439 return PTR_ERR(adc->cclk);
441 adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
442 if (IS_ERR(adc->vref_p))
443 return PTR_ERR(adc->vref_p);
445 adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
446 if (IS_ERR(adc->vref_n)) {
448 * Assume vref_n is 0V if an optional regulator is not
449 * specified, otherwise return the error code.
451 ret = PTR_ERR(adc->vref_n);
456 ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
457 IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
461 ret = clk_prepare_enable(adc->cclk);
465 ret = regulator_enable(adc->vref_p);
467 goto err_clk_disable;
469 if (!IS_ERR(adc->vref_n)) {
470 ret = regulator_enable(adc->vref_n);
472 goto err_vref_p_disable;
475 ret = adc12138_init(adc);
477 goto err_vref_n_disable;
479 spi_set_drvdata(spi, indio_dev);
481 ret = iio_triggered_buffer_setup(indio_dev, NULL,
482 adc12138_trigger_handler, NULL);
484 goto err_vref_n_disable;
486 ret = iio_device_register(indio_dev);
488 goto err_buffer_cleanup;
492 iio_triggered_buffer_cleanup(indio_dev);
494 if (!IS_ERR(adc->vref_n))
495 regulator_disable(adc->vref_n);
497 regulator_disable(adc->vref_p);
499 clk_disable_unprepare(adc->cclk);
504 static int adc12138_remove(struct spi_device *spi)
506 struct iio_dev *indio_dev = spi_get_drvdata(spi);
507 struct adc12138 *adc = iio_priv(indio_dev);
509 iio_device_unregister(indio_dev);
510 iio_triggered_buffer_cleanup(indio_dev);
511 if (!IS_ERR(adc->vref_n))
512 regulator_disable(adc->vref_n);
513 regulator_disable(adc->vref_p);
514 clk_disable_unprepare(adc->cclk);
521 static const struct of_device_id adc12138_dt_ids[] = {
522 { .compatible = "ti,adc12130", },
523 { .compatible = "ti,adc12132", },
524 { .compatible = "ti,adc12138", },
527 MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
531 static const struct spi_device_id adc12138_id[] = {
532 { "adc12130", adc12130 },
533 { "adc12132", adc12132 },
534 { "adc12138", adc12138 },
537 MODULE_DEVICE_TABLE(spi, adc12138_id);
539 static struct spi_driver adc12138_driver = {
542 .of_match_table = of_match_ptr(adc12138_dt_ids),
544 .probe = adc12138_probe,
545 .remove = adc12138_remove,
546 .id_table = adc12138_id,
548 module_spi_driver(adc12138_driver);
550 MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
551 MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
552 MODULE_LICENSE("GPL v2");