1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices Generic AXI ADC IP core
4 * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
6 * Copyright 2012-2020 Analog Devices Inc.
9 #include <linux/bitfield.h>
10 #include <linux/clk.h>
12 #include <linux/delay.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/slab.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/buffer-dmaengine.h>
23 #include <linux/fpga/adi-axi-common.h>
24 #include <linux/iio/adc/adi-axi-adc.h>
27 * Register definitions:
28 * https://wiki.analog.com/resources/fpga/docs/axi_adc_ip#register_map
33 #define ADI_AXI_REG_RSTN 0x0040
34 #define ADI_AXI_REG_RSTN_CE_N BIT(2)
35 #define ADI_AXI_REG_RSTN_MMCM_RSTN BIT(1)
36 #define ADI_AXI_REG_RSTN_RSTN BIT(0)
38 /* ADC Channel controls */
40 #define ADI_AXI_REG_CHAN_CTRL(c) (0x0400 + (c) * 0x40)
41 #define ADI_AXI_REG_CHAN_CTRL_LB_OWR BIT(11)
42 #define ADI_AXI_REG_CHAN_CTRL_PN_SEL_OWR BIT(10)
43 #define ADI_AXI_REG_CHAN_CTRL_IQCOR_EN BIT(9)
44 #define ADI_AXI_REG_CHAN_CTRL_DCFILT_EN BIT(8)
45 #define ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT BIT(6)
46 #define ADI_AXI_REG_CHAN_CTRL_FMT_TYPE BIT(5)
47 #define ADI_AXI_REG_CHAN_CTRL_FMT_EN BIT(4)
48 #define ADI_AXI_REG_CHAN_CTRL_PN_TYPE_OWR BIT(1)
49 #define ADI_AXI_REG_CHAN_CTRL_ENABLE BIT(0)
51 #define ADI_AXI_REG_CHAN_CTRL_DEFAULTS \
52 (ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT | \
53 ADI_AXI_REG_CHAN_CTRL_FMT_EN | \
54 ADI_AXI_REG_CHAN_CTRL_ENABLE)
56 struct adi_axi_adc_core_info {
60 struct adi_axi_adc_state {
63 struct adi_axi_adc_client *client;
67 struct adi_axi_adc_client {
68 struct list_head entry;
69 struct adi_axi_adc_conv conv;
70 struct adi_axi_adc_state *state;
72 const struct adi_axi_adc_core_info *info;
75 static LIST_HEAD(registered_clients);
76 static DEFINE_MUTEX(registered_clients_lock);
78 static struct adi_axi_adc_client *conv_to_client(struct adi_axi_adc_conv *conv)
80 return container_of(conv, struct adi_axi_adc_client, conv);
83 void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv)
85 struct adi_axi_adc_client *cl = conv_to_client(conv);
87 return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
89 EXPORT_SYMBOL_GPL(adi_axi_adc_conv_priv);
91 static void adi_axi_adc_write(struct adi_axi_adc_state *st,
95 iowrite32(val, st->regs + reg);
98 static unsigned int adi_axi_adc_read(struct adi_axi_adc_state *st,
101 return ioread32(st->regs + reg);
104 static int adi_axi_adc_config_dma_buffer(struct device *dev,
105 struct iio_dev *indio_dev)
107 struct iio_buffer *buffer;
108 const char *dma_name;
110 if (!device_property_present(dev, "dmas"))
113 if (device_property_read_string(dev, "dma-names", &dma_name))
116 buffer = devm_iio_dmaengine_buffer_alloc(indio_dev->dev.parent,
119 return PTR_ERR(buffer);
121 indio_dev->modes |= INDIO_BUFFER_HARDWARE;
122 iio_device_attach_buffer(indio_dev, buffer);
127 static int adi_axi_adc_read_raw(struct iio_dev *indio_dev,
128 struct iio_chan_spec const *chan,
129 int *val, int *val2, long mask)
131 struct adi_axi_adc_state *st = iio_priv(indio_dev);
132 struct adi_axi_adc_conv *conv = &st->client->conv;
137 return conv->read_raw(conv, chan, val, val2, mask);
140 static int adi_axi_adc_write_raw(struct iio_dev *indio_dev,
141 struct iio_chan_spec const *chan,
142 int val, int val2, long mask)
144 struct adi_axi_adc_state *st = iio_priv(indio_dev);
145 struct adi_axi_adc_conv *conv = &st->client->conv;
147 if (!conv->write_raw)
150 return conv->write_raw(conv, chan, val, val2, mask);
153 static int adi_axi_adc_update_scan_mode(struct iio_dev *indio_dev,
154 const unsigned long *scan_mask)
156 struct adi_axi_adc_state *st = iio_priv(indio_dev);
157 struct adi_axi_adc_conv *conv = &st->client->conv;
158 unsigned int i, ctrl;
160 for (i = 0; i < conv->chip_info->num_channels; i++) {
161 ctrl = adi_axi_adc_read(st, ADI_AXI_REG_CHAN_CTRL(i));
163 if (test_bit(i, scan_mask))
164 ctrl |= ADI_AXI_REG_CHAN_CTRL_ENABLE;
166 ctrl &= ~ADI_AXI_REG_CHAN_CTRL_ENABLE;
168 adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), ctrl);
174 static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev,
177 struct adi_axi_adc_client *cl;
180 alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
182 alloc_size += ALIGN(sizeof_priv, IIO_ALIGN);
184 cl = kzalloc(alloc_size, GFP_KERNEL);
186 return ERR_PTR(-ENOMEM);
188 mutex_lock(®istered_clients_lock);
190 cl->dev = get_device(dev);
192 list_add_tail(&cl->entry, ®istered_clients);
194 mutex_unlock(®istered_clients_lock);
199 static void adi_axi_adc_conv_unregister(struct adi_axi_adc_conv *conv)
201 struct adi_axi_adc_client *cl = conv_to_client(conv);
203 mutex_lock(®istered_clients_lock);
205 list_del(&cl->entry);
208 mutex_unlock(®istered_clients_lock);
213 static void devm_adi_axi_adc_conv_release(struct device *dev, void *res)
215 adi_axi_adc_conv_unregister(*(struct adi_axi_adc_conv **)res);
218 struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev,
221 struct adi_axi_adc_conv **ptr, *conv;
223 ptr = devres_alloc(devm_adi_axi_adc_conv_release, sizeof(*ptr),
226 return ERR_PTR(-ENOMEM);
228 conv = adi_axi_adc_conv_register(dev, sizeof_priv);
231 return ERR_CAST(conv);
235 devres_add(dev, ptr);
239 EXPORT_SYMBOL_GPL(devm_adi_axi_adc_conv_register);
241 static ssize_t in_voltage_scale_available_show(struct device *dev,
242 struct device_attribute *attr,
245 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
246 struct adi_axi_adc_state *st = iio_priv(indio_dev);
247 struct adi_axi_adc_conv *conv = &st->client->conv;
251 for (i = 0; i < conv->chip_info->num_scales; i++) {
252 const unsigned int *s = conv->chip_info->scale_table[i];
254 len += scnprintf(buf + len, PAGE_SIZE - len,
255 "%u.%06u ", s[0], s[1]);
262 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
265 ADI_AXI_ATTR_SCALE_AVAIL,
268 #define ADI_AXI_ATTR(_en_, _file_) \
269 [ADI_AXI_ATTR_##_en_] = &iio_dev_attr_##_file_.dev_attr.attr
271 static struct attribute *adi_axi_adc_attributes[] = {
272 ADI_AXI_ATTR(SCALE_AVAIL, in_voltage_scale_available),
276 static umode_t axi_adc_attr_is_visible(struct kobject *kobj,
277 struct attribute *attr, int n)
279 struct device *dev = kobj_to_dev(kobj);
280 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
281 struct adi_axi_adc_state *st = iio_priv(indio_dev);
282 struct adi_axi_adc_conv *conv = &st->client->conv;
285 case ADI_AXI_ATTR_SCALE_AVAIL:
286 if (!conv->chip_info->num_scales)
294 static const struct attribute_group adi_axi_adc_attribute_group = {
295 .attrs = adi_axi_adc_attributes,
296 .is_visible = axi_adc_attr_is_visible,
299 static const struct iio_info adi_axi_adc_info = {
300 .read_raw = &adi_axi_adc_read_raw,
301 .write_raw = &adi_axi_adc_write_raw,
302 .attrs = &adi_axi_adc_attribute_group,
303 .update_scan_mode = &adi_axi_adc_update_scan_mode,
306 static const struct adi_axi_adc_core_info adi_axi_adc_10_0_a_info = {
307 .version = ADI_AXI_PCORE_VER(10, 0, 'a'),
310 static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev)
312 const struct adi_axi_adc_core_info *info;
313 struct adi_axi_adc_client *cl;
314 struct device_node *cln;
316 info = of_device_get_match_data(dev);
318 return ERR_PTR(-ENODEV);
320 cln = of_parse_phandle(dev->of_node, "adi,adc-dev", 0);
322 dev_err(dev, "No 'adi,adc-dev' node defined\n");
323 return ERR_PTR(-ENODEV);
326 mutex_lock(®istered_clients_lock);
328 list_for_each_entry(cl, ®istered_clients, entry) {
332 if (cl->dev->of_node != cln)
335 if (!try_module_get(cl->dev->driver->owner)) {
336 mutex_unlock(®istered_clients_lock);
337 return ERR_PTR(-ENODEV);
342 mutex_unlock(®istered_clients_lock);
346 mutex_unlock(®istered_clients_lock);
348 return ERR_PTR(-EPROBE_DEFER);
351 static int adi_axi_adc_setup_channels(struct device *dev,
352 struct adi_axi_adc_state *st)
354 struct adi_axi_adc_conv *conv = &st->client->conv;
357 if (conv->preenable_setup) {
358 ret = conv->preenable_setup(conv);
363 for (i = 0; i < conv->chip_info->num_channels; i++) {
364 adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i),
365 ADI_AXI_REG_CHAN_CTRL_DEFAULTS);
371 static void axi_adc_reset(struct adi_axi_adc_state *st)
373 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 0);
375 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, ADI_AXI_REG_RSTN_MMCM_RSTN);
377 adi_axi_adc_write(st, ADI_AXI_REG_RSTN,
378 ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN);
381 static void adi_axi_adc_cleanup(void *data)
383 struct adi_axi_adc_client *cl = data;
386 module_put(cl->dev->driver->owner);
389 static int adi_axi_adc_probe(struct platform_device *pdev)
391 struct adi_axi_adc_conv *conv;
392 struct iio_dev *indio_dev;
393 struct adi_axi_adc_client *cl;
394 struct adi_axi_adc_state *st;
398 cl = adi_axi_adc_attach_client(&pdev->dev);
402 ret = devm_add_action_or_reset(&pdev->dev, adi_axi_adc_cleanup, cl);
406 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
407 if (indio_dev == NULL)
410 st = iio_priv(indio_dev);
413 mutex_init(&st->lock);
415 st->regs = devm_platform_ioremap_resource(pdev, 0);
416 if (IS_ERR(st->regs))
417 return PTR_ERR(st->regs);
419 conv = &st->client->conv;
423 ver = adi_axi_adc_read(st, ADI_AXI_REG_VERSION);
425 if (cl->info->version > ver) {
427 "IP core version is too old. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
428 ADI_AXI_PCORE_VER_MAJOR(cl->info->version),
429 ADI_AXI_PCORE_VER_MINOR(cl->info->version),
430 ADI_AXI_PCORE_VER_PATCH(cl->info->version),
431 ADI_AXI_PCORE_VER_MAJOR(ver),
432 ADI_AXI_PCORE_VER_MINOR(ver),
433 ADI_AXI_PCORE_VER_PATCH(ver));
437 indio_dev->info = &adi_axi_adc_info;
438 indio_dev->name = "adi-axi-adc";
439 indio_dev->modes = INDIO_DIRECT_MODE;
440 indio_dev->num_channels = conv->chip_info->num_channels;
441 indio_dev->channels = conv->chip_info->channels;
443 ret = adi_axi_adc_config_dma_buffer(&pdev->dev, indio_dev);
447 ret = adi_axi_adc_setup_channels(&pdev->dev, st);
451 ret = devm_iio_device_register(&pdev->dev, indio_dev);
455 dev_info(&pdev->dev, "AXI ADC IP core (%d.%.2d.%c) probed\n",
456 ADI_AXI_PCORE_VER_MAJOR(ver),
457 ADI_AXI_PCORE_VER_MINOR(ver),
458 ADI_AXI_PCORE_VER_PATCH(ver));
463 /* Match table for of_platform binding */
464 static const struct of_device_id adi_axi_adc_of_match[] = {
465 { .compatible = "adi,axi-adc-10.0.a", .data = &adi_axi_adc_10_0_a_info },
466 { /* end of list */ }
468 MODULE_DEVICE_TABLE(of, adi_axi_adc_of_match);
470 static struct platform_driver adi_axi_adc_driver = {
472 .name = KBUILD_MODNAME,
473 .of_match_table = adi_axi_adc_of_match,
475 .probe = adi_axi_adc_probe,
477 module_platform_driver(adi_axi_adc_driver);
479 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
480 MODULE_DESCRIPTION("Analog Devices Generic AXI ADC IP core driver");
481 MODULE_LICENSE("GPL v2");