1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD7298 SPI ADC driver
5 * Copyright 2011 Analog Devices Inc.
8 #include <linux/device.h>
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/sysfs.h>
12 #include <linux/spi/spi.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/err.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/bitops.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/triggered_buffer.h>
26 #define AD7298_WRITE BIT(15) /* write to the control register */
27 #define AD7298_REPEAT BIT(14) /* repeated conversion enable */
28 #define AD7298_CH(x) BIT(13 - (x)) /* channel select */
29 #define AD7298_TSENSE BIT(5) /* temperature conversion enable */
30 #define AD7298_EXTREF BIT(2) /* external reference enable */
31 #define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */
32 #define AD7298_PDD BIT(0) /* partial power down enable */
34 #define AD7298_MAX_CHAN 8
35 #define AD7298_INTREF_mV 2500
37 #define AD7298_CH_TEMP 9
40 struct spi_device *spi;
41 struct regulator *reg;
43 struct spi_transfer ring_xfer[10];
44 struct spi_transfer scan_single_xfer[3];
45 struct spi_message ring_msg;
46 struct spi_message scan_single_msg;
48 * DMA (thus cache coherency maintenance) requires the
49 * transfer buffers to live in their own cache lines.
51 __be16 rx_buf[12] ____cacheline_aligned;
55 #define AD7298_V_CHAN(index) \
57 .type = IIO_VOLTAGE, \
60 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
61 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
63 .scan_index = index, \
68 .endianness = IIO_BE, \
72 static const struct iio_chan_spec ad7298_channels[] = {
77 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
78 BIT(IIO_CHAN_INFO_SCALE) |
79 BIT(IIO_CHAN_INFO_OFFSET),
80 .address = AD7298_CH_TEMP,
96 IIO_CHAN_SOFT_TIMESTAMP(8),
100 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
102 static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
103 const unsigned long *active_scan_mask)
105 struct ad7298_state *st = iio_priv(indio_dev);
107 unsigned short command;
110 /* Now compute overall size */
111 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
113 command = AD7298_WRITE | st->ext_ref;
115 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
116 if (test_bit(i, active_scan_mask))
119 st->tx_buf[0] = cpu_to_be16(command);
121 /* build spi ring message */
122 st->ring_xfer[0].tx_buf = &st->tx_buf[0];
123 st->ring_xfer[0].len = 2;
124 st->ring_xfer[0].cs_change = 1;
125 st->ring_xfer[1].tx_buf = &st->tx_buf[1];
126 st->ring_xfer[1].len = 2;
127 st->ring_xfer[1].cs_change = 1;
129 spi_message_init(&st->ring_msg);
130 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
131 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
133 for (i = 0; i < scan_count; i++) {
134 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
135 st->ring_xfer[i + 2].len = 2;
136 st->ring_xfer[i + 2].cs_change = 1;
137 spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
139 /* make sure last transfer cs_change is not set */
140 st->ring_xfer[i + 1].cs_change = 0;
145 static irqreturn_t ad7298_trigger_handler(int irq, void *p)
147 struct iio_poll_func *pf = p;
148 struct iio_dev *indio_dev = pf->indio_dev;
149 struct ad7298_state *st = iio_priv(indio_dev);
152 b_sent = spi_sync(st->spi, &st->ring_msg);
156 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
157 iio_get_time_ns(indio_dev));
160 iio_trigger_notify_done(indio_dev->trig);
165 static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
168 st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref |
169 (AD7298_CH(0) >> ch));
171 ret = spi_sync(st->spi, &st->scan_single_msg);
175 return be16_to_cpu(st->rx_buf[0]);
178 static int ad7298_scan_temp(struct ad7298_state *st, int *val)
183 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
184 AD7298_TAVG | st->ext_ref);
186 ret = spi_write(st->spi, (u8 *)&buf, 2);
190 buf = cpu_to_be16(0);
192 ret = spi_write(st->spi, (u8 *)&buf, 2);
196 usleep_range(101, 1000); /* sleep > 100us */
198 ret = spi_read(st->spi, (u8 *)&buf, 2);
202 *val = sign_extend32(be16_to_cpu(buf), 11);
207 static int ad7298_get_ref_voltage(struct ad7298_state *st)
212 vref = regulator_get_voltage(st->reg);
218 return AD7298_INTREF_mV;
222 static int ad7298_read_raw(struct iio_dev *indio_dev,
223 struct iio_chan_spec const *chan,
229 struct ad7298_state *st = iio_priv(indio_dev);
232 case IIO_CHAN_INFO_RAW:
233 ret = iio_device_claim_direct_mode(indio_dev);
237 if (chan->address == AD7298_CH_TEMP)
238 ret = ad7298_scan_temp(st, val);
240 ret = ad7298_scan_direct(st, chan->address);
242 iio_device_release_direct_mode(indio_dev);
247 if (chan->address != AD7298_CH_TEMP)
248 *val = ret & GENMASK(chan->scan_type.realbits - 1, 0);
251 case IIO_CHAN_INFO_SCALE:
252 switch (chan->type) {
254 *val = ad7298_get_ref_voltage(st);
255 *val2 = chan->scan_type.realbits;
256 return IIO_VAL_FRACTIONAL_LOG2;
258 *val = ad7298_get_ref_voltage(st);
260 return IIO_VAL_FRACTIONAL;
264 case IIO_CHAN_INFO_OFFSET:
265 *val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
271 static const struct iio_info ad7298_info = {
272 .read_raw = &ad7298_read_raw,
273 .update_scan_mode = ad7298_update_scan_mode,
276 static void ad7298_reg_disable(void *data)
278 struct regulator *reg = data;
280 regulator_disable(reg);
283 static int ad7298_probe(struct spi_device *spi)
285 struct ad7298_state *st;
286 struct iio_dev *indio_dev;
289 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
290 if (indio_dev == NULL)
293 st = iio_priv(indio_dev);
295 st->reg = devm_regulator_get_optional(&spi->dev, "vref");
296 if (!IS_ERR(st->reg)) {
297 st->ext_ref = AD7298_EXTREF;
299 ret = PTR_ERR(st->reg);
307 ret = regulator_enable(st->reg);
311 ret = devm_add_action_or_reset(&spi->dev, ad7298_reg_disable,
319 indio_dev->name = spi_get_device_id(spi)->name;
320 indio_dev->modes = INDIO_DIRECT_MODE;
321 indio_dev->channels = ad7298_channels;
322 indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
323 indio_dev->info = &ad7298_info;
325 /* Setup default message */
327 st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
328 st->scan_single_xfer[0].len = 2;
329 st->scan_single_xfer[0].cs_change = 1;
330 st->scan_single_xfer[1].tx_buf = &st->tx_buf[1];
331 st->scan_single_xfer[1].len = 2;
332 st->scan_single_xfer[1].cs_change = 1;
333 st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
334 st->scan_single_xfer[2].len = 2;
336 spi_message_init(&st->scan_single_msg);
337 spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
338 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
339 spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
341 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
342 &ad7298_trigger_handler, NULL);
346 return devm_iio_device_register(&spi->dev, indio_dev);
349 static const struct spi_device_id ad7298_id[] = {
353 MODULE_DEVICE_TABLE(spi, ad7298_id);
355 static struct spi_driver ad7298_driver = {
359 .probe = ad7298_probe,
360 .id_table = ad7298_id,
362 module_spi_driver(ad7298_driver);
364 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
365 MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
366 MODULE_LICENSE("GPL v2");