1 // SPDX-License-Identifier: GPL-2.0
3 * NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver
5 * Copyright 2021 Connected Cars A/S
8 * https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf
9 * https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf
12 * https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf
15 #include <linux/bits.h>
16 #include <linux/bitfield.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/of_irq.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/regmap.h>
24 #include <linux/iio/buffer.h>
25 #include <linux/iio/events.h>
26 #include <linux/iio/iio.h>
27 #include <linux/iio/kfifo_buf.h>
28 #include <linux/iio/sysfs.h>
30 #include "fxls8962af.h"
32 #define FXLS8962AF_INT_STATUS 0x00
33 #define FXLS8962AF_INT_STATUS_SRC_BOOT BIT(0)
34 #define FXLS8962AF_INT_STATUS_SRC_SDCD_OT BIT(4)
35 #define FXLS8962AF_INT_STATUS_SRC_BUF BIT(5)
36 #define FXLS8962AF_INT_STATUS_SRC_DRDY BIT(7)
37 #define FXLS8962AF_TEMP_OUT 0x01
38 #define FXLS8962AF_VECM_LSB 0x02
39 #define FXLS8962AF_OUT_X_LSB 0x04
40 #define FXLS8962AF_OUT_Y_LSB 0x06
41 #define FXLS8962AF_OUT_Z_LSB 0x08
42 #define FXLS8962AF_BUF_STATUS 0x0b
43 #define FXLS8962AF_BUF_STATUS_BUF_CNT GENMASK(5, 0)
44 #define FXLS8962AF_BUF_STATUS_BUF_OVF BIT(6)
45 #define FXLS8962AF_BUF_STATUS_BUF_WMRK BIT(7)
46 #define FXLS8962AF_BUF_X_LSB 0x0c
47 #define FXLS8962AF_BUF_Y_LSB 0x0e
48 #define FXLS8962AF_BUF_Z_LSB 0x10
50 #define FXLS8962AF_PROD_REV 0x12
51 #define FXLS8962AF_WHO_AM_I 0x13
53 #define FXLS8962AF_SYS_MODE 0x14
54 #define FXLS8962AF_SENS_CONFIG1 0x15
55 #define FXLS8962AF_SENS_CONFIG1_ACTIVE BIT(0)
56 #define FXLS8962AF_SENS_CONFIG1_RST BIT(7)
57 #define FXLS8962AF_SC1_FSR_MASK GENMASK(2, 1)
58 #define FXLS8962AF_SC1_FSR_PREP(x) FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))
59 #define FXLS8962AF_SC1_FSR_GET(x) FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))
61 #define FXLS8962AF_SENS_CONFIG2 0x16
62 #define FXLS8962AF_SENS_CONFIG3 0x17
63 #define FXLS8962AF_SC3_WAKE_ODR_MASK GENMASK(7, 4)
64 #define FXLS8962AF_SC3_WAKE_ODR_PREP(x) FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
65 #define FXLS8962AF_SC3_WAKE_ODR_GET(x) FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
66 #define FXLS8962AF_SENS_CONFIG4 0x18
67 #define FXLS8962AF_SC4_INT_PP_OD_MASK BIT(1)
68 #define FXLS8962AF_SC4_INT_PP_OD_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))
69 #define FXLS8962AF_SC4_INT_POL_MASK BIT(0)
70 #define FXLS8962AF_SC4_INT_POL_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))
71 #define FXLS8962AF_SENS_CONFIG5 0x19
73 #define FXLS8962AF_WAKE_IDLE_LSB 0x1b
74 #define FXLS8962AF_SLEEP_IDLE_LSB 0x1c
75 #define FXLS8962AF_ASLP_COUNT_LSB 0x1e
77 #define FXLS8962AF_INT_EN 0x20
78 #define FXLS8962AF_INT_EN_SDCD_OT_EN BIT(5)
79 #define FXLS8962AF_INT_EN_BUF_EN BIT(6)
80 #define FXLS8962AF_INT_PIN_SEL 0x21
81 #define FXLS8962AF_INT_PIN_SEL_MASK GENMASK(7, 0)
82 #define FXLS8962AF_INT_PIN_SEL_INT1 0x00
83 #define FXLS8962AF_INT_PIN_SEL_INT2 GENMASK(7, 0)
85 #define FXLS8962AF_OFF_X 0x22
86 #define FXLS8962AF_OFF_Y 0x23
87 #define FXLS8962AF_OFF_Z 0x24
89 #define FXLS8962AF_BUF_CONFIG1 0x26
90 #define FXLS8962AF_BC1_BUF_MODE_MASK GENMASK(6, 5)
91 #define FXLS8962AF_BC1_BUF_MODE_PREP(x) FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))
92 #define FXLS8962AF_BUF_CONFIG2 0x27
93 #define FXLS8962AF_BUF_CONFIG2_BUF_WMRK GENMASK(5, 0)
95 #define FXLS8962AF_ORIENT_STATUS 0x28
96 #define FXLS8962AF_ORIENT_CONFIG 0x29
97 #define FXLS8962AF_ORIENT_DBCOUNT 0x2a
98 #define FXLS8962AF_ORIENT_BF_ZCOMP 0x2b
99 #define FXLS8962AF_ORIENT_THS_REG 0x2c
101 #define FXLS8962AF_SDCD_INT_SRC1 0x2d
102 #define FXLS8962AF_SDCD_INT_SRC1_X_OT BIT(5)
103 #define FXLS8962AF_SDCD_INT_SRC1_X_POL BIT(4)
104 #define FXLS8962AF_SDCD_INT_SRC1_Y_OT BIT(3)
105 #define FXLS8962AF_SDCD_INT_SRC1_Y_POL BIT(2)
106 #define FXLS8962AF_SDCD_INT_SRC1_Z_OT BIT(1)
107 #define FXLS8962AF_SDCD_INT_SRC1_Z_POL BIT(0)
108 #define FXLS8962AF_SDCD_INT_SRC2 0x2e
109 #define FXLS8962AF_SDCD_CONFIG1 0x2f
110 #define FXLS8962AF_SDCD_CONFIG1_Z_OT_EN BIT(3)
111 #define FXLS8962AF_SDCD_CONFIG1_Y_OT_EN BIT(4)
112 #define FXLS8962AF_SDCD_CONFIG1_X_OT_EN BIT(5)
113 #define FXLS8962AF_SDCD_CONFIG1_OT_ELE BIT(7)
114 #define FXLS8962AF_SDCD_CONFIG2 0x30
115 #define FXLS8962AF_SDCD_CONFIG2_SDCD_EN BIT(7)
116 #define FXLS8962AF_SC2_REF_UPDM_AC GENMASK(6, 5)
117 #define FXLS8962AF_SDCD_OT_DBCNT 0x31
118 #define FXLS8962AF_SDCD_WT_DBCNT 0x32
119 #define FXLS8962AF_SDCD_LTHS_LSB 0x33
120 #define FXLS8962AF_SDCD_UTHS_LSB 0x35
122 #define FXLS8962AF_SELF_TEST_CONFIG1 0x37
123 #define FXLS8962AF_SELF_TEST_CONFIG2 0x38
125 #define FXLS8962AF_MAX_REG 0x38
127 #define FXLS8962AF_DEVICE_ID 0x62
128 #define FXLS8964AF_DEVICE_ID 0x84
130 /* Raw temp channel offset */
131 #define FXLS8962AF_TEMP_CENTER_VAL 25
133 #define FXLS8962AF_AUTO_SUSPEND_DELAY_MS 2000
135 #define FXLS8962AF_FIFO_LENGTH 32
136 #define FXLS8962AF_SCALE_TABLE_LEN 4
137 #define FXLS8962AF_SAMP_FREQ_TABLE_LEN 13
139 static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {
140 {0, IIO_G_TO_M_S_2(980000)},
141 {0, IIO_G_TO_M_S_2(1950000)},
142 {0, IIO_G_TO_M_S_2(3910000)},
143 {0, IIO_G_TO_M_S_2(7810000)},
146 static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {
147 {3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},
148 {50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},
149 {1, 563000}, {0, 781000},
152 struct fxls8962af_chip_info {
154 const struct iio_chan_spec *channels;
159 struct fxls8962af_data {
160 struct regmap *regmap;
161 const struct fxls8962af_chip_info *chip_info;
162 struct regulator *vdd_reg;
167 int64_t timestamp, old_timestamp; /* Only used in hw fifo mode. */
168 struct iio_mount_matrix orientation;
176 const struct regmap_config fxls8962af_regmap_conf = {
179 .max_register = FXLS8962AF_MAX_REG,
181 EXPORT_SYMBOL_GPL(fxls8962af_regmap_conf);
190 enum fxls8962af_int_pin {
195 static int fxls8962af_power_on(struct fxls8962af_data *data)
197 struct device *dev = regmap_get_device(data->regmap);
200 ret = pm_runtime_resume_and_get(dev);
202 dev_err(dev, "failed to power on\n");
207 static int fxls8962af_power_off(struct fxls8962af_data *data)
209 struct device *dev = regmap_get_device(data->regmap);
212 pm_runtime_mark_last_busy(dev);
213 ret = pm_runtime_put_autosuspend(dev);
215 dev_err(dev, "failed to power off\n");
220 static int fxls8962af_standby(struct fxls8962af_data *data)
222 return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
223 FXLS8962AF_SENS_CONFIG1_ACTIVE, 0);
226 static int fxls8962af_active(struct fxls8962af_data *data)
228 return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
229 FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);
232 static int fxls8962af_is_active(struct fxls8962af_data *data)
237 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
241 return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;
244 static int fxls8962af_get_out(struct fxls8962af_data *data,
245 struct iio_chan_spec const *chan, int *val)
247 struct device *dev = regmap_get_device(data->regmap);
252 is_active = fxls8962af_is_active(data);
254 ret = fxls8962af_power_on(data);
259 ret = regmap_bulk_read(data->regmap, chan->address,
260 &raw_val, sizeof(data->lower_thres));
263 fxls8962af_power_off(data);
266 dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);
270 *val = sign_extend32(le16_to_cpu(raw_val),
271 chan->scan_type.realbits - 1);
276 static int fxls8962af_read_avail(struct iio_dev *indio_dev,
277 struct iio_chan_spec const *chan,
278 const int **vals, int *type, int *length,
282 case IIO_CHAN_INFO_SCALE:
283 *type = IIO_VAL_INT_PLUS_NANO;
284 *vals = (int *)fxls8962af_scale_table;
285 *length = ARRAY_SIZE(fxls8962af_scale_table) * 2;
286 return IIO_AVAIL_LIST;
287 case IIO_CHAN_INFO_SAMP_FREQ:
288 *type = IIO_VAL_INT_PLUS_MICRO;
289 *vals = (int *)fxls8962af_samp_freq_table;
290 *length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;
291 return IIO_AVAIL_LIST;
297 static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,
298 struct iio_chan_spec const *chan,
302 case IIO_CHAN_INFO_SCALE:
303 return IIO_VAL_INT_PLUS_NANO;
304 case IIO_CHAN_INFO_SAMP_FREQ:
305 return IIO_VAL_INT_PLUS_MICRO;
307 return IIO_VAL_INT_PLUS_NANO;
311 static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,
317 is_active = fxls8962af_is_active(data);
319 ret = fxls8962af_standby(data);
324 ret = regmap_update_bits(data->regmap, reg, mask, val);
329 ret = fxls8962af_active(data);
337 static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)
341 for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)
342 if (scale == fxls8962af_scale_table[i][1])
345 if (i == ARRAY_SIZE(fxls8962af_scale_table))
348 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,
349 FXLS8962AF_SC1_FSR_MASK,
350 FXLS8962AF_SC1_FSR_PREP(i));
353 static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,
360 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
364 range_idx = FXLS8962AF_SC1_FSR_GET(reg);
366 *val = fxls8962af_scale_table[range_idx][1];
368 return IIO_VAL_INT_PLUS_NANO;
371 static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,
376 for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)
377 if (val == fxls8962af_samp_freq_table[i][0] &&
378 val2 == fxls8962af_samp_freq_table[i][1])
381 if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))
384 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,
385 FXLS8962AF_SC3_WAKE_ODR_MASK,
386 FXLS8962AF_SC3_WAKE_ODR_PREP(i));
389 static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,
396 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, ®);
400 range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);
402 *val = fxls8962af_samp_freq_table[range_idx][0];
403 *val2 = fxls8962af_samp_freq_table[range_idx][1];
405 return IIO_VAL_INT_PLUS_MICRO;
408 static int fxls8962af_read_raw(struct iio_dev *indio_dev,
409 struct iio_chan_spec const *chan,
410 int *val, int *val2, long mask)
412 struct fxls8962af_data *data = iio_priv(indio_dev);
415 case IIO_CHAN_INFO_RAW:
416 switch (chan->type) {
419 return fxls8962af_get_out(data, chan, val);
423 case IIO_CHAN_INFO_OFFSET:
424 if (chan->type != IIO_TEMP)
427 *val = FXLS8962AF_TEMP_CENTER_VAL;
429 case IIO_CHAN_INFO_SCALE:
431 return fxls8962af_read_full_scale(data, val2);
432 case IIO_CHAN_INFO_SAMP_FREQ:
433 return fxls8962af_read_samp_freq(data, val, val2);
439 static int fxls8962af_write_raw(struct iio_dev *indio_dev,
440 struct iio_chan_spec const *chan,
441 int val, int val2, long mask)
443 struct fxls8962af_data *data = iio_priv(indio_dev);
447 case IIO_CHAN_INFO_SCALE:
451 ret = iio_device_claim_direct_mode(indio_dev);
455 ret = fxls8962af_set_full_scale(data, val2);
457 iio_device_release_direct_mode(indio_dev);
459 case IIO_CHAN_INFO_SAMP_FREQ:
460 ret = iio_device_claim_direct_mode(indio_dev);
464 ret = fxls8962af_set_samp_freq(data, val, val2);
466 iio_device_release_direct_mode(indio_dev);
473 static int fxls8962af_event_setup(struct fxls8962af_data *data, int state)
475 /* Enable wakeup interrupt */
476 int mask = FXLS8962AF_INT_EN_SDCD_OT_EN;
477 int value = state ? mask : 0;
479 return regmap_update_bits(data->regmap, FXLS8962AF_INT_EN, mask, value);
482 static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)
484 struct fxls8962af_data *data = iio_priv(indio_dev);
486 if (val > FXLS8962AF_FIFO_LENGTH)
487 val = FXLS8962AF_FIFO_LENGTH;
489 data->watermark = val;
494 static int __fxls8962af_set_thresholds(struct fxls8962af_data *data,
495 const struct iio_chan_spec *chan,
496 enum iio_event_direction dir,
500 case IIO_EV_DIR_FALLING:
501 data->lower_thres = val;
502 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
503 &data->lower_thres, sizeof(data->lower_thres));
504 case IIO_EV_DIR_RISING:
505 data->upper_thres = val;
506 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
507 &data->upper_thres, sizeof(data->upper_thres));
513 static int fxls8962af_read_event(struct iio_dev *indio_dev,
514 const struct iio_chan_spec *chan,
515 enum iio_event_type type,
516 enum iio_event_direction dir,
517 enum iio_event_info info,
520 struct fxls8962af_data *data = iio_priv(indio_dev);
523 if (type != IIO_EV_TYPE_THRESH)
527 case IIO_EV_DIR_FALLING:
528 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
529 &data->lower_thres, sizeof(data->lower_thres));
533 *val = sign_extend32(data->lower_thres, chan->scan_type.realbits - 1);
535 case IIO_EV_DIR_RISING:
536 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
537 &data->upper_thres, sizeof(data->upper_thres));
541 *val = sign_extend32(data->upper_thres, chan->scan_type.realbits - 1);
548 static int fxls8962af_write_event(struct iio_dev *indio_dev,
549 const struct iio_chan_spec *chan,
550 enum iio_event_type type,
551 enum iio_event_direction dir,
552 enum iio_event_info info,
555 struct fxls8962af_data *data = iio_priv(indio_dev);
558 if (type != IIO_EV_TYPE_THRESH)
561 if (val < -2048 || val > 2047)
564 if (data->enable_event)
567 val_masked = val & GENMASK(11, 0);
568 if (fxls8962af_is_active(data)) {
569 ret = fxls8962af_standby(data);
573 ret = __fxls8962af_set_thresholds(data, chan, dir, val_masked);
577 return fxls8962af_active(data);
579 return __fxls8962af_set_thresholds(data, chan, dir, val_masked);
584 fxls8962af_read_event_config(struct iio_dev *indio_dev,
585 const struct iio_chan_spec *chan,
586 enum iio_event_type type,
587 enum iio_event_direction dir)
589 struct fxls8962af_data *data = iio_priv(indio_dev);
591 if (type != IIO_EV_TYPE_THRESH)
594 switch (chan->channel2) {
596 return !!(FXLS8962AF_SDCD_CONFIG1_X_OT_EN & data->enable_event);
598 return !!(FXLS8962AF_SDCD_CONFIG1_Y_OT_EN & data->enable_event);
600 return !!(FXLS8962AF_SDCD_CONFIG1_Z_OT_EN & data->enable_event);
607 fxls8962af_write_event_config(struct iio_dev *indio_dev,
608 const struct iio_chan_spec *chan,
609 enum iio_event_type type,
610 enum iio_event_direction dir, int state)
612 struct fxls8962af_data *data = iio_priv(indio_dev);
613 u8 enable_event, enable_bits;
616 if (type != IIO_EV_TYPE_THRESH)
619 switch (chan->channel2) {
621 enable_bits = FXLS8962AF_SDCD_CONFIG1_X_OT_EN;
624 enable_bits = FXLS8962AF_SDCD_CONFIG1_Y_OT_EN;
627 enable_bits = FXLS8962AF_SDCD_CONFIG1_Z_OT_EN;
634 enable_event = data->enable_event | enable_bits;
636 enable_event = data->enable_event & ~enable_bits;
638 if (data->enable_event == enable_event)
641 ret = fxls8962af_standby(data);
646 value = enable_event | FXLS8962AF_SDCD_CONFIG1_OT_ELE;
647 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG1, value);
652 * Enable update of SDCD_REF_X/Y/Z values with the current decimated and
653 * trimmed X/Y/Z acceleration input data. This allows for acceleration
654 * slope detection with Data(n) to Data(n–1) always used as the input
655 * to the window comparator.
657 value = enable_event ?
658 FXLS8962AF_SDCD_CONFIG2_SDCD_EN | FXLS8962AF_SC2_REF_UPDM_AC :
660 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG2, value);
664 ret = fxls8962af_event_setup(data, state);
668 data->enable_event = enable_event;
670 if (data->enable_event) {
671 fxls8962af_active(data);
672 ret = fxls8962af_power_on(data);
674 ret = iio_device_claim_direct_mode(indio_dev);
678 /* Not in buffered mode so disable power */
679 ret = fxls8962af_power_off(data);
681 iio_device_release_direct_mode(indio_dev);
687 static const struct iio_event_spec fxls8962af_event[] = {
689 .type = IIO_EV_TYPE_THRESH,
690 .dir = IIO_EV_DIR_EITHER,
691 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
694 .type = IIO_EV_TYPE_THRESH,
695 .dir = IIO_EV_DIR_FALLING,
696 .mask_separate = BIT(IIO_EV_INFO_VALUE),
699 .type = IIO_EV_TYPE_THRESH,
700 .dir = IIO_EV_DIR_RISING,
701 .mask_separate = BIT(IIO_EV_INFO_VALUE),
705 #define FXLS8962AF_CHANNEL(axis, reg, idx) { \
709 .channel2 = IIO_MOD_##axis, \
710 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
711 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
712 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
713 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
714 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
721 .endianness = IIO_BE, \
723 .event_spec = fxls8962af_event, \
724 .num_event_specs = ARRAY_SIZE(fxls8962af_event), \
727 #define FXLS8962AF_TEMP_CHANNEL { \
729 .address = FXLS8962AF_TEMP_OUT, \
730 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
731 BIT(IIO_CHAN_INFO_OFFSET),\
739 static const struct iio_chan_spec fxls8962af_channels[] = {
740 FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),
741 FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),
742 FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),
743 IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),
744 FXLS8962AF_TEMP_CHANNEL,
747 static const struct fxls8962af_chip_info fxls_chip_info_table[] = {
749 .chip_id = FXLS8962AF_DEVICE_ID,
750 .name = "fxls8962af",
751 .channels = fxls8962af_channels,
752 .num_channels = ARRAY_SIZE(fxls8962af_channels),
755 .chip_id = FXLS8964AF_DEVICE_ID,
756 .name = "fxls8964af",
757 .channels = fxls8962af_channels,
758 .num_channels = ARRAY_SIZE(fxls8962af_channels),
762 static const struct iio_info fxls8962af_info = {
763 .read_raw = &fxls8962af_read_raw,
764 .write_raw = &fxls8962af_write_raw,
765 .write_raw_get_fmt = fxls8962af_write_raw_get_fmt,
766 .read_event_value = fxls8962af_read_event,
767 .write_event_value = fxls8962af_write_event,
768 .read_event_config = fxls8962af_read_event_config,
769 .write_event_config = fxls8962af_write_event_config,
770 .read_avail = fxls8962af_read_avail,
771 .hwfifo_set_watermark = fxls8962af_set_watermark,
774 static int fxls8962af_reset(struct fxls8962af_data *data)
776 struct device *dev = regmap_get_device(data->regmap);
780 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
781 FXLS8962AF_SENS_CONFIG1_RST,
782 FXLS8962AF_SENS_CONFIG1_RST);
786 /* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */
787 ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,
788 (reg & FXLS8962AF_INT_STATUS_SRC_BOOT),
790 if (ret == -ETIMEDOUT)
791 dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);
796 static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)
800 /* Enable watermark at max fifo size */
801 ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,
802 FXLS8962AF_BUF_CONFIG2_BUF_WMRK,
807 return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,
808 FXLS8962AF_BC1_BUF_MODE_MASK,
809 FXLS8962AF_BC1_BUF_MODE_PREP(onoff));
812 static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)
814 return fxls8962af_power_on(iio_priv(indio_dev));
817 static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)
819 struct fxls8962af_data *data = iio_priv(indio_dev);
822 fxls8962af_standby(data);
824 /* Enable buffer interrupt */
825 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
826 FXLS8962AF_INT_EN_BUF_EN,
827 FXLS8962AF_INT_EN_BUF_EN);
831 ret = __fxls8962af_fifo_set_mode(data, true);
833 fxls8962af_active(data);
838 static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)
840 struct fxls8962af_data *data = iio_priv(indio_dev);
843 fxls8962af_standby(data);
845 /* Disable buffer interrupt */
846 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
847 FXLS8962AF_INT_EN_BUF_EN, 0);
851 ret = __fxls8962af_fifo_set_mode(data, false);
853 if (data->enable_event)
854 fxls8962af_active(data);
859 static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)
861 struct fxls8962af_data *data = iio_priv(indio_dev);
863 if (!data->enable_event)
864 fxls8962af_power_off(data);
869 static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {
870 .preenable = fxls8962af_buffer_preenable,
871 .postenable = fxls8962af_buffer_postenable,
872 .predisable = fxls8962af_buffer_predisable,
873 .postdisable = fxls8962af_buffer_postdisable,
876 static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,
877 u16 *buffer, int samples,
882 for (i = 0; i < samples; i++) {
883 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,
884 &buffer[i * 3], sample_length);
892 static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,
893 u16 *buffer, int samples)
895 struct device *dev = regmap_get_device(data->regmap);
896 int sample_length = 3 * sizeof(*buffer);
897 int total_length = samples * sample_length;
900 if (i2c_verify_client(dev))
903 * E3: FIFO burst read operation error using I2C interface
904 * We have to avoid burst reads on I2C..
906 ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,
909 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,
913 dev_err(dev, "Error transferring data from fifo: %d\n", ret);
918 static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)
920 struct fxls8962af_data *data = iio_priv(indio_dev);
921 struct device *dev = regmap_get_device(data->regmap);
922 u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];
923 uint64_t sample_period;
929 ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, ®);
933 if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {
934 dev_err(dev, "Buffer overflow");
938 count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;
942 data->old_timestamp = data->timestamp;
943 data->timestamp = iio_get_time_ns(indio_dev);
946 * Approximate timestamps for each of the sample based on the sampling,
947 * frequency, timestamp for last sample and number of samples.
949 sample_period = (data->timestamp - data->old_timestamp);
950 do_div(sample_period, count);
951 tstamp = data->timestamp - (count - 1) * sample_period;
953 ret = fxls8962af_fifo_transfer(data, buffer, count);
957 /* Demux hw FIFO into kfifo. */
958 for (i = 0; i < count; i++) {
962 for_each_set_bit(bit, indio_dev->active_scan_mask,
963 indio_dev->masklength) {
964 memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
965 sizeof(data->scan.channels[0]));
968 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
971 tstamp += sample_period;
977 static int fxls8962af_event_interrupt(struct iio_dev *indio_dev)
979 struct fxls8962af_data *data = iio_priv(indio_dev);
980 s64 ts = iio_get_time_ns(indio_dev);
985 ret = regmap_read(data->regmap, FXLS8962AF_SDCD_INT_SRC1, ®);
989 if (reg & FXLS8962AF_SDCD_INT_SRC1_X_OT) {
990 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_X_POL ?
991 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
992 iio_push_event(indio_dev,
993 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
994 IIO_EV_TYPE_THRESH, ev_code), ts);
997 if (reg & FXLS8962AF_SDCD_INT_SRC1_Y_OT) {
998 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Y_POL ?
999 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1000 iio_push_event(indio_dev,
1001 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1002 IIO_EV_TYPE_THRESH, ev_code), ts);
1005 if (reg & FXLS8962AF_SDCD_INT_SRC1_Z_OT) {
1006 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Z_POL ?
1007 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1008 iio_push_event(indio_dev,
1009 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1010 IIO_EV_TYPE_THRESH, ev_code), ts);
1016 static irqreturn_t fxls8962af_interrupt(int irq, void *p)
1018 struct iio_dev *indio_dev = p;
1019 struct fxls8962af_data *data = iio_priv(indio_dev);
1023 ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, ®);
1027 if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {
1028 ret = fxls8962af_fifo_flush(indio_dev);
1035 if (reg & FXLS8962AF_INT_STATUS_SRC_SDCD_OT) {
1036 ret = fxls8962af_event_interrupt(indio_dev);
1046 static void fxls8962af_regulator_disable(void *data_ptr)
1048 struct fxls8962af_data *data = data_ptr;
1050 regulator_disable(data->vdd_reg);
1053 static void fxls8962af_pm_disable(void *dev_ptr)
1055 struct device *dev = dev_ptr;
1056 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1058 pm_runtime_disable(dev);
1059 pm_runtime_set_suspended(dev);
1060 pm_runtime_put_noidle(dev);
1062 fxls8962af_standby(iio_priv(indio_dev));
1065 static void fxls8962af_get_irq(struct device_node *of_node,
1066 enum fxls8962af_int_pin *pin)
1070 irq = of_irq_get_byname(of_node, "INT2");
1072 *pin = FXLS8962AF_PIN_INT2;
1076 *pin = FXLS8962AF_PIN_INT1;
1079 static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)
1081 struct fxls8962af_data *data = iio_priv(indio_dev);
1082 struct device *dev = regmap_get_device(data->regmap);
1083 unsigned long irq_type;
1084 bool irq_active_high;
1085 enum fxls8962af_int_pin int_pin;
1089 fxls8962af_get_irq(dev->of_node, &int_pin);
1091 case FXLS8962AF_PIN_INT1:
1092 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;
1094 case FXLS8962AF_PIN_INT2:
1095 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;
1098 dev_err(dev, "unsupported int pin selected\n");
1102 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,
1103 FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);
1107 irq_type = irqd_get_trigger_type(irq_get_irq_data(irq));
1110 case IRQF_TRIGGER_HIGH:
1111 case IRQF_TRIGGER_RISING:
1112 irq_active_high = true;
1114 case IRQF_TRIGGER_LOW:
1115 case IRQF_TRIGGER_FALLING:
1116 irq_active_high = false;
1119 dev_info(dev, "mode %lx unsupported\n", irq_type);
1123 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1124 FXLS8962AF_SC4_INT_POL_MASK,
1125 FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));
1129 if (device_property_read_bool(dev, "drive-open-drain")) {
1130 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1131 FXLS8962AF_SC4_INT_PP_OD_MASK,
1132 FXLS8962AF_SC4_INT_PP_OD_PREP(1));
1136 irq_type |= IRQF_SHARED;
1139 return devm_request_threaded_irq(dev,
1141 NULL, fxls8962af_interrupt,
1142 irq_type | IRQF_ONESHOT,
1143 indio_dev->name, indio_dev);
1146 int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)
1148 struct fxls8962af_data *data;
1149 struct iio_dev *indio_dev;
1153 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1157 data = iio_priv(indio_dev);
1158 dev_set_drvdata(dev, indio_dev);
1159 data->regmap = regmap;
1162 ret = iio_read_mount_matrix(dev, &data->orientation);
1166 data->vdd_reg = devm_regulator_get(dev, "vdd");
1167 if (IS_ERR(data->vdd_reg))
1168 return dev_err_probe(dev, PTR_ERR(data->vdd_reg),
1169 "Failed to get vdd regulator\n");
1171 ret = regulator_enable(data->vdd_reg);
1173 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
1177 ret = devm_add_action_or_reset(dev, fxls8962af_regulator_disable, data);
1181 ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, ®);
1185 for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {
1186 if (fxls_chip_info_table[i].chip_id == reg) {
1187 data->chip_info = &fxls_chip_info_table[i];
1191 if (i == ARRAY_SIZE(fxls_chip_info_table)) {
1192 dev_err(dev, "failed to match device in table\n");
1196 indio_dev->channels = data->chip_info->channels;
1197 indio_dev->num_channels = data->chip_info->num_channels;
1198 indio_dev->name = data->chip_info->name;
1199 indio_dev->info = &fxls8962af_info;
1200 indio_dev->modes = INDIO_DIRECT_MODE;
1202 ret = fxls8962af_reset(data);
1207 ret = fxls8962af_irq_setup(indio_dev, irq);
1211 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
1212 INDIO_BUFFER_SOFTWARE,
1213 &fxls8962af_buffer_ops);
1218 ret = pm_runtime_set_active(dev);
1222 pm_runtime_enable(dev);
1223 pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);
1224 pm_runtime_use_autosuspend(dev);
1226 ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);
1230 if (device_property_read_bool(dev, "wakeup-source"))
1231 device_init_wakeup(dev, true);
1233 return devm_iio_device_register(dev, indio_dev);
1235 EXPORT_SYMBOL_GPL(fxls8962af_core_probe);
1237 static int __maybe_unused fxls8962af_runtime_suspend(struct device *dev)
1239 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1242 ret = fxls8962af_standby(data);
1244 dev_err(dev, "powering off device failed\n");
1251 static int __maybe_unused fxls8962af_runtime_resume(struct device *dev)
1253 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1255 return fxls8962af_active(data);
1258 static int __maybe_unused fxls8962af_suspend(struct device *dev)
1260 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1261 struct fxls8962af_data *data = iio_priv(indio_dev);
1263 if (device_may_wakeup(dev) && data->enable_event) {
1264 enable_irq_wake(data->irq);
1267 * Disable buffer, as the buffer is so small the device will wake
1268 * almost immediately.
1270 if (iio_buffer_enabled(indio_dev))
1271 fxls8962af_buffer_predisable(indio_dev);
1273 fxls8962af_runtime_suspend(dev);
1279 static int __maybe_unused fxls8962af_resume(struct device *dev)
1281 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1282 struct fxls8962af_data *data = iio_priv(indio_dev);
1284 if (device_may_wakeup(dev) && data->enable_event) {
1285 disable_irq_wake(data->irq);
1287 if (iio_buffer_enabled(indio_dev))
1288 fxls8962af_buffer_postenable(indio_dev);
1290 fxls8962af_runtime_resume(dev);
1296 const struct dev_pm_ops fxls8962af_pm_ops = {
1297 SET_SYSTEM_SLEEP_PM_OPS(fxls8962af_suspend, fxls8962af_resume)
1298 SET_RUNTIME_PM_OPS(fxls8962af_runtime_suspend,
1299 fxls8962af_runtime_resume, NULL)
1301 EXPORT_SYMBOL_GPL(fxls8962af_pm_ops);
1303 MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
1304 MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");
1305 MODULE_LICENSE("GPL v2");