drivers/iio/accel/fxls8962af-core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver
   4  *
   5  * Copyright 2021 Connected Cars A/S
   6  *
   7  * Datasheet:
   8  * https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf
   9  * https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf
  10  *
  11  * Errata:
  12  * https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf
  13  */
  14
  15 #include <linux/bits.h>
  16 #include <linux/bitfield.h>
  17 #include <linux/i2c.h>
  18 #include <linux/module.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/pm_runtime.h>
  21 #include <linux/regulator/consumer.h>
  22 #include <linux/regmap.h>
  23
  24 #include <linux/iio/buffer.h>
  25 #include <linux/iio/events.h>
  26 #include <linux/iio/iio.h>
  27 #include <linux/iio/kfifo_buf.h>
  28 #include <linux/iio/sysfs.h>
  29
  30 #include "fxls8962af.h"
  31
  32 #define FXLS8962AF_INT_STATUS                   0x00
  33 #define FXLS8962AF_INT_STATUS_SRC_BOOT          BIT(0)
  34 #define FXLS8962AF_INT_STATUS_SRC_SDCD_OT       BIT(4)
  35 #define FXLS8962AF_INT_STATUS_SRC_BUF           BIT(5)
  36 #define FXLS8962AF_INT_STATUS_SRC_DRDY          BIT(7)
  37 #define FXLS8962AF_TEMP_OUT                     0x01
  38 #define FXLS8962AF_VECM_LSB                     0x02
  39 #define FXLS8962AF_OUT_X_LSB                    0x04
  40 #define FXLS8962AF_OUT_Y_LSB                    0x06
  41 #define FXLS8962AF_OUT_Z_LSB                    0x08
  42 #define FXLS8962AF_BUF_STATUS                   0x0b
  43 #define FXLS8962AF_BUF_STATUS_BUF_CNT           GENMASK(5, 0)
  44 #define FXLS8962AF_BUF_STATUS_BUF_OVF           BIT(6)
  45 #define FXLS8962AF_BUF_STATUS_BUF_WMRK          BIT(7)
  46 #define FXLS8962AF_BUF_X_LSB                    0x0c
  47 #define FXLS8962AF_BUF_Y_LSB                    0x0e
  48 #define FXLS8962AF_BUF_Z_LSB                    0x10
  49
  50 #define FXLS8962AF_PROD_REV                     0x12
  51 #define FXLS8962AF_WHO_AM_I                     0x13
  52
  53 #define FXLS8962AF_SYS_MODE                     0x14
  54 #define FXLS8962AF_SENS_CONFIG1                 0x15
  55 #define FXLS8962AF_SENS_CONFIG1_ACTIVE          BIT(0)
  56 #define FXLS8962AF_SENS_CONFIG1_RST             BIT(7)
  57 #define FXLS8962AF_SC1_FSR_MASK                 GENMASK(2, 1)
  58 #define FXLS8962AF_SC1_FSR_PREP(x)              FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))
  59 #define FXLS8962AF_SC1_FSR_GET(x)               FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))
  60
  61 #define FXLS8962AF_SENS_CONFIG2                 0x16
  62 #define FXLS8962AF_SENS_CONFIG3                 0x17
  63 #define FXLS8962AF_SC3_WAKE_ODR_MASK            GENMASK(7, 4)
  64 #define FXLS8962AF_SC3_WAKE_ODR_PREP(x)         FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
  65 #define FXLS8962AF_SC3_WAKE_ODR_GET(x)          FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
  66 #define FXLS8962AF_SENS_CONFIG4                 0x18
  67 #define FXLS8962AF_SC4_INT_PP_OD_MASK           BIT(1)
  68 #define FXLS8962AF_SC4_INT_PP_OD_PREP(x)        FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))
  69 #define FXLS8962AF_SC4_INT_POL_MASK             BIT(0)
  70 #define FXLS8962AF_SC4_INT_POL_PREP(x)          FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))
  71 #define FXLS8962AF_SENS_CONFIG5                 0x19
  72
  73 #define FXLS8962AF_WAKE_IDLE_LSB                0x1b
  74 #define FXLS8962AF_SLEEP_IDLE_LSB               0x1c
  75 #define FXLS8962AF_ASLP_COUNT_LSB               0x1e
  76
  77 #define FXLS8962AF_INT_EN                       0x20
  78 #define FXLS8962AF_INT_EN_SDCD_OT_EN            BIT(5)
  79 #define FXLS8962AF_INT_EN_BUF_EN                BIT(6)
  80 #define FXLS8962AF_INT_PIN_SEL                  0x21
  81 #define FXLS8962AF_INT_PIN_SEL_MASK             GENMASK(7, 0)
  82 #define FXLS8962AF_INT_PIN_SEL_INT1             0x00
  83 #define FXLS8962AF_INT_PIN_SEL_INT2             GENMASK(7, 0)
  84
  85 #define FXLS8962AF_OFF_X                        0x22
  86 #define FXLS8962AF_OFF_Y                        0x23
  87 #define FXLS8962AF_OFF_Z                        0x24
  88
  89 #define FXLS8962AF_BUF_CONFIG1                  0x26
  90 #define FXLS8962AF_BC1_BUF_MODE_MASK            GENMASK(6, 5)
  91 #define FXLS8962AF_BC1_BUF_MODE_PREP(x)         FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))
  92 #define FXLS8962AF_BUF_CONFIG2                  0x27
  93 #define FXLS8962AF_BUF_CONFIG2_BUF_WMRK         GENMASK(5, 0)
  94
  95 #define FXLS8962AF_ORIENT_STATUS                0x28
  96 #define FXLS8962AF_ORIENT_CONFIG                0x29
  97 #define FXLS8962AF_ORIENT_DBCOUNT               0x2a
  98 #define FXLS8962AF_ORIENT_BF_ZCOMP              0x2b
  99 #define FXLS8962AF_ORIENT_THS_REG               0x2c
 100
 101 #define FXLS8962AF_SDCD_INT_SRC1                0x2d
 102 #define FXLS8962AF_SDCD_INT_SRC1_X_OT           BIT(5)
 103 #define FXLS8962AF_SDCD_INT_SRC1_X_POL          BIT(4)
 104 #define FXLS8962AF_SDCD_INT_SRC1_Y_OT           BIT(3)
 105 #define FXLS8962AF_SDCD_INT_SRC1_Y_POL          BIT(2)
 106 #define FXLS8962AF_SDCD_INT_SRC1_Z_OT           BIT(1)
 107 #define FXLS8962AF_SDCD_INT_SRC1_Z_POL          BIT(0)
 108 #define FXLS8962AF_SDCD_INT_SRC2                0x2e
 109 #define FXLS8962AF_SDCD_CONFIG1                 0x2f
 110 #define FXLS8962AF_SDCD_CONFIG1_Z_OT_EN         BIT(3)
 111 #define FXLS8962AF_SDCD_CONFIG1_Y_OT_EN         BIT(4)
 112 #define FXLS8962AF_SDCD_CONFIG1_X_OT_EN         BIT(5)
 113 #define FXLS8962AF_SDCD_CONFIG1_OT_ELE          BIT(7)
 114 #define FXLS8962AF_SDCD_CONFIG2                 0x30
 115 #define FXLS8962AF_SDCD_CONFIG2_SDCD_EN         BIT(7)
 116 #define FXLS8962AF_SC2_REF_UPDM_AC              GENMASK(6, 5)
 117 #define FXLS8962AF_SDCD_OT_DBCNT                0x31
 118 #define FXLS8962AF_SDCD_WT_DBCNT                0x32
 119 #define FXLS8962AF_SDCD_LTHS_LSB                0x33
 120 #define FXLS8962AF_SDCD_UTHS_LSB                0x35
 121
 122 #define FXLS8962AF_SELF_TEST_CONFIG1            0x37
 123 #define FXLS8962AF_SELF_TEST_CONFIG2            0x38
 124
 125 #define FXLS8962AF_MAX_REG                      0x38
 126
 127 #define FXLS8962AF_DEVICE_ID                    0x62
 128 #define FXLS8964AF_DEVICE_ID                    0x84
 129
 130 /* Raw temp channel offset */
 131 #define FXLS8962AF_TEMP_CENTER_VAL              25
 132
 133 #define FXLS8962AF_AUTO_SUSPEND_DELAY_MS        2000
 134
 135 #define FXLS8962AF_FIFO_LENGTH                  32
 136 #define FXLS8962AF_SCALE_TABLE_LEN              4
 137 #define FXLS8962AF_SAMP_FREQ_TABLE_LEN          13
 138
 139 static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {
 140         {0, IIO_G_TO_M_S_2(980000)},
 141         {0, IIO_G_TO_M_S_2(1950000)},
 142         {0, IIO_G_TO_M_S_2(3910000)},
 143         {0, IIO_G_TO_M_S_2(7810000)},
 144 };
 145
 146 static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {
 147         {3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},
 148         {50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},
 149         {1, 563000}, {0, 781000},
 150 };
 151
 152 struct fxls8962af_chip_info {
 153         const char *name;
 154         const struct iio_chan_spec *channels;
 155         int num_channels;
 156         u8 chip_id;
 157 };
 158
 159 struct fxls8962af_data {
 160         struct regmap *regmap;
 161         const struct fxls8962af_chip_info *chip_info;
 162         struct regulator *vdd_reg;
 163         struct {
 164                 __le16 channels[3];
 165                 s64 ts __aligned(8);
 166         } scan;
 167         int64_t timestamp, old_timestamp;       /* Only used in hw fifo mode. */
 168         struct iio_mount_matrix orientation;
 169         int irq;
 170         u8 watermark;
 171         u8 enable_event;
 172         u16 lower_thres;
 173         u16 upper_thres;
 174 };
 175
 176 const struct regmap_config fxls8962af_regmap_conf = {
 177         .reg_bits = 8,
 178         .val_bits = 8,
 179         .max_register = FXLS8962AF_MAX_REG,
 180 };
 181 EXPORT_SYMBOL_GPL(fxls8962af_regmap_conf);
 182
 183 enum {
 184         fxls8962af_idx_x,
 185         fxls8962af_idx_y,
 186         fxls8962af_idx_z,
 187         fxls8962af_idx_ts,
 188 };
 189
 190 enum fxls8962af_int_pin {
 191         FXLS8962AF_PIN_INT1,
 192         FXLS8962AF_PIN_INT2,
 193 };
 194
 195 static int fxls8962af_power_on(struct fxls8962af_data *data)
 196 {
 197         struct device *dev = regmap_get_device(data->regmap);
 198         int ret;
 199
 200         ret = pm_runtime_resume_and_get(dev);
 201         if (ret)
 202                 dev_err(dev, "failed to power on\n");
 203
 204         return ret;
 205 }
 206
 207 static int fxls8962af_power_off(struct fxls8962af_data *data)
 208 {
 209         struct device *dev = regmap_get_device(data->regmap);
 210         int ret;
 211
 212         pm_runtime_mark_last_busy(dev);
 213         ret = pm_runtime_put_autosuspend(dev);
 214         if (ret)
 215                 dev_err(dev, "failed to power off\n");
 216
 217         return ret;
 218 }
 219
 220 static int fxls8962af_standby(struct fxls8962af_data *data)
 221 {
 222         return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
 223                                   FXLS8962AF_SENS_CONFIG1_ACTIVE, 0);
 224 }
 225
 226 static int fxls8962af_active(struct fxls8962af_data *data)
 227 {
 228         return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
 229                                   FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);
 230 }
 231
 232 static int fxls8962af_is_active(struct fxls8962af_data *data)
 233 {
 234         unsigned int reg;
 235         int ret;
 236
 237         ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, &reg);
 238         if (ret)
 239                 return ret;
 240
 241         return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;
 242 }
 243
 244 static int fxls8962af_get_out(struct fxls8962af_data *data,
 245                               struct iio_chan_spec const *chan, int *val)
 246 {
 247         struct device *dev = regmap_get_device(data->regmap);
 248         __le16 raw_val;
 249         int is_active;
 250         int ret;
 251
 252         is_active = fxls8962af_is_active(data);
 253         if (!is_active) {
 254                 ret = fxls8962af_power_on(data);
 255                 if (ret)
 256                         return ret;
 257         }
 258
 259         ret = regmap_bulk_read(data->regmap, chan->address,
 260                                &raw_val, sizeof(data->lower_thres));
 261
 262         if (!is_active)
 263                 fxls8962af_power_off(data);
 264
 265         if (ret) {
 266                 dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);
 267                 return ret;
 268         }
 269
 270         *val = sign_extend32(le16_to_cpu(raw_val),
 271                              chan->scan_type.realbits - 1);
 272
 273         return IIO_VAL_INT;
 274 }
 275
 276 static int fxls8962af_read_avail(struct iio_dev *indio_dev,
 277                                  struct iio_chan_spec const *chan,
 278                                  const int **vals, int *type, int *length,
 279                                  long mask)
 280 {
 281         switch (mask) {
 282         case IIO_CHAN_INFO_SCALE:
 283                 *type = IIO_VAL_INT_PLUS_NANO;
 284                 *vals = (int *)fxls8962af_scale_table;
 285                 *length = ARRAY_SIZE(fxls8962af_scale_table) * 2;
 286                 return IIO_AVAIL_LIST;
 287         case IIO_CHAN_INFO_SAMP_FREQ:
 288                 *type = IIO_VAL_INT_PLUS_MICRO;
 289                 *vals = (int *)fxls8962af_samp_freq_table;
 290                 *length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;
 291                 return IIO_AVAIL_LIST;
 292         default:
 293                 return -EINVAL;
 294         }
 295 }
 296
 297 static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,
 298                                         struct iio_chan_spec const *chan,
 299                                         long mask)
 300 {
 301         switch (mask) {
 302         case IIO_CHAN_INFO_SCALE:
 303                 return IIO_VAL_INT_PLUS_NANO;
 304         case IIO_CHAN_INFO_SAMP_FREQ:
 305                 return IIO_VAL_INT_PLUS_MICRO;
 306         default:
 307                 return IIO_VAL_INT_PLUS_NANO;
 308         }
 309 }
 310
 311 static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,
 312                                     u8 mask, u8 val)
 313 {
 314         int ret;
 315         int is_active;
 316
 317         is_active = fxls8962af_is_active(data);
 318         if (is_active) {
 319                 ret = fxls8962af_standby(data);
 320                 if (ret)
 321                         return ret;
 322         }
 323
 324         ret = regmap_update_bits(data->regmap, reg, mask, val);
 325         if (ret)
 326                 return ret;
 327
 328         if (is_active) {
 329                 ret = fxls8962af_active(data);
 330                 if (ret)
 331                         return ret;
 332         }
 333
 334         return 0;
 335 }
 336
 337 static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)
 338 {
 339         int i;
 340
 341         for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)
 342                 if (scale == fxls8962af_scale_table[i][1])
 343                         break;
 344
 345         if (i == ARRAY_SIZE(fxls8962af_scale_table))
 346                 return -EINVAL;
 347
 348         return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,
 349                                         FXLS8962AF_SC1_FSR_MASK,
 350                                         FXLS8962AF_SC1_FSR_PREP(i));
 351 }
 352
 353 static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,
 354                                                int *val)
 355 {
 356         int ret;
 357         unsigned int reg;
 358         u8 range_idx;
 359
 360         ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, &reg);
 361         if (ret)
 362                 return ret;
 363
 364         range_idx = FXLS8962AF_SC1_FSR_GET(reg);
 365
 366         *val = fxls8962af_scale_table[range_idx][1];
 367
 368         return IIO_VAL_INT_PLUS_NANO;
 369 }
 370
 371 static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,
 372                                     u32 val2)
 373 {
 374         int i;
 375
 376         for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)
 377                 if (val == fxls8962af_samp_freq_table[i][0] &&
 378                     val2 == fxls8962af_samp_freq_table[i][1])
 379                         break;
 380
 381         if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))
 382                 return -EINVAL;
 383
 384         return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,
 385                                         FXLS8962AF_SC3_WAKE_ODR_MASK,
 386                                         FXLS8962AF_SC3_WAKE_ODR_PREP(i));
 387 }
 388
 389 static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,
 390                                               int *val, int *val2)
 391 {
 392         int ret;
 393         unsigned int reg;
 394         u8 range_idx;
 395
 396         ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, &reg);
 397         if (ret)
 398                 return ret;
 399
 400         range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);
 401
 402         *val = fxls8962af_samp_freq_table[range_idx][0];
 403         *val2 = fxls8962af_samp_freq_table[range_idx][1];
 404
 405         return IIO_VAL_INT_PLUS_MICRO;
 406 }
 407
 408 static int fxls8962af_read_raw(struct iio_dev *indio_dev,
 409                                struct iio_chan_spec const *chan,
 410                                int *val, int *val2, long mask)
 411 {
 412         struct fxls8962af_data *data = iio_priv(indio_dev);
 413
 414         switch (mask) {
 415         case IIO_CHAN_INFO_RAW:
 416                 switch (chan->type) {
 417                 case IIO_TEMP:
 418                 case IIO_ACCEL:
 419                         return fxls8962af_get_out(data, chan, val);
 420                 default:
 421                         return -EINVAL;
 422                 }
 423         case IIO_CHAN_INFO_OFFSET:
 424                 if (chan->type != IIO_TEMP)
 425                         return -EINVAL;
 426
 427                 *val = FXLS8962AF_TEMP_CENTER_VAL;
 428                 return IIO_VAL_INT;
 429         case IIO_CHAN_INFO_SCALE:
 430                 *val = 0;
 431                 return fxls8962af_read_full_scale(data, val2);
 432         case IIO_CHAN_INFO_SAMP_FREQ:
 433                 return fxls8962af_read_samp_freq(data, val, val2);
 434         default:
 435                 return -EINVAL;
 436         }
 437 }
 438
 439 static int fxls8962af_write_raw(struct iio_dev *indio_dev,
 440                                 struct iio_chan_spec const *chan,
 441                                 int val, int val2, long mask)
 442 {
 443         struct fxls8962af_data *data = iio_priv(indio_dev);
 444         int ret;
 445
 446         switch (mask) {
 447         case IIO_CHAN_INFO_SCALE:
 448                 if (val != 0)
 449                         return -EINVAL;
 450
 451                 ret = iio_device_claim_direct_mode(indio_dev);
 452                 if (ret)
 453                         return ret;
 454
 455                 ret = fxls8962af_set_full_scale(data, val2);
 456
 457                 iio_device_release_direct_mode(indio_dev);
 458                 return ret;
 459         case IIO_CHAN_INFO_SAMP_FREQ:
 460                 ret = iio_device_claim_direct_mode(indio_dev);
 461                 if (ret)
 462                         return ret;
 463
 464                 ret = fxls8962af_set_samp_freq(data, val, val2);
 465
 466                 iio_device_release_direct_mode(indio_dev);
 467                 return ret;
 468         default:
 469                 return -EINVAL;
 470         }
 471 }
 472
 473 static int fxls8962af_event_setup(struct fxls8962af_data *data, int state)
 474 {
 475         /* Enable wakeup interrupt */
 476         int mask = FXLS8962AF_INT_EN_SDCD_OT_EN;
 477         int value = state ? mask : 0;
 478
 479         return regmap_update_bits(data->regmap, FXLS8962AF_INT_EN, mask, value);
 480 }
 481
 482 static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)
 483 {
 484         struct fxls8962af_data *data = iio_priv(indio_dev);
 485
 486         if (val > FXLS8962AF_FIFO_LENGTH)
 487                 val = FXLS8962AF_FIFO_LENGTH;
 488
 489         data->watermark = val;
 490
 491         return 0;
 492 }
 493
 494 static int __fxls8962af_set_thresholds(struct fxls8962af_data *data,
 495                                        const struct iio_chan_spec *chan,
 496                                        enum iio_event_direction dir,
 497                                        int val)
 498 {
 499         switch (dir) {
 500         case IIO_EV_DIR_FALLING:
 501                 data->lower_thres = val;
 502                 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
 503                                 &data->lower_thres, sizeof(data->lower_thres));
 504         case IIO_EV_DIR_RISING:
 505                 data->upper_thres = val;
 506                 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
 507                                 &data->upper_thres, sizeof(data->upper_thres));
 508         default:
 509                 return -EINVAL;
 510         }
 511 }
 512
 513 static int fxls8962af_read_event(struct iio_dev *indio_dev,
 514                                  const struct iio_chan_spec *chan,
 515                                  enum iio_event_type type,
 516                                  enum iio_event_direction dir,
 517                                  enum iio_event_info info,
 518                                  int *val, int *val2)
 519 {
 520         struct fxls8962af_data *data = iio_priv(indio_dev);
 521         int ret;
 522
 523         if (type != IIO_EV_TYPE_THRESH)
 524                 return -EINVAL;
 525
 526         switch (dir) {
 527         case IIO_EV_DIR_FALLING:
 528                 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
 529                                        &data->lower_thres, sizeof(data->lower_thres));
 530                 if (ret)
 531                         return ret;
 532
 533                 *val = sign_extend32(data->lower_thres, chan->scan_type.realbits - 1);
 534                 return IIO_VAL_INT;
 535         case IIO_EV_DIR_RISING:
 536                 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
 537                                        &data->upper_thres, sizeof(data->upper_thres));
 538                 if (ret)
 539                         return ret;
 540
 541                 *val = sign_extend32(data->upper_thres, chan->scan_type.realbits - 1);
 542                 return IIO_VAL_INT;
 543         default:
 544                 return -EINVAL;
 545         }
 546 }
 547
 548 static int fxls8962af_write_event(struct iio_dev *indio_dev,
 549                                   const struct iio_chan_spec *chan,
 550                                   enum iio_event_type type,
 551                                   enum iio_event_direction dir,
 552                                   enum iio_event_info info,
 553                                   int val, int val2)
 554 {
 555         struct fxls8962af_data *data = iio_priv(indio_dev);
 556         int ret, val_masked;
 557
 558         if (type != IIO_EV_TYPE_THRESH)
 559                 return -EINVAL;
 560
 561         if (val < -2048 || val > 2047)
 562                 return -EINVAL;
 563
 564         if (data->enable_event)
 565                 return -EBUSY;
 566
 567         val_masked = val & GENMASK(11, 0);
 568         if (fxls8962af_is_active(data)) {
 569                 ret = fxls8962af_standby(data);
 570                 if (ret)
 571                         return ret;
 572
 573                 ret = __fxls8962af_set_thresholds(data, chan, dir, val_masked);
 574                 if (ret)
 575                         return ret;
 576
 577                 return fxls8962af_active(data);
 578         } else {
 579                 return __fxls8962af_set_thresholds(data, chan, dir, val_masked);
 580         }
 581 }
 582
 583 static int
 584 fxls8962af_read_event_config(struct iio_dev *indio_dev,
 585                              const struct iio_chan_spec *chan,
 586                              enum iio_event_type type,
 587                              enum iio_event_direction dir)
 588 {
 589         struct fxls8962af_data *data = iio_priv(indio_dev);
 590
 591         if (type != IIO_EV_TYPE_THRESH)
 592                 return -EINVAL;
 593
 594         switch (chan->channel2) {
 595         case IIO_MOD_X:
 596                 return !!(FXLS8962AF_SDCD_CONFIG1_X_OT_EN & data->enable_event);
 597         case IIO_MOD_Y:
 598                 return !!(FXLS8962AF_SDCD_CONFIG1_Y_OT_EN & data->enable_event);
 599         case IIO_MOD_Z:
 600                 return !!(FXLS8962AF_SDCD_CONFIG1_Z_OT_EN & data->enable_event);
 601         default:
 602                 return -EINVAL;
 603         }
 604 }
 605
 606 static int
 607 fxls8962af_write_event_config(struct iio_dev *indio_dev,
 608                               const struct iio_chan_spec *chan,
 609                               enum iio_event_type type,
 610                               enum iio_event_direction dir, int state)
 611 {
 612         struct fxls8962af_data *data = iio_priv(indio_dev);
 613         u8 enable_event, enable_bits;
 614         int ret, value;
 615
 616         if (type != IIO_EV_TYPE_THRESH)
 617                 return -EINVAL;
 618
 619         switch (chan->channel2) {
 620         case IIO_MOD_X:
 621                 enable_bits = FXLS8962AF_SDCD_CONFIG1_X_OT_EN;
 622                 break;
 623         case IIO_MOD_Y:
 624                 enable_bits = FXLS8962AF_SDCD_CONFIG1_Y_OT_EN;
 625                 break;
 626         case IIO_MOD_Z:
 627                 enable_bits = FXLS8962AF_SDCD_CONFIG1_Z_OT_EN;
 628                 break;
 629         default:
 630                 return -EINVAL;
 631         }
 632
 633         if (state)
 634                 enable_event = data->enable_event | enable_bits;
 635         else
 636                 enable_event = data->enable_event & ~enable_bits;
 637
 638         if (data->enable_event == enable_event)
 639                 return 0;
 640
 641         ret = fxls8962af_standby(data);
 642         if (ret)
 643                 return ret;
 644
 645         /* Enable events */
 646         value = enable_event | FXLS8962AF_SDCD_CONFIG1_OT_ELE;
 647         ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG1, value);
 648         if (ret)
 649                 return ret;
 650
 651         /*
 652          * Enable update of SDCD_REF_X/Y/Z values with the current decimated and
 653          * trimmed X/Y/Z acceleration input data. This allows for acceleration
 654          * slope detection with Data(n) to Data(n–1) always used as the input
 655          * to the window comparator.
 656          */
 657         value = enable_event ?
 658                 FXLS8962AF_SDCD_CONFIG2_SDCD_EN | FXLS8962AF_SC2_REF_UPDM_AC :
 659                 0x00;
 660         ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG2, value);
 661         if (ret)
 662                 return ret;
 663
 664         ret = fxls8962af_event_setup(data, state);
 665         if (ret)
 666                 return ret;
 667
 668         data->enable_event = enable_event;
 669
 670         if (data->enable_event) {
 671                 fxls8962af_active(data);
 672                 ret = fxls8962af_power_on(data);
 673         } else {
 674                 ret = iio_device_claim_direct_mode(indio_dev);
 675                 if (ret)
 676                         return ret;
 677
 678                 /* Not in buffered mode so disable power */
 679                 ret = fxls8962af_power_off(data);
 680
 681                 iio_device_release_direct_mode(indio_dev);
 682         }
 683
 684         return ret;
 685 }
 686
 687 static const struct iio_event_spec fxls8962af_event[] = {
 688         {
 689                 .type = IIO_EV_TYPE_THRESH,
 690                 .dir = IIO_EV_DIR_EITHER,
 691                 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
 692         },
 693         {
 694                 .type = IIO_EV_TYPE_THRESH,
 695                 .dir = IIO_EV_DIR_FALLING,
 696                 .mask_separate = BIT(IIO_EV_INFO_VALUE),
 697         },
 698         {
 699                 .type = IIO_EV_TYPE_THRESH,
 700                 .dir = IIO_EV_DIR_RISING,
 701                 .mask_separate = BIT(IIO_EV_INFO_VALUE),
 702         },
 703 };
 704
 705 #define FXLS8962AF_CHANNEL(axis, reg, idx) { \
 706         .type = IIO_ACCEL, \
 707         .address = reg, \
 708         .modified = 1, \
 709         .channel2 = IIO_MOD_##axis, \
 710         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
 711         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
 712                                     BIT(IIO_CHAN_INFO_SAMP_FREQ), \
 713         .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
 714                                               BIT(IIO_CHAN_INFO_SAMP_FREQ), \
 715         .scan_index = idx, \
 716         .scan_type = { \
 717                 .sign = 's', \
 718                 .realbits = 12, \
 719                 .storagebits = 16, \
 720                 .shift = 4, \
 721                 .endianness = IIO_BE, \
 722         }, \
 723         .event_spec = fxls8962af_event, \
 724         .num_event_specs = ARRAY_SIZE(fxls8962af_event), \
 725 }
 726
 727 #define FXLS8962AF_TEMP_CHANNEL { \
 728         .type = IIO_TEMP, \
 729         .address = FXLS8962AF_TEMP_OUT, \
 730         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 731                               BIT(IIO_CHAN_INFO_OFFSET),\
 732         .scan_index = -1, \
 733         .scan_type = { \
 734                 .realbits = 8, \
 735                 .storagebits = 8, \
 736         }, \
 737 }
 738
 739 static const struct iio_chan_spec fxls8962af_channels[] = {
 740         FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),
 741         FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),
 742         FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),
 743         IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),
 744         FXLS8962AF_TEMP_CHANNEL,
 745 };
 746
 747 static const struct fxls8962af_chip_info fxls_chip_info_table[] = {
 748         [fxls8962af] = {
 749                 .chip_id = FXLS8962AF_DEVICE_ID,
 750                 .name = "fxls8962af",
 751                 .channels = fxls8962af_channels,
 752                 .num_channels = ARRAY_SIZE(fxls8962af_channels),
 753         },
 754         [fxls8964af] = {
 755                 .chip_id = FXLS8964AF_DEVICE_ID,
 756                 .name = "fxls8964af",
 757                 .channels = fxls8962af_channels,
 758                 .num_channels = ARRAY_SIZE(fxls8962af_channels),
 759         },
 760 };
 761
 762 static const struct iio_info fxls8962af_info = {
 763         .read_raw = &fxls8962af_read_raw,
 764         .write_raw = &fxls8962af_write_raw,
 765         .write_raw_get_fmt = fxls8962af_write_raw_get_fmt,
 766         .read_event_value = fxls8962af_read_event,
 767         .write_event_value = fxls8962af_write_event,
 768         .read_event_config = fxls8962af_read_event_config,
 769         .write_event_config = fxls8962af_write_event_config,
 770         .read_avail = fxls8962af_read_avail,
 771         .hwfifo_set_watermark = fxls8962af_set_watermark,
 772 };
 773
 774 static int fxls8962af_reset(struct fxls8962af_data *data)
 775 {
 776         struct device *dev = regmap_get_device(data->regmap);
 777         unsigned int reg;
 778         int ret;
 779
 780         ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
 781                                  FXLS8962AF_SENS_CONFIG1_RST,
 782                                  FXLS8962AF_SENS_CONFIG1_RST);
 783         if (ret)
 784                 return ret;
 785
 786         /* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */
 787         ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,
 788                                        (reg & FXLS8962AF_INT_STATUS_SRC_BOOT),
 789                                        1000, 18000);
 790         if (ret == -ETIMEDOUT)
 791                 dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);
 792
 793         return ret;
 794 }
 795
 796 static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)
 797 {
 798         int ret;
 799
 800         /* Enable watermark at max fifo size */
 801         ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,
 802                                  FXLS8962AF_BUF_CONFIG2_BUF_WMRK,
 803                                  data->watermark);
 804         if (ret)
 805                 return ret;
 806
 807         return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,
 808                                   FXLS8962AF_BC1_BUF_MODE_MASK,
 809                                   FXLS8962AF_BC1_BUF_MODE_PREP(onoff));
 810 }
 811
 812 static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)
 813 {
 814         return fxls8962af_power_on(iio_priv(indio_dev));
 815 }
 816
 817 static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)
 818 {
 819         struct fxls8962af_data *data = iio_priv(indio_dev);
 820         int ret;
 821
 822         fxls8962af_standby(data);
 823
 824         /* Enable buffer interrupt */
 825         ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
 826                                  FXLS8962AF_INT_EN_BUF_EN,
 827                                  FXLS8962AF_INT_EN_BUF_EN);
 828         if (ret)
 829                 return ret;
 830
 831         ret = __fxls8962af_fifo_set_mode(data, true);
 832
 833         fxls8962af_active(data);
 834
 835         return ret;
 836 }
 837
 838 static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)
 839 {
 840         struct fxls8962af_data *data = iio_priv(indio_dev);
 841         int ret;
 842
 843         fxls8962af_standby(data);
 844
 845         /* Disable buffer interrupt */
 846         ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
 847                                  FXLS8962AF_INT_EN_BUF_EN, 0);
 848         if (ret)
 849                 return ret;
 850
 851         ret = __fxls8962af_fifo_set_mode(data, false);
 852
 853         if (data->enable_event)
 854                 fxls8962af_active(data);
 855
 856         return ret;
 857 }
 858
 859 static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)
 860 {
 861         struct fxls8962af_data *data = iio_priv(indio_dev);
 862
 863         if (!data->enable_event)
 864                 fxls8962af_power_off(data);
 865
 866         return 0;
 867 }
 868
 869 static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {
 870         .preenable = fxls8962af_buffer_preenable,
 871         .postenable = fxls8962af_buffer_postenable,
 872         .predisable = fxls8962af_buffer_predisable,
 873         .postdisable = fxls8962af_buffer_postdisable,
 874 };
 875
 876 static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,
 877                                            u16 *buffer, int samples,
 878                                            int sample_length)
 879 {
 880         int i, ret;
 881
 882         for (i = 0; i < samples; i++) {
 883                 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,
 884                                       &buffer[i * 3], sample_length);
 885                 if (ret)
 886                         return ret;
 887         }
 888
 889         return 0;
 890 }
 891
 892 static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,
 893                                     u16 *buffer, int samples)
 894 {
 895         struct device *dev = regmap_get_device(data->regmap);
 896         int sample_length = 3 * sizeof(*buffer);
 897         int total_length = samples * sample_length;
 898         int ret;
 899
 900         if (i2c_verify_client(dev))
 901                 /*
 902                  * Due to errata bug:
 903                  * E3: FIFO burst read operation error using I2C interface
 904                  * We have to avoid burst reads on I2C..
 905                  */
 906                 ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,
 907                                                       sample_length);
 908         else
 909                 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,
 910                                       total_length);
 911
 912         if (ret)
 913                 dev_err(dev, "Error transferring data from fifo: %d\n", ret);
 914
 915         return ret;
 916 }
 917
 918 static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)
 919 {
 920         struct fxls8962af_data *data = iio_priv(indio_dev);
 921         struct device *dev = regmap_get_device(data->regmap);
 922         u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];
 923         uint64_t sample_period;
 924         unsigned int reg;
 925         int64_t tstamp;
 926         int ret, i;
 927         u8 count;
 928
 929         ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, &reg);
 930         if (ret)
 931                 return ret;
 932
 933         if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {
 934                 dev_err(dev, "Buffer overflow");
 935                 return -EOVERFLOW;
 936         }
 937
 938         count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;
 939         if (!count)
 940                 return 0;
 941
 942         data->old_timestamp = data->timestamp;
 943         data->timestamp = iio_get_time_ns(indio_dev);
 944
 945         /*
 946          * Approximate timestamps for each of the sample based on the sampling,
 947          * frequency, timestamp for last sample and number of samples.
 948          */
 949         sample_period = (data->timestamp - data->old_timestamp);
 950         do_div(sample_period, count);
 951         tstamp = data->timestamp - (count - 1) * sample_period;
 952
 953         ret = fxls8962af_fifo_transfer(data, buffer, count);
 954         if (ret)
 955                 return ret;
 956
 957         /* Demux hw FIFO into kfifo. */
 958         for (i = 0; i < count; i++) {
 959                 int j, bit;
 960
 961                 j = 0;
 962                 for_each_set_bit(bit, indio_dev->active_scan_mask,
 963                                  indio_dev->masklength) {
 964                         memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
 965                                sizeof(data->scan.channels[0]));
 966                 }
 967
 968                 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
 969                                                    tstamp);
 970
 971                 tstamp += sample_period;
 972         }
 973
 974         return count;
 975 }
 976
 977 static int fxls8962af_event_interrupt(struct iio_dev *indio_dev)
 978 {
 979         struct fxls8962af_data *data = iio_priv(indio_dev);
 980         s64 ts = iio_get_time_ns(indio_dev);
 981         unsigned int reg;
 982         u64 ev_code;
 983         int ret;
 984
 985         ret = regmap_read(data->regmap, FXLS8962AF_SDCD_INT_SRC1, &reg);
 986         if (ret)
 987                 return ret;
 988
 989         if (reg & FXLS8962AF_SDCD_INT_SRC1_X_OT) {
 990                 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_X_POL ?
 991                         IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
 992                 iio_push_event(indio_dev,
 993                                 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
 994                                         IIO_EV_TYPE_THRESH, ev_code), ts);
 995         }
 996
 997         if (reg & FXLS8962AF_SDCD_INT_SRC1_Y_OT) {
 998                 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Y_POL ?
 999                         IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1000                 iio_push_event(indio_dev,
1001                                 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1002                                         IIO_EV_TYPE_THRESH, ev_code), ts);
1003         }
1004
1005         if (reg & FXLS8962AF_SDCD_INT_SRC1_Z_OT) {
1006                 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Z_POL ?
1007                         IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1008                 iio_push_event(indio_dev,
1009                                 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1010                                         IIO_EV_TYPE_THRESH, ev_code), ts);
1011         }
1012
1013         return 0;
1014 }
1015
1016 static irqreturn_t fxls8962af_interrupt(int irq, void *p)
1017 {
1018         struct iio_dev *indio_dev = p;
1019         struct fxls8962af_data *data = iio_priv(indio_dev);
1020         unsigned int reg;
1021         int ret;
1022
1023         ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, &reg);
1024         if (ret)
1025                 return IRQ_NONE;
1026
1027         if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {
1028                 ret = fxls8962af_fifo_flush(indio_dev);
1029                 if (ret < 0)
1030                         return IRQ_NONE;
1031
1032                 return IRQ_HANDLED;
1033         }
1034
1035         if (reg & FXLS8962AF_INT_STATUS_SRC_SDCD_OT) {
1036                 ret = fxls8962af_event_interrupt(indio_dev);
1037                 if (ret < 0)
1038                         return IRQ_NONE;
1039
1040                 return IRQ_HANDLED;
1041         }
1042
1043         return IRQ_NONE;
1044 }
1045
1046 static void fxls8962af_regulator_disable(void *data_ptr)
1047 {
1048         struct fxls8962af_data *data = data_ptr;
1049
1050         regulator_disable(data->vdd_reg);
1051 }
1052
1053 static void fxls8962af_pm_disable(void *dev_ptr)
1054 {
1055         struct device *dev = dev_ptr;
1056         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1057
1058         pm_runtime_disable(dev);
1059         pm_runtime_set_suspended(dev);
1060         pm_runtime_put_noidle(dev);
1061
1062         fxls8962af_standby(iio_priv(indio_dev));
1063 }
1064
1065 static void fxls8962af_get_irq(struct device_node *of_node,
1066                                enum fxls8962af_int_pin *pin)
1067 {
1068         int irq;
1069
1070         irq = of_irq_get_byname(of_node, "INT2");
1071         if (irq > 0) {
1072                 *pin = FXLS8962AF_PIN_INT2;
1073                 return;
1074         }
1075
1076         *pin = FXLS8962AF_PIN_INT1;
1077 }
1078
1079 static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)
1080 {
1081         struct fxls8962af_data *data = iio_priv(indio_dev);
1082         struct device *dev = regmap_get_device(data->regmap);
1083         unsigned long irq_type;
1084         bool irq_active_high;
1085         enum fxls8962af_int_pin int_pin;
1086         u8 int_pin_sel;
1087         int ret;
1088
1089         fxls8962af_get_irq(dev->of_node, &int_pin);
1090         switch (int_pin) {
1091         case FXLS8962AF_PIN_INT1:
1092                 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;
1093                 break;
1094         case FXLS8962AF_PIN_INT2:
1095                 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;
1096                 break;
1097         default:
1098                 dev_err(dev, "unsupported int pin selected\n");
1099                 return -EINVAL;
1100         }
1101
1102         ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,
1103                                  FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);
1104         if (ret)
1105                 return ret;
1106
1107         irq_type = irqd_get_trigger_type(irq_get_irq_data(irq));
1108
1109         switch (irq_type) {
1110         case IRQF_TRIGGER_HIGH:
1111         case IRQF_TRIGGER_RISING:
1112                 irq_active_high = true;
1113                 break;
1114         case IRQF_TRIGGER_LOW:
1115         case IRQF_TRIGGER_FALLING:
1116                 irq_active_high = false;
1117                 break;
1118         default:
1119                 dev_info(dev, "mode %lx unsupported\n", irq_type);
1120                 return -EINVAL;
1121         }
1122
1123         ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1124                                  FXLS8962AF_SC4_INT_POL_MASK,
1125                                  FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));
1126         if (ret)
1127                 return ret;
1128
1129         if (device_property_read_bool(dev, "drive-open-drain")) {
1130                 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1131                                          FXLS8962AF_SC4_INT_PP_OD_MASK,
1132                                          FXLS8962AF_SC4_INT_PP_OD_PREP(1));
1133                 if (ret)
1134                         return ret;
1135
1136                 irq_type |= IRQF_SHARED;
1137         }
1138
1139         return devm_request_threaded_irq(dev,
1140                                          irq,
1141                                          NULL, fxls8962af_interrupt,
1142                                          irq_type | IRQF_ONESHOT,
1143                                          indio_dev->name, indio_dev);
1144 }
1145
1146 int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)
1147 {
1148         struct fxls8962af_data *data;
1149         struct iio_dev *indio_dev;
1150         unsigned int reg;
1151         int ret, i;
1152
1153         indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1154         if (!indio_dev)
1155                 return -ENOMEM;
1156
1157         data = iio_priv(indio_dev);
1158         dev_set_drvdata(dev, indio_dev);
1159         data->regmap = regmap;
1160         data->irq = irq;
1161
1162         ret = iio_read_mount_matrix(dev, &data->orientation);
1163         if (ret)
1164                 return ret;
1165
1166         data->vdd_reg = devm_regulator_get(dev, "vdd");
1167         if (IS_ERR(data->vdd_reg))
1168                 return dev_err_probe(dev, PTR_ERR(data->vdd_reg),
1169                                      "Failed to get vdd regulator\n");
1170
1171         ret = regulator_enable(data->vdd_reg);
1172         if (ret) {
1173                 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
1174                 return ret;
1175         }
1176
1177         ret = devm_add_action_or_reset(dev, fxls8962af_regulator_disable, data);
1178         if (ret)
1179                 return ret;
1180
1181         ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, &reg);
1182         if (ret)
1183                 return ret;
1184
1185         for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {
1186                 if (fxls_chip_info_table[i].chip_id == reg) {
1187                         data->chip_info = &fxls_chip_info_table[i];
1188                         break;
1189                 }
1190         }
1191         if (i == ARRAY_SIZE(fxls_chip_info_table)) {
1192                 dev_err(dev, "failed to match device in table\n");
1193                 return -ENXIO;
1194         }
1195
1196         indio_dev->channels = data->chip_info->channels;
1197         indio_dev->num_channels = data->chip_info->num_channels;
1198         indio_dev->name = data->chip_info->name;
1199         indio_dev->info = &fxls8962af_info;
1200         indio_dev->modes = INDIO_DIRECT_MODE;
1201
1202         ret = fxls8962af_reset(data);
1203         if (ret)
1204                 return ret;
1205
1206         if (irq) {
1207                 ret = fxls8962af_irq_setup(indio_dev, irq);
1208                 if (ret)
1209                         return ret;
1210
1211                 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
1212                                                   INDIO_BUFFER_SOFTWARE,
1213                                                   &fxls8962af_buffer_ops);
1214                 if (ret)
1215                         return ret;
1216         }
1217
1218         ret = pm_runtime_set_active(dev);
1219         if (ret)
1220                 return ret;
1221
1222         pm_runtime_enable(dev);
1223         pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);
1224         pm_runtime_use_autosuspend(dev);
1225
1226         ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);
1227         if (ret)
1228                 return ret;
1229
1230         if (device_property_read_bool(dev, "wakeup-source"))
1231                 device_init_wakeup(dev, true);
1232
1233         return devm_iio_device_register(dev, indio_dev);
1234 }
1235 EXPORT_SYMBOL_GPL(fxls8962af_core_probe);
1236
1237 static int __maybe_unused fxls8962af_runtime_suspend(struct device *dev)
1238 {
1239         struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1240         int ret;
1241
1242         ret = fxls8962af_standby(data);
1243         if (ret) {
1244                 dev_err(dev, "powering off device failed\n");
1245                 return ret;
1246         }
1247
1248         return 0;
1249 }
1250
1251 static int __maybe_unused fxls8962af_runtime_resume(struct device *dev)
1252 {
1253         struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1254
1255         return fxls8962af_active(data);
1256 }
1257
1258 static int __maybe_unused fxls8962af_suspend(struct device *dev)
1259 {
1260         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1261         struct fxls8962af_data *data = iio_priv(indio_dev);
1262
1263         if (device_may_wakeup(dev) && data->enable_event) {
1264                 enable_irq_wake(data->irq);
1265
1266                 /*
1267                  * Disable buffer, as the buffer is so small the device will wake
1268                  * almost immediately.
1269                  */
1270                 if (iio_buffer_enabled(indio_dev))
1271                         fxls8962af_buffer_predisable(indio_dev);
1272         } else {
1273                 fxls8962af_runtime_suspend(dev);
1274         }
1275
1276         return 0;
1277 }
1278
1279 static int __maybe_unused fxls8962af_resume(struct device *dev)
1280 {
1281         struct iio_dev *indio_dev = dev_get_drvdata(dev);
1282         struct fxls8962af_data *data = iio_priv(indio_dev);
1283
1284         if (device_may_wakeup(dev) && data->enable_event) {
1285                 disable_irq_wake(data->irq);
1286
1287                 if (iio_buffer_enabled(indio_dev))
1288                         fxls8962af_buffer_postenable(indio_dev);
1289         } else {
1290                 fxls8962af_runtime_resume(dev);
1291         }
1292
1293         return 0;
1294 }
1295
1296 const struct dev_pm_ops fxls8962af_pm_ops = {
1297         SET_SYSTEM_SLEEP_PM_OPS(fxls8962af_suspend, fxls8962af_resume)
1298         SET_RUNTIME_PM_OPS(fxls8962af_runtime_suspend,
1299                            fxls8962af_runtime_resume, NULL)
1300 };
1301 EXPORT_SYMBOL_GPL(fxls8962af_pm_ops);
1302
1303 MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
1304 MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");
1305 MODULE_LICENSE("GPL v2");