1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADXL355 3-Axis Digital Accelerometer IIO core driver
5 * Copyright (c) 2021 Puranjay Mohan <puranjay12@gmail.com>
7 * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adxl354_adxl355.pdf
10 #include <linux/bits.h>
11 #include <linux/bitfield.h>
12 #include <linux/iio/buffer.h>
13 #include <linux/iio/iio.h>
14 #include <linux/iio/trigger.h>
15 #include <linux/iio/triggered_buffer.h>
16 #include <linux/iio/trigger_consumer.h>
17 #include <linux/limits.h>
18 #include <linux/math64.h>
19 #include <linux/module.h>
20 #include <linux/mod_devicetable.h>
21 #include <linux/of_irq.h>
22 #include <linux/regmap.h>
23 #include <linux/units.h>
25 #include <asm/unaligned.h>
29 /* ADXL355 Register Definitions */
30 #define ADXL355_DEVID_AD_REG 0x00
31 #define ADXL355_DEVID_MST_REG 0x01
32 #define ADXL355_PARTID_REG 0x02
33 #define ADXL355_STATUS_REG 0x04
34 #define ADXL355_FIFO_ENTRIES_REG 0x05
35 #define ADXL355_TEMP2_REG 0x06
36 #define ADXL355_XDATA3_REG 0x08
37 #define ADXL355_YDATA3_REG 0x0B
38 #define ADXL355_ZDATA3_REG 0x0E
39 #define ADXL355_FIFO_DATA_REG 0x11
40 #define ADXL355_OFFSET_X_H_REG 0x1E
41 #define ADXL355_OFFSET_Y_H_REG 0x20
42 #define ADXL355_OFFSET_Z_H_REG 0x22
43 #define ADXL355_ACT_EN_REG 0x24
44 #define ADXL355_ACT_THRESH_H_REG 0x25
45 #define ADXL355_ACT_THRESH_L_REG 0x26
46 #define ADXL355_ACT_COUNT_REG 0x27
47 #define ADXL355_FILTER_REG 0x28
48 #define ADXL355_FILTER_ODR_MSK GENMASK(3, 0)
49 #define ADXL355_FILTER_HPF_MSK GENMASK(6, 4)
50 #define ADXL355_FIFO_SAMPLES_REG 0x29
51 #define ADXL355_INT_MAP_REG 0x2A
52 #define ADXL355_SYNC_REG 0x2B
53 #define ADXL355_RANGE_REG 0x2C
54 #define ADXL355_POWER_CTL_REG 0x2D
55 #define ADXL355_POWER_CTL_MODE_MSK GENMASK(1, 0)
56 #define ADXL355_POWER_CTL_DRDY_MSK BIT(2)
57 #define ADXL355_SELF_TEST_REG 0x2E
58 #define ADXL355_RESET_REG 0x2F
60 #define ADXL355_DEVID_AD_VAL 0xAD
61 #define ADXL355_DEVID_MST_VAL 0x1D
62 #define ADXL355_PARTID_VAL 0xED
63 #define ADXL355_RESET_CODE 0x52
65 static const struct regmap_range adxl355_read_reg_range[] = {
66 regmap_reg_range(ADXL355_DEVID_AD_REG, ADXL355_FIFO_DATA_REG),
67 regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_SELF_TEST_REG),
70 const struct regmap_access_table adxl355_readable_regs_tbl = {
71 .yes_ranges = adxl355_read_reg_range,
72 .n_yes_ranges = ARRAY_SIZE(adxl355_read_reg_range),
74 EXPORT_SYMBOL_NS_GPL(adxl355_readable_regs_tbl, IIO_ADXL355);
76 static const struct regmap_range adxl355_write_reg_range[] = {
77 regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_RESET_REG),
80 const struct regmap_access_table adxl355_writeable_regs_tbl = {
81 .yes_ranges = adxl355_write_reg_range,
82 .n_yes_ranges = ARRAY_SIZE(adxl355_write_reg_range),
84 EXPORT_SYMBOL_NS_GPL(adxl355_writeable_regs_tbl, IIO_ADXL355);
86 enum adxl355_op_mode {
101 ADXL355_ODR_15_625HZ,
106 enum adxl355_hpf_3db {
116 static const int adxl355_odr_table[][2] = {
130 static const int adxl355_hpf_3db_multipliers[] = {
141 chan_x, chan_y, chan_z,
144 struct adxl355_chan_info {
149 static const struct adxl355_chan_info adxl355_chans[] = {
151 .data_reg = ADXL355_XDATA3_REG,
152 .offset_reg = ADXL355_OFFSET_X_H_REG
155 .data_reg = ADXL355_YDATA3_REG,
156 .offset_reg = ADXL355_OFFSET_Y_H_REG
159 .data_reg = ADXL355_ZDATA3_REG,
160 .offset_reg = ADXL355_OFFSET_Z_H_REG
164 struct adxl355_data {
165 struct regmap *regmap;
167 struct mutex lock; /* lock to protect op_mode */
168 enum adxl355_op_mode op_mode;
169 enum adxl355_odr odr;
170 enum adxl355_hpf_3db hpf_3db;
172 int adxl355_hpf_3db_table[7][2];
173 struct iio_trigger *dready_trig;
180 } ____cacheline_aligned;
183 static int adxl355_set_op_mode(struct adxl355_data *data,
184 enum adxl355_op_mode op_mode)
188 if (data->op_mode == op_mode)
191 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
192 ADXL355_POWER_CTL_MODE_MSK, op_mode);
196 data->op_mode = op_mode;
201 static int adxl355_data_rdy_trigger_set_state(struct iio_trigger *trig,
204 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
205 struct adxl355_data *data = iio_priv(indio_dev);
208 mutex_lock(&data->lock);
209 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
210 ADXL355_POWER_CTL_DRDY_MSK,
211 FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK,
213 mutex_unlock(&data->lock);
218 static void adxl355_fill_3db_frequency_table(struct adxl355_data *data)
225 odr = mul_u64_u32_shr(adxl355_odr_table[data->odr][0], MEGA, 0) +
226 adxl355_odr_table[data->odr][1];
228 for (i = 0; i < ARRAY_SIZE(adxl355_hpf_3db_multipliers); i++) {
229 multiplier = adxl355_hpf_3db_multipliers[i];
230 div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0),
233 data->adxl355_hpf_3db_table[i][0] = div;
234 data->adxl355_hpf_3db_table[i][1] = div_u64(rem, MEGA * 100);
238 static int adxl355_setup(struct adxl355_data *data)
243 ret = regmap_read(data->regmap, ADXL355_DEVID_AD_REG, ®val);
247 if (regval != ADXL355_DEVID_AD_VAL) {
248 dev_err(data->dev, "Invalid ADI ID 0x%02x\n", regval);
252 ret = regmap_read(data->regmap, ADXL355_DEVID_MST_REG, ®val);
256 if (regval != ADXL355_DEVID_MST_VAL) {
257 dev_err(data->dev, "Invalid MEMS ID 0x%02x\n", regval);
261 ret = regmap_read(data->regmap, ADXL355_PARTID_REG, ®val);
265 if (regval != ADXL355_PARTID_VAL) {
266 dev_err(data->dev, "Invalid DEV ID 0x%02x\n", regval);
271 * Perform a software reset to make sure the device is in a consistent
272 * state after start-up.
274 ret = regmap_write(data->regmap, ADXL355_RESET_REG, ADXL355_RESET_CODE);
278 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
279 ADXL355_POWER_CTL_DRDY_MSK,
280 FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK, 1));
284 adxl355_fill_3db_frequency_table(data);
286 return adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
289 static int adxl355_get_temp_data(struct adxl355_data *data, u8 addr)
291 return regmap_bulk_read(data->regmap, addr, data->transf_buf, 2);
294 static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
298 ret = regmap_bulk_read(data->regmap, addr, data->transf_buf,
299 ARRAY_SIZE(data->transf_buf));
303 return get_unaligned_be24(data->transf_buf);
306 static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
307 const int val, const int val2)
311 for (i = 0; i < n; i++) {
312 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
319 static int adxl355_set_odr(struct adxl355_data *data,
320 enum adxl355_odr odr)
324 mutex_lock(&data->lock);
326 if (data->odr == odr) {
327 mutex_unlock(&data->lock);
331 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
335 ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
336 ADXL355_FILTER_ODR_MSK,
337 FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
342 adxl355_fill_3db_frequency_table(data);
344 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
348 mutex_unlock(&data->lock);
352 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
354 mutex_unlock(&data->lock);
358 static int adxl355_set_hpf_3db(struct adxl355_data *data,
359 enum adxl355_hpf_3db hpf)
363 mutex_lock(&data->lock);
365 if (data->hpf_3db == hpf) {
366 mutex_unlock(&data->lock);
370 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
374 ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
375 ADXL355_FILTER_HPF_MSK,
376 FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
382 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
386 mutex_unlock(&data->lock);
390 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
392 mutex_unlock(&data->lock);
396 static int adxl355_set_calibbias(struct adxl355_data *data,
397 enum adxl355_chans chan, int calibbias)
401 mutex_lock(&data->lock);
403 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
407 put_unaligned_be16(calibbias, data->transf_buf);
408 ret = regmap_bulk_write(data->regmap,
409 adxl355_chans[chan].offset_reg,
410 data->transf_buf, 2);
414 data->calibbias[chan] = calibbias;
416 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
420 mutex_unlock(&data->lock);
424 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
426 mutex_unlock(&data->lock);
430 static int adxl355_read_raw(struct iio_dev *indio_dev,
431 struct iio_chan_spec const *chan,
432 int *val, int *val2, long mask)
434 struct adxl355_data *data = iio_priv(indio_dev);
438 case IIO_CHAN_INFO_RAW:
439 switch (chan->type) {
441 ret = adxl355_get_temp_data(data, chan->address);
444 *val = get_unaligned_be16(data->transf_buf);
448 ret = adxl355_read_axis(data, adxl355_chans[
449 chan->address].data_reg);
452 *val = sign_extend32(ret >> chan->scan_type.shift,
453 chan->scan_type.realbits - 1);
459 case IIO_CHAN_INFO_SCALE:
460 switch (chan->type) {
462 * The datasheet defines an intercept of 1885 LSB at 25 degC
463 * and a slope of -9.05 LSB/C. The following formula can be used
464 * to find the temperature:
465 * Temp = ((RAW - 1885)/(-9.05)) + 25 but this doesn't follow
466 * the format of the IIO which is Temp = (RAW + OFFSET) * SCALE.
467 * Hence using some rearranging we get the scale as -110.497238
468 * and offset as -2111.25.
473 return IIO_VAL_INT_PLUS_MICRO;
475 * At +/- 2g with 20-bit resolution, scale is given in datasheet
476 * as 3.9ug/LSB = 0.0000039 * 9.80665 = 0.00003824593 m/s^2.
481 return IIO_VAL_INT_PLUS_NANO;
485 case IIO_CHAN_INFO_OFFSET:
488 return IIO_VAL_INT_PLUS_MICRO;
489 case IIO_CHAN_INFO_CALIBBIAS:
490 *val = sign_extend32(data->calibbias[chan->address], 15);
492 case IIO_CHAN_INFO_SAMP_FREQ:
493 *val = adxl355_odr_table[data->odr][0];
494 *val2 = adxl355_odr_table[data->odr][1];
495 return IIO_VAL_INT_PLUS_MICRO;
496 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
497 *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
498 *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
499 return IIO_VAL_INT_PLUS_MICRO;
505 static int adxl355_write_raw(struct iio_dev *indio_dev,
506 struct iio_chan_spec const *chan,
507 int val, int val2, long mask)
509 struct adxl355_data *data = iio_priv(indio_dev);
510 int odr_idx, hpf_idx, calibbias;
513 case IIO_CHAN_INFO_SAMP_FREQ:
514 odr_idx = adxl355_find_match(adxl355_odr_table,
515 ARRAY_SIZE(adxl355_odr_table),
520 return adxl355_set_odr(data, odr_idx);
521 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
522 hpf_idx = adxl355_find_match(data->adxl355_hpf_3db_table,
523 ARRAY_SIZE(data->adxl355_hpf_3db_table),
528 return adxl355_set_hpf_3db(data, hpf_idx);
529 case IIO_CHAN_INFO_CALIBBIAS:
530 calibbias = clamp_t(int, val, S16_MIN, S16_MAX);
532 return adxl355_set_calibbias(data, chan->address, calibbias);
538 static int adxl355_read_avail(struct iio_dev *indio_dev,
539 struct iio_chan_spec const *chan,
540 const int **vals, int *type, int *length,
543 struct adxl355_data *data = iio_priv(indio_dev);
546 case IIO_CHAN_INFO_SAMP_FREQ:
547 *vals = (const int *)adxl355_odr_table;
548 *type = IIO_VAL_INT_PLUS_MICRO;
549 /* Values are stored in a 2D matrix */
550 *length = ARRAY_SIZE(adxl355_odr_table) * 2;
552 return IIO_AVAIL_LIST;
553 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
554 *vals = (const int *)data->adxl355_hpf_3db_table;
555 *type = IIO_VAL_INT_PLUS_MICRO;
556 /* Values are stored in a 2D matrix */
557 *length = ARRAY_SIZE(data->adxl355_hpf_3db_table) * 2;
559 return IIO_AVAIL_LIST;
565 static const unsigned long adxl355_avail_scan_masks[] = {
570 static const struct iio_info adxl355_info = {
571 .read_raw = adxl355_read_raw,
572 .write_raw = adxl355_write_raw,
573 .read_avail = &adxl355_read_avail,
576 static const struct iio_trigger_ops adxl355_trigger_ops = {
577 .set_trigger_state = &adxl355_data_rdy_trigger_set_state,
578 .validate_device = &iio_trigger_validate_own_device,
581 static irqreturn_t adxl355_trigger_handler(int irq, void *p)
583 struct iio_poll_func *pf = p;
584 struct iio_dev *indio_dev = pf->indio_dev;
585 struct adxl355_data *data = iio_priv(indio_dev);
588 mutex_lock(&data->lock);
591 * data->buffer is used both for triggered buffer support
592 * and read/write_raw(), hence, it has to be zeroed here before usage.
594 data->buffer.buf[0] = 0;
597 * The acceleration data is 24 bits and big endian. It has to be saved
598 * in 32 bits, hence, it is saved in the 2nd byte of the 4 byte buffer.
599 * The buf array is 14 bytes as it includes 3x4=12 bytes for
600 * accelaration data of x, y, and z axis. It also includes 2 bytes for
603 ret = regmap_bulk_read(data->regmap, ADXL355_XDATA3_REG,
604 &data->buffer.buf[1], 3);
606 goto out_unlock_notify;
608 ret = regmap_bulk_read(data->regmap, ADXL355_YDATA3_REG,
609 &data->buffer.buf[5], 3);
611 goto out_unlock_notify;
613 ret = regmap_bulk_read(data->regmap, ADXL355_ZDATA3_REG,
614 &data->buffer.buf[9], 3);
616 goto out_unlock_notify;
618 ret = regmap_bulk_read(data->regmap, ADXL355_TEMP2_REG,
619 &data->buffer.buf[12], 2);
621 goto out_unlock_notify;
623 iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
627 mutex_unlock(&data->lock);
628 iio_trigger_notify_done(indio_dev->trig);
633 #define ADXL355_ACCEL_CHANNEL(index, reg, axis) { \
637 .channel2 = IIO_MOD_##axis, \
638 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
639 BIT(IIO_CHAN_INFO_CALIBBIAS), \
640 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
641 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
642 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
643 .info_mask_shared_by_type_available = \
644 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
645 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
646 .scan_index = index, \
652 .endianness = IIO_BE, \
656 static const struct iio_chan_spec adxl355_channels[] = {
657 ADXL355_ACCEL_CHANNEL(0, chan_x, X),
658 ADXL355_ACCEL_CHANNEL(1, chan_y, Y),
659 ADXL355_ACCEL_CHANNEL(2, chan_z, Z),
662 .address = ADXL355_TEMP2_REG,
663 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
664 BIT(IIO_CHAN_INFO_SCALE) |
665 BIT(IIO_CHAN_INFO_OFFSET),
671 .endianness = IIO_BE,
674 IIO_CHAN_SOFT_TIMESTAMP(4),
677 static int adxl355_probe_trigger(struct iio_dev *indio_dev, int irq)
679 struct adxl355_data *data = iio_priv(indio_dev);
682 data->dready_trig = devm_iio_trigger_alloc(data->dev, "%s-dev%d",
684 iio_device_id(indio_dev));
685 if (!data->dready_trig)
688 data->dready_trig->ops = &adxl355_trigger_ops;
689 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
691 ret = devm_request_irq(data->dev, irq,
692 &iio_trigger_generic_data_rdy_poll,
693 IRQF_ONESHOT, "adxl355_irq", data->dready_trig);
695 return dev_err_probe(data->dev, ret, "request irq %d failed\n",
698 ret = devm_iio_trigger_register(data->dev, data->dready_trig);
700 dev_err(data->dev, "iio trigger register failed\n");
704 indio_dev->trig = iio_trigger_get(data->dready_trig);
709 int adxl355_core_probe(struct device *dev, struct regmap *regmap,
712 struct adxl355_data *data;
713 struct iio_dev *indio_dev;
717 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
721 data = iio_priv(indio_dev);
722 data->regmap = regmap;
724 data->op_mode = ADXL355_STANDBY;
725 mutex_init(&data->lock);
727 indio_dev->name = name;
728 indio_dev->info = &adxl355_info;
729 indio_dev->modes = INDIO_DIRECT_MODE;
730 indio_dev->channels = adxl355_channels;
731 indio_dev->num_channels = ARRAY_SIZE(adxl355_channels);
732 indio_dev->available_scan_masks = adxl355_avail_scan_masks;
734 ret = adxl355_setup(data);
736 dev_err(dev, "ADXL355 setup failed\n");
740 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
741 &iio_pollfunc_store_time,
742 &adxl355_trigger_handler, NULL);
744 dev_err(dev, "iio triggered buffer setup failed\n");
749 * TODO: Would be good to move it to the generic version.
751 irq = of_irq_get_byname(dev->of_node, "DRDY");
753 ret = adxl355_probe_trigger(indio_dev, irq);
758 return devm_iio_device_register(dev, indio_dev);
760 EXPORT_SYMBOL_NS_GPL(adxl355_core_probe, IIO_ADXL355);
762 MODULE_AUTHOR("Puranjay Mohan <puranjay12@gmail.com>");
763 MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer core driver");
764 MODULE_LICENSE("GPL v2");