1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This contains all required hardware related helper functions for
4 * Trace Buffer Extension (TRBE) driver in the coresight framework.
6 * Copyright (C) 2020 ARM Ltd.
8 * Author: Anshuman Khandual <anshuman.khandual@arm.com>
10 #include <linux/coresight.h>
11 #include <linux/device.h>
12 #include <linux/irq.h>
13 #include <linux/kernel.h>
15 #include <linux/platform_device.h>
16 #include <linux/smp.h>
18 #include "coresight-etm-perf.h"
20 static inline bool is_trbe_available(void)
22 u64 aa64dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1);
23 unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0,
24 ID_AA64DFR0_EL1_TraceBuffer_SHIFT);
26 return trbe >= ID_AA64DFR0_EL1_TraceBuffer_IMP;
29 static inline bool is_trbe_enabled(void)
31 u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
33 return trblimitr & TRBLIMITR_EL1_E;
36 #define TRBE_EC_OTHERS 0
37 #define TRBE_EC_STAGE1_ABORT 36
38 #define TRBE_EC_STAGE2_ABORT 37
40 static inline int get_trbe_ec(u64 trbsr)
42 return (trbsr & TRBSR_EL1_EC_MASK) >> TRBSR_EL1_EC_SHIFT;
45 #define TRBE_BSC_NOT_STOPPED 0
46 #define TRBE_BSC_FILLED 1
47 #define TRBE_BSC_TRIGGERED 2
49 static inline int get_trbe_bsc(u64 trbsr)
51 return (trbsr & TRBSR_EL1_BSC_MASK) >> TRBSR_EL1_BSC_SHIFT;
54 static inline void clr_trbe_irq(void)
56 u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1);
58 trbsr &= ~TRBSR_EL1_IRQ;
59 write_sysreg_s(trbsr, SYS_TRBSR_EL1);
62 static inline bool is_trbe_irq(u64 trbsr)
64 return trbsr & TRBSR_EL1_IRQ;
67 static inline bool is_trbe_trg(u64 trbsr)
69 return trbsr & TRBSR_EL1_TRG;
72 static inline bool is_trbe_wrap(u64 trbsr)
74 return trbsr & TRBSR_EL1_WRAP;
77 static inline bool is_trbe_abort(u64 trbsr)
79 return trbsr & TRBSR_EL1_EA;
82 static inline bool is_trbe_running(u64 trbsr)
84 return !(trbsr & TRBSR_EL1_S);
87 static inline bool get_trbe_flag_update(u64 trbidr)
89 return trbidr & TRBIDR_EL1_F;
92 static inline bool is_trbe_programmable(u64 trbidr)
94 return !(trbidr & TRBIDR_EL1_P);
97 static inline int get_trbe_address_align(u64 trbidr)
99 return (trbidr & TRBIDR_EL1_Align_MASK) >> TRBIDR_EL1_Align_SHIFT;
102 static inline unsigned long get_trbe_write_pointer(void)
104 return read_sysreg_s(SYS_TRBPTR_EL1);
107 static inline void set_trbe_write_pointer(unsigned long addr)
109 WARN_ON(is_trbe_enabled());
110 write_sysreg_s(addr, SYS_TRBPTR_EL1);
113 static inline unsigned long get_trbe_limit_pointer(void)
115 u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
116 unsigned long addr = trblimitr & TRBLIMITR_EL1_LIMIT_MASK;
118 WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE));
122 static inline unsigned long get_trbe_base_pointer(void)
124 u64 trbbaser = read_sysreg_s(SYS_TRBBASER_EL1);
125 unsigned long addr = trbbaser & TRBBASER_EL1_BASE_MASK;
127 WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE));
131 static inline void set_trbe_base_pointer(unsigned long addr)
133 WARN_ON(is_trbe_enabled());
134 WARN_ON(!IS_ALIGNED(addr, (1UL << TRBBASER_EL1_BASE_SHIFT)));
135 WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE));
136 write_sysreg_s(addr, SYS_TRBBASER_EL1);