1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * pmbus.h - Common defines and structures for PMBus devices
5 * Copyright (c) 2010, 2011 Ericsson AB.
6 * Copyright (c) 2012 Guenter Roeck
12 #include <linux/bitops.h>
13 #include <linux/regulator/driver.h>
20 PMBUS_OPERATION = 0x01,
21 PMBUS_ON_OFF_CONFIG = 0x02,
22 PMBUS_CLEAR_FAULTS = 0x03,
25 PMBUS_WRITE_PROTECT = 0x10,
27 PMBUS_CAPABILITY = 0x19,
30 PMBUS_VOUT_MODE = 0x20,
31 PMBUS_VOUT_COMMAND = 0x21,
32 PMBUS_VOUT_TRIM = 0x22,
33 PMBUS_VOUT_CAL_OFFSET = 0x23,
34 PMBUS_VOUT_MAX = 0x24,
35 PMBUS_VOUT_MARGIN_HIGH = 0x25,
36 PMBUS_VOUT_MARGIN_LOW = 0x26,
37 PMBUS_VOUT_TRANSITION_RATE = 0x27,
38 PMBUS_VOUT_DROOP = 0x28,
39 PMBUS_VOUT_SCALE_LOOP = 0x29,
40 PMBUS_VOUT_SCALE_MONITOR = 0x2A,
42 PMBUS_COEFFICIENTS = 0x30,
43 PMBUS_POUT_MAX = 0x31,
45 PMBUS_FAN_CONFIG_12 = 0x3A,
46 PMBUS_FAN_COMMAND_1 = 0x3B,
47 PMBUS_FAN_COMMAND_2 = 0x3C,
48 PMBUS_FAN_CONFIG_34 = 0x3D,
49 PMBUS_FAN_COMMAND_3 = 0x3E,
50 PMBUS_FAN_COMMAND_4 = 0x3F,
52 PMBUS_VOUT_OV_FAULT_LIMIT = 0x40,
53 PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41,
54 PMBUS_VOUT_OV_WARN_LIMIT = 0x42,
55 PMBUS_VOUT_UV_WARN_LIMIT = 0x43,
56 PMBUS_VOUT_UV_FAULT_LIMIT = 0x44,
57 PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45,
58 PMBUS_IOUT_OC_FAULT_LIMIT = 0x46,
59 PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47,
60 PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48,
61 PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49,
62 PMBUS_IOUT_OC_WARN_LIMIT = 0x4A,
63 PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B,
64 PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C,
66 PMBUS_OT_FAULT_LIMIT = 0x4F,
67 PMBUS_OT_FAULT_RESPONSE = 0x50,
68 PMBUS_OT_WARN_LIMIT = 0x51,
69 PMBUS_UT_WARN_LIMIT = 0x52,
70 PMBUS_UT_FAULT_LIMIT = 0x53,
71 PMBUS_UT_FAULT_RESPONSE = 0x54,
72 PMBUS_VIN_OV_FAULT_LIMIT = 0x55,
73 PMBUS_VIN_OV_FAULT_RESPONSE = 0x56,
74 PMBUS_VIN_OV_WARN_LIMIT = 0x57,
75 PMBUS_VIN_UV_WARN_LIMIT = 0x58,
76 PMBUS_VIN_UV_FAULT_LIMIT = 0x59,
78 PMBUS_IIN_OC_FAULT_LIMIT = 0x5B,
79 PMBUS_IIN_OC_WARN_LIMIT = 0x5D,
81 PMBUS_POUT_OP_FAULT_LIMIT = 0x68,
82 PMBUS_POUT_OP_WARN_LIMIT = 0x6A,
83 PMBUS_PIN_OP_WARN_LIMIT = 0x6B,
85 PMBUS_STATUS_BYTE = 0x78,
86 PMBUS_STATUS_WORD = 0x79,
87 PMBUS_STATUS_VOUT = 0x7A,
88 PMBUS_STATUS_IOUT = 0x7B,
89 PMBUS_STATUS_INPUT = 0x7C,
90 PMBUS_STATUS_TEMPERATURE = 0x7D,
91 PMBUS_STATUS_CML = 0x7E,
92 PMBUS_STATUS_OTHER = 0x7F,
93 PMBUS_STATUS_MFR_SPECIFIC = 0x80,
94 PMBUS_STATUS_FAN_12 = 0x81,
95 PMBUS_STATUS_FAN_34 = 0x82,
97 PMBUS_READ_VIN = 0x88,
98 PMBUS_READ_IIN = 0x89,
99 PMBUS_READ_VCAP = 0x8A,
100 PMBUS_READ_VOUT = 0x8B,
101 PMBUS_READ_IOUT = 0x8C,
102 PMBUS_READ_TEMPERATURE_1 = 0x8D,
103 PMBUS_READ_TEMPERATURE_2 = 0x8E,
104 PMBUS_READ_TEMPERATURE_3 = 0x8F,
105 PMBUS_READ_FAN_SPEED_1 = 0x90,
106 PMBUS_READ_FAN_SPEED_2 = 0x91,
107 PMBUS_READ_FAN_SPEED_3 = 0x92,
108 PMBUS_READ_FAN_SPEED_4 = 0x93,
109 PMBUS_READ_DUTY_CYCLE = 0x94,
110 PMBUS_READ_FREQUENCY = 0x95,
111 PMBUS_READ_POUT = 0x96,
112 PMBUS_READ_PIN = 0x97,
114 PMBUS_REVISION = 0x98,
116 PMBUS_MFR_MODEL = 0x9A,
117 PMBUS_MFR_REVISION = 0x9B,
118 PMBUS_MFR_LOCATION = 0x9C,
119 PMBUS_MFR_DATE = 0x9D,
120 PMBUS_MFR_SERIAL = 0x9E,
124 * Useful to support attributes which are not supported by standard PMBus
125 * registers but exist as manufacturer specific registers on individual chips.
126 * Must be mapped to real registers in device specific code.
129 * Virtual registers are all word size.
130 * READ registers are read-only; writes are either ignored or return an error.
131 * RESET registers are read/write. Reading reset registers returns zero
132 * (used for detection), writing any value causes the associated history to be
134 * Virtual registers have to be handled in device specific driver code. Chip
135 * driver code returns non-negative register values if a virtual register is
136 * supported, or a negative error code if not. The chip driver may return
137 * -ENODATA or any other error code in this case, though an error code other
138 * than -ENODATA is handled more efficiently and thus preferred. Either case,
139 * the calling PMBus core code will abort if the chip driver returns an error
140 * code when reading or writing virtual registers.
142 PMBUS_VIRT_BASE = 0x100,
143 PMBUS_VIRT_READ_TEMP_AVG,
144 PMBUS_VIRT_READ_TEMP_MIN,
145 PMBUS_VIRT_READ_TEMP_MAX,
146 PMBUS_VIRT_RESET_TEMP_HISTORY,
147 PMBUS_VIRT_READ_VIN_AVG,
148 PMBUS_VIRT_READ_VIN_MIN,
149 PMBUS_VIRT_READ_VIN_MAX,
150 PMBUS_VIRT_RESET_VIN_HISTORY,
151 PMBUS_VIRT_READ_IIN_AVG,
152 PMBUS_VIRT_READ_IIN_MIN,
153 PMBUS_VIRT_READ_IIN_MAX,
154 PMBUS_VIRT_RESET_IIN_HISTORY,
155 PMBUS_VIRT_READ_PIN_AVG,
156 PMBUS_VIRT_READ_PIN_MIN,
157 PMBUS_VIRT_READ_PIN_MAX,
158 PMBUS_VIRT_RESET_PIN_HISTORY,
159 PMBUS_VIRT_READ_POUT_AVG,
160 PMBUS_VIRT_READ_POUT_MIN,
161 PMBUS_VIRT_READ_POUT_MAX,
162 PMBUS_VIRT_RESET_POUT_HISTORY,
163 PMBUS_VIRT_READ_VOUT_AVG,
164 PMBUS_VIRT_READ_VOUT_MIN,
165 PMBUS_VIRT_READ_VOUT_MAX,
166 PMBUS_VIRT_RESET_VOUT_HISTORY,
167 PMBUS_VIRT_READ_IOUT_AVG,
168 PMBUS_VIRT_READ_IOUT_MIN,
169 PMBUS_VIRT_READ_IOUT_MAX,
170 PMBUS_VIRT_RESET_IOUT_HISTORY,
171 PMBUS_VIRT_READ_TEMP2_AVG,
172 PMBUS_VIRT_READ_TEMP2_MIN,
173 PMBUS_VIRT_READ_TEMP2_MAX,
174 PMBUS_VIRT_RESET_TEMP2_HISTORY,
176 PMBUS_VIRT_READ_VMON,
177 PMBUS_VIRT_VMON_UV_WARN_LIMIT,
178 PMBUS_VIRT_VMON_OV_WARN_LIMIT,
179 PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
180 PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
181 PMBUS_VIRT_STATUS_VMON,
184 * RPM and PWM Fan control
186 * Drivers wanting to expose PWM control must define the behaviour of
187 * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
188 * {read,write}_word_data callback.
190 * pmbus core provides a default implementation for
191 * PMBUS_VIRT_FAN_TARGET_[1-4].
193 * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
194 * pmbus core uses the difference between the provided register and
195 * it's _1 counterpart to calculate the FAN/PWM ID.
197 PMBUS_VIRT_FAN_TARGET_1,
198 PMBUS_VIRT_FAN_TARGET_2,
199 PMBUS_VIRT_FAN_TARGET_3,
200 PMBUS_VIRT_FAN_TARGET_4,
205 PMBUS_VIRT_PWM_ENABLE_1,
206 PMBUS_VIRT_PWM_ENABLE_2,
207 PMBUS_VIRT_PWM_ENABLE_3,
208 PMBUS_VIRT_PWM_ENABLE_4,
210 /* Samples for average
212 * Drivers wanting to expose functionality for changing the number of
213 * samples used for average values should implement support in
214 * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
215 * applies to all types of measurements, or any number of specific
216 * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
219 PMBUS_VIRT_IN_SAMPLES,
220 PMBUS_VIRT_CURR_SAMPLES,
221 PMBUS_VIRT_POWER_SAMPLES,
222 PMBUS_VIRT_TEMP_SAMPLES,
228 #define PB_OPERATION_CONTROL_ON BIT(7)
233 #define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */
234 #define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */
235 #define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
237 #define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
242 #define PB_CAPABILITY_SMBALERT BIT(4)
243 #define PB_CAPABILITY_ERROR_CHECK BIT(7)
248 #define PB_VOUT_MODE_MODE_MASK 0xe0
249 #define PB_VOUT_MODE_PARAM_MASK 0x1f
251 #define PB_VOUT_MODE_LINEAR 0x00
252 #define PB_VOUT_MODE_VID 0x20
253 #define PB_VOUT_MODE_DIRECT 0x40
258 #define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1))
259 #define PB_FAN_2_RPM BIT(2)
260 #define PB_FAN_2_INSTALLED BIT(3)
261 #define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5))
262 #define PB_FAN_1_RPM BIT(6)
263 #define PB_FAN_1_INSTALLED BIT(7)
265 enum pmbus_fan_mode { percent = 0, rpm };
268 * STATUS_BYTE, STATUS_WORD (lower)
270 #define PB_STATUS_NONE_ABOVE BIT(0)
271 #define PB_STATUS_CML BIT(1)
272 #define PB_STATUS_TEMPERATURE BIT(2)
273 #define PB_STATUS_VIN_UV BIT(3)
274 #define PB_STATUS_IOUT_OC BIT(4)
275 #define PB_STATUS_VOUT_OV BIT(5)
276 #define PB_STATUS_OFF BIT(6)
277 #define PB_STATUS_BUSY BIT(7)
280 * STATUS_WORD (upper)
282 #define PB_STATUS_UNKNOWN BIT(8)
283 #define PB_STATUS_OTHER BIT(9)
284 #define PB_STATUS_FANS BIT(10)
285 #define PB_STATUS_POWER_GOOD_N BIT(11)
286 #define PB_STATUS_WORD_MFR BIT(12)
287 #define PB_STATUS_INPUT BIT(13)
288 #define PB_STATUS_IOUT_POUT BIT(14)
289 #define PB_STATUS_VOUT BIT(15)
294 #define PB_POUT_OP_WARNING BIT(0)
295 #define PB_POUT_OP_FAULT BIT(1)
296 #define PB_POWER_LIMITING BIT(2)
297 #define PB_CURRENT_SHARE_FAULT BIT(3)
298 #define PB_IOUT_UC_FAULT BIT(4)
299 #define PB_IOUT_OC_WARNING BIT(5)
300 #define PB_IOUT_OC_LV_FAULT BIT(6)
301 #define PB_IOUT_OC_FAULT BIT(7)
304 * STATUS_VOUT, STATUS_INPUT
306 #define PB_VOLTAGE_UV_FAULT BIT(4)
307 #define PB_VOLTAGE_UV_WARNING BIT(5)
308 #define PB_VOLTAGE_OV_WARNING BIT(6)
309 #define PB_VOLTAGE_OV_FAULT BIT(7)
314 #define PB_PIN_OP_WARNING BIT(0)
315 #define PB_IIN_OC_WARNING BIT(1)
316 #define PB_IIN_OC_FAULT BIT(2)
321 #define PB_TEMP_UT_FAULT BIT(4)
322 #define PB_TEMP_UT_WARNING BIT(5)
323 #define PB_TEMP_OT_WARNING BIT(6)
324 #define PB_TEMP_OT_FAULT BIT(7)
329 #define PB_FAN_AIRFLOW_WARNING BIT(0)
330 #define PB_FAN_AIRFLOW_FAULT BIT(1)
331 #define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2)
332 #define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3)
333 #define PB_FAN_FAN2_WARNING BIT(4)
334 #define PB_FAN_FAN1_WARNING BIT(5)
335 #define PB_FAN_FAN2_FAULT BIT(6)
336 #define PB_FAN_FAN1_FAULT BIT(7)
341 #define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0)
342 #define PB_CML_FAULT_OTHER_COMM BIT(1)
343 #define PB_CML_FAULT_PROCESSOR BIT(3)
344 #define PB_CML_FAULT_MEMORY BIT(4)
345 #define PB_CML_FAULT_PACKET_ERROR BIT(5)
346 #define PB_CML_FAULT_INVALID_DATA BIT(6)
347 #define PB_CML_FAULT_INVALID_COMMAND BIT(7)
349 enum pmbus_sensor_classes {
358 PSC_NUM_CLASSES /* Number of power sensor classes */
361 #define PMBUS_PAGES 32 /* Per PMBus specification */
363 /* Functionality bit mask */
364 #define PMBUS_HAVE_VIN BIT(0)
365 #define PMBUS_HAVE_VCAP BIT(1)
366 #define PMBUS_HAVE_VOUT BIT(2)
367 #define PMBUS_HAVE_IIN BIT(3)
368 #define PMBUS_HAVE_IOUT BIT(4)
369 #define PMBUS_HAVE_PIN BIT(5)
370 #define PMBUS_HAVE_POUT BIT(6)
371 #define PMBUS_HAVE_FAN12 BIT(7)
372 #define PMBUS_HAVE_FAN34 BIT(8)
373 #define PMBUS_HAVE_TEMP BIT(9)
374 #define PMBUS_HAVE_TEMP2 BIT(10)
375 #define PMBUS_HAVE_TEMP3 BIT(11)
376 #define PMBUS_HAVE_STATUS_VOUT BIT(12)
377 #define PMBUS_HAVE_STATUS_IOUT BIT(13)
378 #define PMBUS_HAVE_STATUS_INPUT BIT(14)
379 #define PMBUS_HAVE_STATUS_TEMP BIT(15)
380 #define PMBUS_HAVE_STATUS_FAN12 BIT(16)
381 #define PMBUS_HAVE_STATUS_FAN34 BIT(17)
382 #define PMBUS_HAVE_VMON BIT(18)
383 #define PMBUS_HAVE_STATUS_VMON BIT(19)
384 #define PMBUS_HAVE_PWM12 BIT(20)
385 #define PMBUS_HAVE_PWM34 BIT(21)
386 #define PMBUS_HAVE_SAMPLES BIT(22)
388 #define PMBUS_PAGE_VIRTUAL BIT(31)
390 enum pmbus_data_format { linear = 0, direct, vid };
391 enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
393 struct pmbus_driver_info {
394 int pages; /* Total number of pages */
395 enum pmbus_data_format format[PSC_NUM_CLASSES];
396 enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
398 * Support one set of coefficients for each sensor type
399 * Used for chips providing data in direct mode.
401 int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */
402 int b[PSC_NUM_CLASSES]; /* offset */
403 int R[PSC_NUM_CLASSES]; /* exponent */
405 u32 func[PMBUS_PAGES]; /* Functionality, per page */
407 * The following functions map manufacturing specific register values
408 * to PMBus standard register values. Specify only if mapping is
410 * Functions return the register value (read) or zero (write) if
411 * successful. A return value of -ENODATA indicates that there is no
412 * manufacturer specific register, but that a standard PMBus register
413 * may exist. Any other negative return value indicates that the
414 * register does not exist, and that no attempt should be made to read
415 * the standard register.
417 int (*read_byte_data)(struct i2c_client *client, int page, int reg);
418 int (*read_word_data)(struct i2c_client *client, int page, int reg);
419 int (*write_word_data)(struct i2c_client *client, int page, int reg,
421 int (*write_byte)(struct i2c_client *client, int page, u8 value);
423 * The identify function determines supported PMBus functionality.
424 * This function is only necessary if a chip driver supports multiple
425 * chips, and the chip functionality is not pre-determined.
427 int (*identify)(struct i2c_client *client,
428 struct pmbus_driver_info *info);
430 /* Regulator functionality, if supported by this chip driver. */
432 const struct regulator_desc *reg_desc;
434 /* custom attributes */
435 const struct attribute_group **groups;
440 extern const struct regulator_ops pmbus_regulator_ops;
442 /* Macro for filling in array of struct regulator_desc */
443 #define PMBUS_REGULATOR(_name, _id) \
445 .name = (_name # _id), \
447 .of_match = of_match_ptr(_name # _id), \
448 .regulators_node = of_match_ptr("regulators"), \
449 .ops = &pmbus_regulator_ops, \
450 .type = REGULATOR_VOLTAGE, \
451 .owner = THIS_MODULE, \
454 /* Function declarations */
456 void pmbus_clear_cache(struct i2c_client *client);
457 int pmbus_set_page(struct i2c_client *client, int page);
458 int pmbus_read_word_data(struct i2c_client *client, int page, u8 reg);
459 int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, u16 word);
460 int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
461 int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
462 int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
464 int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
466 void pmbus_clear_faults(struct i2c_client *client);
467 bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
468 bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
469 int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id,
470 struct pmbus_driver_info *info);
471 int pmbus_do_remove(struct i2c_client *client);
472 const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
474 int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
475 enum pmbus_fan_mode mode);
476 int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
477 enum pmbus_fan_mode mode);
478 int pmbus_update_fan(struct i2c_client *client, int page, int id,
479 u8 config, u8 mask, u16 command);
480 struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);