1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * nct7904.c - driver for Nuvoton NCT7904D.
5 * Copyright (c) 2015 Kontron
6 * Author: Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>
8 * Copyright (c) 2019 Advantech
9 * Author: Amy.Shih <amy.shih@advantech.com.tw>
12 #include <linux/module.h>
13 #include <linux/device.h>
14 #include <linux/init.h>
15 #include <linux/i2c.h>
16 #include <linux/mutex.h>
17 #include <linux/hwmon.h>
19 #define VENDOR_ID_REG 0x7A /* Any bank */
20 #define NUVOTON_ID 0x50
21 #define CHIP_ID_REG 0x7B /* Any bank */
22 #define NCT7904_ID 0xC5
23 #define DEVICE_ID_REG 0x7C /* Any bank */
25 #define BANK_SEL_REG 0xFF
33 #define FANIN_MAX 12 /* Counted from 1 */
34 #define VSEN_MAX 21 /* VSEN1..14, 3VDD, VBAT, V3VSB,
35 LTD (not a voltage), VSEN17..19 */
36 #define FANCTL_MAX 4 /* Counted from 1 */
37 #define TCPU_MAX 8 /* Counted from 1 */
38 #define TEMP_MAX 4 /* Counted from 1 */
40 #define VT_ADC_CTRL0_REG 0x20 /* Bank 0 */
41 #define VT_ADC_CTRL1_REG 0x21 /* Bank 0 */
42 #define VT_ADC_CTRL2_REG 0x22 /* Bank 0 */
43 #define FANIN_CTRL0_REG 0x24
44 #define FANIN_CTRL1_REG 0x25
45 #define DTS_T_CTRL0_REG 0x26
46 #define DTS_T_CTRL1_REG 0x27
47 #define VT_ADC_MD_REG 0x2E
49 #define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
50 #define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
51 #define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
52 #define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
53 #define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
55 #define PRTS_REG 0x03 /* Bank 2 */
56 #define PFE_REG 0x00 /* Bank 2; PECI Function Enable */
57 #define TSI_CTRL_REG 0x50 /* Bank 2; TSI Control Register */
58 #define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
59 #define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
61 static const unsigned short normal_i2c[] = {
62 0x2d, 0x2e, I2C_CLIENT_END
66 struct i2c_client *client;
67 struct mutex bank_lock;
72 u8 fan_mode[FANCTL_MAX];
77 /* Access functions */
78 static int nct7904_bank_lock(struct nct7904_data *data, unsigned int bank)
82 mutex_lock(&data->bank_lock);
83 if (data->bank_sel == bank)
85 ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank);
87 data->bank_sel = bank;
93 static inline void nct7904_bank_release(struct nct7904_data *data)
95 mutex_unlock(&data->bank_lock);
98 /* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */
99 static int nct7904_read_reg(struct nct7904_data *data,
100 unsigned int bank, unsigned int reg)
102 struct i2c_client *client = data->client;
105 ret = nct7904_bank_lock(data, bank);
107 ret = i2c_smbus_read_byte_data(client, reg);
109 nct7904_bank_release(data);
114 * Read 2-byte register. Returns register in big-endian format or
117 static int nct7904_read_reg16(struct nct7904_data *data,
118 unsigned int bank, unsigned int reg)
120 struct i2c_client *client = data->client;
123 ret = nct7904_bank_lock(data, bank);
125 ret = i2c_smbus_read_byte_data(client, reg);
128 ret = i2c_smbus_read_byte_data(client, reg + 1);
134 nct7904_bank_release(data);
138 /* Write 1-byte register. Returns 0 or -ERRNO on error. */
139 static int nct7904_write_reg(struct nct7904_data *data,
140 unsigned int bank, unsigned int reg, u8 val)
142 struct i2c_client *client = data->client;
145 ret = nct7904_bank_lock(data, bank);
147 ret = i2c_smbus_write_byte_data(client, reg, val);
149 nct7904_bank_release(data);
153 static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
156 struct nct7904_data *data = dev_get_drvdata(dev);
157 unsigned int cnt, rpm;
161 case hwmon_fan_input:
162 ret = nct7904_read_reg16(data, BANK_0,
163 FANIN1_HV_REG + channel * 2);
166 cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
178 static umode_t nct7904_fan_is_visible(const void *_data, u32 attr, int channel)
180 const struct nct7904_data *data = _data;
182 if (attr == hwmon_fan_input && data->fanin_mask & (1 << channel))
187 static u8 nct7904_chan_to_index[] = {
189 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
193 static int nct7904_read_in(struct device *dev, u32 attr, int channel,
196 struct nct7904_data *data = dev_get_drvdata(dev);
197 int ret, volt, index;
199 index = nct7904_chan_to_index[channel];
203 ret = nct7904_read_reg16(data, BANK_0,
204 VSEN1_HV_REG + index * 2);
207 volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
209 volt *= 2; /* 0.002V scale */
211 volt *= 6; /* 0.006V scale */
219 static umode_t nct7904_in_is_visible(const void *_data, u32 attr, int channel)
221 const struct nct7904_data *data = _data;
222 int index = nct7904_chan_to_index[channel];
224 if (channel > 0 && attr == hwmon_in_input &&
225 (data->vsen_mask & BIT(index)))
231 static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
234 struct nct7904_data *data = dev_get_drvdata(dev);
238 case hwmon_temp_input:
240 ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG);
241 else if (channel < 5)
242 ret = nct7904_read_reg16(data, BANK_0,
243 TEMP_CH1_HV_REG + channel * 4);
245 ret = nct7904_read_reg16(data, BANK_0,
246 T_CPU1_HV_REG + (channel - 5)
250 temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
251 *val = sign_extend32(temp, 10) * 125;
258 static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
260 const struct nct7904_data *data = _data;
262 if (attr == hwmon_temp_input) {
264 if (data->tcpu_mask & BIT(channel))
267 if (data->has_dts & BIT(channel - 5))
275 static int nct7904_read_pwm(struct device *dev, u32 attr, int channel,
278 struct nct7904_data *data = dev_get_drvdata(dev);
282 case hwmon_pwm_input:
283 ret = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + channel);
288 case hwmon_pwm_enable:
289 ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + channel);
300 static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
303 struct nct7904_data *data = dev_get_drvdata(dev);
307 case hwmon_pwm_input:
308 if (val < 0 || val > 255)
310 ret = nct7904_write_reg(data, BANK_3, FANCTL1_OUT_REG + channel,
313 case hwmon_pwm_enable:
314 if (val < 1 || val > 2 ||
315 (val == 2 && !data->fan_mode[channel]))
317 ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + channel,
318 val == 2 ? data->fan_mode[channel] : 0);
325 static umode_t nct7904_pwm_is_visible(const void *_data, u32 attr, int channel)
328 case hwmon_pwm_input:
329 case hwmon_pwm_enable:
336 static int nct7904_read(struct device *dev, enum hwmon_sensor_types type,
337 u32 attr, int channel, long *val)
341 return nct7904_read_in(dev, attr, channel, val);
343 return nct7904_read_fan(dev, attr, channel, val);
345 return nct7904_read_pwm(dev, attr, channel, val);
347 return nct7904_read_temp(dev, attr, channel, val);
353 static int nct7904_write(struct device *dev, enum hwmon_sensor_types type,
354 u32 attr, int channel, long val)
358 return nct7904_write_pwm(dev, attr, channel, val);
364 static umode_t nct7904_is_visible(const void *data,
365 enum hwmon_sensor_types type,
366 u32 attr, int channel)
370 return nct7904_in_is_visible(data, attr, channel);
372 return nct7904_fan_is_visible(data, attr, channel);
374 return nct7904_pwm_is_visible(data, attr, channel);
376 return nct7904_temp_is_visible(data, attr, channel);
382 /* Return 0 if detection is successful, -ENODEV otherwise */
383 static int nct7904_detect(struct i2c_client *client,
384 struct i2c_board_info *info)
386 struct i2c_adapter *adapter = client->adapter;
388 if (!i2c_check_functionality(adapter,
389 I2C_FUNC_SMBUS_READ_BYTE |
390 I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
393 /* Determine the chip type. */
394 if (i2c_smbus_read_byte_data(client, VENDOR_ID_REG) != NUVOTON_ID ||
395 i2c_smbus_read_byte_data(client, CHIP_ID_REG) != NCT7904_ID ||
396 (i2c_smbus_read_byte_data(client, DEVICE_ID_REG) & 0xf0) != 0x50 ||
397 (i2c_smbus_read_byte_data(client, BANK_SEL_REG) & 0xf8) != 0x00)
400 strlcpy(info->type, "nct7904", I2C_NAME_SIZE);
405 static const struct hwmon_channel_info *nct7904_info[] = {
406 HWMON_CHANNEL_INFO(in,
407 HWMON_I_INPUT, /* dummy, skipped in is_visible */
428 HWMON_CHANNEL_INFO(fan,
437 HWMON_CHANNEL_INFO(pwm,
438 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
439 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
440 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
441 HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
442 HWMON_CHANNEL_INFO(temp,
455 static const struct hwmon_ops nct7904_hwmon_ops = {
456 .is_visible = nct7904_is_visible,
457 .read = nct7904_read,
458 .write = nct7904_write,
461 static const struct hwmon_chip_info nct7904_chip_info = {
462 .ops = &nct7904_hwmon_ops,
463 .info = nct7904_info,
466 static int nct7904_probe(struct i2c_client *client,
467 const struct i2c_device_id *id)
469 struct nct7904_data *data;
470 struct device *hwmon_dev;
471 struct device *dev = &client->dev;
476 data = devm_kzalloc(dev, sizeof(struct nct7904_data), GFP_KERNEL);
480 data->client = client;
481 mutex_init(&data->bank_lock);
484 /* Setup sensor groups. */
485 /* FANIN attributes */
486 ret = nct7904_read_reg16(data, BANK_0, FANIN_CTRL0_REG);
489 data->fanin_mask = (ret >> 8) | ((ret & 0xff) << 8);
494 * Note: voltage sensors overlap with external temperature
495 * sensors. So, if we ever decide to support the latter
496 * we will have to adjust 'vsen_mask' accordingly.
499 ret = nct7904_read_reg16(data, BANK_0, VT_ADC_CTRL0_REG);
501 mask = (ret >> 8) | ((ret & 0xff) << 8);
502 ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
505 data->vsen_mask = mask;
507 /* CPU_TEMP attributes */
508 ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL0_REG);
512 if ((ret & 0x6) == 0x6)
513 data->tcpu_mask |= 1; /* TR1 */
514 if ((ret & 0x18) == 0x18)
515 data->tcpu_mask |= 2; /* TR2 */
516 if ((ret & 0x20) == 0x20)
517 data->tcpu_mask |= 4; /* TR3 */
518 if ((ret & 0x80) == 0x80)
519 data->tcpu_mask |= 8; /* TR4 */
522 ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
525 if ((ret & 0x02) == 0x02)
526 data->tcpu_mask |= 0x10;
528 /* Multi-Function detecting for Volt and TR/TD */
529 ret = nct7904_read_reg(data, BANK_0, VT_ADC_MD_REG);
533 for (i = 0; i < 4; i++) {
534 val = (ret & (0x03 << i)) >> (i * 2);
537 data->tcpu_mask &= ~bit;
541 ret = nct7904_read_reg(data, BANK_2, PFE_REG);
545 data->enable_dts = 1; /* Enable DTS & PECI */
547 ret = nct7904_read_reg(data, BANK_2, TSI_CTRL_REG);
551 data->enable_dts = 0x3; /* Enable DTS & TSI */
554 /* Check DTS enable status */
555 if (data->enable_dts) {
556 ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL0_REG);
559 data->has_dts = ret & 0xF;
560 if (data->enable_dts & 0x2) {
561 ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL1_REG);
564 data->has_dts |= (ret & 0xF) << 4;
568 for (i = 0; i < FANCTL_MAX; i++) {
569 ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + i);
572 data->fan_mode[i] = ret;
576 devm_hwmon_device_register_with_info(dev, client->name, data,
577 &nct7904_chip_info, NULL);
578 return PTR_ERR_OR_ZERO(hwmon_dev);
581 static const struct i2c_device_id nct7904_id[] = {
585 MODULE_DEVICE_TABLE(i2c, nct7904_id);
587 static struct i2c_driver nct7904_driver = {
588 .class = I2C_CLASS_HWMON,
592 .probe = nct7904_probe,
593 .id_table = nct7904_id,
594 .detect = nct7904_detect,
595 .address_list = normal_i2c,
598 module_i2c_driver(nct7904_driver);
600 MODULE_AUTHOR("Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>");
601 MODULE_DESCRIPTION("Hwmon driver for NUVOTON NCT7904");
602 MODULE_LICENSE("GPL");