1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * corsair-psu.c - Linux driver for Corsair power supplies with HID sensors interface
4 * Copyright (C) 2020 Wilken Gottwalt <wilken.gottwalt@posteo.net>
7 #include <linux/completion.h>
8 #include <linux/debugfs.h>
9 #include <linux/errno.h>
10 #include <linux/hid.h>
11 #include <linux/hwmon.h>
12 #include <linux/hwmon-sysfs.h>
13 #include <linux/jiffies.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
21 * Corsair protocol for PSUs
23 * message size = 64 bytes (request and response, little endian)
25 * [length][command][param0][param1][paramX]...
27 * [echo of length][echo of command][data0][data1][dataX]...
29 * - commands are byte sized opcodes
30 * - length is the sum of all bytes of the commands/params
31 * - the micro-controller of most of these PSUs support concatenation in the request and reply,
32 * but it is better to not rely on this (it is also hard to parse)
33 * - the driver uses raw events to be accessible from userspace (though this is not really
34 * supported, it is just there for convenience, may be removed in the future)
35 * - a reply always start with the length and command in the same order the request used it
36 * - length of the reply data is specific to the command used
37 * - some of the commands work on a rail and can be switched to a specific rail (0 = 12v,
39 * - the format of the init command 0xFE is swapped length/command bytes
40 * - parameter bytes amount and values are specific to the command (rail setting is the only
41 * for now that uses non-zero values)
42 * - there are much more commands, especially for configuring the device, but they are not
43 * supported because a wrong command/length can lockup the micro-controller
44 * - the driver supports debugfs for values not fitting into the hwmon class
45 * - not every device class (HXi, RMi or AXi) supports all commands
46 * - it is a pure sensors reading driver (will not support configuring)
49 #define DRIVER_NAME "corsair-psu"
51 #define REPLY_SIZE 16 /* max length of a reply to a single command */
52 #define CMD_BUFFER_SIZE 64
53 #define CMD_TIMEOUT_MS 250
54 #define SECONDS_PER_HOUR (60 * 60)
55 #define SECONDS_PER_DAY (SECONDS_PER_HOUR * 24)
56 #define RAIL_COUNT 3 /* 3v3 + 5v + 12v */
59 #define PSU_CMD_SELECT_RAIL 0x00 /* expects length 2 */
60 #define PSU_CMD_RAIL_VOLTS_HCRIT 0x40 /* the rest of the commands expect length 3 */
61 #define PSU_CMD_RAIL_VOLTS_LCRIT 0x44
62 #define PSU_CMD_RAIL_AMPS_HCRIT 0x46
63 #define PSU_CMD_TEMP_HCRIT 0x4F
64 #define PSU_CMD_IN_VOLTS 0x88
65 #define PSU_CMD_IN_AMPS 0x89
66 #define PSU_CMD_RAIL_VOLTS 0x8B
67 #define PSU_CMD_RAIL_AMPS 0x8C
68 #define PSU_CMD_TEMP0 0x8D
69 #define PSU_CMD_TEMP1 0x8E
70 #define PSU_CMD_FAN 0x90
71 #define PSU_CMD_RAIL_WATTS 0x96
72 #define PSU_CMD_VEND_STR 0x99
73 #define PSU_CMD_PROD_STR 0x9A
74 #define PSU_CMD_TOTAL_WATTS 0xEE
75 #define PSU_CMD_TOTAL_UPTIME 0xD1
76 #define PSU_CMD_UPTIME 0xD2
77 #define PSU_CMD_INIT 0xFE
79 #define L_IN_VOLTS "v_in"
80 #define L_OUT_VOLTS_12V "v_out +12v"
81 #define L_OUT_VOLTS_5V "v_out +5v"
82 #define L_OUT_VOLTS_3_3V "v_out +3.3v"
83 #define L_IN_AMPS "curr in"
84 #define L_AMPS_12V "curr +12v"
85 #define L_AMPS_5V "curr +5v"
86 #define L_AMPS_3_3V "curr +3.3v"
87 #define L_FAN "psu fan"
88 #define L_TEMP0 "vrm temp"
89 #define L_TEMP1 "case temp"
90 #define L_WATTS "power total"
91 #define L_WATTS_12V "power +12v"
92 #define L_WATTS_5V "power +5v"
93 #define L_WATTS_3_3V "power +3.3v"
95 static const char *const label_watts[] = {
102 static const char *const label_volts[] = {
109 static const char *const label_amps[] = {
116 struct corsairpsu_data {
117 struct hid_device *hdev;
118 struct device *hwmon_dev;
119 struct dentry *debugfs;
120 struct completion wait_completion;
121 struct mutex lock; /* for locking access to cmd_buffer */
123 char vendor[REPLY_SIZE];
124 char product[REPLY_SIZE];
125 long temp_crit[TEMP_COUNT];
126 long in_crit[RAIL_COUNT];
127 long in_lcrit[RAIL_COUNT];
128 long curr_crit[RAIL_COUNT];
129 u8 temp_crit_support;
132 u8 curr_crit_support;
133 bool in_curr_cmd_support; /* not all commands are supported on every PSU */
136 /* some values are SMBus LINEAR11 data which need a conversion */
137 static int corsairpsu_linear11_to_int(const u16 val, const int scale)
139 const int exp = ((s16)val) >> 11;
140 const int mant = (((s16)(val & 0x7ff)) << 5) >> 5;
141 const int result = mant * scale;
143 return (exp >= 0) ? (result << exp) : (result >> -exp);
146 static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data)
151 memset(priv->cmd_buffer, 0, CMD_BUFFER_SIZE);
152 priv->cmd_buffer[0] = p0;
153 priv->cmd_buffer[1] = p1;
154 priv->cmd_buffer[2] = p2;
156 reinit_completion(&priv->wait_completion);
158 ret = hid_hw_output_report(priv->hdev, priv->cmd_buffer, CMD_BUFFER_SIZE);
162 time = wait_for_completion_timeout(&priv->wait_completion,
163 msecs_to_jiffies(CMD_TIMEOUT_MS));
168 * at the start of the reply is an echo of the send command/length in the same order it
169 * was send, not every command is supported on every device class, if a command is not
170 * supported, the length value in the reply is okay, but the command value is set to 0
172 if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1])
176 memcpy(data, priv->cmd_buffer + 2, REPLY_SIZE);
181 static int corsairpsu_init(struct corsairpsu_data *priv)
184 * PSU_CMD_INIT uses swapped length/command and expects 2 parameter bytes, this command
185 * actually generates a reply, but we don't need it
187 return corsairpsu_usb_cmd(priv, PSU_CMD_INIT, 3, 0, NULL);
190 static int corsairpsu_fwinfo(struct corsairpsu_data *priv)
194 ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_VEND_STR, 0, priv->vendor);
198 ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_PROD_STR, 0, priv->product);
205 static int corsairpsu_request(struct corsairpsu_data *priv, u8 cmd, u8 rail, void *data)
209 mutex_lock(&priv->lock);
211 case PSU_CMD_RAIL_VOLTS_HCRIT:
212 case PSU_CMD_RAIL_VOLTS_LCRIT:
213 case PSU_CMD_RAIL_AMPS_HCRIT:
214 case PSU_CMD_RAIL_VOLTS:
215 case PSU_CMD_RAIL_AMPS:
216 case PSU_CMD_RAIL_WATTS:
217 ret = corsairpsu_usb_cmd(priv, 2, PSU_CMD_SELECT_RAIL, rail, NULL);
225 ret = corsairpsu_usb_cmd(priv, 3, cmd, 0, data);
228 mutex_unlock(&priv->lock);
232 static int corsairpsu_get_value(struct corsairpsu_data *priv, u8 cmd, u8 rail, long *val)
238 ret = corsairpsu_request(priv, cmd, rail, data);
243 * the biggest value here comes from the uptime command and to exceed MAXINT total uptime
244 * needs to be about 68 years, the rest are u16 values and the biggest value coming out of
245 * the LINEAR11 conversion are the watts values which are about 1200 for the strongest psu
246 * supported (HX1200i)
248 tmp = ((long)data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0];
250 case PSU_CMD_RAIL_VOLTS_HCRIT:
251 case PSU_CMD_RAIL_VOLTS_LCRIT:
252 case PSU_CMD_RAIL_AMPS_HCRIT:
253 case PSU_CMD_TEMP_HCRIT:
254 case PSU_CMD_IN_VOLTS:
255 case PSU_CMD_IN_AMPS:
256 case PSU_CMD_RAIL_VOLTS:
257 case PSU_CMD_RAIL_AMPS:
260 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000);
263 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
265 case PSU_CMD_RAIL_WATTS:
266 case PSU_CMD_TOTAL_WATTS:
267 *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000000);
269 case PSU_CMD_TOTAL_UPTIME:
281 static void corsairpsu_get_criticals(struct corsairpsu_data *priv)
286 for (rail = 0; rail < TEMP_COUNT; ++rail) {
287 if (!corsairpsu_get_value(priv, PSU_CMD_TEMP_HCRIT, rail, &tmp)) {
288 priv->temp_crit_support |= BIT(rail);
289 priv->temp_crit[rail] = tmp;
293 for (rail = 0; rail < RAIL_COUNT; ++rail) {
294 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_HCRIT, rail, &tmp)) {
295 priv->in_crit_support |= BIT(rail);
296 priv->in_crit[rail] = tmp;
299 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_LCRIT, rail, &tmp)) {
300 priv->in_lcrit_support |= BIT(rail);
301 priv->in_lcrit[rail] = tmp;
304 if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS_HCRIT, rail, &tmp)) {
305 priv->curr_crit_support |= BIT(rail);
306 priv->curr_crit[rail] = tmp;
311 static void corsairpsu_check_cmd_support(struct corsairpsu_data *priv)
315 priv->in_curr_cmd_support = !corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, &tmp);
318 static umode_t corsairpsu_hwmon_temp_is_visible(const struct corsairpsu_data *priv, u32 attr,
324 case hwmon_temp_input:
325 case hwmon_temp_label:
326 case hwmon_temp_crit:
327 if (channel > 0 && !(priv->temp_crit_support & BIT(channel - 1)))
337 static umode_t corsairpsu_hwmon_fan_is_visible(const struct corsairpsu_data *priv, u32 attr,
341 case hwmon_fan_input:
342 case hwmon_fan_label:
349 static umode_t corsairpsu_hwmon_power_is_visible(const struct corsairpsu_data *priv, u32 attr,
353 case hwmon_power_input:
354 case hwmon_power_label:
361 static umode_t corsairpsu_hwmon_in_is_visible(const struct corsairpsu_data *priv, u32 attr,
370 if (channel > 0 && !(priv->in_crit_support & BIT(channel - 1)))
374 if (channel > 0 && !(priv->in_lcrit_support & BIT(channel - 1)))
384 static umode_t corsairpsu_hwmon_curr_is_visible(const struct corsairpsu_data *priv, u32 attr,
390 case hwmon_curr_input:
391 if (channel == 0 && !priv->in_curr_cmd_support)
394 case hwmon_curr_label:
395 case hwmon_curr_crit:
396 if (channel > 0 && !(priv->curr_crit_support & BIT(channel - 1)))
406 static umode_t corsairpsu_hwmon_ops_is_visible(const void *data, enum hwmon_sensor_types type,
407 u32 attr, int channel)
409 const struct corsairpsu_data *priv = data;
413 return corsairpsu_hwmon_temp_is_visible(priv, attr, channel);
415 return corsairpsu_hwmon_fan_is_visible(priv, attr, channel);
417 return corsairpsu_hwmon_power_is_visible(priv, attr, channel);
419 return corsairpsu_hwmon_in_is_visible(priv, attr, channel);
421 return corsairpsu_hwmon_curr_is_visible(priv, attr, channel);
427 static int corsairpsu_hwmon_temp_read(struct corsairpsu_data *priv, u32 attr, int channel,
430 int err = -EOPNOTSUPP;
433 case hwmon_temp_input:
434 return corsairpsu_get_value(priv, channel ? PSU_CMD_TEMP1 : PSU_CMD_TEMP0,
436 case hwmon_temp_crit:
437 *val = priv->temp_crit[channel];
447 static int corsairpsu_hwmon_power_read(struct corsairpsu_data *priv, u32 attr, int channel,
450 if (attr == hwmon_power_input) {
453 return corsairpsu_get_value(priv, PSU_CMD_TOTAL_WATTS, 0, val);
455 return corsairpsu_get_value(priv, PSU_CMD_RAIL_WATTS, channel - 1, val);
464 static int corsairpsu_hwmon_in_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
466 int err = -EOPNOTSUPP;
472 return corsairpsu_get_value(priv, PSU_CMD_IN_VOLTS, 0, val);
474 return corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS, channel - 1, val);
480 *val = priv->in_crit[channel - 1];
484 *val = priv->in_lcrit[channel - 1];
492 static int corsairpsu_hwmon_curr_read(struct corsairpsu_data *priv, u32 attr, int channel,
495 int err = -EOPNOTSUPP;
498 case hwmon_curr_input:
501 return corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, val);
503 return corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS, channel - 1, val);
508 case hwmon_curr_crit:
509 *val = priv->curr_crit[channel - 1];
519 static int corsairpsu_hwmon_ops_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
520 int channel, long *val)
522 struct corsairpsu_data *priv = dev_get_drvdata(dev);
526 return corsairpsu_hwmon_temp_read(priv, attr, channel, val);
528 if (attr == hwmon_fan_input)
529 return corsairpsu_get_value(priv, PSU_CMD_FAN, 0, val);
532 return corsairpsu_hwmon_power_read(priv, attr, channel, val);
534 return corsairpsu_hwmon_in_read(priv, attr, channel, val);
536 return corsairpsu_hwmon_curr_read(priv, attr, channel, val);
542 static int corsairpsu_hwmon_ops_read_string(struct device *dev, enum hwmon_sensor_types type,
543 u32 attr, int channel, const char **str)
545 if (type == hwmon_temp && attr == hwmon_temp_label) {
546 *str = channel ? L_TEMP1 : L_TEMP0;
548 } else if (type == hwmon_fan && attr == hwmon_fan_label) {
551 } else if (type == hwmon_power && attr == hwmon_power_label && channel < 4) {
552 *str = label_watts[channel];
554 } else if (type == hwmon_in && attr == hwmon_in_label && channel < 4) {
555 *str = label_volts[channel];
557 } else if (type == hwmon_curr && attr == hwmon_curr_label && channel < 4) {
558 *str = label_amps[channel];
565 static const struct hwmon_ops corsairpsu_hwmon_ops = {
566 .is_visible = corsairpsu_hwmon_ops_is_visible,
567 .read = corsairpsu_hwmon_ops_read,
568 .read_string = corsairpsu_hwmon_ops_read_string,
571 static const struct hwmon_channel_info *corsairpsu_info[] = {
572 HWMON_CHANNEL_INFO(chip,
573 HWMON_C_REGISTER_TZ),
574 HWMON_CHANNEL_INFO(temp,
575 HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT,
576 HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT),
577 HWMON_CHANNEL_INFO(fan,
578 HWMON_F_INPUT | HWMON_F_LABEL),
579 HWMON_CHANNEL_INFO(power,
580 HWMON_P_INPUT | HWMON_P_LABEL,
581 HWMON_P_INPUT | HWMON_P_LABEL,
582 HWMON_P_INPUT | HWMON_P_LABEL,
583 HWMON_P_INPUT | HWMON_P_LABEL),
584 HWMON_CHANNEL_INFO(in,
585 HWMON_I_INPUT | HWMON_I_LABEL,
586 HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
587 HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
588 HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT),
589 HWMON_CHANNEL_INFO(curr,
590 HWMON_C_INPUT | HWMON_C_LABEL,
591 HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
592 HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
593 HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT),
597 static const struct hwmon_chip_info corsairpsu_chip_info = {
598 .ops = &corsairpsu_hwmon_ops,
599 .info = corsairpsu_info,
602 #ifdef CONFIG_DEBUG_FS
604 static void print_uptime(struct seq_file *seqf, u8 cmd)
606 struct corsairpsu_data *priv = seqf->private;
610 ret = corsairpsu_get_value(priv, cmd, 0, &val);
612 seq_puts(seqf, "N/A\n");
616 if (val > SECONDS_PER_DAY) {
617 seq_printf(seqf, "%ld day(s), %02ld:%02ld:%02ld\n", val / SECONDS_PER_DAY,
618 val % SECONDS_PER_DAY / SECONDS_PER_HOUR, val % SECONDS_PER_HOUR / 60,
623 seq_printf(seqf, "%02ld:%02ld:%02ld\n", val % SECONDS_PER_DAY / SECONDS_PER_HOUR,
624 val % SECONDS_PER_HOUR / 60, val % 60);
627 static int uptime_show(struct seq_file *seqf, void *unused)
629 print_uptime(seqf, PSU_CMD_UPTIME);
633 DEFINE_SHOW_ATTRIBUTE(uptime);
635 static int uptime_total_show(struct seq_file *seqf, void *unused)
637 print_uptime(seqf, PSU_CMD_TOTAL_UPTIME);
641 DEFINE_SHOW_ATTRIBUTE(uptime_total);
643 static int vendor_show(struct seq_file *seqf, void *unused)
645 struct corsairpsu_data *priv = seqf->private;
647 seq_printf(seqf, "%s\n", priv->vendor);
651 DEFINE_SHOW_ATTRIBUTE(vendor);
653 static int product_show(struct seq_file *seqf, void *unused)
655 struct corsairpsu_data *priv = seqf->private;
657 seq_printf(seqf, "%s\n", priv->product);
661 DEFINE_SHOW_ATTRIBUTE(product);
663 static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
667 scnprintf(name, sizeof(name), "%s-%s", DRIVER_NAME, dev_name(&priv->hdev->dev));
669 priv->debugfs = debugfs_create_dir(name, NULL);
670 debugfs_create_file("uptime", 0444, priv->debugfs, priv, &uptime_fops);
671 debugfs_create_file("uptime_total", 0444, priv->debugfs, priv, &uptime_total_fops);
672 debugfs_create_file("vendor", 0444, priv->debugfs, priv, &vendor_fops);
673 debugfs_create_file("product", 0444, priv->debugfs, priv, &product_fops);
678 static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
684 static int corsairpsu_probe(struct hid_device *hdev, const struct hid_device_id *id)
686 struct corsairpsu_data *priv;
689 priv = devm_kzalloc(&hdev->dev, sizeof(struct corsairpsu_data), GFP_KERNEL);
693 priv->cmd_buffer = devm_kmalloc(&hdev->dev, CMD_BUFFER_SIZE, GFP_KERNEL);
694 if (!priv->cmd_buffer)
697 ret = hid_parse(hdev);
701 ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
705 ret = hid_hw_open(hdev);
710 hid_set_drvdata(hdev, priv);
711 mutex_init(&priv->lock);
712 init_completion(&priv->wait_completion);
714 hid_device_io_start(hdev);
716 ret = corsairpsu_init(priv);
718 dev_err(&hdev->dev, "unable to initialize device (%d)\n", ret);
722 ret = corsairpsu_fwinfo(priv);
724 dev_err(&hdev->dev, "unable to query firmware (%d)\n", ret);
728 corsairpsu_get_criticals(priv);
729 corsairpsu_check_cmd_support(priv);
731 priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "corsairpsu", priv,
732 &corsairpsu_chip_info, 0);
734 if (IS_ERR(priv->hwmon_dev)) {
735 ret = PTR_ERR(priv->hwmon_dev);
739 corsairpsu_debugfs_init(priv);
750 static void corsairpsu_remove(struct hid_device *hdev)
752 struct corsairpsu_data *priv = hid_get_drvdata(hdev);
754 debugfs_remove_recursive(priv->debugfs);
755 hwmon_device_unregister(priv->hwmon_dev);
760 static int corsairpsu_raw_event(struct hid_device *hdev, struct hid_report *report, u8 *data,
763 struct corsairpsu_data *priv = hid_get_drvdata(hdev);
765 if (completion_done(&priv->wait_completion))
768 memcpy(priv->cmd_buffer, data, min(CMD_BUFFER_SIZE, size));
769 complete(&priv->wait_completion);
774 static const struct hid_device_id corsairpsu_idtable[] = {
775 { HID_USB_DEVICE(0x1b1c, 0x1c03) }, /* Corsair HX550i */
776 { HID_USB_DEVICE(0x1b1c, 0x1c04) }, /* Corsair HX650i */
777 { HID_USB_DEVICE(0x1b1c, 0x1c05) }, /* Corsair HX750i */
778 { HID_USB_DEVICE(0x1b1c, 0x1c06) }, /* Corsair HX850i */
779 { HID_USB_DEVICE(0x1b1c, 0x1c07) }, /* Corsair HX1000i */
780 { HID_USB_DEVICE(0x1b1c, 0x1c08) }, /* Corsair HX1200i */
781 { HID_USB_DEVICE(0x1b1c, 0x1c09) }, /* Corsair RM550i */
782 { HID_USB_DEVICE(0x1b1c, 0x1c0a) }, /* Corsair RM650i */
783 { HID_USB_DEVICE(0x1b1c, 0x1c0b) }, /* Corsair RM750i */
784 { HID_USB_DEVICE(0x1b1c, 0x1c0c) }, /* Corsair RM850i */
785 { HID_USB_DEVICE(0x1b1c, 0x1c0d) }, /* Corsair RM1000i */
788 MODULE_DEVICE_TABLE(hid, corsairpsu_idtable);
790 static struct hid_driver corsairpsu_driver = {
792 .id_table = corsairpsu_idtable,
793 .probe = corsairpsu_probe,
794 .remove = corsairpsu_remove,
795 .raw_event = corsairpsu_raw_event,
797 module_hid_driver(corsairpsu_driver);
799 MODULE_LICENSE("GPL");
800 MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>");
801 MODULE_DESCRIPTION("Linux driver for Corsair power supplies with HID sensors interface");