1 // SPDX-License-Identifier: GPL-2.0-only
3 * coretemp.c - Linux kernel module for hardware monitoring
5 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
7 * Inspired from many hwmon drivers
10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/jiffies.h>
16 #include <linux/hwmon.h>
17 #include <linux/sysfs.h>
18 #include <linux/hwmon-sysfs.h>
19 #include <linux/err.h>
20 #include <linux/mutex.h>
21 #include <linux/list.h>
22 #include <linux/platform_device.h>
23 #include <linux/cpu.h>
24 #include <linux/smp.h>
25 #include <linux/moduleparam.h>
26 #include <linux/pci.h>
28 #include <asm/processor.h>
29 #include <asm/cpu_device_id.h>
31 #define DRVNAME "coretemp"
34 * force_tjmax only matters when TjMax can't be read from the CPU itself.
35 * When set, it replaces the driver's suboptimal heuristic.
37 static int force_tjmax;
38 module_param_named(tjmax, force_tjmax, int, 0444);
39 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
41 #define PKG_SYSFS_ATTR_NO 1 /* Sysfs attribute for package temp */
42 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
43 #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */
44 #define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */
45 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
46 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
47 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
50 #define for_each_sibling(i, cpu) \
51 for_each_cpu(i, topology_sibling_cpumask(cpu))
53 #define for_each_sibling(i, cpu) for (i = 0; false; )
57 * Per-Core Temperature Data
58 * @last_updated: The time when the current temperature value was updated
59 * earlier (in jiffies).
60 * @cpu_core_id: The CPU Core from which temperature values should be read
61 * This value is passed as "id" field to rdmsr/wrmsr functions.
62 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
63 * from where the temperature values should be read.
64 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
65 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
66 * Otherwise, temp_data holds coretemp data.
67 * @valid: If this is 1, the current temperature is valid.
73 unsigned long last_updated;
80 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
81 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
82 struct attribute *attrs[TOTAL_ATTRS + 1];
83 struct attribute_group attr_group;
84 struct mutex update_lock;
87 /* Platform Data per Physical CPU */
88 struct platform_data {
89 struct device *hwmon_dev;
91 u16 cpu_map[NUM_REAL_CORES];
93 struct cpumask cpumask;
94 struct temp_data *core_data[MAX_CORE_DATA];
95 struct device_attribute name_attr;
98 /* Keep track of how many zone pointers we allocated in init() */
99 static int max_zones __read_mostly;
100 /* Array of zone pointers. Serialized by cpu hotplug lock */
101 static struct platform_device **zone_devices;
103 static ssize_t show_label(struct device *dev,
104 struct device_attribute *devattr, char *buf)
106 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
107 struct platform_data *pdata = dev_get_drvdata(dev);
108 struct temp_data *tdata = pdata->core_data[attr->index];
110 if (tdata->is_pkg_data)
111 return sprintf(buf, "Package id %u\n", pdata->pkg_id);
113 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
116 static ssize_t show_crit_alarm(struct device *dev,
117 struct device_attribute *devattr, char *buf)
120 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
121 struct platform_data *pdata = dev_get_drvdata(dev);
122 struct temp_data *tdata = pdata->core_data[attr->index];
124 mutex_lock(&tdata->update_lock);
125 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
126 mutex_unlock(&tdata->update_lock);
128 return sprintf(buf, "%d\n", (eax >> 5) & 1);
131 static ssize_t show_tjmax(struct device *dev,
132 struct device_attribute *devattr, char *buf)
134 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
135 struct platform_data *pdata = dev_get_drvdata(dev);
137 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
140 static ssize_t show_ttarget(struct device *dev,
141 struct device_attribute *devattr, char *buf)
143 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
144 struct platform_data *pdata = dev_get_drvdata(dev);
146 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
149 static ssize_t show_temp(struct device *dev,
150 struct device_attribute *devattr, char *buf)
153 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
154 struct platform_data *pdata = dev_get_drvdata(dev);
155 struct temp_data *tdata = pdata->core_data[attr->index];
157 mutex_lock(&tdata->update_lock);
159 /* Check whether the time interval has elapsed */
160 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
161 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
163 * Ignore the valid bit. In all observed cases the register
164 * value is either low or zero if the valid bit is 0.
165 * Return it instead of reporting an error which doesn't
166 * really help at all.
168 tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
170 tdata->last_updated = jiffies;
173 mutex_unlock(&tdata->update_lock);
174 return sprintf(buf, "%d\n", tdata->temp);
182 static const struct tjmax_pci tjmax_pci_table[] = {
183 { 0x0708, 110000 }, /* CE41x0 (Sodaville ) */
184 { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
185 { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
186 { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
194 static const struct tjmax tjmax_table[] = {
195 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
196 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
207 static const struct tjmax_model tjmax_model_table[] = {
208 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
209 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
210 * Note: Also matches 230 and 330,
211 * which are covered by tjmax_table
213 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
214 * Note: TjMax for E6xxT is 110C, but CPU type
215 * is undetectable by software
217 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
218 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
219 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
220 * Also matches S12x0 (stepping 9), covered by
225 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
227 /* The 100C is default for both mobile and non mobile CPUs */
230 int tjmax_ee = 85000;
235 u16 devfn = PCI_DEVFN(0, 0);
236 struct pci_dev *host_bridge = pci_get_domain_bus_and_slot(0, 0, devfn);
239 * Explicit tjmax table entries override heuristics.
240 * First try PCI host bridge IDs, followed by model ID strings
241 * and model/stepping information.
243 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
244 for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
245 if (host_bridge->device == tjmax_pci_table[i].device)
246 return tjmax_pci_table[i].tjmax;
250 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
251 if (strstr(c->x86_model_id, tjmax_table[i].id))
252 return tjmax_table[i].tjmax;
255 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
256 const struct tjmax_model *tm = &tjmax_model_table[i];
257 if (c->x86_model == tm->model &&
258 (tm->mask == ANY || c->x86_stepping == tm->mask))
262 /* Early chips have no MSR for TjMax */
264 if (c->x86_model == 0xf && c->x86_stepping < 4)
267 if (c->x86_model > 0xe && usemsr_ee) {
271 * Now we can detect the mobile CPU using Intel provided table
272 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
273 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
275 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
278 "Unable to access MSR 0x17, assuming desktop"
281 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
283 * Trust bit 28 up to Penryn, I could not find any
284 * documentation on that; if you happen to know
285 * someone at Intel please ask
289 /* Platform ID bits 52:50 (EDX starts at bit 32) */
290 platform_id = (edx >> 18) & 0x7;
293 * Mobile Penryn CPU seems to be platform ID 7 or 5
296 if (c->x86_model == 0x17 &&
297 (platform_id == 5 || platform_id == 7)) {
299 * If MSR EE bit is set, set it to 90 degrees C,
300 * otherwise 105 degrees C
309 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
312 "Unable to access MSR 0xEE, for Tjmax, left"
314 } else if (eax & 0x40000000) {
317 } else if (tjmax == 100000) {
319 * If we don't use msr EE it means we are desktop CPU
320 * (with exeception of Atom)
322 dev_warn(dev, "Using relative temperature scale!\n");
328 static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
330 u8 model = c->x86_model;
332 return model > 0xe &&
340 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
347 * A new feature of current Intel(R) processors, the
348 * IA32_TEMPERATURE_TARGET contains the TjMax value
350 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
352 if (cpu_has_tjmax(c))
353 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
355 val = (eax >> 16) & 0xff;
357 * If the TjMax is not plausible, an assumption
361 dev_dbg(dev, "TjMax is %d degrees C\n", val);
367 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
369 return force_tjmax * 1000;
373 * An assumption is made for early CPUs and unreadable MSR.
374 * NOTE: the calculated value may not be correct.
376 return adjust_tjmax(c, id, dev);
379 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
383 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
384 struct device_attribute *devattr, char *buf) = {
385 show_label, show_crit_alarm, show_temp, show_tjmax,
387 static const char *const suffixes[TOTAL_ATTRS] = {
388 "label", "crit_alarm", "input", "crit", "max"
391 for (i = 0; i < tdata->attr_size; i++) {
392 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
393 "temp%d_%s", attr_no, suffixes[i]);
394 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
395 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
396 tdata->sd_attrs[i].dev_attr.attr.mode = 0444;
397 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
398 tdata->sd_attrs[i].index = attr_no;
399 tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr;
401 tdata->attr_group.attrs = tdata->attrs;
402 return sysfs_create_group(&dev->kobj, &tdata->attr_group);
406 static int chk_ucode_version(unsigned int cpu)
408 struct cpuinfo_x86 *c = &cpu_data(cpu);
411 * Check if we have problem with errata AE18 of Core processors:
412 * Readings might stop update when processor visited too deep sleep,
413 * fixed for stepping D0 (6EC).
415 if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) {
416 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
422 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
424 int id = topology_logical_die_id(cpu);
426 if (id >= 0 && id < max_zones)
427 return zone_devices[id];
431 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
433 struct temp_data *tdata;
435 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
439 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
440 MSR_IA32_THERM_STATUS;
441 tdata->is_pkg_data = pkg_flag;
443 tdata->cpu_core_id = topology_core_id(cpu);
444 tdata->attr_size = MAX_CORE_ATTRS;
445 mutex_init(&tdata->update_lock);
449 static int create_core_data(struct platform_device *pdev, unsigned int cpu,
452 struct temp_data *tdata;
453 struct platform_data *pdata = platform_get_drvdata(pdev);
454 struct cpuinfo_x86 *c = &cpu_data(cpu);
456 int err, index, attr_no;
459 * Find attr number for sysfs:
460 * We map the attr number to core id of the CPU
461 * The attr number is always core id + 2
462 * The Pkgtemp will always show up as temp1_*, if available
465 attr_no = PKG_SYSFS_ATTR_NO;
467 index = ida_alloc(&pdata->ida, GFP_KERNEL);
470 pdata->cpu_map[index] = topology_core_id(cpu);
471 attr_no = index + BASE_SYSFS_ATTR_NO;
474 if (attr_no > MAX_CORE_DATA - 1) {
479 tdata = init_temp_data(cpu, pkg_flag);
485 /* Test if we can access the status register */
486 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
490 /* We can access status register. Get Critical Temperature */
491 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
494 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
495 * The target temperature is available on older CPUs but not in this
496 * register. Atoms don't have the register at all.
498 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
499 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
503 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
508 pdata->core_data[attr_no] = tdata;
510 /* Create sysfs interfaces */
511 err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no);
517 pdata->core_data[attr_no] = NULL;
521 ida_free(&pdata->ida, index);
526 coretemp_add_core(struct platform_device *pdev, unsigned int cpu, int pkg_flag)
528 if (create_core_data(pdev, cpu, pkg_flag))
529 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
532 static void coretemp_remove_core(struct platform_data *pdata, int indx)
534 struct temp_data *tdata = pdata->core_data[indx];
536 /* Remove the sysfs attributes */
537 sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group);
539 kfree(pdata->core_data[indx]);
540 pdata->core_data[indx] = NULL;
542 if (indx >= BASE_SYSFS_ATTR_NO)
543 ida_free(&pdata->ida, indx - BASE_SYSFS_ATTR_NO);
546 static int coretemp_probe(struct platform_device *pdev)
548 struct device *dev = &pdev->dev;
549 struct platform_data *pdata;
551 /* Initialize the per-zone data structures */
552 pdata = devm_kzalloc(dev, sizeof(struct platform_data), GFP_KERNEL);
556 pdata->pkg_id = pdev->id;
557 ida_init(&pdata->ida);
558 platform_set_drvdata(pdev, pdata);
560 pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME,
562 return PTR_ERR_OR_ZERO(pdata->hwmon_dev);
565 static int coretemp_remove(struct platform_device *pdev)
567 struct platform_data *pdata = platform_get_drvdata(pdev);
570 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
571 if (pdata->core_data[i])
572 coretemp_remove_core(pdata, i);
574 ida_destroy(&pdata->ida);
578 static struct platform_driver coretemp_driver = {
582 .probe = coretemp_probe,
583 .remove = coretemp_remove,
586 static struct platform_device *coretemp_device_add(unsigned int cpu)
588 int err, zoneid = topology_logical_die_id(cpu);
589 struct platform_device *pdev;
592 return ERR_PTR(-ENOMEM);
594 pdev = platform_device_alloc(DRVNAME, zoneid);
596 return ERR_PTR(-ENOMEM);
598 err = platform_device_add(pdev);
600 platform_device_put(pdev);
604 zone_devices[zoneid] = pdev;
608 static int coretemp_cpu_online(unsigned int cpu)
610 struct platform_device *pdev = coretemp_get_pdev(cpu);
611 struct cpuinfo_x86 *c = &cpu_data(cpu);
612 struct platform_data *pdata;
615 * Don't execute this on resume as the offline callback did
616 * not get executed on suspend.
618 if (cpuhp_tasks_frozen)
622 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
623 * sensors. We check this bit only, all the early CPUs
624 * without thermal sensors will be filtered out.
626 if (!cpu_has(c, X86_FEATURE_DTHERM))
630 /* Check the microcode version of the CPU */
631 if (chk_ucode_version(cpu))
635 * Alright, we have DTS support.
636 * We are bringing the _first_ core in this pkg
637 * online. So, initialize per-pkg data structures and
638 * then bring this core online.
640 pdev = coretemp_device_add(cpu);
642 return PTR_ERR(pdev);
645 * Check whether pkgtemp support is available.
646 * If so, add interfaces for pkgtemp.
648 if (cpu_has(c, X86_FEATURE_PTS))
649 coretemp_add_core(pdev, cpu, 1);
652 pdata = platform_get_drvdata(pdev);
654 * Check whether a thread sibling is already online. If not add the
655 * interface for this CPU core.
657 if (!cpumask_intersects(&pdata->cpumask, topology_sibling_cpumask(cpu)))
658 coretemp_add_core(pdev, cpu, 0);
660 cpumask_set_cpu(cpu, &pdata->cpumask);
664 static int coretemp_cpu_offline(unsigned int cpu)
666 struct platform_device *pdev = coretemp_get_pdev(cpu);
667 struct platform_data *pd;
668 struct temp_data *tdata;
669 int i, indx = -1, target;
672 * Don't execute this on suspend as the device remove locks
675 if (cpuhp_tasks_frozen)
678 /* If the physical CPU device does not exist, just return */
682 pd = platform_get_drvdata(pdev);
684 for (i = 0; i < NUM_REAL_CORES; i++) {
685 if (pd->cpu_map[i] == topology_core_id(cpu)) {
686 indx = i + BASE_SYSFS_ATTR_NO;
691 /* Too many cores and this core is not populated, just return */
695 tdata = pd->core_data[indx];
697 cpumask_clear_cpu(cpu, &pd->cpumask);
700 * If this is the last thread sibling, remove the CPU core
701 * interface, If there is still a sibling online, transfer the
702 * target cpu of that core interface to it.
704 target = cpumask_any_and(&pd->cpumask, topology_sibling_cpumask(cpu));
705 if (target >= nr_cpu_ids) {
706 coretemp_remove_core(pd, indx);
707 } else if (tdata && tdata->cpu == cpu) {
708 mutex_lock(&tdata->update_lock);
710 mutex_unlock(&tdata->update_lock);
714 * If all cores in this pkg are offline, remove the device. This
715 * will invoke the platform driver remove function, which cleans up
718 if (cpumask_empty(&pd->cpumask)) {
719 zone_devices[topology_logical_die_id(cpu)] = NULL;
720 platform_device_unregister(pdev);
725 * Check whether this core is the target for the package
726 * interface. We need to assign it to some other cpu.
728 tdata = pd->core_data[PKG_SYSFS_ATTR_NO];
729 if (tdata && tdata->cpu == cpu) {
730 target = cpumask_first(&pd->cpumask);
731 mutex_lock(&tdata->update_lock);
733 mutex_unlock(&tdata->update_lock);
737 static const struct x86_cpu_id __initconst coretemp_ids[] = {
738 X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_DTHERM, NULL),
741 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
743 static enum cpuhp_state coretemp_hp_online;
745 static int __init coretemp_init(void)
750 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
751 * sensors. We check this bit only, all the early CPUs
752 * without thermal sensors will be filtered out.
754 if (!x86_match_cpu(coretemp_ids))
757 max_zones = topology_max_packages() * topology_max_die_per_package();
758 zone_devices = kcalloc(max_zones, sizeof(struct platform_device *),
763 err = platform_driver_register(&coretemp_driver);
767 err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "hwmon/coretemp:online",
768 coretemp_cpu_online, coretemp_cpu_offline);
771 coretemp_hp_online = err;
775 platform_driver_unregister(&coretemp_driver);
780 module_init(coretemp_init)
782 static void __exit coretemp_exit(void)
784 cpuhp_remove_state(coretemp_hp_online);
785 platform_driver_unregister(&coretemp_driver);
788 module_exit(coretemp_exit)
790 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
791 MODULE_DESCRIPTION("Intel Core temperature monitor");
792 MODULE_LICENSE("GPL");