1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021 Intel Corporation
8 #include <linux/dma-fence-array.h>
10 #include <drm/drm_print.h>
11 #include <drm/ttm/ttm_execbuf_util.h>
12 #include <drm/ttm/ttm_tt.h>
13 #include <drm/xe_drm.h>
14 #include <linux/delay.h>
15 #include <linux/kthread.h>
17 #include <linux/swap.h>
20 #include "xe_device.h"
21 #include "xe_engine.h"
23 #include "xe_gt_pagefault.h"
24 #include "xe_gt_tlb_invalidation.h"
25 #include "xe_migrate.h"
27 #include "xe_preempt_fence.h"
29 #include "xe_res_cursor.h"
33 #define TEST_VM_ASYNC_OPS_ERROR
36 * xe_vma_userptr_check_repin() - Advisory check for repin needed
37 * @vma: The userptr vma
39 * Check if the userptr vma has been invalidated since last successful
40 * repin. The check is advisory only and can the function can be called
41 * without the vm->userptr.notifier_lock held. There is no guarantee that the
42 * vma userptr will remain valid after a lockless check, so typically
43 * the call needs to be followed by a proper check under the notifier_lock.
45 * Return: 0 if userptr vma is valid, -EAGAIN otherwise; repin recommended.
47 int xe_vma_userptr_check_repin(struct xe_vma *vma)
49 return mmu_interval_check_retry(&vma->userptr.notifier,
50 vma->userptr.notifier_seq) ?
54 int xe_vma_userptr_pin_pages(struct xe_vma *vma)
56 struct xe_vm *vm = xe_vma_vm(vma);
57 struct xe_device *xe = vm->xe;
58 const unsigned long num_pages = xe_vma_size(vma) >> PAGE_SHIFT;
60 bool in_kthread = !current->mm;
61 unsigned long notifier_seq;
63 bool read_only = xe_vma_read_only(vma);
65 lockdep_assert_held(&vm->lock);
66 XE_BUG_ON(!xe_vma_is_userptr(vma));
68 if (vma->gpuva.flags & XE_VMA_DESTROYED)
71 notifier_seq = mmu_interval_read_begin(&vma->userptr.notifier);
72 if (notifier_seq == vma->userptr.notifier_seq)
75 pages = kvmalloc_array(num_pages, sizeof(*pages), GFP_KERNEL);
79 if (vma->userptr.sg) {
80 dma_unmap_sgtable(xe->drm.dev,
82 read_only ? DMA_TO_DEVICE :
83 DMA_BIDIRECTIONAL, 0);
84 sg_free_table(vma->userptr.sg);
85 vma->userptr.sg = NULL;
90 if (!mmget_not_zero(vma->userptr.notifier.mm)) {
94 kthread_use_mm(vma->userptr.notifier.mm);
97 while (pinned < num_pages) {
98 ret = get_user_pages_fast(xe_vma_userptr(vma) +
101 read_only ? 0 : FOLL_WRITE,
114 kthread_unuse_mm(vma->userptr.notifier.mm);
115 mmput(vma->userptr.notifier.mm);
121 ret = sg_alloc_table_from_pages_segment(&vma->userptr.sgt, pages,
123 (u64)pinned << PAGE_SHIFT,
124 xe_sg_segment_size(xe->drm.dev),
127 vma->userptr.sg = NULL;
130 vma->userptr.sg = &vma->userptr.sgt;
132 ret = dma_map_sgtable(xe->drm.dev, vma->userptr.sg,
133 read_only ? DMA_TO_DEVICE :
135 DMA_ATTR_SKIP_CPU_SYNC |
136 DMA_ATTR_NO_KERNEL_MAPPING);
138 sg_free_table(vma->userptr.sg);
139 vma->userptr.sg = NULL;
143 for (i = 0; i < pinned; ++i) {
146 set_page_dirty(pages[i]);
147 unlock_page(pages[i]);
150 mark_page_accessed(pages[i]);
154 release_pages(pages, pinned);
158 vma->userptr.notifier_seq = notifier_seq;
159 if (xe_vma_userptr_check_repin(vma) == -EAGAIN)
163 return ret < 0 ? ret : 0;
166 static bool preempt_fences_waiting(struct xe_vm *vm)
170 lockdep_assert_held(&vm->lock);
171 xe_vm_assert_held(vm);
173 list_for_each_entry(e, &vm->preempt.engines, compute.link) {
174 if (!e->compute.pfence || (e->compute.pfence &&
175 test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
176 &e->compute.pfence->flags))) {
184 static void free_preempt_fences(struct list_head *list)
186 struct list_head *link, *next;
188 list_for_each_safe(link, next, list)
189 xe_preempt_fence_free(to_preempt_fence_from_link(link));
192 static int alloc_preempt_fences(struct xe_vm *vm, struct list_head *list,
195 lockdep_assert_held(&vm->lock);
196 xe_vm_assert_held(vm);
198 if (*count >= vm->preempt.num_engines)
201 for (; *count < vm->preempt.num_engines; ++(*count)) {
202 struct xe_preempt_fence *pfence = xe_preempt_fence_alloc();
205 return PTR_ERR(pfence);
207 list_move_tail(xe_preempt_fence_link(pfence), list);
213 static int wait_for_existing_preempt_fences(struct xe_vm *vm)
217 xe_vm_assert_held(vm);
219 list_for_each_entry(e, &vm->preempt.engines, compute.link) {
220 if (e->compute.pfence) {
221 long timeout = dma_fence_wait(e->compute.pfence, false);
225 dma_fence_put(e->compute.pfence);
226 e->compute.pfence = NULL;
233 static bool xe_vm_is_idle(struct xe_vm *vm)
237 xe_vm_assert_held(vm);
238 list_for_each_entry(e, &vm->preempt.engines, compute.link) {
239 if (!xe_engine_is_idle(e))
246 static void arm_preempt_fences(struct xe_vm *vm, struct list_head *list)
248 struct list_head *link;
251 list_for_each_entry(e, &vm->preempt.engines, compute.link) {
252 struct dma_fence *fence;
255 XE_BUG_ON(link == list);
257 fence = xe_preempt_fence_arm(to_preempt_fence_from_link(link),
258 e, e->compute.context,
260 dma_fence_put(e->compute.pfence);
261 e->compute.pfence = fence;
265 static int add_preempt_fences(struct xe_vm *vm, struct xe_bo *bo)
268 struct ww_acquire_ctx ww;
271 err = xe_bo_lock(bo, &ww, vm->preempt.num_engines, true);
275 list_for_each_entry(e, &vm->preempt.engines, compute.link)
276 if (e->compute.pfence) {
277 dma_resv_add_fence(bo->ttm.base.resv,
279 DMA_RESV_USAGE_BOOKKEEP);
282 xe_bo_unlock(bo, &ww);
287 * xe_vm_fence_all_extobjs() - Add a fence to vm's external objects' resv
289 * @fence: The fence to add.
290 * @usage: The resv usage for the fence.
292 * Loops over all of the vm's external object bindings and adds a @fence
293 * with the given @usage to all of the external object's reservation
296 void xe_vm_fence_all_extobjs(struct xe_vm *vm, struct dma_fence *fence,
297 enum dma_resv_usage usage)
301 list_for_each_entry(vma, &vm->extobj.list, extobj.link)
302 dma_resv_add_fence(xe_vma_bo(vma)->ttm.base.resv, fence, usage);
305 static void resume_and_reinstall_preempt_fences(struct xe_vm *vm)
309 lockdep_assert_held(&vm->lock);
310 xe_vm_assert_held(vm);
312 list_for_each_entry(e, &vm->preempt.engines, compute.link) {
315 dma_resv_add_fence(xe_vm_resv(vm), e->compute.pfence,
316 DMA_RESV_USAGE_BOOKKEEP);
317 xe_vm_fence_all_extobjs(vm, e->compute.pfence,
318 DMA_RESV_USAGE_BOOKKEEP);
322 int xe_vm_add_compute_engine(struct xe_vm *vm, struct xe_engine *e)
324 struct ttm_validate_buffer tv_onstack[XE_ONSTACK_TV];
325 struct ttm_validate_buffer *tv;
326 struct ww_acquire_ctx ww;
327 struct list_head objs;
328 struct dma_fence *pfence;
332 XE_BUG_ON(!xe_vm_in_compute_mode(vm));
334 down_write(&vm->lock);
336 err = xe_vm_lock_dma_resv(vm, &ww, tv_onstack, &tv, &objs, true, 1);
338 goto out_unlock_outer;
340 pfence = xe_preempt_fence_create(e, e->compute.context,
347 list_add(&e->compute.link, &vm->preempt.engines);
348 ++vm->preempt.num_engines;
349 e->compute.pfence = pfence;
351 down_read(&vm->userptr.notifier_lock);
353 dma_resv_add_fence(xe_vm_resv(vm), pfence,
354 DMA_RESV_USAGE_BOOKKEEP);
356 xe_vm_fence_all_extobjs(vm, pfence, DMA_RESV_USAGE_BOOKKEEP);
359 * Check to see if a preemption on VM is in flight or userptr
360 * invalidation, if so trigger this preempt fence to sync state with
361 * other preempt fences on the VM.
363 wait = __xe_vm_userptr_needs_repin(vm) || preempt_fences_waiting(vm);
365 dma_fence_enable_sw_signaling(pfence);
367 up_read(&vm->userptr.notifier_lock);
370 xe_vm_unlock_dma_resv(vm, tv_onstack, tv, &ww, &objs);
378 * __xe_vm_userptr_needs_repin() - Check whether the VM does have userptrs
379 * that need repinning.
382 * This function checks for whether the VM has userptrs that need repinning,
383 * and provides a release-type barrier on the userptr.notifier_lock after
386 * Return: 0 if there are no userptrs needing repinning, -EAGAIN if there are.
388 int __xe_vm_userptr_needs_repin(struct xe_vm *vm)
390 lockdep_assert_held_read(&vm->userptr.notifier_lock);
392 return (list_empty(&vm->userptr.repin_list) &&
393 list_empty(&vm->userptr.invalidated)) ? 0 : -EAGAIN;
397 * xe_vm_lock_dma_resv() - Lock the vm dma_resv object and the dma_resv
398 * objects of the vm's external buffer objects.
400 * @ww: Pointer to a struct ww_acquire_ctx locking context.
401 * @tv_onstack: Array size XE_ONSTACK_TV of storage for the struct
402 * ttm_validate_buffers used for locking.
403 * @tv: Pointer to a pointer that on output contains the actual storage used.
404 * @objs: List head for the buffer objects locked.
405 * @intr: Whether to lock interruptible.
406 * @num_shared: Number of dma-fence slots to reserve in the locked objects.
408 * Locks the vm dma-resv objects and all the dma-resv objects of the
409 * buffer objects on the vm external object list. The TTM utilities require
410 * a list of struct ttm_validate_buffers pointing to the actual buffer
411 * objects to lock. Storage for those struct ttm_validate_buffers should
412 * be provided in @tv_onstack, and is typically reserved on the stack
413 * of the caller. If the size of @tv_onstack isn't sufficient, then
414 * storage will be allocated internally using kvmalloc().
416 * The function performs deadlock handling internally, and after a
417 * successful return the ww locking transaction should be considered
420 * Return: 0 on success, Negative error code on error. In particular if
421 * @intr is set to true, -EINTR or -ERESTARTSYS may be returned. In case
422 * of error, any locking performed has been reverted.
424 int xe_vm_lock_dma_resv(struct xe_vm *vm, struct ww_acquire_ctx *ww,
425 struct ttm_validate_buffer *tv_onstack,
426 struct ttm_validate_buffer **tv,
427 struct list_head *objs,
429 unsigned int num_shared)
431 struct ttm_validate_buffer *tv_vm, *tv_bo;
432 struct xe_vma *vma, *next;
436 lockdep_assert_held(&vm->lock);
438 if (vm->extobj.entries < XE_ONSTACK_TV) {
441 tv_vm = kvmalloc_array(vm->extobj.entries + 1, sizeof(*tv_vm),
448 INIT_LIST_HEAD(objs);
449 list_for_each_entry(vma, &vm->extobj.list, extobj.link) {
450 tv_bo->num_shared = num_shared;
451 tv_bo->bo = &xe_vma_bo(vma)->ttm;
453 list_add_tail(&tv_bo->head, objs);
456 tv_vm->num_shared = num_shared;
457 tv_vm->bo = xe_vm_ttm_bo(vm);
458 list_add_tail(&tv_vm->head, objs);
459 err = ttm_eu_reserve_buffers(ww, objs, intr, &dups);
463 spin_lock(&vm->notifier.list_lock);
464 list_for_each_entry_safe(vma, next, &vm->notifier.rebind_list,
465 notifier.rebind_link) {
466 xe_bo_assert_held(xe_vma_bo(vma));
468 list_del_init(&vma->notifier.rebind_link);
469 if (vma->tile_present && !(vma->gpuva.flags & XE_VMA_DESTROYED))
470 list_move_tail(&vma->combined_links.rebind,
473 spin_unlock(&vm->notifier.list_lock);
479 if (tv_vm != tv_onstack)
486 * xe_vm_unlock_dma_resv() - Unlock reservation objects locked by
487 * xe_vm_lock_dma_resv()
489 * @tv_onstack: The @tv_onstack array given to xe_vm_lock_dma_resv().
490 * @tv: The value of *@tv given by xe_vm_lock_dma_resv().
491 * @ww: The ww_acquire_context used for locking.
492 * @objs: The list returned from xe_vm_lock_dma_resv().
494 * Unlocks the reservation objects and frees any memory allocated by
495 * xe_vm_lock_dma_resv().
497 void xe_vm_unlock_dma_resv(struct xe_vm *vm,
498 struct ttm_validate_buffer *tv_onstack,
499 struct ttm_validate_buffer *tv,
500 struct ww_acquire_ctx *ww,
501 struct list_head *objs)
504 * Nothing should've been able to enter the list while we were locked,
505 * since we've held the dma-resvs of all the vm's external objects,
506 * and holding the dma_resv of an object is required for list
507 * addition, and we shouldn't add ourselves.
509 XE_WARN_ON(!list_empty(&vm->notifier.rebind_list));
511 ttm_eu_backoff_reservation(ww, objs);
512 if (tv && tv != tv_onstack)
516 #define XE_VM_REBIND_RETRY_TIMEOUT_MS 1000
518 static void xe_vm_kill(struct xe_vm *vm)
520 struct ww_acquire_ctx ww;
523 lockdep_assert_held(&vm->lock);
525 xe_vm_lock(vm, &ww, 0, false);
526 vm->flags |= XE_VM_FLAG_BANNED;
527 trace_xe_vm_kill(vm);
529 list_for_each_entry(e, &vm->preempt.engines, compute.link)
531 xe_vm_unlock(vm, &ww);
533 /* TODO: Inform user the VM is banned */
536 static void preempt_rebind_work_func(struct work_struct *w)
538 struct xe_vm *vm = container_of(w, struct xe_vm, preempt.rebind_work);
540 struct ttm_validate_buffer tv_onstack[XE_ONSTACK_TV];
541 struct ttm_validate_buffer *tv;
542 struct ww_acquire_ctx ww;
543 struct list_head objs;
544 struct dma_fence *rebind_fence;
545 unsigned int fence_count = 0;
546 LIST_HEAD(preempt_fences);
550 int __maybe_unused tries = 0;
552 XE_BUG_ON(!xe_vm_in_compute_mode(vm));
553 trace_xe_vm_rebind_worker_enter(vm);
555 down_write(&vm->lock);
557 if (xe_vm_is_closed_or_banned(vm)) {
559 trace_xe_vm_rebind_worker_exit(vm);
564 if (vm->async_ops.error)
565 goto out_unlock_outer;
568 * Extreme corner where we exit a VM error state with a munmap style VM
569 * unbind inflight which requires a rebind. In this case the rebind
570 * needs to install some fences into the dma-resv slots. The worker to
571 * do this queued, let that worker make progress by dropping vm->lock
572 * and trying this again.
574 if (vm->async_ops.munmap_rebind_inflight) {
576 flush_work(&vm->async_ops.work);
580 if (xe_vm_userptr_check_repin(vm)) {
581 err = xe_vm_userptr_pin(vm);
583 goto out_unlock_outer;
586 err = xe_vm_lock_dma_resv(vm, &ww, tv_onstack, &tv, &objs,
587 false, vm->preempt.num_engines);
589 goto out_unlock_outer;
591 if (xe_vm_is_idle(vm)) {
592 vm->preempt.rebind_deactivated = true;
596 /* Fresh preempt fences already installed. Everyting is running. */
597 if (!preempt_fences_waiting(vm))
601 * This makes sure vm is completely suspended and also balances
602 * xe_engine suspend- and resume; we resume *all* vm engines below.
604 err = wait_for_existing_preempt_fences(vm);
608 err = alloc_preempt_fences(vm, &preempt_fences, &fence_count);
612 list_for_each_entry(vma, &vm->rebind_list, combined_links.rebind) {
613 if (xe_vma_has_no_bo(vma) ||
614 vma->gpuva.flags & XE_VMA_DESTROYED)
617 err = xe_bo_validate(xe_vma_bo(vma), vm, false);
622 rebind_fence = xe_vm_rebind(vm, true);
623 if (IS_ERR(rebind_fence)) {
624 err = PTR_ERR(rebind_fence);
629 dma_fence_wait(rebind_fence, false);
630 dma_fence_put(rebind_fence);
633 /* Wait on munmap style VM unbinds */
634 wait = dma_resv_wait_timeout(xe_vm_resv(vm),
635 DMA_RESV_USAGE_KERNEL,
636 false, MAX_SCHEDULE_TIMEOUT);
642 #define retry_required(__tries, __vm) \
643 (IS_ENABLED(CONFIG_DRM_XE_USERPTR_INVAL_INJECT) ? \
644 (!(__tries)++ || __xe_vm_userptr_needs_repin(__vm)) : \
645 __xe_vm_userptr_needs_repin(__vm))
647 down_read(&vm->userptr.notifier_lock);
648 if (retry_required(tries, vm)) {
649 up_read(&vm->userptr.notifier_lock);
654 #undef retry_required
656 spin_lock(&vm->xe->ttm.lru_lock);
657 ttm_lru_bulk_move_tail(&vm->lru_bulk_move);
658 spin_unlock(&vm->xe->ttm.lru_lock);
660 /* Point of no return. */
661 arm_preempt_fences(vm, &preempt_fences);
662 resume_and_reinstall_preempt_fences(vm);
663 up_read(&vm->userptr.notifier_lock);
666 xe_vm_unlock_dma_resv(vm, tv_onstack, tv, &ww, &objs);
668 if (err == -EAGAIN) {
669 trace_xe_vm_rebind_worker_retry(vm);
674 * With multiple active VMs, under memory pressure, it is possible that
675 * ttm_bo_validate() run into -EDEADLK and in such case returns -ENOMEM.
676 * Until ttm properly handles locking in such scenarios, best thing the
677 * driver can do is retry with a timeout. Killing the VM or putting it
678 * in error state after timeout or other error scenarios is still TBD.
680 if (err == -ENOMEM) {
681 ktime_t cur = ktime_get();
683 end = end ? : ktime_add_ms(cur, XE_VM_REBIND_RETRY_TIMEOUT_MS);
684 if (ktime_before(cur, end)) {
686 trace_xe_vm_rebind_worker_retry(vm);
691 drm_warn(&vm->xe->drm, "VM worker error: %d\n", err);
696 free_preempt_fences(&preempt_fences);
698 trace_xe_vm_rebind_worker_exit(vm);
701 static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni,
702 const struct mmu_notifier_range *range,
703 unsigned long cur_seq)
705 struct xe_vma *vma = container_of(mni, struct xe_vma, userptr.notifier);
706 struct xe_vm *vm = xe_vma_vm(vma);
707 struct dma_resv_iter cursor;
708 struct dma_fence *fence;
711 XE_BUG_ON(!xe_vma_is_userptr(vma));
712 trace_xe_vma_userptr_invalidate(vma);
714 if (!mmu_notifier_range_blockable(range))
717 down_write(&vm->userptr.notifier_lock);
718 mmu_interval_set_seq(mni, cur_seq);
720 /* No need to stop gpu access if the userptr is not yet bound. */
721 if (!vma->userptr.initial_bind) {
722 up_write(&vm->userptr.notifier_lock);
727 * Tell exec and rebind worker they need to repin and rebind this
730 if (!xe_vm_in_fault_mode(vm) &&
731 !(vma->gpuva.flags & XE_VMA_DESTROYED) && vma->tile_present) {
732 spin_lock(&vm->userptr.invalidated_lock);
733 list_move_tail(&vma->userptr.invalidate_link,
734 &vm->userptr.invalidated);
735 spin_unlock(&vm->userptr.invalidated_lock);
738 up_write(&vm->userptr.notifier_lock);
741 * Preempt fences turn into schedule disables, pipeline these.
742 * Note that even in fault mode, we need to wait for binds and
743 * unbinds to complete, and those are attached as BOOKMARK fences
746 dma_resv_iter_begin(&cursor, xe_vm_resv(vm),
747 DMA_RESV_USAGE_BOOKKEEP);
748 dma_resv_for_each_fence_unlocked(&cursor, fence)
749 dma_fence_enable_sw_signaling(fence);
750 dma_resv_iter_end(&cursor);
752 err = dma_resv_wait_timeout(xe_vm_resv(vm),
753 DMA_RESV_USAGE_BOOKKEEP,
754 false, MAX_SCHEDULE_TIMEOUT);
755 XE_WARN_ON(err <= 0);
757 if (xe_vm_in_fault_mode(vm)) {
758 err = xe_vm_invalidate_vma(vma);
762 trace_xe_vma_userptr_invalidate_complete(vma);
767 static const struct mmu_interval_notifier_ops vma_userptr_notifier_ops = {
768 .invalidate = vma_userptr_invalidate,
771 int xe_vm_userptr_pin(struct xe_vm *vm)
773 struct xe_vma *vma, *next;
775 LIST_HEAD(tmp_evict);
777 lockdep_assert_held_write(&vm->lock);
779 /* Collect invalidated userptrs */
780 spin_lock(&vm->userptr.invalidated_lock);
781 list_for_each_entry_safe(vma, next, &vm->userptr.invalidated,
782 userptr.invalidate_link) {
783 list_del_init(&vma->userptr.invalidate_link);
784 if (list_empty(&vma->combined_links.userptr))
785 list_move_tail(&vma->combined_links.userptr,
786 &vm->userptr.repin_list);
788 spin_unlock(&vm->userptr.invalidated_lock);
790 /* Pin and move to temporary list */
791 list_for_each_entry_safe(vma, next, &vm->userptr.repin_list,
792 combined_links.userptr) {
793 err = xe_vma_userptr_pin_pages(vma);
797 list_move_tail(&vma->combined_links.userptr, &tmp_evict);
800 /* Take lock and move to rebind_list for rebinding. */
801 err = dma_resv_lock_interruptible(xe_vm_resv(vm), NULL);
805 list_for_each_entry_safe(vma, next, &tmp_evict, combined_links.userptr)
806 list_move_tail(&vma->combined_links.rebind, &vm->rebind_list);
808 dma_resv_unlock(xe_vm_resv(vm));
813 list_splice_tail(&tmp_evict, &vm->userptr.repin_list);
819 * xe_vm_userptr_check_repin() - Check whether the VM might have userptrs
820 * that need repinning.
823 * This function does an advisory check for whether the VM has userptrs that
826 * Return: 0 if there are no indications of userptrs needing repinning,
827 * -EAGAIN if there are.
829 int xe_vm_userptr_check_repin(struct xe_vm *vm)
831 return (list_empty_careful(&vm->userptr.repin_list) &&
832 list_empty_careful(&vm->userptr.invalidated)) ? 0 : -EAGAIN;
835 static struct dma_fence *
836 xe_vm_bind_vma(struct xe_vma *vma, struct xe_engine *e,
837 struct xe_sync_entry *syncs, u32 num_syncs,
838 bool first_op, bool last_op);
840 struct dma_fence *xe_vm_rebind(struct xe_vm *vm, bool rebind_worker)
842 struct dma_fence *fence = NULL;
843 struct xe_vma *vma, *next;
845 lockdep_assert_held(&vm->lock);
846 if (xe_vm_no_dma_fences(vm) && !rebind_worker)
849 xe_vm_assert_held(vm);
850 list_for_each_entry_safe(vma, next, &vm->rebind_list,
851 combined_links.rebind) {
852 XE_WARN_ON(!vma->tile_present);
854 list_del_init(&vma->combined_links.rebind);
855 dma_fence_put(fence);
857 trace_xe_vma_rebind_worker(vma);
859 trace_xe_vma_rebind_exec(vma);
860 fence = xe_vm_bind_vma(vma, NULL, NULL, 0, false, false);
868 static struct xe_vma *xe_vma_create(struct xe_vm *vm,
870 u64 bo_offset_or_userptr,
877 struct xe_tile *tile;
880 XE_BUG_ON(start >= end);
881 XE_BUG_ON(end >= vm->size);
883 vma = kzalloc(sizeof(*vma), GFP_KERNEL);
885 vma = ERR_PTR(-ENOMEM);
889 INIT_LIST_HEAD(&vma->combined_links.rebind);
890 INIT_LIST_HEAD(&vma->userptr.invalidate_link);
891 INIT_LIST_HEAD(&vma->notifier.rebind_link);
892 INIT_LIST_HEAD(&vma->extobj.link);
894 INIT_LIST_HEAD(&vma->gpuva.gem.entry);
895 vma->gpuva.vm = &vm->gpuvm;
896 vma->gpuva.va.addr = start;
897 vma->gpuva.va.range = end - start + 1;
899 vma->gpuva.flags |= XE_VMA_READ_ONLY;
901 vma->gpuva.flags |= DRM_GPUVA_SPARSE;
904 vma->tile_mask = tile_mask;
906 for_each_tile(tile, vm->xe, id)
907 vma->tile_mask |= 0x1 << id;
910 if (vm->xe->info.platform == XE_PVC)
911 vma->gpuva.flags |= XE_VMA_ATOMIC_PTE_BIT;
914 struct drm_gpuvm_bo *vm_bo;
916 xe_bo_assert_held(bo);
918 vm_bo = drm_gpuvm_bo_obtain(vma->gpuva.vm, &bo->ttm.base);
921 return ERR_CAST(vm_bo);
924 drm_gem_object_get(&bo->ttm.base);
925 vma->gpuva.gem.obj = &bo->ttm.base;
926 vma->gpuva.gem.offset = bo_offset_or_userptr;
927 drm_gpuva_link(&vma->gpuva, vm_bo);
928 drm_gpuvm_bo_put(vm_bo);
929 } else /* userptr or null */ {
931 u64 size = end - start + 1;
934 vma->gpuva.gem.offset = bo_offset_or_userptr;
936 err = mmu_interval_notifier_insert(&vma->userptr.notifier,
938 xe_vma_userptr(vma), size,
939 &vma_userptr_notifier_ops);
946 vma->userptr.notifier_seq = LONG_MAX;
955 static bool vm_remove_extobj(struct xe_vma *vma)
957 if (!list_empty(&vma->extobj.link)) {
958 xe_vma_vm(vma)->extobj.entries--;
959 list_del_init(&vma->extobj.link);
965 static void xe_vma_destroy_late(struct xe_vma *vma)
967 struct xe_vm *vm = xe_vma_vm(vma);
968 struct xe_device *xe = vm->xe;
969 bool read_only = xe_vma_read_only(vma);
971 if (xe_vma_is_userptr(vma)) {
972 if (vma->userptr.sg) {
973 dma_unmap_sgtable(xe->drm.dev,
975 read_only ? DMA_TO_DEVICE :
976 DMA_BIDIRECTIONAL, 0);
977 sg_free_table(vma->userptr.sg);
978 vma->userptr.sg = NULL;
982 * Since userptr pages are not pinned, we can't remove
983 * the notifer until we're sure the GPU is not accessing
986 mmu_interval_notifier_remove(&vma->userptr.notifier);
988 } else if (xe_vma_is_null(vma)) {
991 xe_bo_put(xe_vma_bo(vma));
997 static void vma_destroy_work_func(struct work_struct *w)
1000 container_of(w, struct xe_vma, destroy_work);
1002 xe_vma_destroy_late(vma);
1005 static struct xe_vma *
1006 bo_has_vm_references_locked(struct xe_bo *bo, struct xe_vm *vm,
1007 struct xe_vma *ignore)
1009 struct drm_gpuvm_bo *vm_bo;
1010 struct drm_gpuva *va;
1011 struct drm_gem_object *obj = &bo->ttm.base;
1013 xe_bo_assert_held(bo);
1015 drm_gem_for_each_gpuvm_bo(vm_bo, obj) {
1016 drm_gpuvm_bo_for_each_va(va, vm_bo) {
1017 struct xe_vma *vma = gpuva_to_vma(va);
1019 if (vma != ignore && xe_vma_vm(vma) == vm)
1027 static bool bo_has_vm_references(struct xe_bo *bo, struct xe_vm *vm,
1028 struct xe_vma *ignore)
1030 struct ww_acquire_ctx ww;
1033 xe_bo_lock(bo, &ww, 0, false);
1034 ret = !!bo_has_vm_references_locked(bo, vm, ignore);
1035 xe_bo_unlock(bo, &ww);
1040 static void __vm_insert_extobj(struct xe_vm *vm, struct xe_vma *vma)
1042 lockdep_assert_held_write(&vm->lock);
1044 list_add(&vma->extobj.link, &vm->extobj.list);
1045 vm->extobj.entries++;
1048 static void vm_insert_extobj(struct xe_vm *vm, struct xe_vma *vma)
1050 struct xe_bo *bo = xe_vma_bo(vma);
1052 lockdep_assert_held_write(&vm->lock);
1054 if (bo_has_vm_references(bo, vm, vma))
1057 __vm_insert_extobj(vm, vma);
1060 static void vma_destroy_cb(struct dma_fence *fence,
1061 struct dma_fence_cb *cb)
1063 struct xe_vma *vma = container_of(cb, struct xe_vma, destroy_cb);
1065 INIT_WORK(&vma->destroy_work, vma_destroy_work_func);
1066 queue_work(system_unbound_wq, &vma->destroy_work);
1069 static void xe_vma_destroy(struct xe_vma *vma, struct dma_fence *fence)
1071 struct xe_vm *vm = xe_vma_vm(vma);
1073 lockdep_assert_held_write(&vm->lock);
1074 XE_BUG_ON(!list_empty(&vma->combined_links.destroy));
1076 if (xe_vma_is_userptr(vma)) {
1077 XE_WARN_ON(!(vma->gpuva.flags & XE_VMA_DESTROYED));
1079 spin_lock(&vm->userptr.invalidated_lock);
1080 list_del_init(&vma->userptr.invalidate_link);
1081 spin_unlock(&vm->userptr.invalidated_lock);
1082 } else if (!xe_vma_is_null(vma)) {
1083 xe_bo_assert_held(xe_vma_bo(vma));
1085 spin_lock(&vm->notifier.list_lock);
1086 list_del(&vma->notifier.rebind_link);
1087 spin_unlock(&vm->notifier.list_lock);
1089 drm_gpuva_unlink(&vma->gpuva);
1091 if (!xe_vma_bo(vma)->vm && vm_remove_extobj(vma)) {
1092 struct xe_vma *other;
1094 other = bo_has_vm_references_locked(xe_vma_bo(vma), vm, NULL);
1097 __vm_insert_extobj(vm, other);
1101 xe_vm_assert_held(vm);
1103 int ret = dma_fence_add_callback(fence, &vma->destroy_cb,
1107 XE_WARN_ON(ret != -ENOENT);
1108 xe_vma_destroy_late(vma);
1111 xe_vma_destroy_late(vma);
1115 static void xe_vma_destroy_unlocked(struct xe_vma *vma)
1117 struct ttm_validate_buffer tv[2];
1118 struct ww_acquire_ctx ww;
1119 struct xe_bo *bo = xe_vma_bo(vma);
1124 memset(tv, 0, sizeof(tv));
1125 tv[0].bo = xe_vm_ttm_bo(xe_vma_vm(vma));
1126 list_add(&tv[0].head, &objs);
1129 tv[1].bo = &xe_bo_get(bo)->ttm;
1130 list_add(&tv[1].head, &objs);
1132 err = ttm_eu_reserve_buffers(&ww, &objs, false, &dups);
1135 xe_vma_destroy(vma, NULL);
1137 ttm_eu_backoff_reservation(&ww, &objs);
1143 xe_vm_find_overlapping_vma(struct xe_vm *vm, u64 start, u64 range)
1145 struct drm_gpuva *gpuva;
1147 lockdep_assert_held(&vm->lock);
1149 if (xe_vm_is_closed_or_banned(vm))
1152 XE_BUG_ON(start + range > vm->size);
1154 gpuva = drm_gpuva_find_first(&vm->gpuvm, start, range);
1156 return gpuva ? gpuva_to_vma(gpuva) : NULL;
1159 static int xe_vm_insert_vma(struct xe_vm *vm, struct xe_vma *vma)
1163 XE_BUG_ON(xe_vma_vm(vma) != vm);
1164 lockdep_assert_held(&vm->lock);
1166 err = drm_gpuva_insert(&vm->gpuvm, &vma->gpuva);
1167 XE_WARN_ON(err); /* Shouldn't be possible */
1172 static void xe_vm_remove_vma(struct xe_vm *vm, struct xe_vma *vma)
1174 XE_BUG_ON(xe_vma_vm(vma) != vm);
1175 lockdep_assert_held(&vm->lock);
1177 drm_gpuva_remove(&vma->gpuva);
1178 if (vm->usm.last_fault_vma == vma)
1179 vm->usm.last_fault_vma = NULL;
1182 static struct drm_gpuva_op *xe_vm_op_alloc(void)
1184 struct xe_vma_op *op;
1186 op = kzalloc(sizeof(*op), GFP_KERNEL);
1194 static void xe_vm_free(struct drm_gpuvm *gpuvm);
1196 static struct drm_gpuvm_ops gpuvm_ops = {
1197 .op_alloc = xe_vm_op_alloc,
1198 .vm_free = xe_vm_free,
1201 static void xe_vma_op_work_func(struct work_struct *w);
1202 static void vm_destroy_work_func(struct work_struct *w);
1204 struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags)
1206 struct drm_gem_object *vm_resv_obj;
1208 int err, number_tiles = 0;
1209 struct xe_tile *tile;
1212 vm = kzalloc(sizeof(*vm), GFP_KERNEL);
1214 return ERR_PTR(-ENOMEM);
1218 vm->size = 1ull << xe_pt_shift(xe->info.vm_max_level + 1);
1222 init_rwsem(&vm->lock);
1224 INIT_LIST_HEAD(&vm->rebind_list);
1226 INIT_LIST_HEAD(&vm->userptr.repin_list);
1227 INIT_LIST_HEAD(&vm->userptr.invalidated);
1228 init_rwsem(&vm->userptr.notifier_lock);
1229 spin_lock_init(&vm->userptr.invalidated_lock);
1231 INIT_LIST_HEAD(&vm->notifier.rebind_list);
1232 spin_lock_init(&vm->notifier.list_lock);
1234 INIT_LIST_HEAD(&vm->async_ops.pending);
1235 INIT_WORK(&vm->async_ops.work, xe_vma_op_work_func);
1236 spin_lock_init(&vm->async_ops.lock);
1238 INIT_WORK(&vm->destroy_work, vm_destroy_work_func);
1240 INIT_LIST_HEAD(&vm->preempt.engines);
1241 vm->preempt.min_run_period_ms = 10; /* FIXME: Wire up to uAPI */
1243 for_each_tile(tile, xe, id)
1244 xe_range_fence_tree_init(&vm->rftree[id]);
1246 INIT_LIST_HEAD(&vm->extobj.list);
1248 if (!(flags & XE_VM_FLAG_MIGRATION))
1249 xe_device_mem_access_get(xe);
1251 vm_resv_obj = drm_gpuvm_resv_object_alloc(&xe->drm);
1257 drm_gpuvm_init(&vm->gpuvm, "Xe VM", 0, &xe->drm, vm_resv_obj,
1258 0, vm->size, 0, 0, &gpuvm_ops);
1260 drm_gem_object_put(vm_resv_obj);
1262 err = dma_resv_lock_interruptible(xe_vm_resv(vm), NULL);
1266 if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
1267 vm->flags |= XE_VM_FLAG_64K;
1269 for_each_tile(tile, xe, id) {
1270 if (flags & XE_VM_FLAG_MIGRATION &&
1271 tile->id != XE_VM_FLAG_TILE_ID(flags))
1274 vm->pt_root[id] = xe_pt_create(vm, tile, xe->info.vm_max_level);
1275 if (IS_ERR(vm->pt_root[id])) {
1276 err = PTR_ERR(vm->pt_root[id]);
1277 vm->pt_root[id] = NULL;
1278 goto err_unlock_close;
1282 if (flags & XE_VM_FLAG_SCRATCH_PAGE) {
1283 for_each_tile(tile, xe, id) {
1284 if (!vm->pt_root[id])
1287 err = xe_pt_create_scratch(xe, tile, vm);
1289 goto err_unlock_close;
1291 vm->batch_invalidate_tlb = true;
1294 if (flags & XE_VM_FLAG_COMPUTE_MODE) {
1295 INIT_WORK(&vm->preempt.rebind_work, preempt_rebind_work_func);
1296 vm->flags |= XE_VM_FLAG_COMPUTE_MODE;
1297 vm->batch_invalidate_tlb = false;
1300 if (flags & XE_VM_FLAG_ASYNC_BIND_OPS) {
1301 vm->async_ops.fence.context = dma_fence_context_alloc(1);
1302 vm->flags |= XE_VM_FLAG_ASYNC_BIND_OPS;
1305 /* Fill pt_root after allocating scratch tables */
1306 for_each_tile(tile, xe, id) {
1307 if (!vm->pt_root[id])
1310 xe_pt_populate_empty(tile, vm, vm->pt_root[id]);
1312 dma_resv_unlock(xe_vm_resv(vm));
1314 /* Kernel migration VM shouldn't have a circular loop.. */
1315 if (!(flags & XE_VM_FLAG_MIGRATION)) {
1316 for_each_tile(tile, xe, id) {
1317 struct xe_gt *gt = tile->primary_gt;
1318 struct xe_vm *migrate_vm;
1319 struct xe_engine *eng;
1321 if (!vm->pt_root[id])
1324 migrate_vm = xe_migrate_get_vm(tile->migrate);
1325 eng = xe_engine_create_class(xe, gt, migrate_vm,
1326 XE_ENGINE_CLASS_COPY,
1328 xe_vm_put(migrate_vm);
1338 if (number_tiles > 1)
1339 vm->composite_fence_ctx = dma_fence_context_alloc(1);
1341 mutex_lock(&xe->usm.lock);
1342 if (flags & XE_VM_FLAG_FAULT_MODE)
1343 xe->usm.num_vm_in_fault_mode++;
1344 else if (!(flags & XE_VM_FLAG_MIGRATION))
1345 xe->usm.num_vm_in_non_fault_mode++;
1346 mutex_unlock(&xe->usm.lock);
1348 trace_xe_vm_create(vm);
1353 dma_resv_unlock(xe_vm_resv(vm));
1355 xe_vm_close_and_put(vm);
1356 return ERR_PTR(err);
1359 for_each_tile(tile, xe, id)
1360 xe_range_fence_tree_fini(&vm->rftree[id]);
1362 if (!(flags & XE_VM_FLAG_MIGRATION))
1363 xe_device_mem_access_put(xe);
1364 return ERR_PTR(err);
1367 static void flush_async_ops(struct xe_vm *vm)
1369 queue_work(system_unbound_wq, &vm->async_ops.work);
1370 flush_work(&vm->async_ops.work);
1373 static void vm_error_capture(struct xe_vm *vm, int err,
1374 u32 op, u64 addr, u64 size)
1376 struct drm_xe_vm_bind_op_error_capture capture;
1377 u64 __user *address =
1378 u64_to_user_ptr(vm->async_ops.error_capture.addr);
1379 bool in_kthread = !current->mm;
1381 capture.error = err;
1383 capture.addr = addr;
1384 capture.size = size;
1387 if (!mmget_not_zero(vm->async_ops.error_capture.mm))
1389 kthread_use_mm(vm->async_ops.error_capture.mm);
1392 if (copy_to_user(address, &capture, sizeof(capture)))
1393 XE_WARN_ON("Copy to user failed");
1396 kthread_unuse_mm(vm->async_ops.error_capture.mm);
1397 mmput(vm->async_ops.error_capture.mm);
1401 wake_up_all(&vm->async_ops.error_capture.wq);
1404 static void xe_vm_close(struct xe_vm *vm)
1406 down_write(&vm->lock);
1408 up_write(&vm->lock);
1411 void xe_vm_close_and_put(struct xe_vm *vm)
1413 LIST_HEAD(contested);
1414 struct ww_acquire_ctx ww;
1415 struct xe_device *xe = vm->xe;
1416 struct xe_tile *tile;
1417 struct xe_vma *vma, *next_vma;
1418 struct drm_gpuva *gpuva, *next;
1421 XE_BUG_ON(vm->preempt.num_engines);
1424 flush_async_ops(vm);
1425 if (xe_vm_in_compute_mode(vm))
1426 flush_work(&vm->preempt.rebind_work);
1428 for_each_tile(tile, xe, id) {
1430 xe_engine_kill(vm->eng[id]);
1431 xe_engine_put(vm->eng[id]);
1436 down_write(&vm->lock);
1437 xe_vm_lock(vm, &ww, 0, false);
1438 drm_gpuvm_for_each_va_safe(gpuva, next, &vm->gpuvm) {
1439 vma = gpuva_to_vma(gpuva);
1441 if (xe_vma_has_no_bo(vma)) {
1442 down_read(&vm->userptr.notifier_lock);
1443 vma->gpuva.flags |= XE_VMA_DESTROYED;
1444 up_read(&vm->userptr.notifier_lock);
1447 xe_vm_remove_vma(vm, vma);
1449 /* easy case, remove from VMA? */
1450 if (xe_vma_has_no_bo(vma) || xe_vma_bo(vma)->vm) {
1451 list_del_init(&vma->combined_links.rebind);
1452 xe_vma_destroy(vma, NULL);
1456 list_move_tail(&vma->combined_links.destroy, &contested);
1460 * All vm operations will add shared fences to resv.
1461 * The only exception is eviction for a shared object,
1462 * but even so, the unbind when evicted would still
1463 * install a fence to resv. Hence it's safe to
1464 * destroy the pagetables immediately.
1466 for_each_tile(tile, xe, id) {
1467 if (vm->scratch_bo[id]) {
1470 xe_bo_unpin(vm->scratch_bo[id]);
1471 xe_bo_put(vm->scratch_bo[id]);
1472 for (i = 0; i < vm->pt_root[id]->level; i++)
1473 xe_pt_destroy(vm->scratch_pt[id][i], vm->flags,
1476 if (vm->pt_root[id]) {
1477 xe_pt_destroy(vm->pt_root[id], vm->flags, NULL);
1478 vm->pt_root[id] = NULL;
1481 xe_vm_unlock(vm, &ww);
1484 * VM is now dead, cannot re-add nodes to vm->vmas if it's NULL
1485 * Since we hold a refcount to the bo, we can remove and free
1486 * the members safely without locking.
1488 list_for_each_entry_safe(vma, next_vma, &contested,
1489 combined_links.destroy) {
1490 list_del_init(&vma->combined_links.destroy);
1491 xe_vma_destroy_unlocked(vma);
1494 if (vm->async_ops.error_capture.addr)
1495 wake_up_all(&vm->async_ops.error_capture.wq);
1497 XE_WARN_ON(!list_empty(&vm->extobj.list));
1498 up_write(&vm->lock);
1500 mutex_lock(&xe->usm.lock);
1501 if (vm->flags & XE_VM_FLAG_FAULT_MODE)
1502 xe->usm.num_vm_in_fault_mode--;
1503 else if (!(vm->flags & XE_VM_FLAG_MIGRATION))
1504 xe->usm.num_vm_in_non_fault_mode--;
1505 mutex_unlock(&xe->usm.lock);
1507 for_each_tile(tile, xe, id)
1508 xe_range_fence_tree_fini(&vm->rftree[id]);
1513 static void vm_destroy_work_func(struct work_struct *w)
1516 container_of(w, struct xe_vm, destroy_work);
1517 struct xe_device *xe = vm->xe;
1518 struct xe_tile *tile;
1522 /* xe_vm_close_and_put was not called? */
1523 XE_WARN_ON(vm->size);
1525 if (!(vm->flags & XE_VM_FLAG_MIGRATION)) {
1526 xe_device_mem_access_put(xe);
1528 if (xe->info.has_asid) {
1529 mutex_lock(&xe->usm.lock);
1530 lookup = xa_erase(&xe->usm.asid_to_vm, vm->usm.asid);
1531 XE_WARN_ON(lookup != vm);
1532 mutex_unlock(&xe->usm.lock);
1536 for_each_tile(tile, xe, id)
1537 XE_WARN_ON(vm->pt_root[id]);
1539 trace_xe_vm_free(vm);
1540 dma_fence_put(vm->rebind_fence);
1544 static void xe_vm_free(struct drm_gpuvm *gpuvm)
1546 struct xe_vm *vm = container_of(gpuvm, struct xe_vm, gpuvm);
1548 /* To destroy the VM we need to be able to sleep */
1549 queue_work(system_unbound_wq, &vm->destroy_work);
1552 struct xe_vm *xe_vm_lookup(struct xe_file *xef, u32 id)
1556 mutex_lock(&xef->vm.lock);
1557 vm = xa_load(&xef->vm.xa, id);
1560 mutex_unlock(&xef->vm.lock);
1565 u64 xe_vm_pdp4_descriptor(struct xe_vm *vm, struct xe_tile *tile)
1567 return xe_pde_encode(vm->pt_root[tile->id]->bo, 0,
1571 static struct dma_fence *
1572 xe_vm_unbind_vma(struct xe_vma *vma, struct xe_engine *e,
1573 struct xe_sync_entry *syncs, u32 num_syncs,
1574 bool first_op, bool last_op)
1576 struct xe_tile *tile;
1577 struct dma_fence *fence = NULL;
1578 struct dma_fence **fences = NULL;
1579 struct dma_fence_array *cf = NULL;
1580 struct xe_vm *vm = xe_vma_vm(vma);
1581 int cur_fence = 0, i;
1582 int number_tiles = hweight_long(vma->tile_present);
1586 trace_xe_vma_unbind(vma);
1588 if (number_tiles > 1) {
1589 fences = kmalloc_array(number_tiles, sizeof(*fences),
1592 return ERR_PTR(-ENOMEM);
1595 for_each_tile(tile, vm->xe, id) {
1596 if (!(vma->tile_present & BIT(id)))
1599 fence = __xe_pt_unbind_vma(tile, vma, e, first_op ? syncs : NULL,
1600 first_op ? num_syncs : 0);
1601 if (IS_ERR(fence)) {
1602 err = PTR_ERR(fence);
1607 fences[cur_fence++] = fence;
1610 if (e && vm->pt_root[id] && !list_empty(&e->multi_gt_list))
1611 e = list_next_entry(e, multi_gt_list);
1615 cf = dma_fence_array_create(number_tiles, fences,
1616 vm->composite_fence_ctx,
1617 vm->composite_fence_seqno++,
1620 --vm->composite_fence_seqno;
1627 for (i = 0; i < num_syncs; i++)
1628 xe_sync_entry_signal(&syncs[i], NULL,
1629 cf ? &cf->base : fence);
1632 return cf ? &cf->base : !fence ? dma_fence_get_stub() : fence;
1637 /* FIXME: Rewind the previous binds? */
1638 dma_fence_put(fences[--cur_fence]);
1643 return ERR_PTR(err);
1646 static struct dma_fence *
1647 xe_vm_bind_vma(struct xe_vma *vma, struct xe_engine *e,
1648 struct xe_sync_entry *syncs, u32 num_syncs,
1649 bool first_op, bool last_op)
1651 struct xe_tile *tile;
1652 struct dma_fence *fence;
1653 struct dma_fence **fences = NULL;
1654 struct dma_fence_array *cf = NULL;
1655 struct xe_vm *vm = xe_vma_vm(vma);
1656 int cur_fence = 0, i;
1657 int number_tiles = hweight_long(vma->tile_mask);
1661 trace_xe_vma_bind(vma);
1663 if (number_tiles > 1) {
1664 fences = kmalloc_array(number_tiles, sizeof(*fences),
1667 return ERR_PTR(-ENOMEM);
1670 for_each_tile(tile, vm->xe, id) {
1671 if (!(vma->tile_mask & BIT(id)))
1674 fence = __xe_pt_bind_vma(tile, vma, e, first_op ? syncs : NULL,
1675 first_op ? num_syncs : 0,
1676 vma->tile_present & BIT(id));
1677 if (IS_ERR(fence)) {
1678 err = PTR_ERR(fence);
1683 fences[cur_fence++] = fence;
1686 if (e && vm->pt_root[id] && !list_empty(&e->multi_gt_list))
1687 e = list_next_entry(e, multi_gt_list);
1691 cf = dma_fence_array_create(number_tiles, fences,
1692 vm->composite_fence_ctx,
1693 vm->composite_fence_seqno++,
1696 --vm->composite_fence_seqno;
1703 for (i = 0; i < num_syncs; i++)
1704 xe_sync_entry_signal(&syncs[i], NULL,
1705 cf ? &cf->base : fence);
1708 return cf ? &cf->base : fence;
1713 /* FIXME: Rewind the previous binds? */
1714 dma_fence_put(fences[--cur_fence]);
1719 return ERR_PTR(err);
1722 struct async_op_fence {
1723 struct dma_fence fence;
1724 struct dma_fence *wait_fence;
1725 struct dma_fence_cb cb;
1727 wait_queue_head_t wq;
1731 static const char *async_op_fence_get_driver_name(struct dma_fence *dma_fence)
1737 async_op_fence_get_timeline_name(struct dma_fence *dma_fence)
1739 return "async_op_fence";
1742 static const struct dma_fence_ops async_op_fence_ops = {
1743 .get_driver_name = async_op_fence_get_driver_name,
1744 .get_timeline_name = async_op_fence_get_timeline_name,
1747 static void async_op_fence_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
1749 struct async_op_fence *afence =
1750 container_of(cb, struct async_op_fence, cb);
1752 afence->fence.error = afence->wait_fence->error;
1753 dma_fence_signal(&afence->fence);
1754 xe_vm_put(afence->vm);
1755 dma_fence_put(afence->wait_fence);
1756 dma_fence_put(&afence->fence);
1759 static void add_async_op_fence_cb(struct xe_vm *vm,
1760 struct dma_fence *fence,
1761 struct async_op_fence *afence)
1765 if (!xe_vm_no_dma_fences(vm)) {
1766 afence->started = true;
1768 wake_up_all(&afence->wq);
1771 afence->wait_fence = dma_fence_get(fence);
1772 afence->vm = xe_vm_get(vm);
1773 dma_fence_get(&afence->fence);
1774 ret = dma_fence_add_callback(fence, &afence->cb, async_op_fence_cb);
1775 if (ret == -ENOENT) {
1776 afence->fence.error = afence->wait_fence->error;
1777 dma_fence_signal(&afence->fence);
1781 dma_fence_put(afence->wait_fence);
1782 dma_fence_put(&afence->fence);
1784 XE_WARN_ON(ret && ret != -ENOENT);
1787 int xe_vm_async_fence_wait_start(struct dma_fence *fence)
1789 if (fence->ops == &async_op_fence_ops) {
1790 struct async_op_fence *afence =
1791 container_of(fence, struct async_op_fence, fence);
1793 XE_BUG_ON(xe_vm_no_dma_fences(afence->vm));
1796 return wait_event_interruptible(afence->wq, afence->started);
1802 static int __xe_vm_bind(struct xe_vm *vm, struct xe_vma *vma,
1803 struct xe_engine *e, struct xe_sync_entry *syncs,
1804 u32 num_syncs, struct async_op_fence *afence,
1805 bool immediate, bool first_op, bool last_op)
1807 struct dma_fence *fence;
1809 xe_vm_assert_held(vm);
1812 fence = xe_vm_bind_vma(vma, e, syncs, num_syncs, first_op,
1815 return PTR_ERR(fence);
1819 XE_BUG_ON(!xe_vm_in_fault_mode(vm));
1821 fence = dma_fence_get_stub();
1823 for (i = 0; i < num_syncs; i++)
1824 xe_sync_entry_signal(&syncs[i], NULL, fence);
1828 add_async_op_fence_cb(vm, fence, afence);
1830 dma_fence_put(fence);
1834 static int xe_vm_bind(struct xe_vm *vm, struct xe_vma *vma, struct xe_engine *e,
1835 struct xe_bo *bo, struct xe_sync_entry *syncs,
1836 u32 num_syncs, struct async_op_fence *afence,
1837 bool immediate, bool first_op, bool last_op)
1841 xe_vm_assert_held(vm);
1842 xe_bo_assert_held(bo);
1844 if (bo && immediate) {
1845 err = xe_bo_validate(bo, vm, true);
1850 return __xe_vm_bind(vm, vma, e, syncs, num_syncs, afence, immediate,
1854 static int xe_vm_unbind(struct xe_vm *vm, struct xe_vma *vma,
1855 struct xe_engine *e, struct xe_sync_entry *syncs,
1856 u32 num_syncs, struct async_op_fence *afence,
1857 bool first_op, bool last_op)
1859 struct dma_fence *fence;
1861 xe_vm_assert_held(vm);
1862 xe_bo_assert_held(xe_vma_bo(vma));
1864 fence = xe_vm_unbind_vma(vma, e, syncs, num_syncs, first_op, last_op);
1866 return PTR_ERR(fence);
1868 add_async_op_fence_cb(vm, fence, afence);
1870 xe_vma_destroy(vma, fence);
1871 dma_fence_put(fence);
1876 static int vm_set_error_capture_address(struct xe_device *xe, struct xe_vm *vm,
1879 if (XE_IOCTL_DBG(xe, !value))
1882 if (XE_IOCTL_DBG(xe, !(vm->flags & XE_VM_FLAG_ASYNC_BIND_OPS)))
1885 if (XE_IOCTL_DBG(xe, vm->async_ops.error_capture.addr))
1888 vm->async_ops.error_capture.mm = current->mm;
1889 vm->async_ops.error_capture.addr = value;
1890 init_waitqueue_head(&vm->async_ops.error_capture.wq);
1895 typedef int (*xe_vm_set_property_fn)(struct xe_device *xe, struct xe_vm *vm,
1898 static const xe_vm_set_property_fn vm_set_property_funcs[] = {
1899 [XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS] =
1900 vm_set_error_capture_address,
1903 static int vm_user_ext_set_property(struct xe_device *xe, struct xe_vm *vm,
1906 u64 __user *address = u64_to_user_ptr(extension);
1907 struct drm_xe_ext_vm_set_property ext;
1910 err = __copy_from_user(&ext, address, sizeof(ext));
1911 if (XE_IOCTL_DBG(xe, err))
1914 if (XE_IOCTL_DBG(xe, ext.property >=
1915 ARRAY_SIZE(vm_set_property_funcs)) ||
1916 XE_IOCTL_DBG(xe, ext.pad) ||
1917 XE_IOCTL_DBG(xe, ext.reserved[0] || ext.reserved[1]))
1920 return vm_set_property_funcs[ext.property](xe, vm, ext.value);
1923 typedef int (*xe_vm_user_extension_fn)(struct xe_device *xe, struct xe_vm *vm,
1926 static const xe_vm_set_property_fn vm_user_extension_funcs[] = {
1927 [XE_VM_EXTENSION_SET_PROPERTY] = vm_user_ext_set_property,
1930 #define MAX_USER_EXTENSIONS 16
1931 static int vm_user_extensions(struct xe_device *xe, struct xe_vm *vm,
1932 u64 extensions, int ext_number)
1934 u64 __user *address = u64_to_user_ptr(extensions);
1935 struct xe_user_extension ext;
1938 if (XE_IOCTL_DBG(xe, ext_number >= MAX_USER_EXTENSIONS))
1941 err = __copy_from_user(&ext, address, sizeof(ext));
1942 if (XE_IOCTL_DBG(xe, err))
1945 if (XE_IOCTL_DBG(xe, ext.pad) ||
1946 XE_IOCTL_DBG(xe, ext.name >=
1947 ARRAY_SIZE(vm_user_extension_funcs)))
1950 err = vm_user_extension_funcs[ext.name](xe, vm, extensions);
1951 if (XE_IOCTL_DBG(xe, err))
1954 if (ext.next_extension)
1955 return vm_user_extensions(xe, vm, ext.next_extension,
1961 #define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_SCRATCH_PAGE | \
1962 DRM_XE_VM_CREATE_COMPUTE_MODE | \
1963 DRM_XE_VM_CREATE_ASYNC_BIND_OPS | \
1964 DRM_XE_VM_CREATE_FAULT_MODE)
1966 int xe_vm_create_ioctl(struct drm_device *dev, void *data,
1967 struct drm_file *file)
1969 struct xe_device *xe = to_xe_device(dev);
1970 struct xe_file *xef = to_xe_file(file);
1971 struct drm_xe_vm_create *args = data;
1977 if (XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
1980 if (XE_IOCTL_DBG(xe, args->flags & ~ALL_DRM_XE_VM_CREATE_FLAGS))
1983 if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE &&
1984 args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
1987 if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE &&
1988 args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
1991 if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
1992 xe_device_in_non_fault_mode(xe)))
1995 if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FAULT_MODE) &&
1996 xe_device_in_fault_mode(xe)))
1999 if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
2000 !xe->info.supports_usm))
2003 if (args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE)
2004 flags |= XE_VM_FLAG_SCRATCH_PAGE;
2005 if (args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE)
2006 flags |= XE_VM_FLAG_COMPUTE_MODE;
2007 if (args->flags & DRM_XE_VM_CREATE_ASYNC_BIND_OPS)
2008 flags |= XE_VM_FLAG_ASYNC_BIND_OPS;
2009 if (args->flags & DRM_XE_VM_CREATE_FAULT_MODE)
2010 flags |= XE_VM_FLAG_FAULT_MODE;
2012 vm = xe_vm_create(xe, flags);
2016 if (args->extensions) {
2017 err = vm_user_extensions(xe, vm, args->extensions, 0);
2018 if (XE_IOCTL_DBG(xe, err)) {
2019 xe_vm_close_and_put(vm);
2024 mutex_lock(&xef->vm.lock);
2025 err = xa_alloc(&xef->vm.xa, &id, vm, xa_limit_32b, GFP_KERNEL);
2026 mutex_unlock(&xef->vm.lock);
2028 xe_vm_close_and_put(vm);
2032 if (xe->info.has_asid) {
2033 mutex_lock(&xe->usm.lock);
2034 err = xa_alloc_cyclic(&xe->usm.asid_to_vm, &asid, vm,
2035 XA_LIMIT(0, XE_MAX_ASID - 1),
2036 &xe->usm.next_asid, GFP_KERNEL);
2037 mutex_unlock(&xe->usm.lock);
2039 xe_vm_close_and_put(vm);
2042 vm->usm.asid = asid;
2047 #if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
2048 /* Warning: Security issue - never enable by default */
2049 args->reserved[0] = xe_bo_main_addr(vm->pt_root[0]->bo, XE_PAGE_SIZE);
2055 int xe_vm_destroy_ioctl(struct drm_device *dev, void *data,
2056 struct drm_file *file)
2058 struct xe_device *xe = to_xe_device(dev);
2059 struct xe_file *xef = to_xe_file(file);
2060 struct drm_xe_vm_destroy *args = data;
2064 if (XE_IOCTL_DBG(xe, args->pad) ||
2065 XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
2068 mutex_lock(&xef->vm.lock);
2069 vm = xa_load(&xef->vm.xa, args->vm_id);
2070 if (XE_IOCTL_DBG(xe, !vm))
2072 else if (XE_IOCTL_DBG(xe, vm->preempt.num_engines))
2075 xa_erase(&xef->vm.xa, args->vm_id);
2076 mutex_unlock(&xef->vm.lock);
2079 xe_vm_close_and_put(vm);
2084 static const u32 region_to_mem_type[] = {
2090 static int xe_vm_prefetch(struct xe_vm *vm, struct xe_vma *vma,
2091 struct xe_engine *e, u32 region,
2092 struct xe_sync_entry *syncs, u32 num_syncs,
2093 struct async_op_fence *afence, bool first_op,
2098 XE_BUG_ON(region > ARRAY_SIZE(region_to_mem_type));
2100 if (!xe_vma_has_no_bo(vma)) {
2101 err = xe_bo_migrate(xe_vma_bo(vma), region_to_mem_type[region]);
2106 if (vma->tile_mask != (vma->tile_present & ~vma->usm.tile_invalidated)) {
2107 return xe_vm_bind(vm, vma, e, xe_vma_bo(vma), syncs, num_syncs,
2108 afence, true, first_op, last_op);
2112 /* Nothing to do, signal fences now */
2114 for (i = 0; i < num_syncs; i++)
2115 xe_sync_entry_signal(&syncs[i], NULL,
2116 dma_fence_get_stub());
2119 dma_fence_signal(&afence->fence);
2124 #define VM_BIND_OP(op) (op & 0xffff)
2126 struct ttm_buffer_object *xe_vm_ttm_bo(struct xe_vm *vm)
2128 int idx = vm->flags & XE_VM_FLAG_MIGRATION ?
2129 XE_VM_FLAG_TILE_ID(vm->flags) : 0;
2131 /* Safe to use index 0 as all BO in the VM share a single dma-resv lock */
2132 return &vm->pt_root[idx]->bo->ttm;
2135 static void xe_vm_tv_populate(struct xe_vm *vm, struct ttm_validate_buffer *tv)
2138 tv->bo = xe_vm_ttm_bo(vm);
2141 static void vm_set_async_error(struct xe_vm *vm, int err)
2143 lockdep_assert_held(&vm->lock);
2144 vm->async_ops.error = err;
2147 static int vm_bind_ioctl_lookup_vma(struct xe_vm *vm, struct xe_bo *bo,
2148 u64 addr, u64 range, u32 op)
2150 struct xe_device *xe = vm->xe;
2152 bool async = !!(op & XE_VM_BIND_FLAG_ASYNC);
2154 lockdep_assert_held(&vm->lock);
2156 switch (VM_BIND_OP(op)) {
2157 case XE_VM_BIND_OP_MAP:
2158 case XE_VM_BIND_OP_MAP_USERPTR:
2159 vma = xe_vm_find_overlapping_vma(vm, addr, range);
2160 if (XE_IOCTL_DBG(xe, vma && !async))
2163 case XE_VM_BIND_OP_UNMAP:
2164 case XE_VM_BIND_OP_PREFETCH:
2165 vma = xe_vm_find_overlapping_vma(vm, addr, range);
2166 if (XE_IOCTL_DBG(xe, !vma))
2167 /* Not an actual error, IOCTL cleans up returns and 0 */
2169 if (XE_IOCTL_DBG(xe, (xe_vma_start(vma) != addr ||
2170 xe_vma_end(vma) != addr + range) && !async))
2173 case XE_VM_BIND_OP_UNMAP_ALL:
2174 if (XE_IOCTL_DBG(xe, list_empty(&bo->ttm.base.gpuva.list)))
2175 /* Not an actual error, IOCTL cleans up returns and 0 */
2179 XE_BUG_ON("NOT POSSIBLE");
2186 static void prep_vma_destroy(struct xe_vm *vm, struct xe_vma *vma,
2189 down_read(&vm->userptr.notifier_lock);
2190 vma->gpuva.flags |= XE_VMA_DESTROYED;
2191 up_read(&vm->userptr.notifier_lock);
2193 xe_vm_remove_vma(vm, vma);
2197 #define ULL unsigned long long
2199 #if IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM)
2200 static void print_op(struct xe_device *xe, struct drm_gpuva_op *op)
2205 case DRM_GPUVA_OP_MAP:
2206 vm_dbg(&xe->drm, "MAP: addr=0x%016llx, range=0x%016llx",
2207 (ULL)op->map.va.addr, (ULL)op->map.va.range);
2209 case DRM_GPUVA_OP_REMAP:
2210 vma = gpuva_to_vma(op->remap.unmap->va);
2211 vm_dbg(&xe->drm, "REMAP:UNMAP: addr=0x%016llx, range=0x%016llx, keep=%d",
2212 (ULL)xe_vma_start(vma), (ULL)xe_vma_size(vma),
2213 op->unmap.keep ? 1 : 0);
2216 "REMAP:PREV: addr=0x%016llx, range=0x%016llx",
2217 (ULL)op->remap.prev->va.addr,
2218 (ULL)op->remap.prev->va.range);
2221 "REMAP:NEXT: addr=0x%016llx, range=0x%016llx",
2222 (ULL)op->remap.next->va.addr,
2223 (ULL)op->remap.next->va.range);
2225 case DRM_GPUVA_OP_UNMAP:
2226 vma = gpuva_to_vma(op->unmap.va);
2227 vm_dbg(&xe->drm, "UNMAP: addr=0x%016llx, range=0x%016llx, keep=%d",
2228 (ULL)xe_vma_start(vma), (ULL)xe_vma_size(vma),
2229 op->unmap.keep ? 1 : 0);
2231 case DRM_GPUVA_OP_PREFETCH:
2232 vma = gpuva_to_vma(op->prefetch.va);
2233 vm_dbg(&xe->drm, "PREFETCH: addr=0x%016llx, range=0x%016llx",
2234 (ULL)xe_vma_start(vma), (ULL)xe_vma_size(vma));
2237 XE_BUG_ON("NOT POSSIBLE");
2241 static void print_op(struct xe_device *xe, struct drm_gpuva_op *op)
2247 * Create operations list from IOCTL arguments, setup operations fields so parse
2248 * and commit steps are decoupled from IOCTL arguments. This step can fail.
2250 static struct drm_gpuva_ops *
2251 vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
2252 u64 bo_offset_or_userptr, u64 addr, u64 range,
2253 u32 operation, u64 tile_mask, u32 region)
2255 struct drm_gem_object *obj = bo ? &bo->ttm.base : NULL;
2256 struct ww_acquire_ctx ww;
2257 struct drm_gpuva_ops *ops;
2258 struct drm_gpuva_op *__op;
2259 struct xe_vma_op *op;
2260 struct drm_gpuvm_bo *vm_bo;
2263 lockdep_assert_held_write(&vm->lock);
2265 vm_dbg(&vm->xe->drm,
2266 "op=%d, addr=0x%016llx, range=0x%016llx, bo_offset_or_userptr=0x%016llx",
2267 VM_BIND_OP(operation), (ULL)addr, (ULL)range,
2268 (ULL)bo_offset_or_userptr);
2270 switch (VM_BIND_OP(operation)) {
2271 case XE_VM_BIND_OP_MAP:
2272 case XE_VM_BIND_OP_MAP_USERPTR:
2273 ops = drm_gpuvm_sm_map_ops_create(&vm->gpuvm, addr, range,
2274 obj, bo_offset_or_userptr);
2278 drm_gpuva_for_each_op(__op, ops) {
2279 struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
2281 op->tile_mask = tile_mask;
2283 operation & XE_VM_BIND_FLAG_IMMEDIATE;
2285 operation & XE_VM_BIND_FLAG_READONLY;
2286 op->map.is_null = operation & XE_VM_BIND_FLAG_NULL;
2289 case XE_VM_BIND_OP_UNMAP:
2290 ops = drm_gpuvm_sm_unmap_ops_create(&vm->gpuvm, addr, range);
2294 drm_gpuva_for_each_op(__op, ops) {
2295 struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
2297 op->tile_mask = tile_mask;
2300 case XE_VM_BIND_OP_PREFETCH:
2301 ops = drm_gpuvm_prefetch_ops_create(&vm->gpuvm, addr, range);
2305 drm_gpuva_for_each_op(__op, ops) {
2306 struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
2308 op->tile_mask = tile_mask;
2309 op->prefetch.region = region;
2312 case XE_VM_BIND_OP_UNMAP_ALL:
2315 err = xe_bo_lock(bo, &ww, 0, true);
2317 return ERR_PTR(err);
2319 vm_bo = drm_gpuvm_bo_find(&vm->gpuvm, obj);
2323 ops = drm_gpuvm_bo_unmap_ops_create(vm_bo);
2324 drm_gpuvm_bo_put(vm_bo);
2325 xe_bo_unlock(bo, &ww);
2329 drm_gpuva_for_each_op(__op, ops) {
2330 struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
2332 op->tile_mask = tile_mask;
2336 XE_BUG_ON("NOT POSSIBLE");
2337 ops = ERR_PTR(-EINVAL);
2340 #ifdef TEST_VM_ASYNC_OPS_ERROR
2341 if (operation & FORCE_ASYNC_OP_ERROR) {
2342 op = list_first_entry_or_null(&ops->list, struct xe_vma_op,
2345 op->inject_error = true;
2350 drm_gpuva_for_each_op(__op, ops)
2351 print_op(vm->xe, __op);
2356 static struct xe_vma *new_vma(struct xe_vm *vm, struct drm_gpuva_op_map *op,
2357 u64 tile_mask, bool read_only, bool is_null)
2359 struct xe_bo *bo = op->gem.obj ? gem_to_xe_bo(op->gem.obj) : NULL;
2361 struct ww_acquire_ctx ww;
2364 lockdep_assert_held_write(&vm->lock);
2367 err = xe_bo_lock(bo, &ww, 0, true);
2369 return ERR_PTR(err);
2371 vma = xe_vma_create(vm, bo, op->gem.offset,
2372 op->va.addr, op->va.addr +
2373 op->va.range - 1, read_only, is_null,
2376 xe_bo_unlock(bo, &ww);
2378 if (xe_vma_is_userptr(vma)) {
2379 err = xe_vma_userptr_pin_pages(vma);
2381 prep_vma_destroy(vm, vma, false);
2382 xe_vma_destroy_unlocked(vma);
2383 return ERR_PTR(err);
2385 } else if (!xe_vma_has_no_bo(vma) && !bo->vm) {
2386 vm_insert_extobj(vm, vma);
2387 err = add_preempt_fences(vm, bo);
2389 prep_vma_destroy(vm, vma, false);
2390 xe_vma_destroy_unlocked(vma);
2391 return ERR_PTR(err);
2398 static u64 xe_vma_max_pte_size(struct xe_vma *vma)
2400 if (vma->gpuva.flags & XE_VMA_PTE_1G)
2402 else if (vma->gpuva.flags & XE_VMA_PTE_2M)
2409 * Parse operations list and create any resources needed for the operations
2410 * prior to fully committing to the operations. This setup can fail.
2412 static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct xe_engine *e,
2413 struct drm_gpuva_ops **ops, int num_ops_list,
2414 struct xe_sync_entry *syncs, u32 num_syncs,
2415 struct list_head *ops_list, bool async)
2417 struct xe_vma_op *last_op = NULL;
2418 struct list_head *async_list = NULL;
2419 struct async_op_fence *fence = NULL;
2422 lockdep_assert_held_write(&vm->lock);
2423 XE_BUG_ON(num_ops_list > 1 && !async);
2425 if (num_syncs && async) {
2428 fence = kmalloc(sizeof(*fence), GFP_KERNEL);
2432 seqno = e ? ++e->bind.fence_seqno : ++vm->async_ops.fence.seqno;
2433 dma_fence_init(&fence->fence, &async_op_fence_ops,
2434 &vm->async_ops.lock, e ? e->bind.fence_ctx :
2435 vm->async_ops.fence.context, seqno);
2437 if (!xe_vm_no_dma_fences(vm)) {
2439 fence->started = false;
2440 init_waitqueue_head(&fence->wq);
2444 for (i = 0; i < num_ops_list; ++i) {
2445 struct drm_gpuva_ops *__ops = ops[i];
2446 struct drm_gpuva_op *__op;
2448 drm_gpuva_for_each_op(__op, __ops) {
2449 struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
2450 bool first = !async_list;
2452 XE_BUG_ON(!first && !async);
2454 INIT_LIST_HEAD(&op->link);
2456 async_list = ops_list;
2457 list_add_tail(&op->link, async_list);
2460 op->flags |= XE_VMA_OP_FIRST;
2461 op->num_syncs = num_syncs;
2467 switch (op->base.op) {
2468 case DRM_GPUVA_OP_MAP:
2472 vma = new_vma(vm, &op->base.map,
2473 op->tile_mask, op->map.read_only,
2483 case DRM_GPUVA_OP_REMAP:
2485 struct xe_vma *old =
2486 gpuva_to_vma(op->base.remap.unmap->va);
2488 op->remap.start = xe_vma_start(old);
2489 op->remap.range = xe_vma_size(old);
2491 if (op->base.remap.prev) {
2494 op->base.remap.unmap->va->flags &
2497 op->base.remap.unmap->va->flags &
2500 vma = new_vma(vm, op->base.remap.prev,
2501 op->tile_mask, read_only,
2508 op->remap.prev = vma;
2511 * Userptr creates a new SG mapping so
2512 * we must also rebind.
2514 op->remap.skip_prev = !xe_vma_is_userptr(old) &&
2515 IS_ALIGNED(xe_vma_end(vma),
2516 xe_vma_max_pte_size(old));
2517 if (op->remap.skip_prev) {
2521 op->remap.start = xe_vma_end(vma);
2525 if (op->base.remap.next) {
2528 op->base.remap.unmap->va->flags &
2532 op->base.remap.unmap->va->flags &
2535 vma = new_vma(vm, op->base.remap.next,
2536 op->tile_mask, read_only,
2543 op->remap.next = vma;
2546 * Userptr creates a new SG mapping so
2547 * we must also rebind.
2549 op->remap.skip_next = !xe_vma_is_userptr(old) &&
2550 IS_ALIGNED(xe_vma_start(vma),
2551 xe_vma_max_pte_size(old));
2552 if (op->remap.skip_next)
2559 case DRM_GPUVA_OP_UNMAP:
2560 case DRM_GPUVA_OP_PREFETCH:
2564 XE_BUG_ON("NOT POSSIBLE");
2570 last_op->ops = __ops;
2576 last_op->flags |= XE_VMA_OP_LAST;
2577 last_op->num_syncs = num_syncs;
2578 last_op->syncs = syncs;
2579 last_op->fence = fence;
2588 static int xe_vma_op_commit(struct xe_vm *vm, struct xe_vma_op *op)
2592 lockdep_assert_held_write(&vm->lock);
2594 switch (op->base.op) {
2595 case DRM_GPUVA_OP_MAP:
2596 err |= xe_vm_insert_vma(vm, op->map.vma);
2598 case DRM_GPUVA_OP_REMAP:
2599 prep_vma_destroy(vm, gpuva_to_vma(op->base.remap.unmap->va),
2602 if (op->remap.prev) {
2603 err |= xe_vm_insert_vma(vm, op->remap.prev);
2604 if (!err && op->remap.skip_prev)
2605 op->remap.prev = NULL;
2607 if (op->remap.next) {
2608 err |= xe_vm_insert_vma(vm, op->remap.next);
2609 if (!err && op->remap.skip_next)
2610 op->remap.next = NULL;
2613 /* Adjust for partial unbind after removin VMA from VM */
2615 op->base.remap.unmap->va->va.addr = op->remap.start;
2616 op->base.remap.unmap->va->va.range = op->remap.range;
2619 case DRM_GPUVA_OP_UNMAP:
2620 prep_vma_destroy(vm, gpuva_to_vma(op->base.unmap.va), true);
2622 case DRM_GPUVA_OP_PREFETCH:
2626 XE_BUG_ON("NOT POSSIBLE");
2629 op->flags |= XE_VMA_OP_COMMITTED;
2633 static int __xe_vma_op_execute(struct xe_vm *vm, struct xe_vma *vma,
2634 struct xe_vma_op *op)
2638 struct ttm_validate_buffer tv_bo, tv_vm;
2639 struct ww_acquire_ctx ww;
2643 lockdep_assert_held_write(&vm->lock);
2645 xe_vm_tv_populate(vm, &tv_vm);
2646 list_add_tail(&tv_vm.head, &objs);
2647 vbo = xe_vma_bo(vma);
2650 * An unbind can drop the last reference to the BO and
2651 * the BO is needed for ttm_eu_backoff_reservation so
2652 * take a reference here.
2657 tv_bo.bo = &vbo->ttm;
2658 tv_bo.num_shared = 1;
2659 list_add(&tv_bo.head, &objs);
2664 err = ttm_eu_reserve_buffers(&ww, &objs, true, &dups);
2670 xe_vm_assert_held(vm);
2671 xe_bo_assert_held(xe_vma_bo(vma));
2673 switch (op->base.op) {
2674 case DRM_GPUVA_OP_MAP:
2675 err = xe_vm_bind(vm, vma, op->engine, xe_vma_bo(vma),
2676 op->syncs, op->num_syncs, op->fence,
2677 op->map.immediate || !xe_vm_in_fault_mode(vm),
2678 op->flags & XE_VMA_OP_FIRST,
2679 op->flags & XE_VMA_OP_LAST);
2681 case DRM_GPUVA_OP_REMAP:
2683 bool prev = !!op->remap.prev;
2684 bool next = !!op->remap.next;
2686 if (!op->remap.unmap_done) {
2688 vm->async_ops.munmap_rebind_inflight = true;
2689 vma->gpuva.flags |= XE_VMA_FIRST_REBIND;
2691 err = xe_vm_unbind(vm, vma, op->engine, op->syncs,
2693 !prev && !next ? op->fence : NULL,
2694 op->flags & XE_VMA_OP_FIRST,
2695 op->flags & XE_VMA_OP_LAST && !prev &&
2699 op->remap.unmap_done = true;
2703 op->remap.prev->gpuva.flags |= XE_VMA_LAST_REBIND;
2704 err = xe_vm_bind(vm, op->remap.prev, op->engine,
2705 xe_vma_bo(op->remap.prev), op->syncs,
2707 !next ? op->fence : NULL, true, false,
2708 op->flags & XE_VMA_OP_LAST && !next);
2709 op->remap.prev->gpuva.flags &= ~XE_VMA_LAST_REBIND;
2712 op->remap.prev = NULL;
2716 op->remap.next->gpuva.flags |= XE_VMA_LAST_REBIND;
2717 err = xe_vm_bind(vm, op->remap.next, op->engine,
2718 xe_vma_bo(op->remap.next),
2719 op->syncs, op->num_syncs,
2720 op->fence, true, false,
2721 op->flags & XE_VMA_OP_LAST);
2722 op->remap.next->gpuva.flags &= ~XE_VMA_LAST_REBIND;
2725 op->remap.next = NULL;
2727 vm->async_ops.munmap_rebind_inflight = false;
2731 case DRM_GPUVA_OP_UNMAP:
2732 err = xe_vm_unbind(vm, vma, op->engine, op->syncs,
2733 op->num_syncs, op->fence,
2734 op->flags & XE_VMA_OP_FIRST,
2735 op->flags & XE_VMA_OP_LAST);
2737 case DRM_GPUVA_OP_PREFETCH:
2738 err = xe_vm_prefetch(vm, vma, op->engine, op->prefetch.region,
2739 op->syncs, op->num_syncs, op->fence,
2740 op->flags & XE_VMA_OP_FIRST,
2741 op->flags & XE_VMA_OP_LAST);
2744 XE_BUG_ON("NOT POSSIBLE");
2747 ttm_eu_backoff_reservation(&ww, &objs);
2748 if (err == -EAGAIN && xe_vma_is_userptr(vma)) {
2749 lockdep_assert_held_write(&vm->lock);
2750 err = xe_vma_userptr_pin_pages(vma);
2757 trace_xe_vma_fail(vma);
2762 static int xe_vma_op_execute(struct xe_vm *vm, struct xe_vma_op *op)
2766 lockdep_assert_held_write(&vm->lock);
2768 #ifdef TEST_VM_ASYNC_OPS_ERROR
2769 if (op->inject_error) {
2770 op->inject_error = false;
2775 switch (op->base.op) {
2776 case DRM_GPUVA_OP_MAP:
2777 ret = __xe_vma_op_execute(vm, op->map.vma, op);
2779 case DRM_GPUVA_OP_REMAP:
2783 if (!op->remap.unmap_done)
2784 vma = gpuva_to_vma(op->base.remap.unmap->va);
2785 else if (op->remap.prev)
2786 vma = op->remap.prev;
2788 vma = op->remap.next;
2790 ret = __xe_vma_op_execute(vm, vma, op);
2793 case DRM_GPUVA_OP_UNMAP:
2794 ret = __xe_vma_op_execute(vm, gpuva_to_vma(op->base.unmap.va),
2797 case DRM_GPUVA_OP_PREFETCH:
2798 ret = __xe_vma_op_execute(vm,
2799 gpuva_to_vma(op->base.prefetch.va),
2803 XE_BUG_ON("NOT POSSIBLE");
2809 static void xe_vma_op_cleanup(struct xe_vm *vm, struct xe_vma_op *op)
2811 bool last = op->flags & XE_VMA_OP_LAST;
2814 while (op->num_syncs--)
2815 xe_sync_entry_cleanup(&op->syncs[op->num_syncs]);
2818 xe_engine_put(op->engine);
2820 dma_fence_put(&op->fence->fence);
2822 if (!list_empty(&op->link)) {
2823 spin_lock_irq(&vm->async_ops.lock);
2824 list_del(&op->link);
2825 spin_unlock_irq(&vm->async_ops.lock);
2828 drm_gpuva_ops_free(&vm->gpuvm, op->ops);
2833 static void xe_vma_op_unwind(struct xe_vm *vm, struct xe_vma_op *op,
2836 lockdep_assert_held_write(&vm->lock);
2838 switch (op->base.op) {
2839 case DRM_GPUVA_OP_MAP:
2841 prep_vma_destroy(vm, op->map.vma, post_commit);
2842 xe_vma_destroy_unlocked(op->map.vma);
2845 case DRM_GPUVA_OP_UNMAP:
2847 struct xe_vma *vma = gpuva_to_vma(op->base.unmap.va);
2849 down_read(&vm->userptr.notifier_lock);
2850 vma->gpuva.flags &= ~XE_VMA_DESTROYED;
2851 up_read(&vm->userptr.notifier_lock);
2853 xe_vm_insert_vma(vm, vma);
2856 case DRM_GPUVA_OP_REMAP:
2858 struct xe_vma *vma = gpuva_to_vma(op->base.remap.unmap->va);
2860 if (op->remap.prev) {
2861 prep_vma_destroy(vm, op->remap.prev, post_commit);
2862 xe_vma_destroy_unlocked(op->remap.prev);
2864 if (op->remap.next) {
2865 prep_vma_destroy(vm, op->remap.next, post_commit);
2866 xe_vma_destroy_unlocked(op->remap.next);
2868 down_read(&vm->userptr.notifier_lock);
2869 vma->gpuva.flags &= ~XE_VMA_DESTROYED;
2870 up_read(&vm->userptr.notifier_lock);
2872 xe_vm_insert_vma(vm, vma);
2875 case DRM_GPUVA_OP_PREFETCH:
2879 XE_BUG_ON("NOT POSSIBLE");
2883 static struct xe_vma_op *next_vma_op(struct xe_vm *vm)
2885 return list_first_entry_or_null(&vm->async_ops.pending,
2886 struct xe_vma_op, link);
2889 static void xe_vma_op_work_func(struct work_struct *w)
2891 struct xe_vm *vm = container_of(w, struct xe_vm, async_ops.work);
2894 struct xe_vma_op *op;
2897 if (vm->async_ops.error && !xe_vm_is_closed(vm))
2900 spin_lock_irq(&vm->async_ops.lock);
2901 op = next_vma_op(vm);
2902 spin_unlock_irq(&vm->async_ops.lock);
2907 if (!xe_vm_is_closed(vm)) {
2908 down_write(&vm->lock);
2909 err = xe_vma_op_execute(vm, op);
2911 drm_warn(&vm->xe->drm,
2912 "Async VM op(%d) failed with %d",
2914 vm_set_async_error(vm, err);
2915 up_write(&vm->lock);
2917 if (vm->async_ops.error_capture.addr)
2918 vm_error_capture(vm, err, 0, 0, 0);
2921 up_write(&vm->lock);
2925 switch (op->base.op) {
2926 case DRM_GPUVA_OP_REMAP:
2927 vma = gpuva_to_vma(op->base.remap.unmap->va);
2928 trace_xe_vma_flush(vma);
2930 down_write(&vm->lock);
2931 xe_vma_destroy_unlocked(vma);
2932 up_write(&vm->lock);
2934 case DRM_GPUVA_OP_UNMAP:
2935 vma = gpuva_to_vma(op->base.unmap.va);
2936 trace_xe_vma_flush(vma);
2938 down_write(&vm->lock);
2939 xe_vma_destroy_unlocked(vma);
2940 up_write(&vm->lock);
2947 if (op->fence && !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
2948 &op->fence->fence.flags)) {
2949 if (!xe_vm_no_dma_fences(vm)) {
2950 op->fence->started = true;
2951 wake_up_all(&op->fence->wq);
2953 dma_fence_signal(&op->fence->fence);
2957 xe_vma_op_cleanup(vm, op);
2961 static int vm_bind_ioctl_ops_commit(struct xe_vm *vm,
2962 struct list_head *ops_list, bool async)
2964 struct xe_vma_op *op, *last_op, *next;
2967 lockdep_assert_held_write(&vm->lock);
2969 list_for_each_entry(op, ops_list, link) {
2971 err = xe_vma_op_commit(vm, op);
2977 err = xe_vma_op_execute(vm, last_op);
2980 xe_vma_op_cleanup(vm, last_op);
2983 bool installed = false;
2985 for (i = 0; i < last_op->num_syncs; i++)
2986 installed |= xe_sync_entry_signal(&last_op->syncs[i],
2988 &last_op->fence->fence);
2989 if (!installed && last_op->fence)
2990 dma_fence_signal(&last_op->fence->fence);
2992 spin_lock_irq(&vm->async_ops.lock);
2993 list_splice_tail(ops_list, &vm->async_ops.pending);
2994 spin_unlock_irq(&vm->async_ops.lock);
2996 if (!vm->async_ops.error)
2997 queue_work(system_unbound_wq, &vm->async_ops.work);
3003 list_for_each_entry_reverse(op, ops_list, link)
3004 xe_vma_op_unwind(vm, op, op->flags & XE_VMA_OP_COMMITTED);
3005 list_for_each_entry_safe(op, next, ops_list, link)
3006 xe_vma_op_cleanup(vm, op);
3012 * Unwind operations list, called after a failure of vm_bind_ioctl_ops_create or
3013 * vm_bind_ioctl_ops_parse.
3015 static void vm_bind_ioctl_ops_unwind(struct xe_vm *vm,
3016 struct drm_gpuva_ops **ops,
3021 for (i = 0; i < num_ops_list; ++i) {
3022 struct drm_gpuva_ops *__ops = ops[i];
3023 struct drm_gpuva_op *__op;
3028 drm_gpuva_for_each_op(__op, __ops) {
3029 struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
3031 xe_vma_op_unwind(vm, op, false);
3036 #ifdef TEST_VM_ASYNC_OPS_ERROR
3037 #define SUPPORTED_FLAGS \
3038 (FORCE_ASYNC_OP_ERROR | XE_VM_BIND_FLAG_ASYNC | \
3039 XE_VM_BIND_FLAG_READONLY | XE_VM_BIND_FLAG_IMMEDIATE | \
3040 XE_VM_BIND_FLAG_NULL | 0xffff)
3042 #define SUPPORTED_FLAGS \
3043 (XE_VM_BIND_FLAG_ASYNC | XE_VM_BIND_FLAG_READONLY | \
3044 XE_VM_BIND_FLAG_IMMEDIATE | XE_VM_BIND_FLAG_NULL | 0xffff)
3046 #define XE_64K_PAGE_MASK 0xffffull
3048 #define MAX_BINDS 512 /* FIXME: Picking random upper limit */
3050 static int vm_bind_ioctl_check_args(struct xe_device *xe,
3051 struct drm_xe_vm_bind *args,
3052 struct drm_xe_vm_bind_op **bind_ops,
3058 if (XE_IOCTL_DBG(xe, args->extensions) ||
3059 XE_IOCTL_DBG(xe, !args->num_binds) ||
3060 XE_IOCTL_DBG(xe, args->num_binds > MAX_BINDS))
3063 if (args->num_binds > 1) {
3064 u64 __user *bind_user =
3065 u64_to_user_ptr(args->vector_of_binds);
3067 *bind_ops = kmalloc(sizeof(struct drm_xe_vm_bind_op) *
3068 args->num_binds, GFP_KERNEL);
3072 err = __copy_from_user(*bind_ops, bind_user,
3073 sizeof(struct drm_xe_vm_bind_op) *
3075 if (XE_IOCTL_DBG(xe, err)) {
3080 *bind_ops = &args->bind;
3083 for (i = 0; i < args->num_binds; ++i) {
3084 u64 range = (*bind_ops)[i].range;
3085 u64 addr = (*bind_ops)[i].addr;
3086 u32 op = (*bind_ops)[i].op;
3087 u32 obj = (*bind_ops)[i].obj;
3088 u64 obj_offset = (*bind_ops)[i].obj_offset;
3089 u32 region = (*bind_ops)[i].region;
3090 bool is_null = op & XE_VM_BIND_FLAG_NULL;
3093 *async = !!(op & XE_VM_BIND_FLAG_ASYNC);
3094 } else if (XE_IOCTL_DBG(xe, !*async) ||
3095 XE_IOCTL_DBG(xe, !(op & XE_VM_BIND_FLAG_ASYNC)) ||
3096 XE_IOCTL_DBG(xe, VM_BIND_OP(op) ==
3097 XE_VM_BIND_OP_RESTART)) {
3102 if (XE_IOCTL_DBG(xe, !*async &&
3103 VM_BIND_OP(op) == XE_VM_BIND_OP_UNMAP_ALL)) {
3108 if (XE_IOCTL_DBG(xe, !*async &&
3109 VM_BIND_OP(op) == XE_VM_BIND_OP_PREFETCH)) {
3114 if (XE_IOCTL_DBG(xe, VM_BIND_OP(op) >
3115 XE_VM_BIND_OP_PREFETCH) ||
3116 XE_IOCTL_DBG(xe, op & ~SUPPORTED_FLAGS) ||
3117 XE_IOCTL_DBG(xe, obj && is_null) ||
3118 XE_IOCTL_DBG(xe, obj_offset && is_null) ||
3119 XE_IOCTL_DBG(xe, VM_BIND_OP(op) != XE_VM_BIND_OP_MAP &&
3121 XE_IOCTL_DBG(xe, !obj &&
3122 VM_BIND_OP(op) == XE_VM_BIND_OP_MAP &&
3124 XE_IOCTL_DBG(xe, !obj &&
3125 VM_BIND_OP(op) == XE_VM_BIND_OP_UNMAP_ALL) ||
3126 XE_IOCTL_DBG(xe, addr &&
3127 VM_BIND_OP(op) == XE_VM_BIND_OP_UNMAP_ALL) ||
3128 XE_IOCTL_DBG(xe, range &&
3129 VM_BIND_OP(op) == XE_VM_BIND_OP_UNMAP_ALL) ||
3130 XE_IOCTL_DBG(xe, obj &&
3131 VM_BIND_OP(op) == XE_VM_BIND_OP_MAP_USERPTR) ||
3132 XE_IOCTL_DBG(xe, obj &&
3133 VM_BIND_OP(op) == XE_VM_BIND_OP_PREFETCH) ||
3134 XE_IOCTL_DBG(xe, region &&
3135 VM_BIND_OP(op) != XE_VM_BIND_OP_PREFETCH) ||
3136 XE_IOCTL_DBG(xe, !(BIT(region) &
3137 xe->info.mem_region_mask)) ||
3138 XE_IOCTL_DBG(xe, obj &&
3139 VM_BIND_OP(op) == XE_VM_BIND_OP_UNMAP)) {
3144 if (XE_IOCTL_DBG(xe, obj_offset & ~PAGE_MASK) ||
3145 XE_IOCTL_DBG(xe, addr & ~PAGE_MASK) ||
3146 XE_IOCTL_DBG(xe, range & ~PAGE_MASK) ||
3147 XE_IOCTL_DBG(xe, !range && VM_BIND_OP(op) !=
3148 XE_VM_BIND_OP_RESTART &&
3149 VM_BIND_OP(op) != XE_VM_BIND_OP_UNMAP_ALL)) {
3158 if (args->num_binds > 1)
3163 int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
3165 struct xe_device *xe = to_xe_device(dev);
3166 struct xe_file *xef = to_xe_file(file);
3167 struct drm_xe_vm_bind *args = data;
3168 struct drm_xe_sync __user *syncs_user;
3169 struct xe_bo **bos = NULL;
3170 struct drm_gpuva_ops **ops = NULL;
3172 struct xe_engine *e = NULL;
3174 struct xe_sync_entry *syncs = NULL;
3175 struct drm_xe_vm_bind_op *bind_ops;
3176 LIST_HEAD(ops_list);
3181 err = vm_bind_ioctl_check_args(xe, args, &bind_ops, &async);
3185 if (args->engine_id) {
3186 e = xe_engine_lookup(xef, args->engine_id);
3187 if (XE_IOCTL_DBG(xe, !e)) {
3192 if (XE_IOCTL_DBG(xe, !(e->flags & ENGINE_FLAG_VM))) {
3198 vm = xe_vm_lookup(xef, args->vm_id);
3199 if (XE_IOCTL_DBG(xe, !vm)) {
3204 err = down_write_killable(&vm->lock);
3208 if (XE_IOCTL_DBG(xe, xe_vm_is_closed_or_banned(vm))) {
3210 goto release_vm_lock;
3213 if (VM_BIND_OP(bind_ops[0].op) == XE_VM_BIND_OP_RESTART) {
3214 if (XE_IOCTL_DBG(xe, !(vm->flags & XE_VM_FLAG_ASYNC_BIND_OPS)))
3216 if (XE_IOCTL_DBG(xe, !err && args->num_syncs))
3218 if (XE_IOCTL_DBG(xe, !err && !vm->async_ops.error))
3222 trace_xe_vm_restart(vm);
3223 vm_set_async_error(vm, 0);
3225 queue_work(system_unbound_wq, &vm->async_ops.work);
3227 /* Rebinds may have been blocked, give worker a kick */
3228 if (xe_vm_in_compute_mode(vm))
3229 xe_vm_queue_rebind_worker(vm);
3232 goto release_vm_lock;
3235 if (XE_IOCTL_DBG(xe, !vm->async_ops.error &&
3236 async != !!(vm->flags & XE_VM_FLAG_ASYNC_BIND_OPS))) {
3238 goto release_vm_lock;
3241 for (i = 0; i < args->num_binds; ++i) {
3242 u64 range = bind_ops[i].range;
3243 u64 addr = bind_ops[i].addr;
3245 if (XE_IOCTL_DBG(xe, range > vm->size) ||
3246 XE_IOCTL_DBG(xe, addr > vm->size - range)) {
3248 goto release_vm_lock;
3251 if (bind_ops[i].tile_mask) {
3252 u64 valid_tiles = BIT(xe->info.tile_count) - 1;
3254 if (XE_IOCTL_DBG(xe, bind_ops[i].tile_mask &
3257 goto release_vm_lock;
3262 bos = kzalloc(sizeof(*bos) * args->num_binds, GFP_KERNEL);
3265 goto release_vm_lock;
3268 ops = kzalloc(sizeof(*ops) * args->num_binds, GFP_KERNEL);
3271 goto release_vm_lock;
3274 for (i = 0; i < args->num_binds; ++i) {
3275 struct drm_gem_object *gem_obj;
3276 u64 range = bind_ops[i].range;
3277 u64 addr = bind_ops[i].addr;
3278 u32 obj = bind_ops[i].obj;
3279 u64 obj_offset = bind_ops[i].obj_offset;
3284 gem_obj = drm_gem_object_lookup(file, obj);
3285 if (XE_IOCTL_DBG(xe, !gem_obj)) {
3289 bos[i] = gem_to_xe_bo(gem_obj);
3291 if (XE_IOCTL_DBG(xe, range > bos[i]->size) ||
3292 XE_IOCTL_DBG(xe, obj_offset >
3293 bos[i]->size - range)) {
3298 if (bos[i]->flags & XE_BO_INTERNAL_64K) {
3299 if (XE_IOCTL_DBG(xe, obj_offset &
3300 XE_64K_PAGE_MASK) ||
3301 XE_IOCTL_DBG(xe, addr & XE_64K_PAGE_MASK) ||
3302 XE_IOCTL_DBG(xe, range & XE_64K_PAGE_MASK)) {
3309 if (args->num_syncs) {
3310 syncs = kcalloc(args->num_syncs, sizeof(*syncs), GFP_KERNEL);
3317 syncs_user = u64_to_user_ptr(args->syncs);
3318 for (num_syncs = 0; num_syncs < args->num_syncs; num_syncs++) {
3319 err = xe_sync_entry_parse(xe, xef, &syncs[num_syncs],
3320 &syncs_user[num_syncs], false,
3321 xe_vm_no_dma_fences(vm));
3326 /* Do some error checking first to make the unwind easier */
3327 for (i = 0; i < args->num_binds; ++i) {
3328 u64 range = bind_ops[i].range;
3329 u64 addr = bind_ops[i].addr;
3330 u32 op = bind_ops[i].op;
3332 err = vm_bind_ioctl_lookup_vma(vm, bos[i], addr, range, op);
3337 for (i = 0; i < args->num_binds; ++i) {
3338 u64 range = bind_ops[i].range;
3339 u64 addr = bind_ops[i].addr;
3340 u32 op = bind_ops[i].op;
3341 u64 obj_offset = bind_ops[i].obj_offset;
3342 u64 tile_mask = bind_ops[i].tile_mask;
3343 u32 region = bind_ops[i].region;
3345 ops[i] = vm_bind_ioctl_ops_create(vm, bos[i], obj_offset,
3346 addr, range, op, tile_mask,
3348 if (IS_ERR(ops[i])) {
3349 err = PTR_ERR(ops[i]);
3355 err = vm_bind_ioctl_ops_parse(vm, e, ops, args->num_binds,
3356 syncs, num_syncs, &ops_list, async);
3360 err = vm_bind_ioctl_ops_commit(vm, &ops_list, async);
3361 up_write(&vm->lock);
3363 for (i = 0; i < args->num_binds; ++i)
3368 if (args->num_binds > 1)
3374 vm_bind_ioctl_ops_unwind(vm, ops, args->num_binds);
3377 xe_sync_entry_cleanup(&syncs[num_syncs]);
3381 for (i = 0; i < args->num_binds; ++i)
3384 up_write(&vm->lock);
3393 if (args->num_binds > 1)
3395 return err == -ENODATA ? 0 : err;
3399 * XXX: Using the TTM wrappers for now, likely can call into dma-resv code
3400 * directly to optimize. Also this likely should be an inline function.
3402 int xe_vm_lock(struct xe_vm *vm, struct ww_acquire_ctx *ww,
3403 int num_resv, bool intr)
3405 struct ttm_validate_buffer tv_vm;
3411 tv_vm.num_shared = num_resv;
3412 tv_vm.bo = xe_vm_ttm_bo(vm);
3413 list_add_tail(&tv_vm.head, &objs);
3415 return ttm_eu_reserve_buffers(ww, &objs, intr, &dups);
3418 void xe_vm_unlock(struct xe_vm *vm, struct ww_acquire_ctx *ww)
3420 dma_resv_unlock(xe_vm_resv(vm));
3421 ww_acquire_fini(ww);
3425 * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
3426 * @vma: VMA to invalidate
3428 * Walks a list of page tables leaves which it memset the entries owned by this
3429 * VMA to zero, invalidates the TLBs, and block until TLBs invalidation is
3432 * Returns 0 for success, negative error code otherwise.
3434 int xe_vm_invalidate_vma(struct xe_vma *vma)
3436 struct xe_device *xe = xe_vma_vm(vma)->xe;
3437 struct xe_tile *tile;
3438 u32 tile_needs_invalidate = 0;
3439 int seqno[XE_MAX_TILES_PER_DEVICE];
3443 XE_BUG_ON(!xe_vm_in_fault_mode(xe_vma_vm(vma)));
3444 XE_WARN_ON(xe_vma_is_null(vma));
3445 trace_xe_vma_usm_invalidate(vma);
3447 /* Check that we don't race with page-table updates */
3448 if (IS_ENABLED(CONFIG_PROVE_LOCKING)) {
3449 if (xe_vma_is_userptr(vma)) {
3450 WARN_ON_ONCE(!mmu_interval_check_retry
3451 (&vma->userptr.notifier,
3452 vma->userptr.notifier_seq));
3453 WARN_ON_ONCE(!dma_resv_test_signaled(xe_vm_resv(xe_vma_vm(vma)),
3454 DMA_RESV_USAGE_BOOKKEEP));
3457 xe_bo_assert_held(xe_vma_bo(vma));
3461 for_each_tile(tile, xe, id) {
3462 if (xe_pt_zap_ptes(tile, vma)) {
3463 tile_needs_invalidate |= BIT(id);
3466 * FIXME: We potentially need to invalidate multiple
3467 * GTs within the tile
3469 seqno[id] = xe_gt_tlb_invalidation_vma(tile->primary_gt, NULL, vma);
3475 for_each_tile(tile, xe, id) {
3476 if (tile_needs_invalidate & BIT(id)) {
3477 ret = xe_gt_tlb_invalidation_wait(tile->primary_gt, seqno[id]);
3483 vma->usm.tile_invalidated = vma->tile_mask;
3488 int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id)
3490 struct drm_gpuva *gpuva;
3494 if (!down_read_trylock(&vm->lock)) {
3495 drm_printf(p, " Failed to acquire VM lock to dump capture");
3498 if (vm->pt_root[gt_id]) {
3499 addr = xe_bo_addr(vm->pt_root[gt_id]->bo, 0, XE_PAGE_SIZE,
3501 drm_printf(p, " VM root: A:0x%llx %s\n", addr, is_vram ? "VRAM" : "SYS");
3504 drm_gpuvm_for_each_va(gpuva, &vm->gpuvm) {
3505 struct xe_vma *vma = gpuva_to_vma(gpuva);
3506 bool is_userptr = xe_vma_is_userptr(vma);
3507 bool is_null = xe_vma_is_null(vma);
3511 } else if (is_userptr) {
3512 struct xe_res_cursor cur;
3514 if (vma->userptr.sg) {
3515 xe_res_first_sg(vma->userptr.sg, 0, XE_PAGE_SIZE,
3517 addr = xe_res_dma(&cur);
3522 addr = __xe_bo_addr(xe_vma_bo(vma), 0, XE_PAGE_SIZE, &is_vram);
3524 drm_printf(p, " [%016llx-%016llx] S:0x%016llx A:%016llx %s\n",
3525 xe_vma_start(vma), xe_vma_end(vma) - 1,
3527 addr, is_null ? "NULL" : is_userptr ? "USR" :
3528 is_vram ? "VRAM" : "SYS");