1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /******************************************************************************
4 * COPYRIGHT (C) 2014-2015 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 ******************************************************************************/
28 #include "vmwgfx_kms.h"
29 #include "device_include/svga3d_surfacedefs.h"
30 #include <drm/drm_plane_helper.h>
31 #include <drm/drm_atomic.h>
32 #include <drm/drm_atomic_helper.h>
33 #include <drm/drm_damage_helper.h>
35 #define vmw_crtc_to_stdu(x) \
36 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37 #define vmw_encoder_to_stdu(x) \
38 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39 #define vmw_connector_to_stdu(x) \
40 container_of(x, struct vmw_screen_target_display_unit, base.connector)
44 enum stdu_content_type {
51 * struct vmw_stdu_dirty - closure structure for the update functions
53 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
54 * @transfer: Transfer direction for DMA command.
55 * @left: Left side of bounding box.
56 * @right: Right side of bounding box.
57 * @top: Top side of bounding box.
58 * @bottom: Bottom side of bounding box.
59 * @fb_left: Left side of the framebuffer/content bounding box
60 * @fb_top: Top of the framebuffer/content bounding box
61 * @buf: buffer object when DMA-ing between buffer and screen targets.
62 * @sid: Surface ID when copying between surface and screen targets.
64 struct vmw_stdu_dirty {
65 struct vmw_kms_dirty base;
66 SVGA3dTransferType transfer;
67 s32 left, right, top, bottom;
71 struct vmw_buffer_object *buf;
77 * SVGA commands that are used by this code. Please see the device headers
80 struct vmw_stdu_update {
81 SVGA3dCmdHeader header;
82 SVGA3dCmdUpdateGBScreenTarget body;
86 SVGA3dCmdHeader header;
87 SVGA3dCmdSurfaceDMA body;
90 struct vmw_stdu_surface_copy {
91 SVGA3dCmdHeader header;
92 SVGA3dCmdSurfaceCopy body;
95 struct vmw_stdu_update_gb_image {
96 SVGA3dCmdHeader header;
97 SVGA3dCmdUpdateGBImage body;
101 * struct vmw_screen_target_display_unit
103 * @base: VMW specific DU structure
104 * @display_srf: surface to be displayed. The dimension of this will always
105 * match the display mode. If the display mode matches
106 * content_vfbs dimensions, then this is a pointer into the
107 * corresponding field in content_vfbs. If not, then this
108 * is a separate buffer to which content_vfbs will blit to.
109 * @content_type: content_fb type
110 * @defined: true if the current display unit has been initialized
112 struct vmw_screen_target_display_unit {
113 struct vmw_display_unit base;
114 struct vmw_surface *display_srf;
115 enum stdu_content_type content_fb_type;
116 s32 display_width, display_height;
126 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
130 /******************************************************************************
131 * Screen Target Display Unit CRTC Functions
132 *****************************************************************************/
136 * vmw_stdu_crtc_destroy - cleans up the STDU
138 * @crtc: used to get a reference to the containing STDU
140 static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
142 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
146 * vmw_stdu_define_st - Defines a Screen Target
148 * @dev_priv: VMW DRM device
149 * @stdu: display unit to create a Screen Target for
150 * @mode: The mode to set.
151 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
152 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
154 * Creates a STDU that we can used later. This function is called whenever the
155 * framebuffer size changes.
158 * 0 on success, error code on failure
160 static int vmw_stdu_define_st(struct vmw_private *dev_priv,
161 struct vmw_screen_target_display_unit *stdu,
162 struct drm_display_mode *mode,
163 int crtc_x, int crtc_y)
166 SVGA3dCmdHeader header;
167 SVGA3dCmdDefineGBScreenTarget body;
170 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
171 if (unlikely(cmd == NULL))
174 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
175 cmd->header.size = sizeof(cmd->body);
177 cmd->body.stid = stdu->base.unit;
178 cmd->body.width = mode->hdisplay;
179 cmd->body.height = mode->vdisplay;
180 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
182 cmd->body.xRoot = crtc_x;
183 cmd->body.yRoot = crtc_y;
185 stdu->base.set_gui_x = cmd->body.xRoot;
186 stdu->base.set_gui_y = cmd->body.yRoot;
188 vmw_fifo_commit(dev_priv, sizeof(*cmd));
190 stdu->defined = true;
191 stdu->display_width = mode->hdisplay;
192 stdu->display_height = mode->vdisplay;
200 * vmw_stdu_bind_st - Binds a surface to a Screen Target
202 * @dev_priv: VMW DRM device
203 * @stdu: display unit affected
204 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
206 * Binding a surface to a Screen Target the same as flipping
208 static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
209 struct vmw_screen_target_display_unit *stdu,
210 const struct vmw_resource *res)
212 SVGA3dSurfaceImageId image;
215 SVGA3dCmdHeader header;
216 SVGA3dCmdBindGBScreenTarget body;
220 if (!stdu->defined) {
221 DRM_ERROR("No screen target defined\n");
225 /* Set up image using information in vfb */
226 memset(&image, 0, sizeof(image));
227 image.sid = res ? res->id : SVGA3D_INVALID_ID;
229 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
230 if (unlikely(cmd == NULL))
233 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
234 cmd->header.size = sizeof(cmd->body);
236 cmd->body.stid = stdu->base.unit;
237 cmd->body.image = image;
239 vmw_fifo_commit(dev_priv, sizeof(*cmd));
245 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
248 * @cmd: Pointer to command stream.
249 * @unit: Screen target unit.
250 * @left: Left side of bounding box.
251 * @right: Right side of bounding box.
252 * @top: Top side of bounding box.
253 * @bottom: Bottom side of bounding box.
255 static void vmw_stdu_populate_update(void *cmd, int unit,
256 s32 left, s32 right, s32 top, s32 bottom)
258 struct vmw_stdu_update *update = cmd;
260 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
261 update->header.size = sizeof(update->body);
263 update->body.stid = unit;
264 update->body.rect.x = left;
265 update->body.rect.y = top;
266 update->body.rect.w = right - left;
267 update->body.rect.h = bottom - top;
271 * vmw_stdu_update_st - Full update of a Screen Target
273 * @dev_priv: VMW DRM device
274 * @stdu: display unit affected
276 * This function needs to be called whenever the content of a screen
277 * target has changed completely. Typically as a result of a backing
281 * 0 on success, error code on failure
283 static int vmw_stdu_update_st(struct vmw_private *dev_priv,
284 struct vmw_screen_target_display_unit *stdu)
286 struct vmw_stdu_update *cmd;
288 if (!stdu->defined) {
289 DRM_ERROR("No screen target defined");
293 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
294 if (unlikely(cmd == NULL))
297 vmw_stdu_populate_update(cmd, stdu->base.unit,
298 0, stdu->display_width,
299 0, stdu->display_height);
301 vmw_fifo_commit(dev_priv, sizeof(*cmd));
309 * vmw_stdu_destroy_st - Destroy a Screen Target
311 * @dev_priv: VMW DRM device
312 * @stdu: display unit to destroy
314 static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
315 struct vmw_screen_target_display_unit *stdu)
320 SVGA3dCmdHeader header;
321 SVGA3dCmdDestroyGBScreenTarget body;
325 /* Nothing to do if not successfully defined */
326 if (unlikely(!stdu->defined))
329 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
330 if (unlikely(cmd == NULL))
333 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
334 cmd->header.size = sizeof(cmd->body);
336 cmd->body.stid = stdu->base.unit;
338 vmw_fifo_commit(dev_priv, sizeof(*cmd));
341 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
342 if (unlikely(ret != 0))
343 DRM_ERROR("Failed to sync with HW");
345 stdu->defined = false;
346 stdu->display_width = 0;
347 stdu->display_height = 0;
354 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
356 * @crtc: CRTC associated with the screen target
358 * This function defines/destroys a screen target
361 static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
363 struct vmw_private *dev_priv;
364 struct vmw_screen_target_display_unit *stdu;
365 struct drm_connector_state *conn_state;
366 struct vmw_connector_state *vmw_conn_state;
369 stdu = vmw_crtc_to_stdu(crtc);
370 dev_priv = vmw_priv(crtc->dev);
371 conn_state = stdu->base.connector.state;
372 vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
375 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
377 DRM_ERROR("Failed to blank CRTC\n");
379 (void) vmw_stdu_update_st(dev_priv, stdu);
381 ret = vmw_stdu_destroy_st(dev_priv, stdu);
383 DRM_ERROR("Failed to destroy Screen Target\n");
385 stdu->content_fb_type = SAME_AS_DISPLAY;
388 if (!crtc->state->enable)
391 x = vmw_conn_state->gui_x;
392 y = vmw_conn_state->gui_y;
394 vmw_svga_enable(dev_priv);
395 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
398 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
403 static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
407 static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
408 struct drm_crtc_state *old_state)
412 static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
413 struct drm_crtc_state *old_state)
415 struct vmw_private *dev_priv;
416 struct vmw_screen_target_display_unit *stdu;
421 DRM_ERROR("CRTC is NULL\n");
425 stdu = vmw_crtc_to_stdu(crtc);
426 dev_priv = vmw_priv(crtc->dev);
429 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
431 DRM_ERROR("Failed to blank CRTC\n");
433 (void) vmw_stdu_update_st(dev_priv, stdu);
435 ret = vmw_stdu_destroy_st(dev_priv, stdu);
437 DRM_ERROR("Failed to destroy Screen Target\n");
439 stdu->content_fb_type = SAME_AS_DISPLAY;
444 * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
446 * @dirty: The closure structure.
448 * Encodes a surface DMA command cliprect and updates the bounding box
451 static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
453 struct vmw_stdu_dirty *ddirty =
454 container_of(dirty, struct vmw_stdu_dirty, base);
455 struct vmw_stdu_dma *cmd = dirty->cmd;
456 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
458 blit += dirty->num_hits;
459 blit->srcx = dirty->fb_x;
460 blit->srcy = dirty->fb_y;
461 blit->x = dirty->unit_x1;
462 blit->y = dirty->unit_y1;
464 blit->w = dirty->unit_x2 - dirty->unit_x1;
465 blit->h = dirty->unit_y2 - dirty->unit_y1;
468 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
471 /* Destination bounding box */
472 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
473 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
474 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
475 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
479 * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
481 * @dirty: The closure structure.
483 * Fills in the missing fields in a DMA command, and optionally encodes
484 * a screen target update command, depending on transfer direction.
486 static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
488 struct vmw_stdu_dirty *ddirty =
489 container_of(dirty, struct vmw_stdu_dirty, base);
490 struct vmw_screen_target_display_unit *stdu =
491 container_of(dirty->unit, typeof(*stdu), base);
492 struct vmw_stdu_dma *cmd = dirty->cmd;
493 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
494 SVGA3dCmdSurfaceDMASuffix *suffix =
495 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
496 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
498 if (!dirty->num_hits) {
499 vmw_fifo_commit(dirty->dev_priv, 0);
503 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
504 cmd->header.size = sizeof(cmd->body) + blit_size;
505 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
506 cmd->body.guest.pitch = ddirty->pitch;
507 cmd->body.host.sid = stdu->display_srf->res.id;
508 cmd->body.host.face = 0;
509 cmd->body.host.mipmap = 0;
510 cmd->body.transfer = ddirty->transfer;
511 suffix->suffixSize = sizeof(*suffix);
512 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
514 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
515 blit_size += sizeof(struct vmw_stdu_update);
517 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
518 ddirty->left, ddirty->right,
519 ddirty->top, ddirty->bottom);
522 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
524 stdu->display_srf->res.res_dirty = true;
525 ddirty->left = ddirty->top = S32_MAX;
526 ddirty->right = ddirty->bottom = S32_MIN;
531 * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
533 * @dirty: The closure structure.
535 * This function calculates the bounding box for all the incoming clips.
537 static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
539 struct vmw_stdu_dirty *ddirty =
540 container_of(dirty, struct vmw_stdu_dirty, base);
544 /* Calculate destination bounding box */
545 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
546 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
547 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
548 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
551 * Calculate content bounding box. We only need the top-left
552 * coordinate because width and height will be the same as the
553 * destination bounding box above
555 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
556 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
561 * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
563 * @dirty: The closure structure.
565 * For the special case when we cannot create a proxy surface in a
566 * 2D VM, we have to do a CPU blit ourselves.
568 static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
570 struct vmw_stdu_dirty *ddirty =
571 container_of(dirty, struct vmw_stdu_dirty, base);
572 struct vmw_screen_target_display_unit *stdu =
573 container_of(dirty->unit, typeof(*stdu), base);
575 s32 src_pitch, dst_pitch;
576 struct ttm_buffer_object *src_bo, *dst_bo;
577 u32 src_offset, dst_offset;
578 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
580 if (!dirty->num_hits)
583 width = ddirty->right - ddirty->left;
584 height = ddirty->bottom - ddirty->top;
586 if (width == 0 || height == 0)
589 /* Assume we are blitting from Guest (bo) to Host (display_srf) */
590 dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
591 dst_bo = &stdu->display_srf->res.backup->base;
592 dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
594 src_pitch = ddirty->pitch;
595 src_bo = &ddirty->buf->base;
596 src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
598 /* Swap src and dst if the assumption was wrong. */
599 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
600 swap(dst_pitch, src_pitch);
601 swap(dst_bo, src_bo);
602 swap(src_offset, dst_offset);
605 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
606 src_bo, src_offset, src_pitch,
607 width * stdu->cpp, height, &diff);
609 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
610 drm_rect_visible(&diff.rect)) {
611 struct vmw_private *dev_priv;
612 struct vmw_stdu_update *cmd;
613 struct drm_clip_rect region;
616 /* We are updating the actual surface, not a proxy */
617 region.x1 = diff.rect.x1;
618 region.x2 = diff.rect.x2;
619 region.y1 = diff.rect.y1;
620 region.y2 = diff.rect.y2;
621 ret = vmw_kms_update_proxy(&stdu->display_srf->res, ®ion,
627 dev_priv = vmw_priv(stdu->base.crtc.dev);
628 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
632 vmw_stdu_populate_update(cmd, stdu->base.unit,
633 region.x1, region.x2,
634 region.y1, region.y2);
636 vmw_fifo_commit(dev_priv, sizeof(*cmd));
640 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
641 ddirty->right = ddirty->bottom = S32_MIN;
645 * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
646 * framebuffer and the screen target system.
648 * @dev_priv: Pointer to the device private structure.
649 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
650 * set to NULL, but then @user_fence_rep must also be set to NULL.
651 * @vfb: Pointer to the buffer-object backed framebuffer.
652 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
653 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
655 * @num_clips: Number of clip rects in @clips or @vclips.
656 * @increment: Increment to use when looping over @clips or @vclips.
657 * @to_surface: Whether to DMA to the screen target system as opposed to
658 * from the screen target system.
659 * @interruptible: Whether to perform waits interruptible if possible.
660 * @crtc: If crtc is passed, perform stdu dma on that crtc only.
662 * If DMA-ing till the screen target system, the function will also notify
663 * the screen target system that a bounding box of the cliprects has been
665 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
668 int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
669 struct drm_file *file_priv,
670 struct vmw_framebuffer *vfb,
671 struct drm_vmw_fence_rep __user *user_fence_rep,
672 struct drm_clip_rect *clips,
673 struct drm_vmw_rect *vclips,
678 struct drm_crtc *crtc)
680 struct vmw_buffer_object *buf =
681 container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
682 struct vmw_stdu_dirty ddirty;
684 bool cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
685 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
688 * VMs without 3D support don't have the surface DMA command and
689 * we'll be using a CPU blit, and the framebuffer should be moved out
692 ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit);
696 ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
700 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
701 SVGA3D_READ_HOST_VRAM;
702 ddirty.left = ddirty.top = S32_MAX;
703 ddirty.right = ddirty.bottom = S32_MIN;
704 ddirty.fb_left = ddirty.fb_top = S32_MAX;
705 ddirty.pitch = vfb->base.pitches[0];
707 ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
708 ddirty.base.clip = vmw_stdu_bo_clip;
709 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
710 num_clips * sizeof(SVGA3dCopyBox) +
711 sizeof(SVGA3dCmdSurfaceDMASuffix);
713 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
717 ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
718 ddirty.base.clip = vmw_stdu_bo_cpu_clip;
719 ddirty.base.fifo_reserve_size = 0;
722 ddirty.base.crtc = crtc;
724 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
725 0, 0, num_clips, increment, &ddirty.base);
727 vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
732 vmw_validation_unref_lists(&val_ctx);
737 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
739 * @dirty: The closure structure.
741 * Encodes a surface copy command cliprect and updates the bounding box
744 static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
746 struct vmw_stdu_dirty *sdirty =
747 container_of(dirty, struct vmw_stdu_dirty, base);
748 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
749 struct vmw_screen_target_display_unit *stdu =
750 container_of(dirty->unit, typeof(*stdu), base);
752 if (sdirty->sid != stdu->display_srf->res.id) {
753 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
755 blit += dirty->num_hits;
756 blit->srcx = dirty->fb_x;
757 blit->srcy = dirty->fb_y;
758 blit->x = dirty->unit_x1;
759 blit->y = dirty->unit_y1;
761 blit->w = dirty->unit_x2 - dirty->unit_x1;
762 blit->h = dirty->unit_y2 - dirty->unit_y1;
767 /* Destination bounding box */
768 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
769 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
770 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
771 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
775 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
778 * @dirty: The closure structure.
780 * Fills in the missing fields in a surface copy command, and encodes a screen
781 * target update command.
783 static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
785 struct vmw_stdu_dirty *sdirty =
786 container_of(dirty, struct vmw_stdu_dirty, base);
787 struct vmw_screen_target_display_unit *stdu =
788 container_of(dirty->unit, typeof(*stdu), base);
789 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
790 struct vmw_stdu_update *update;
791 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
794 if (!dirty->num_hits) {
795 vmw_fifo_commit(dirty->dev_priv, 0);
799 if (sdirty->sid != stdu->display_srf->res.id) {
800 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
802 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
803 cmd->header.size = sizeof(cmd->body) + blit_size;
804 cmd->body.src.sid = sdirty->sid;
805 cmd->body.dest.sid = stdu->display_srf->res.id;
806 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
807 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
808 stdu->display_srf->res.res_dirty = true;
811 commit_size = sizeof(*update);
814 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
815 sdirty->right, sdirty->top, sdirty->bottom);
817 vmw_fifo_commit(dirty->dev_priv, commit_size);
819 sdirty->left = sdirty->top = S32_MAX;
820 sdirty->right = sdirty->bottom = S32_MIN;
824 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
826 * @dev_priv: Pointer to the device private structure.
827 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
828 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
829 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
831 * @srf: Pointer to surface to blit from. If NULL, the surface attached
832 * to @framebuffer will be used.
833 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
834 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
835 * @num_clips: Number of clip rects in @clips.
836 * @inc: Increment to use when looping over @clips.
837 * @out_fence: If non-NULL, will return a ref-counted pointer to a
838 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
839 * case the device has already synchronized.
840 * @crtc: If crtc is passed, perform surface dirty on that crtc only.
842 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
845 int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
846 struct vmw_framebuffer *framebuffer,
847 struct drm_clip_rect *clips,
848 struct drm_vmw_rect *vclips,
849 struct vmw_resource *srf,
852 unsigned num_clips, int inc,
853 struct vmw_fence_obj **out_fence,
854 struct drm_crtc *crtc)
856 struct vmw_framebuffer_surface *vfbs =
857 container_of(framebuffer, typeof(*vfbs), base);
858 struct vmw_stdu_dirty sdirty;
859 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
863 srf = &vfbs->surface->res;
865 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
870 ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
874 if (vfbs->is_bo_proxy) {
875 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
880 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
881 sdirty.base.clip = vmw_kms_stdu_surface_clip;
882 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
883 sizeof(SVGA3dCopyBox) * num_clips +
884 sizeof(struct vmw_stdu_update);
885 sdirty.base.crtc = crtc;
886 sdirty.sid = srf->id;
887 sdirty.left = sdirty.top = S32_MAX;
888 sdirty.right = sdirty.bottom = S32_MIN;
890 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
891 dest_x, dest_y, num_clips, inc,
894 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
900 vmw_validation_unref_lists(&val_ctx);
906 * Screen Target CRTC dispatch table
908 static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
909 .gamma_set = vmw_du_crtc_gamma_set,
910 .destroy = vmw_stdu_crtc_destroy,
911 .reset = vmw_du_crtc_reset,
912 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
913 .atomic_destroy_state = vmw_du_crtc_destroy_state,
914 .set_config = drm_atomic_helper_set_config,
915 .page_flip = drm_atomic_helper_page_flip,
920 /******************************************************************************
921 * Screen Target Display Unit Encoder Functions
922 *****************************************************************************/
925 * vmw_stdu_encoder_destroy - cleans up the STDU
927 * @encoder: used the get the containing STDU
929 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
930 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
931 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
934 static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
936 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
939 static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
940 .destroy = vmw_stdu_encoder_destroy,
945 /******************************************************************************
946 * Screen Target Display Unit Connector Functions
947 *****************************************************************************/
950 * vmw_stdu_connector_destroy - cleans up the STDU
952 * @connector: used to get the containing STDU
954 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
955 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
956 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
959 static void vmw_stdu_connector_destroy(struct drm_connector *connector)
961 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
966 static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
967 .dpms = vmw_du_connector_dpms,
968 .detect = vmw_du_connector_detect,
969 .fill_modes = vmw_du_connector_fill_modes,
970 .destroy = vmw_stdu_connector_destroy,
971 .reset = vmw_du_connector_reset,
972 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
973 .atomic_destroy_state = vmw_du_connector_destroy_state,
978 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
983 /******************************************************************************
984 * Screen Target Display Plane Functions
985 *****************************************************************************/
990 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
992 * @plane: display plane
993 * @old_state: Contains the FB to clean up
995 * Unpins the display surface
997 * Returns 0 on success
1000 vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1001 struct drm_plane_state *old_state)
1003 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1006 WARN_ON(!vps->pinned);
1008 vmw_du_plane_cleanup_fb(plane, old_state);
1010 vps->content_fb_type = SAME_AS_DISPLAY;
1017 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1019 * @plane: display plane
1020 * @new_state: info on the new plane state, including the FB
1022 * This function allocates a new display surface if the content is
1023 * backed by a buffer object. The display surface is pinned here, and it'll
1024 * be unpinned in .cleanup_fb()
1026 * Returns 0 on success
1029 vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1030 struct drm_plane_state *new_state)
1032 struct vmw_private *dev_priv = vmw_priv(plane->dev);
1033 struct drm_framebuffer *new_fb = new_state->fb;
1034 struct vmw_framebuffer *vfb;
1035 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1036 enum stdu_content_type new_content_type;
1037 struct vmw_framebuffer_surface *new_vfbs;
1038 struct drm_crtc *crtc = new_state->crtc;
1039 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1042 /* No FB to prepare */
1045 WARN_ON(vps->pinned != 0);
1046 vmw_surface_unreference(&vps->surf);
1052 vfb = vmw_framebuffer_to_vfb(new_fb);
1053 new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1055 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1056 new_vfbs->surface->base_size.height == vdisplay)
1057 new_content_type = SAME_AS_DISPLAY;
1059 new_content_type = SEPARATE_BO;
1061 new_content_type = SEPARATE_SURFACE;
1063 if (new_content_type != SAME_AS_DISPLAY) {
1064 struct vmw_surface content_srf;
1065 struct drm_vmw_size display_base_size = {0};
1067 display_base_size.width = hdisplay;
1068 display_base_size.height = vdisplay;
1069 display_base_size.depth = 1;
1072 * If content buffer is a buffer object, then we have to
1073 * construct surface info
1075 if (new_content_type == SEPARATE_BO) {
1077 switch (new_fb->format->cpp[0]*8) {
1079 content_srf.format = SVGA3D_X8R8G8B8;
1083 content_srf.format = SVGA3D_R5G6B5;
1087 content_srf.format = SVGA3D_P8;
1091 DRM_ERROR("Invalid format\n");
1095 content_srf.flags = 0;
1096 content_srf.mip_levels[0] = 1;
1097 content_srf.multisample_count = 0;
1098 content_srf.multisample_pattern =
1099 SVGA3D_MS_PATTERN_NONE;
1100 content_srf.quality_level = SVGA3D_MS_QUALITY_NONE;
1102 content_srf = *new_vfbs->surface;
1106 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1108 if (cur_base_size.width != display_base_size.width ||
1109 cur_base_size.height != display_base_size.height ||
1110 vps->surf->format != content_srf.format) {
1111 WARN_ON(vps->pinned != 0);
1112 vmw_surface_unreference(&vps->surf);
1118 ret = vmw_surface_gb_priv_define
1120 /* Kernel visible only */
1124 true, /* a scanout buffer */
1125 content_srf.mip_levels[0],
1126 content_srf.multisample_count,
1129 content_srf.multisample_pattern,
1130 content_srf.quality_level,
1133 DRM_ERROR("Couldn't allocate STDU surface.\n");
1139 * prepare_fb and clean_fb should only take care of pinning
1140 * and unpinning. References are tracked by state objects.
1141 * The only time we add a reference in prepare_fb is if the
1142 * state object doesn't have a reference to begin with
1145 WARN_ON(vps->pinned != 0);
1146 vmw_surface_unreference(&vps->surf);
1149 vps->surf = vmw_surface_reference(new_vfbs->surface);
1154 /* Pin new surface before flipping */
1155 ret = vmw_resource_pin(&vps->surf->res, false);
1162 vps->content_fb_type = new_content_type;
1165 * This should only happen if the buffer object is too large to create a
1166 * proxy surface for.
1167 * If we are a 2D VM with a buffer object then we have to use CPU blit
1168 * so cache these mappings
1170 if (vps->content_fb_type == SEPARATE_BO &&
1171 !(dev_priv->capabilities & SVGA_CAP_3D))
1172 vps->cpp = new_fb->pitches[0] / new_fb->width;
1177 vmw_surface_unreference(&vps->surf);
1181 static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update,
1184 return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits +
1185 sizeof(SVGA3dCmdSurfaceDMASuffix) +
1186 sizeof(struct vmw_stdu_update);
1189 static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update,
1192 return sizeof(struct vmw_stdu_update_gb_image) +
1193 sizeof(struct vmw_stdu_update);
1196 static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane *update,
1197 void *cmd, uint32_t num_hits)
1199 struct vmw_screen_target_display_unit *stdu;
1200 struct vmw_framebuffer_bo *vfbbo;
1201 struct vmw_stdu_dma *cmd_dma = cmd;
1203 stdu = container_of(update->du, typeof(*stdu), base);
1204 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1206 cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA;
1207 cmd_dma->header.size = sizeof(cmd_dma->body) +
1208 sizeof(struct SVGA3dCopyBox) * num_hits +
1209 sizeof(SVGA3dCmdSurfaceDMASuffix);
1210 vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &cmd_dma->body.guest.ptr);
1211 cmd_dma->body.guest.pitch = update->vfb->base.pitches[0];
1212 cmd_dma->body.host.sid = stdu->display_srf->res.id;
1213 cmd_dma->body.host.face = 0;
1214 cmd_dma->body.host.mipmap = 0;
1215 cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM;
1217 return sizeof(*cmd_dma);
1220 static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane *update,
1221 void *cmd, struct drm_rect *clip,
1222 uint32_t fb_x, uint32_t fb_y)
1224 struct SVGA3dCopyBox *box = cmd;
1232 box->w = drm_rect_width(clip);
1233 box->h = drm_rect_height(clip);
1236 return sizeof(*box);
1239 static uint32_t vmw_stdu_bo_populate_update(struct vmw_du_update_plane *update,
1240 void *cmd, struct drm_rect *bb)
1242 struct vmw_screen_target_display_unit *stdu;
1243 struct vmw_framebuffer_bo *vfbbo;
1244 SVGA3dCmdSurfaceDMASuffix *suffix = cmd;
1246 stdu = container_of(update->du, typeof(*stdu), base);
1247 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1249 suffix->suffixSize = sizeof(*suffix);
1250 suffix->maximumOffset = vfbbo->buffer->base.num_pages * PAGE_SIZE;
1252 vmw_stdu_populate_update(&suffix[1], stdu->base.unit, bb->x1, bb->x2,
1255 return sizeof(*suffix) + sizeof(struct vmw_stdu_update);
1258 static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane *update,
1259 void *cmd, uint32_t num_hits)
1261 struct vmw_du_update_plane_buffer *bo_update =
1262 container_of(update, typeof(*bo_update), base);
1264 bo_update->fb_left = INT_MAX;
1265 bo_update->fb_top = INT_MAX;
1270 static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane *update,
1271 void *cmd, struct drm_rect *clip,
1272 uint32_t fb_x, uint32_t fb_y)
1274 struct vmw_du_update_plane_buffer *bo_update =
1275 container_of(update, typeof(*bo_update), base);
1277 bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x);
1278 bo_update->fb_top = min_t(int, bo_update->fb_top, fb_y);
1284 vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd,
1285 struct drm_rect *bb)
1287 struct vmw_du_update_plane_buffer *bo_update;
1288 struct vmw_screen_target_display_unit *stdu;
1289 struct vmw_framebuffer_bo *vfbbo;
1290 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0);
1291 struct vmw_stdu_update_gb_image *cmd_img = cmd;
1292 struct vmw_stdu_update *cmd_update;
1293 struct ttm_buffer_object *src_bo, *dst_bo;
1294 u32 src_offset, dst_offset;
1295 s32 src_pitch, dst_pitch;
1298 bo_update = container_of(update, typeof(*bo_update), base);
1299 stdu = container_of(update->du, typeof(*stdu), base);
1300 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1302 width = bb->x2 - bb->x1;
1303 height = bb->y2 - bb->y1;
1305 diff.cpp = stdu->cpp;
1307 dst_bo = &stdu->display_srf->res.backup->base;
1308 dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
1309 dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
1311 src_bo = &vfbbo->buffer->base;
1312 src_pitch = update->vfb->base.pitches[0];
1313 src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1316 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo,
1317 src_offset, src_pitch, width * stdu->cpp, height,
1320 if (drm_rect_visible(&diff.rect)) {
1321 SVGA3dBox *box = &cmd_img->body.box;
1323 cmd_img->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1324 cmd_img->header.size = sizeof(cmd_img->body);
1325 cmd_img->body.image.sid = stdu->display_srf->res.id;
1326 cmd_img->body.image.face = 0;
1327 cmd_img->body.image.mipmap = 0;
1329 box->x = diff.rect.x1;
1330 box->y = diff.rect.y1;
1332 box->w = drm_rect_width(&diff.rect);
1333 box->h = drm_rect_height(&diff.rect);
1336 cmd_update = (struct vmw_stdu_update *)&cmd_img[1];
1337 vmw_stdu_populate_update(cmd_update, stdu->base.unit,
1338 diff.rect.x1, diff.rect.x2,
1339 diff.rect.y1, diff.rect.y2);
1341 return sizeof(*cmd_img) + sizeof(*cmd_update);
1348 * vmw_stdu_plane_update_bo - Update display unit for bo backed fb.
1349 * @dev_priv: device private.
1350 * @plane: plane state.
1351 * @old_state: old plane state.
1352 * @vfb: framebuffer which is blitted to display unit.
1353 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1354 * The returned fence pointer may be NULL in which case the device
1355 * has already synchronized.
1357 * Return: 0 on success or a negative error code on failure.
1359 static int vmw_stdu_plane_update_bo(struct vmw_private *dev_priv,
1360 struct drm_plane *plane,
1361 struct drm_plane_state *old_state,
1362 struct vmw_framebuffer *vfb,
1363 struct vmw_fence_obj **out_fence)
1365 struct vmw_du_update_plane_buffer bo_update;
1367 memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
1368 bo_update.base.plane = plane;
1369 bo_update.base.old_state = old_state;
1370 bo_update.base.dev_priv = dev_priv;
1371 bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
1372 bo_update.base.vfb = vfb;
1373 bo_update.base.out_fence = out_fence;
1374 bo_update.base.mutex = NULL;
1375 bo_update.base.cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
1376 bo_update.base.intr = false;
1379 * VM without 3D support don't have surface DMA command and framebuffer
1380 * should be moved out of VRAM.
1382 if (bo_update.base.cpu_blit) {
1383 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size_cpu;
1384 bo_update.base.pre_clip = vmw_stdu_bo_pre_clip_cpu;
1385 bo_update.base.clip = vmw_stdu_bo_clip_cpu;
1386 bo_update.base.post_clip = vmw_stdu_bo_populate_update_cpu;
1388 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size;
1389 bo_update.base.pre_clip = vmw_stdu_bo_populate_dma;
1390 bo_update.base.clip = vmw_stdu_bo_populate_clip;
1391 bo_update.base.post_clip = vmw_stdu_bo_populate_update;
1394 return vmw_du_helper_plane_update(&bo_update.base);
1398 vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
1401 struct vmw_framebuffer_surface *vfbs;
1404 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1406 if (vfbs->is_bo_proxy)
1407 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1409 size += sizeof(struct vmw_stdu_update);
1414 static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
1417 struct vmw_framebuffer_surface *vfbs;
1420 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1422 if (vfbs->is_bo_proxy)
1423 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1425 size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
1426 num_hits + sizeof(struct vmw_stdu_update);
1432 vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
1434 struct vmw_framebuffer_surface *vfbs;
1435 struct drm_plane_state *state = update->plane->state;
1436 struct drm_plane_state *old_state = update->old_state;
1437 struct vmw_stdu_update_gb_image *cmd_update = cmd;
1438 struct drm_atomic_helper_damage_iter iter;
1439 struct drm_rect clip;
1440 uint32_t copy_size = 0;
1442 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1445 * proxy surface is special where a buffer object type fb is wrapped
1446 * in a surface and need an update gb image command to sync with device.
1448 drm_atomic_helper_damage_iter_init(&iter, old_state, state);
1449 drm_atomic_for_each_plane_damage(&iter, &clip) {
1450 SVGA3dBox *box = &cmd_update->body.box;
1452 cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1453 cmd_update->header.size = sizeof(cmd_update->body);
1454 cmd_update->body.image.sid = vfbs->surface->res.id;
1455 cmd_update->body.image.face = 0;
1456 cmd_update->body.image.mipmap = 0;
1461 box->w = drm_rect_width(&clip);
1462 box->h = drm_rect_height(&clip);
1465 copy_size += sizeof(*cmd_update);
1473 vmw_stdu_surface_populate_copy(struct vmw_du_update_plane *update, void *cmd,
1476 struct vmw_screen_target_display_unit *stdu;
1477 struct vmw_framebuffer_surface *vfbs;
1478 struct vmw_stdu_surface_copy *cmd_copy = cmd;
1480 stdu = container_of(update->du, typeof(*stdu), base);
1481 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1483 cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
1484 cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
1486 cmd_copy->body.src.sid = vfbs->surface->res.id;
1487 cmd_copy->body.dest.sid = stdu->display_srf->res.id;
1489 return sizeof(*cmd_copy);
1493 vmw_stdu_surface_populate_clip(struct vmw_du_update_plane *update, void *cmd,
1494 struct drm_rect *clip, uint32_t fb_x,
1497 struct SVGA3dCopyBox *box = cmd;
1505 box->w = drm_rect_width(clip);
1506 box->h = drm_rect_height(clip);
1509 return sizeof(*box);
1513 vmw_stdu_surface_populate_update(struct vmw_du_update_plane *update, void *cmd,
1514 struct drm_rect *bb)
1516 vmw_stdu_populate_update(cmd, update->du->unit, bb->x1, bb->x2, bb->y1,
1519 return sizeof(struct vmw_stdu_update);
1523 * vmw_stdu_plane_update_surface - Update display unit for surface backed fb
1524 * @dev_priv: Device private
1525 * @plane: Plane state
1526 * @old_state: Old plane state
1527 * @vfb: Framebuffer which is blitted to display unit
1528 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1529 * The returned fence pointer may be NULL in which case the device
1530 * has already synchronized.
1532 * Return: 0 on success or a negative error code on failure.
1534 static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv,
1535 struct drm_plane *plane,
1536 struct drm_plane_state *old_state,
1537 struct vmw_framebuffer *vfb,
1538 struct vmw_fence_obj **out_fence)
1540 struct vmw_du_update_plane srf_update;
1541 struct vmw_screen_target_display_unit *stdu;
1542 struct vmw_framebuffer_surface *vfbs;
1544 stdu = vmw_crtc_to_stdu(plane->state->crtc);
1545 vfbs = container_of(vfb, typeof(*vfbs), base);
1547 memset(&srf_update, 0, sizeof(struct vmw_du_update_plane));
1548 srf_update.plane = plane;
1549 srf_update.old_state = old_state;
1550 srf_update.dev_priv = dev_priv;
1551 srf_update.du = vmw_crtc_to_du(plane->state->crtc);
1552 srf_update.vfb = vfb;
1553 srf_update.out_fence = out_fence;
1554 srf_update.mutex = &dev_priv->cmdbuf_mutex;
1555 srf_update.cpu_blit = false;
1556 srf_update.intr = true;
1558 if (vfbs->is_bo_proxy)
1559 srf_update.post_prepare = vmw_stdu_surface_update_proxy;
1561 if (vfbs->surface->res.id != stdu->display_srf->res.id) {
1562 srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size;
1563 srf_update.pre_clip = vmw_stdu_surface_populate_copy;
1564 srf_update.clip = vmw_stdu_surface_populate_clip;
1566 srf_update.calc_fifo_size =
1567 vmw_stdu_surface_fifo_size_same_display;
1570 srf_update.post_clip = vmw_stdu_surface_populate_update;
1572 return vmw_du_helper_plane_update(&srf_update);
1576 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1577 * @plane: display plane
1578 * @old_state: Only used to get crtc info
1580 * Formally update stdu->display_srf to the new plane, and bind the new
1581 * plane STDU. This function is called during the commit phase when
1582 * all the preparation have been done and all the configurations have
1586 vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1587 struct drm_plane_state *old_state)
1589 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1590 struct drm_crtc *crtc = plane->state->crtc;
1591 struct vmw_screen_target_display_unit *stdu;
1592 struct drm_pending_vblank_event *event;
1593 struct vmw_fence_obj *fence = NULL;
1594 struct vmw_private *dev_priv;
1597 /* If case of device error, maintain consistent atomic state */
1598 if (crtc && plane->state->fb) {
1599 struct vmw_framebuffer *vfb =
1600 vmw_framebuffer_to_vfb(plane->state->fb);
1601 stdu = vmw_crtc_to_stdu(crtc);
1602 dev_priv = vmw_priv(crtc->dev);
1604 stdu->display_srf = vps->surf;
1605 stdu->content_fb_type = vps->content_fb_type;
1606 stdu->cpp = vps->cpp;
1608 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1610 DRM_ERROR("Failed to bind surface to STDU.\n");
1613 ret = vmw_stdu_plane_update_bo(dev_priv, plane,
1614 old_state, vfb, &fence);
1616 ret = vmw_stdu_plane_update_surface(dev_priv, plane,
1620 DRM_ERROR("Failed to update STDU.\n");
1622 crtc = old_state->crtc;
1623 stdu = vmw_crtc_to_stdu(crtc);
1624 dev_priv = vmw_priv(crtc->dev);
1626 /* Blank STDU when fb and crtc are NULL */
1630 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1632 DRM_ERROR("Failed to blank STDU\n");
1634 ret = vmw_stdu_update_st(dev_priv, stdu);
1636 DRM_ERROR("Failed to update STDU.\n");
1641 /* In case of error, vblank event is send in vmw_du_crtc_atomic_flush */
1642 event = crtc->state->event;
1643 if (event && fence) {
1644 struct drm_file *file_priv = event->base.file_priv;
1646 ret = vmw_event_fence_action_queue(file_priv,
1649 &event->event.vbl.tv_sec,
1650 &event->event.vbl.tv_usec,
1653 DRM_ERROR("Failed to queue event on fence.\n");
1655 crtc->state->event = NULL;
1659 vmw_fence_obj_unreference(&fence);
1663 static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1664 .update_plane = drm_atomic_helper_update_plane,
1665 .disable_plane = drm_atomic_helper_disable_plane,
1666 .destroy = vmw_du_primary_plane_destroy,
1667 .reset = vmw_du_plane_reset,
1668 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1669 .atomic_destroy_state = vmw_du_plane_destroy_state,
1672 static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1673 .update_plane = drm_atomic_helper_update_plane,
1674 .disable_plane = drm_atomic_helper_disable_plane,
1675 .destroy = vmw_du_cursor_plane_destroy,
1676 .reset = vmw_du_plane_reset,
1677 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1678 .atomic_destroy_state = vmw_du_plane_destroy_state,
1686 drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1687 .atomic_check = vmw_du_cursor_plane_atomic_check,
1688 .atomic_update = vmw_du_cursor_plane_atomic_update,
1689 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1690 .cleanup_fb = vmw_du_plane_cleanup_fb,
1694 drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1695 .atomic_check = vmw_du_primary_plane_atomic_check,
1696 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1697 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1698 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1701 static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1702 .prepare = vmw_stdu_crtc_helper_prepare,
1703 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1704 .atomic_check = vmw_du_crtc_atomic_check,
1705 .atomic_begin = vmw_du_crtc_atomic_begin,
1706 .atomic_flush = vmw_du_crtc_atomic_flush,
1707 .atomic_enable = vmw_stdu_crtc_atomic_enable,
1708 .atomic_disable = vmw_stdu_crtc_atomic_disable,
1713 * vmw_stdu_init - Sets up a Screen Target Display Unit
1715 * @dev_priv: VMW DRM device
1716 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1718 * This function is called once per CRTC, and allocates one Screen Target
1719 * display unit to represent that CRTC. Since the SVGA device does not separate
1720 * out encoder and connector, they are represented as part of the STDU as well.
1722 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1724 struct vmw_screen_target_display_unit *stdu;
1725 struct drm_device *dev = dev_priv->dev;
1726 struct drm_connector *connector;
1727 struct drm_encoder *encoder;
1728 struct drm_plane *primary, *cursor;
1729 struct drm_crtc *crtc;
1733 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1737 stdu->base.unit = unit;
1738 crtc = &stdu->base.crtc;
1739 encoder = &stdu->base.encoder;
1740 connector = &stdu->base.connector;
1741 primary = &stdu->base.primary;
1742 cursor = &stdu->base.cursor;
1744 stdu->base.pref_active = (unit == 0);
1745 stdu->base.pref_width = dev_priv->initial_width;
1746 stdu->base.pref_height = dev_priv->initial_height;
1747 stdu->base.is_implicit = false;
1749 /* Initialize primary plane */
1750 vmw_du_plane_reset(primary);
1752 ret = drm_universal_plane_init(dev, primary,
1753 0, &vmw_stdu_plane_funcs,
1754 vmw_primary_plane_formats,
1755 ARRAY_SIZE(vmw_primary_plane_formats),
1756 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1758 DRM_ERROR("Failed to initialize primary plane");
1762 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1763 drm_plane_enable_fb_damage_clips(primary);
1765 /* Initialize cursor plane */
1766 vmw_du_plane_reset(cursor);
1768 ret = drm_universal_plane_init(dev, cursor,
1769 0, &vmw_stdu_cursor_funcs,
1770 vmw_cursor_plane_formats,
1771 ARRAY_SIZE(vmw_cursor_plane_formats),
1772 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
1774 DRM_ERROR("Failed to initialize cursor plane");
1775 drm_plane_cleanup(&stdu->base.primary);
1779 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1781 vmw_du_connector_reset(connector);
1783 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1784 DRM_MODE_CONNECTOR_VIRTUAL);
1786 DRM_ERROR("Failed to initialize connector\n");
1790 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1791 connector->status = vmw_du_connector_detect(connector, false);
1793 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1794 DRM_MODE_ENCODER_VIRTUAL, NULL);
1796 DRM_ERROR("Failed to initialize encoder\n");
1797 goto err_free_connector;
1800 (void) drm_connector_attach_encoder(connector, encoder);
1801 encoder->possible_crtcs = (1 << unit);
1802 encoder->possible_clones = 0;
1804 ret = drm_connector_register(connector);
1806 DRM_ERROR("Failed to register connector\n");
1807 goto err_free_encoder;
1810 vmw_du_crtc_reset(crtc);
1811 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1813 &vmw_stdu_crtc_funcs, NULL);
1815 DRM_ERROR("Failed to initialize CRTC\n");
1816 goto err_free_unregister;
1819 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1821 drm_mode_crtc_set_gamma_size(crtc, 256);
1823 drm_object_attach_property(&connector->base,
1824 dev_priv->hotplug_mode_update_property, 1);
1825 drm_object_attach_property(&connector->base,
1826 dev->mode_config.suggested_x_property, 0);
1827 drm_object_attach_property(&connector->base,
1828 dev->mode_config.suggested_y_property, 0);
1831 err_free_unregister:
1832 drm_connector_unregister(connector);
1834 drm_encoder_cleanup(encoder);
1836 drm_connector_cleanup(connector);
1845 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1847 * @stdu: Screen Target Display Unit to be destroyed
1849 * Clean up after vmw_stdu_init
1851 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1853 vmw_du_cleanup(&stdu->base);
1859 /******************************************************************************
1860 * Screen Target Display KMS Functions
1862 * These functions are called by the common KMS code in vmwgfx_kms.c
1863 *****************************************************************************/
1866 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1868 * @dev_priv: VMW DRM device
1870 * This function initialize a Screen Target based display device. It checks
1871 * the capability bits to make sure the underlying hardware can support
1872 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1873 * Units, as supported by the display hardware.
1876 * 0 on success, error code otherwise
1878 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1880 struct drm_device *dev = dev_priv->dev;
1884 /* Do nothing if Screen Target support is turned off */
1885 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1888 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1891 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1892 if (unlikely(ret != 0))
1895 dev_priv->active_display_unit = vmw_du_screen_target;
1897 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1898 ret = vmw_stdu_init(dev_priv, i);
1900 if (unlikely(ret != 0)) {
1901 DRM_ERROR("Failed to initialize STDU %d", i);
1906 DRM_INFO("Screen Target Display device initialized\n");