Merge tag 'for-5.4-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave...
[linux-2.6-microblaze.git] / drivers / gpu / drm / v3d / v3d_gem.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2014-2018 Broadcom */
3
4 #include <linux/device.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/io.h>
7 #include <linux/module.h>
8 #include <linux/platform_device.h>
9 #include <linux/pm_runtime.h>
10 #include <linux/reset.h>
11 #include <linux/sched/signal.h>
12 #include <linux/uaccess.h>
13
14 #include <drm/drm_syncobj.h>
15 #include <uapi/drm/v3d_drm.h>
16
17 #include "v3d_drv.h"
18 #include "v3d_regs.h"
19 #include "v3d_trace.h"
20
21 static void
22 v3d_init_core(struct v3d_dev *v3d, int core)
23 {
24         /* Set OVRTMUOUT, which means that the texture sampler uniform
25          * configuration's tmu output type field is used, instead of
26          * using the hardware default behavior based on the texture
27          * type.  If you want the default behavior, you can still put
28          * "2" in the indirect texture state's output_type field.
29          */
30         if (v3d->ver < 40)
31                 V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
32
33         /* Whenever we flush the L2T cache, we always want to flush
34          * the whole thing.
35          */
36         V3D_CORE_WRITE(core, V3D_CTL_L2TFLSTA, 0);
37         V3D_CORE_WRITE(core, V3D_CTL_L2TFLEND, ~0);
38 }
39
40 /* Sets invariant state for the HW. */
41 static void
42 v3d_init_hw_state(struct v3d_dev *v3d)
43 {
44         v3d_init_core(v3d, 0);
45 }
46
47 static void
48 v3d_idle_axi(struct v3d_dev *v3d, int core)
49 {
50         V3D_CORE_WRITE(core, V3D_GMP_CFG, V3D_GMP_CFG_STOP_REQ);
51
52         if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS) &
53                       (V3D_GMP_STATUS_RD_COUNT_MASK |
54                        V3D_GMP_STATUS_WR_COUNT_MASK |
55                        V3D_GMP_STATUS_CFG_BUSY)) == 0, 100)) {
56                 DRM_ERROR("Failed to wait for safe GMP shutdown\n");
57         }
58 }
59
60 static void
61 v3d_idle_gca(struct v3d_dev *v3d)
62 {
63         if (v3d->ver >= 41)
64                 return;
65
66         V3D_GCA_WRITE(V3D_GCA_SAFE_SHUTDOWN, V3D_GCA_SAFE_SHUTDOWN_EN);
67
68         if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) &
69                       V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED) ==
70                      V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED, 100)) {
71                 DRM_ERROR("Failed to wait for safe GCA shutdown\n");
72         }
73 }
74
75 static void
76 v3d_reset_by_bridge(struct v3d_dev *v3d)
77 {
78         int version = V3D_BRIDGE_READ(V3D_TOP_GR_BRIDGE_REVISION);
79
80         if (V3D_GET_FIELD(version, V3D_TOP_GR_BRIDGE_MAJOR) == 2) {
81                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0,
82                                  V3D_TOP_GR_BRIDGE_SW_INIT_0_V3D_CLK_108_SW_INIT);
83                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0, 0);
84
85                 /* GFXH-1383: The SW_INIT may cause a stray write to address 0
86                  * of the unit, so reset it to its power-on value here.
87                  */
88                 V3D_WRITE(V3D_HUB_AXICFG, V3D_HUB_AXICFG_MAX_LEN_MASK);
89         } else {
90                 WARN_ON_ONCE(V3D_GET_FIELD(version,
91                                            V3D_TOP_GR_BRIDGE_MAJOR) != 7);
92                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1,
93                                  V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT);
94                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 0);
95         }
96 }
97
98 static void
99 v3d_reset_v3d(struct v3d_dev *v3d)
100 {
101         if (v3d->reset)
102                 reset_control_reset(v3d->reset);
103         else
104                 v3d_reset_by_bridge(v3d);
105
106         v3d_init_hw_state(v3d);
107 }
108
109 void
110 v3d_reset(struct v3d_dev *v3d)
111 {
112         struct drm_device *dev = &v3d->drm;
113
114         DRM_DEV_ERROR(dev->dev, "Resetting GPU for hang.\n");
115         DRM_DEV_ERROR(dev->dev, "V3D_ERR_STAT: 0x%08x\n",
116                       V3D_CORE_READ(0, V3D_ERR_STAT));
117         trace_v3d_reset_begin(dev);
118
119         /* XXX: only needed for safe powerdown, not reset. */
120         if (false)
121                 v3d_idle_axi(v3d, 0);
122
123         v3d_idle_gca(v3d);
124         v3d_reset_v3d(v3d);
125
126         v3d_mmu_set_page_table(v3d);
127         v3d_irq_reset(v3d);
128
129         trace_v3d_reset_end(dev);
130 }
131
132 static void
133 v3d_flush_l3(struct v3d_dev *v3d)
134 {
135         if (v3d->ver < 41) {
136                 u32 gca_ctrl = V3D_GCA_READ(V3D_GCA_CACHE_CTRL);
137
138                 V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
139                               gca_ctrl | V3D_GCA_CACHE_CTRL_FLUSH);
140
141                 if (v3d->ver < 33) {
142                         V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
143                                       gca_ctrl & ~V3D_GCA_CACHE_CTRL_FLUSH);
144                 }
145         }
146 }
147
148 /* Invalidates the (read-only) L2C cache.  This was the L2 cache for
149  * uniforms and instructions on V3D 3.2.
150  */
151 static void
152 v3d_invalidate_l2c(struct v3d_dev *v3d, int core)
153 {
154         if (v3d->ver > 32)
155                 return;
156
157         V3D_CORE_WRITE(core, V3D_CTL_L2CACTL,
158                        V3D_L2CACTL_L2CCLR |
159                        V3D_L2CACTL_L2CENA);
160 }
161
162 /* Invalidates texture L2 cachelines */
163 static void
164 v3d_flush_l2t(struct v3d_dev *v3d, int core)
165 {
166         /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't
167          * need to wait for completion before dispatching the job --
168          * L2T accesses will be stalled until the flush has completed.
169          * However, we do need to make sure we don't try to trigger a
170          * new flush while the L2_CLEAN queue is trying to
171          * synchronously clean after a job.
172          */
173         mutex_lock(&v3d->cache_clean_lock);
174         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
175                        V3D_L2TCACTL_L2TFLS |
176                        V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM));
177         mutex_unlock(&v3d->cache_clean_lock);
178 }
179
180 /* Cleans texture L1 and L2 cachelines (writing back dirty data).
181  *
182  * For cleaning, which happens from the CACHE_CLEAN queue after CSD has
183  * executed, we need to make sure that the clean is done before
184  * signaling job completion.  So, we synchronously wait before
185  * returning, and we make sure that L2 invalidates don't happen in the
186  * meantime to confuse our are-we-done checks.
187  */
188 void
189 v3d_clean_caches(struct v3d_dev *v3d)
190 {
191         struct drm_device *dev = &v3d->drm;
192         int core = 0;
193
194         trace_v3d_cache_clean_begin(dev);
195
196         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
197         if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
198                        V3D_L2TCACTL_L2TFLS), 100)) {
199                 DRM_ERROR("Timeout waiting for L1T write combiner flush\n");
200         }
201
202         mutex_lock(&v3d->cache_clean_lock);
203         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
204                        V3D_L2TCACTL_L2TFLS |
205                        V3D_SET_FIELD(V3D_L2TCACTL_FLM_CLEAN, V3D_L2TCACTL_FLM));
206
207         if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
208                        V3D_L2TCACTL_L2TFLS), 100)) {
209                 DRM_ERROR("Timeout waiting for L2T clean\n");
210         }
211
212         mutex_unlock(&v3d->cache_clean_lock);
213
214         trace_v3d_cache_clean_end(dev);
215 }
216
217 /* Invalidates the slice caches.  These are read-only caches. */
218 static void
219 v3d_invalidate_slices(struct v3d_dev *v3d, int core)
220 {
221         V3D_CORE_WRITE(core, V3D_CTL_SLCACTL,
222                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TVCCS) |
223                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TDCCS) |
224                        V3D_SET_FIELD(0xf, V3D_SLCACTL_UCC) |
225                        V3D_SET_FIELD(0xf, V3D_SLCACTL_ICC));
226 }
227
228 void
229 v3d_invalidate_caches(struct v3d_dev *v3d)
230 {
231         /* Invalidate the caches from the outside in.  That way if
232          * another CL's concurrent use of nearby memory were to pull
233          * an invalidated cacheline back in, we wouldn't leave stale
234          * data in the inner cache.
235          */
236         v3d_flush_l3(v3d);
237         v3d_invalidate_l2c(v3d, 0);
238         v3d_flush_l2t(v3d, 0);
239         v3d_invalidate_slices(v3d, 0);
240 }
241
242 /* Takes the reservation lock on all the BOs being referenced, so that
243  * at queue submit time we can update the reservations.
244  *
245  * We don't lock the RCL the tile alloc/state BOs, or overflow memory
246  * (all of which are on exec->unref_list).  They're entirely private
247  * to v3d, so we don't attach dma-buf fences to them.
248  */
249 static int
250 v3d_lock_bo_reservations(struct v3d_job *job,
251                          struct ww_acquire_ctx *acquire_ctx)
252 {
253         int i, ret;
254
255         ret = drm_gem_lock_reservations(job->bo, job->bo_count, acquire_ctx);
256         if (ret)
257                 return ret;
258
259         for (i = 0; i < job->bo_count; i++) {
260                 ret = drm_gem_fence_array_add_implicit(&job->deps,
261                                                        job->bo[i], true);
262                 if (ret) {
263                         drm_gem_unlock_reservations(job->bo, job->bo_count,
264                                                     acquire_ctx);
265                         return ret;
266                 }
267         }
268
269         return 0;
270 }
271
272 /**
273  * v3d_lookup_bos() - Sets up job->bo[] with the GEM objects
274  * referenced by the job.
275  * @dev: DRM device
276  * @file_priv: DRM file for this fd
277  * @job: V3D job being set up
278  *
279  * The command validator needs to reference BOs by their index within
280  * the submitted job's BO list.  This does the validation of the job's
281  * BO list and reference counting for the lifetime of the job.
282  *
283  * Note that this function doesn't need to unreference the BOs on
284  * failure, because that will happen at v3d_exec_cleanup() time.
285  */
286 static int
287 v3d_lookup_bos(struct drm_device *dev,
288                struct drm_file *file_priv,
289                struct v3d_job *job,
290                u64 bo_handles,
291                u32 bo_count)
292 {
293         u32 *handles;
294         int ret = 0;
295         int i;
296
297         job->bo_count = bo_count;
298
299         if (!job->bo_count) {
300                 /* See comment on bo_index for why we have to check
301                  * this.
302                  */
303                 DRM_DEBUG("Rendering requires BOs\n");
304                 return -EINVAL;
305         }
306
307         job->bo = kvmalloc_array(job->bo_count,
308                                  sizeof(struct drm_gem_cma_object *),
309                                  GFP_KERNEL | __GFP_ZERO);
310         if (!job->bo) {
311                 DRM_DEBUG("Failed to allocate validated BO pointers\n");
312                 return -ENOMEM;
313         }
314
315         handles = kvmalloc_array(job->bo_count, sizeof(u32), GFP_KERNEL);
316         if (!handles) {
317                 ret = -ENOMEM;
318                 DRM_DEBUG("Failed to allocate incoming GEM handles\n");
319                 goto fail;
320         }
321
322         if (copy_from_user(handles,
323                            (void __user *)(uintptr_t)bo_handles,
324                            job->bo_count * sizeof(u32))) {
325                 ret = -EFAULT;
326                 DRM_DEBUG("Failed to copy in GEM handles\n");
327                 goto fail;
328         }
329
330         spin_lock(&file_priv->table_lock);
331         for (i = 0; i < job->bo_count; i++) {
332                 struct drm_gem_object *bo = idr_find(&file_priv->object_idr,
333                                                      handles[i]);
334                 if (!bo) {
335                         DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
336                                   i, handles[i]);
337                         ret = -ENOENT;
338                         spin_unlock(&file_priv->table_lock);
339                         goto fail;
340                 }
341                 drm_gem_object_get(bo);
342                 job->bo[i] = bo;
343         }
344         spin_unlock(&file_priv->table_lock);
345
346 fail:
347         kvfree(handles);
348         return ret;
349 }
350
351 static void
352 v3d_job_free(struct kref *ref)
353 {
354         struct v3d_job *job = container_of(ref, struct v3d_job, refcount);
355         unsigned long index;
356         struct dma_fence *fence;
357         int i;
358
359         for (i = 0; i < job->bo_count; i++) {
360                 if (job->bo[i])
361                         drm_gem_object_put_unlocked(job->bo[i]);
362         }
363         kvfree(job->bo);
364
365         xa_for_each(&job->deps, index, fence) {
366                 dma_fence_put(fence);
367         }
368         xa_destroy(&job->deps);
369
370         dma_fence_put(job->irq_fence);
371         dma_fence_put(job->done_fence);
372
373         pm_runtime_mark_last_busy(job->v3d->dev);
374         pm_runtime_put_autosuspend(job->v3d->dev);
375
376         kfree(job);
377 }
378
379 static void
380 v3d_render_job_free(struct kref *ref)
381 {
382         struct v3d_render_job *job = container_of(ref, struct v3d_render_job,
383                                                   base.refcount);
384         struct v3d_bo *bo, *save;
385
386         list_for_each_entry_safe(bo, save, &job->unref_list, unref_head) {
387                 drm_gem_object_put_unlocked(&bo->base.base);
388         }
389
390         v3d_job_free(ref);
391 }
392
393 void v3d_job_put(struct v3d_job *job)
394 {
395         kref_put(&job->refcount, job->free);
396 }
397
398 int
399 v3d_wait_bo_ioctl(struct drm_device *dev, void *data,
400                   struct drm_file *file_priv)
401 {
402         int ret;
403         struct drm_v3d_wait_bo *args = data;
404         ktime_t start = ktime_get();
405         u64 delta_ns;
406         unsigned long timeout_jiffies =
407                 nsecs_to_jiffies_timeout(args->timeout_ns);
408
409         if (args->pad != 0)
410                 return -EINVAL;
411
412         ret = drm_gem_dma_resv_wait(file_priv, args->handle,
413                                               true, timeout_jiffies);
414
415         /* Decrement the user's timeout, in case we got interrupted
416          * such that the ioctl will be restarted.
417          */
418         delta_ns = ktime_to_ns(ktime_sub(ktime_get(), start));
419         if (delta_ns < args->timeout_ns)
420                 args->timeout_ns -= delta_ns;
421         else
422                 args->timeout_ns = 0;
423
424         /* Asked to wait beyond the jiffie/scheduler precision? */
425         if (ret == -ETIME && args->timeout_ns)
426                 ret = -EAGAIN;
427
428         return ret;
429 }
430
431 static int
432 v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv,
433              struct v3d_job *job, void (*free)(struct kref *ref),
434              u32 in_sync)
435 {
436         struct dma_fence *in_fence = NULL;
437         int ret;
438
439         job->v3d = v3d;
440         job->free = free;
441
442         ret = pm_runtime_get_sync(v3d->dev);
443         if (ret < 0)
444                 return ret;
445
446         xa_init_flags(&job->deps, XA_FLAGS_ALLOC);
447
448         ret = drm_syncobj_find_fence(file_priv, in_sync, 0, 0, &in_fence);
449         if (ret == -EINVAL)
450                 goto fail;
451
452         ret = drm_gem_fence_array_add(&job->deps, in_fence);
453         if (ret)
454                 goto fail;
455
456         kref_init(&job->refcount);
457
458         return 0;
459 fail:
460         xa_destroy(&job->deps);
461         pm_runtime_put_autosuspend(v3d->dev);
462         return ret;
463 }
464
465 static int
466 v3d_push_job(struct v3d_file_priv *v3d_priv,
467              struct v3d_job *job, enum v3d_queue queue)
468 {
469         int ret;
470
471         ret = drm_sched_job_init(&job->base, &v3d_priv->sched_entity[queue],
472                                  v3d_priv);
473         if (ret)
474                 return ret;
475
476         job->done_fence = dma_fence_get(&job->base.s_fence->finished);
477
478         /* put by scheduler job completion */
479         kref_get(&job->refcount);
480
481         drm_sched_entity_push_job(&job->base, &v3d_priv->sched_entity[queue]);
482
483         return 0;
484 }
485
486 static void
487 v3d_attach_fences_and_unlock_reservation(struct drm_file *file_priv,
488                                          struct v3d_job *job,
489                                          struct ww_acquire_ctx *acquire_ctx,
490                                          u32 out_sync,
491                                          struct dma_fence *done_fence)
492 {
493         struct drm_syncobj *sync_out;
494         int i;
495
496         for (i = 0; i < job->bo_count; i++) {
497                 /* XXX: Use shared fences for read-only objects. */
498                 dma_resv_add_excl_fence(job->bo[i]->resv,
499                                                   job->done_fence);
500         }
501
502         drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx);
503
504         /* Update the return sync object for the job */
505         sync_out = drm_syncobj_find(file_priv, out_sync);
506         if (sync_out) {
507                 drm_syncobj_replace_fence(sync_out, done_fence);
508                 drm_syncobj_put(sync_out);
509         }
510 }
511
512 /**
513  * v3d_submit_cl_ioctl() - Submits a job (frame) to the V3D.
514  * @dev: DRM device
515  * @data: ioctl argument
516  * @file_priv: DRM file for this fd
517  *
518  * This is the main entrypoint for userspace to submit a 3D frame to
519  * the GPU.  Userspace provides the binner command list (if
520  * applicable), and the kernel sets up the render command list to draw
521  * to the framebuffer described in the ioctl, using the command lists
522  * that the 3D engine's binner will produce.
523  */
524 int
525 v3d_submit_cl_ioctl(struct drm_device *dev, void *data,
526                     struct drm_file *file_priv)
527 {
528         struct v3d_dev *v3d = to_v3d_dev(dev);
529         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
530         struct drm_v3d_submit_cl *args = data;
531         struct v3d_bin_job *bin = NULL;
532         struct v3d_render_job *render;
533         struct ww_acquire_ctx acquire_ctx;
534         int ret = 0;
535
536         trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end);
537
538         if (args->pad != 0) {
539                 DRM_INFO("pad must be zero: %d\n", args->pad);
540                 return -EINVAL;
541         }
542
543         render = kcalloc(1, sizeof(*render), GFP_KERNEL);
544         if (!render)
545                 return -ENOMEM;
546
547         render->start = args->rcl_start;
548         render->end = args->rcl_end;
549         INIT_LIST_HEAD(&render->unref_list);
550
551         ret = v3d_job_init(v3d, file_priv, &render->base,
552                            v3d_render_job_free, args->in_sync_rcl);
553         if (ret) {
554                 kfree(render);
555                 return ret;
556         }
557
558         if (args->bcl_start != args->bcl_end) {
559                 bin = kcalloc(1, sizeof(*bin), GFP_KERNEL);
560                 if (!bin)
561                         return -ENOMEM;
562
563                 ret = v3d_job_init(v3d, file_priv, &bin->base,
564                                    v3d_job_free, args->in_sync_bcl);
565                 if (ret) {
566                         v3d_job_put(&render->base);
567                         return ret;
568                 }
569
570                 bin->start = args->bcl_start;
571                 bin->end = args->bcl_end;
572                 bin->qma = args->qma;
573                 bin->qms = args->qms;
574                 bin->qts = args->qts;
575                 bin->render = render;
576         }
577
578         ret = v3d_lookup_bos(dev, file_priv, &render->base,
579                              args->bo_handles, args->bo_handle_count);
580         if (ret)
581                 goto fail;
582
583         ret = v3d_lock_bo_reservations(&render->base, &acquire_ctx);
584         if (ret)
585                 goto fail;
586
587         mutex_lock(&v3d->sched_lock);
588         if (bin) {
589                 ret = v3d_push_job(v3d_priv, &bin->base, V3D_BIN);
590                 if (ret)
591                         goto fail_unreserve;
592
593                 ret = drm_gem_fence_array_add(&render->base.deps,
594                                               dma_fence_get(bin->base.done_fence));
595                 if (ret)
596                         goto fail_unreserve;
597         }
598
599         ret = v3d_push_job(v3d_priv, &render->base, V3D_RENDER);
600         if (ret)
601                 goto fail_unreserve;
602         mutex_unlock(&v3d->sched_lock);
603
604         v3d_attach_fences_and_unlock_reservation(file_priv,
605                                                  &render->base,
606                                                  &acquire_ctx,
607                                                  args->out_sync,
608                                                  render->base.done_fence);
609
610         if (bin)
611                 v3d_job_put(&bin->base);
612         v3d_job_put(&render->base);
613
614         return 0;
615
616 fail_unreserve:
617         mutex_unlock(&v3d->sched_lock);
618         drm_gem_unlock_reservations(render->base.bo,
619                                     render->base.bo_count, &acquire_ctx);
620 fail:
621         if (bin)
622                 v3d_job_put(&bin->base);
623         v3d_job_put(&render->base);
624
625         return ret;
626 }
627
628 /**
629  * v3d_submit_tfu_ioctl() - Submits a TFU (texture formatting) job to the V3D.
630  * @dev: DRM device
631  * @data: ioctl argument
632  * @file_priv: DRM file for this fd
633  *
634  * Userspace provides the register setup for the TFU, which we don't
635  * need to validate since the TFU is behind the MMU.
636  */
637 int
638 v3d_submit_tfu_ioctl(struct drm_device *dev, void *data,
639                      struct drm_file *file_priv)
640 {
641         struct v3d_dev *v3d = to_v3d_dev(dev);
642         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
643         struct drm_v3d_submit_tfu *args = data;
644         struct v3d_tfu_job *job;
645         struct ww_acquire_ctx acquire_ctx;
646         int ret = 0;
647
648         trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia);
649
650         job = kcalloc(1, sizeof(*job), GFP_KERNEL);
651         if (!job)
652                 return -ENOMEM;
653
654         ret = v3d_job_init(v3d, file_priv, &job->base,
655                            v3d_job_free, args->in_sync);
656         if (ret) {
657                 kfree(job);
658                 return ret;
659         }
660
661         job->base.bo = kcalloc(ARRAY_SIZE(args->bo_handles),
662                                sizeof(*job->base.bo), GFP_KERNEL);
663         if (!job->base.bo) {
664                 v3d_job_put(&job->base);
665                 return -ENOMEM;
666         }
667
668         job->args = *args;
669
670         spin_lock(&file_priv->table_lock);
671         for (job->base.bo_count = 0;
672              job->base.bo_count < ARRAY_SIZE(args->bo_handles);
673              job->base.bo_count++) {
674                 struct drm_gem_object *bo;
675
676                 if (!args->bo_handles[job->base.bo_count])
677                         break;
678
679                 bo = idr_find(&file_priv->object_idr,
680                               args->bo_handles[job->base.bo_count]);
681                 if (!bo) {
682                         DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
683                                   job->base.bo_count,
684                                   args->bo_handles[job->base.bo_count]);
685                         ret = -ENOENT;
686                         spin_unlock(&file_priv->table_lock);
687                         goto fail;
688                 }
689                 drm_gem_object_get(bo);
690                 job->base.bo[job->base.bo_count] = bo;
691         }
692         spin_unlock(&file_priv->table_lock);
693
694         ret = v3d_lock_bo_reservations(&job->base, &acquire_ctx);
695         if (ret)
696                 goto fail;
697
698         mutex_lock(&v3d->sched_lock);
699         ret = v3d_push_job(v3d_priv, &job->base, V3D_TFU);
700         if (ret)
701                 goto fail_unreserve;
702         mutex_unlock(&v3d->sched_lock);
703
704         v3d_attach_fences_and_unlock_reservation(file_priv,
705                                                  &job->base, &acquire_ctx,
706                                                  args->out_sync,
707                                                  job->base.done_fence);
708
709         v3d_job_put(&job->base);
710
711         return 0;
712
713 fail_unreserve:
714         mutex_unlock(&v3d->sched_lock);
715         drm_gem_unlock_reservations(job->base.bo, job->base.bo_count,
716                                     &acquire_ctx);
717 fail:
718         v3d_job_put(&job->base);
719
720         return ret;
721 }
722
723 /**
724  * v3d_submit_csd_ioctl() - Submits a CSD (texture formatting) job to the V3D.
725  * @dev: DRM device
726  * @data: ioctl argument
727  * @file_priv: DRM file for this fd
728  *
729  * Userspace provides the register setup for the CSD, which we don't
730  * need to validate since the CSD is behind the MMU.
731  */
732 int
733 v3d_submit_csd_ioctl(struct drm_device *dev, void *data,
734                      struct drm_file *file_priv)
735 {
736         struct v3d_dev *v3d = to_v3d_dev(dev);
737         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
738         struct drm_v3d_submit_csd *args = data;
739         struct v3d_csd_job *job;
740         struct v3d_job *clean_job;
741         struct ww_acquire_ctx acquire_ctx;
742         int ret;
743
744         trace_v3d_submit_csd_ioctl(&v3d->drm, args->cfg[5], args->cfg[6]);
745
746         if (!v3d_has_csd(v3d)) {
747                 DRM_DEBUG("Attempting CSD submit on non-CSD hardware\n");
748                 return -EINVAL;
749         }
750
751         job = kcalloc(1, sizeof(*job), GFP_KERNEL);
752         if (!job)
753                 return -ENOMEM;
754
755         ret = v3d_job_init(v3d, file_priv, &job->base,
756                            v3d_job_free, args->in_sync);
757         if (ret) {
758                 kfree(job);
759                 return ret;
760         }
761
762         clean_job = kcalloc(1, sizeof(*clean_job), GFP_KERNEL);
763         if (!clean_job) {
764                 v3d_job_put(&job->base);
765                 kfree(job);
766                 return -ENOMEM;
767         }
768
769         ret = v3d_job_init(v3d, file_priv, clean_job, v3d_job_free, 0);
770         if (ret) {
771                 v3d_job_put(&job->base);
772                 kfree(clean_job);
773                 return ret;
774         }
775
776         job->args = *args;
777
778         ret = v3d_lookup_bos(dev, file_priv, clean_job,
779                              args->bo_handles, args->bo_handle_count);
780         if (ret)
781                 goto fail;
782
783         ret = v3d_lock_bo_reservations(clean_job, &acquire_ctx);
784         if (ret)
785                 goto fail;
786
787         mutex_lock(&v3d->sched_lock);
788         ret = v3d_push_job(v3d_priv, &job->base, V3D_CSD);
789         if (ret)
790                 goto fail_unreserve;
791
792         ret = drm_gem_fence_array_add(&clean_job->deps,
793                                       dma_fence_get(job->base.done_fence));
794         if (ret)
795                 goto fail_unreserve;
796
797         ret = v3d_push_job(v3d_priv, clean_job, V3D_CACHE_CLEAN);
798         if (ret)
799                 goto fail_unreserve;
800         mutex_unlock(&v3d->sched_lock);
801
802         v3d_attach_fences_and_unlock_reservation(file_priv,
803                                                  clean_job,
804                                                  &acquire_ctx,
805                                                  args->out_sync,
806                                                  clean_job->done_fence);
807
808         v3d_job_put(&job->base);
809         v3d_job_put(clean_job);
810
811         return 0;
812
813 fail_unreserve:
814         mutex_unlock(&v3d->sched_lock);
815         drm_gem_unlock_reservations(clean_job->bo, clean_job->bo_count,
816                                     &acquire_ctx);
817 fail:
818         v3d_job_put(&job->base);
819         v3d_job_put(clean_job);
820
821         return ret;
822 }
823
824 int
825 v3d_gem_init(struct drm_device *dev)
826 {
827         struct v3d_dev *v3d = to_v3d_dev(dev);
828         u32 pt_size = 4096 * 1024;
829         int ret, i;
830
831         for (i = 0; i < V3D_MAX_QUEUES; i++)
832                 v3d->queue[i].fence_context = dma_fence_context_alloc(1);
833
834         spin_lock_init(&v3d->mm_lock);
835         spin_lock_init(&v3d->job_lock);
836         mutex_init(&v3d->bo_lock);
837         mutex_init(&v3d->reset_lock);
838         mutex_init(&v3d->sched_lock);
839         mutex_init(&v3d->cache_clean_lock);
840
841         /* Note: We don't allocate address 0.  Various bits of HW
842          * treat 0 as special, such as the occlusion query counters
843          * where 0 means "disabled".
844          */
845         drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1);
846
847         v3d->pt = dma_alloc_wc(v3d->dev, pt_size,
848                                &v3d->pt_paddr,
849                                GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
850         if (!v3d->pt) {
851                 drm_mm_takedown(&v3d->mm);
852                 dev_err(v3d->dev,
853                         "Failed to allocate page tables. "
854                         "Please ensure you have CMA enabled.\n");
855                 return -ENOMEM;
856         }
857
858         v3d_init_hw_state(v3d);
859         v3d_mmu_set_page_table(v3d);
860
861         ret = v3d_sched_init(v3d);
862         if (ret) {
863                 drm_mm_takedown(&v3d->mm);
864                 dma_free_coherent(v3d->dev, 4096 * 1024, (void *)v3d->pt,
865                                   v3d->pt_paddr);
866         }
867
868         return 0;
869 }
870
871 void
872 v3d_gem_destroy(struct drm_device *dev)
873 {
874         struct v3d_dev *v3d = to_v3d_dev(dev);
875
876         v3d_sched_fini(v3d);
877
878         /* Waiting for jobs to finish would need to be done before
879          * unregistering V3D.
880          */
881         WARN_ON(v3d->bin_job);
882         WARN_ON(v3d->render_job);
883
884         drm_mm_takedown(&v3d->mm);
885
886         dma_free_coherent(v3d->dev, 4096 * 1024, (void *)v3d->pt, v3d->pt_paddr);
887 }