drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2012 Texas Instruments
   4  * Author: Rob Clark <robdclark@gmail.com>
   5  */
   6
   7 /* LCDC DRM driver, based on da8xx-fb */
   8
   9 #include <linux/component.h>
  10 #include <linux/mod_devicetable.h>
  11 #include <linux/module.h>
  12 #include <linux/pinctrl/consumer.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/pm_runtime.h>
  15
  16 #include <drm/drm_atomic_helper.h>
  17 #include <drm/drm_debugfs.h>
  18 #include <drm/drm_drv.h>
  19 #include <drm/drm_fb_helper.h>
  20 #include <drm/drm_fourcc.h>
  21 #include <drm/drm_gem_cma_helper.h>
  22 #include <drm/drm_gem_framebuffer_helper.h>
  23 #include <drm/drm_mm.h>
  24 #include <drm/drm_probe_helper.h>
  25 #include <drm/drm_vblank.h>
  26
  27
  28 #include "tilcdc_drv.h"
  29 #include "tilcdc_external.h"
  30 #include "tilcdc_panel.h"
  31 #include "tilcdc_regs.h"
  32
  33 static LIST_HEAD(module_list);
  34
  35 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
  36
  37 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
  38                                                DRM_FORMAT_BGR888,
  39                                                DRM_FORMAT_XBGR8888 };
  40
  41 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
  42                                               DRM_FORMAT_RGB888,
  43                                               DRM_FORMAT_XRGB8888 };
  44
  45 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
  46                                              DRM_FORMAT_RGB888,
  47                                              DRM_FORMAT_XRGB8888 };
  48
  49 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  50                 const struct tilcdc_module_ops *funcs)
  51 {
  52         mod->name = name;
  53         mod->funcs = funcs;
  54         INIT_LIST_HEAD(&mod->list);
  55         list_add(&mod->list, &module_list);
  56 }
  57
  58 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  59 {
  60         list_del(&mod->list);
  61 }
  62
  63 static int tilcdc_atomic_check(struct drm_device *dev,
  64                                struct drm_atomic_state *state)
  65 {
  66         int ret;
  67
  68         ret = drm_atomic_helper_check_modeset(dev, state);
  69         if (ret)
  70                 return ret;
  71
  72         ret = drm_atomic_helper_check_planes(dev, state);
  73         if (ret)
  74                 return ret;
  75
  76         /*
  77          * tilcdc ->atomic_check can update ->mode_changed if pixel format
  78          * changes, hence will we check modeset changes again.
  79          */
  80         ret = drm_atomic_helper_check_modeset(dev, state);
  81         if (ret)
  82                 return ret;
  83
  84         return ret;
  85 }
  86
  87 static const struct drm_mode_config_funcs mode_config_funcs = {
  88         .fb_create = drm_gem_fb_create,
  89         .atomic_check = tilcdc_atomic_check,
  90         .atomic_commit = drm_atomic_helper_commit,
  91 };
  92
  93 static void modeset_init(struct drm_device *dev)
  94 {
  95         struct tilcdc_drm_private *priv = dev->dev_private;
  96         struct tilcdc_module *mod;
  97
  98         list_for_each_entry(mod, &module_list, list) {
  99                 DBG("loading module: %s", mod->name);
 100                 mod->funcs->modeset_init(mod, dev);
 101         }
 102
 103         dev->mode_config.min_width = 0;
 104         dev->mode_config.min_height = 0;
 105         dev->mode_config.max_width = priv->max_width;
 106         dev->mode_config.max_height = 2048;
 107         dev->mode_config.funcs = &mode_config_funcs;
 108 }
 109
 110 #ifdef CONFIG_CPU_FREQ
 111 static int cpufreq_transition(struct notifier_block *nb,
 112                                      unsigned long val, void *data)
 113 {
 114         struct tilcdc_drm_private *priv = container_of(nb,
 115                         struct tilcdc_drm_private, freq_transition);
 116
 117         if (val == CPUFREQ_POSTCHANGE)
 118                 tilcdc_crtc_update_clk(priv->crtc);
 119
 120         return 0;
 121 }
 122 #endif
 123
 124 static irqreturn_t tilcdc_irq(int irq, void *arg)
 125 {
 126         struct drm_device *dev = arg;
 127         struct tilcdc_drm_private *priv = dev->dev_private;
 128
 129         return tilcdc_crtc_irq(priv->crtc);
 130 }
 131
 132 static int tilcdc_irq_install(struct drm_device *dev, unsigned int irq)
 133 {
 134         struct tilcdc_drm_private *priv = dev->dev_private;
 135         int ret;
 136
 137         ret = request_irq(irq, tilcdc_irq, 0, dev->driver->name, dev);
 138         if (ret)
 139                 return ret;
 140
 141         priv->irq_enabled = false;
 142
 143         return 0;
 144 }
 145
 146 static void tilcdc_irq_uninstall(struct drm_device *dev)
 147 {
 148         struct tilcdc_drm_private *priv = dev->dev_private;
 149
 150         if (!priv->irq_enabled)
 151                 return;
 152
 153         free_irq(priv->irq, dev);
 154         priv->irq_enabled = false;
 155 }
 156
 157 /*
 158  * DRM operations:
 159  */
 160
 161 static void tilcdc_fini(struct drm_device *dev)
 162 {
 163         struct tilcdc_drm_private *priv = dev->dev_private;
 164
 165 #ifdef CONFIG_CPU_FREQ
 166         if (priv->freq_transition.notifier_call)
 167                 cpufreq_unregister_notifier(&priv->freq_transition,
 168                                             CPUFREQ_TRANSITION_NOTIFIER);
 169 #endif
 170
 171         if (priv->crtc)
 172                 tilcdc_crtc_shutdown(priv->crtc);
 173
 174         if (priv->is_registered)
 175                 drm_dev_unregister(dev);
 176
 177         drm_kms_helper_poll_fini(dev);
 178         tilcdc_irq_uninstall(dev);
 179         drm_mode_config_cleanup(dev);
 180
 181         if (priv->clk)
 182                 clk_put(priv->clk);
 183
 184         if (priv->mmio)
 185                 iounmap(priv->mmio);
 186
 187         if (priv->wq)
 188                 destroy_workqueue(priv->wq);
 189
 190         dev->dev_private = NULL;
 191
 192         pm_runtime_disable(dev->dev);
 193
 194         drm_dev_put(dev);
 195 }
 196
 197 static int tilcdc_init(const struct drm_driver *ddrv, struct device *dev)
 198 {
 199         struct drm_device *ddev;
 200         struct platform_device *pdev = to_platform_device(dev);
 201         struct device_node *node = dev->of_node;
 202         struct tilcdc_drm_private *priv;
 203         struct resource *res;
 204         u32 bpp = 0;
 205         int ret;
 206
 207         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 208         if (!priv)
 209                 return -ENOMEM;
 210
 211         ddev = drm_dev_alloc(ddrv, dev);
 212         if (IS_ERR(ddev))
 213                 return PTR_ERR(ddev);
 214
 215         ddev->dev_private = priv;
 216         platform_set_drvdata(pdev, ddev);
 217         drm_mode_config_init(ddev);
 218
 219         priv->is_componentized =
 220                 tilcdc_get_external_components(dev, NULL) > 0;
 221
 222         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 223         if (!priv->wq) {
 224                 ret = -ENOMEM;
 225                 goto init_failed;
 226         }
 227
 228         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 229         if (!res) {
 230                 dev_err(dev, "failed to get memory resource\n");
 231                 ret = -EINVAL;
 232                 goto init_failed;
 233         }
 234
 235         priv->mmio = ioremap(res->start, resource_size(res));
 236         if (!priv->mmio) {
 237                 dev_err(dev, "failed to ioremap\n");
 238                 ret = -ENOMEM;
 239                 goto init_failed;
 240         }
 241
 242         priv->clk = clk_get(dev, "fck");
 243         if (IS_ERR(priv->clk)) {
 244                 dev_err(dev, "failed to get functional clock\n");
 245                 ret = -ENODEV;
 246                 goto init_failed;
 247         }
 248
 249         pm_runtime_enable(dev);
 250
 251         /* Determine LCD IP Version */
 252         pm_runtime_get_sync(dev);
 253         switch (tilcdc_read(ddev, LCDC_PID_REG)) {
 254         case 0x4c100102:
 255                 priv->rev = 1;
 256                 break;
 257         case 0x4f200800:
 258         case 0x4f201000:
 259                 priv->rev = 2;
 260                 break;
 261         default:
 262                 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
 263                         "defaulting to LCD revision 1\n",
 264                         tilcdc_read(ddev, LCDC_PID_REG));
 265                 priv->rev = 1;
 266                 break;
 267         }
 268
 269         pm_runtime_put_sync(dev);
 270
 271         if (priv->rev == 1) {
 272                 DBG("Revision 1 LCDC supports only RGB565 format");
 273                 priv->pixelformats = tilcdc_rev1_formats;
 274                 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
 275                 bpp = 16;
 276         } else {
 277                 const char *str = "\0";
 278
 279                 of_property_read_string(node, "blue-and-red-wiring", &str);
 280                 if (0 == strcmp(str, "crossed")) {
 281                         DBG("Configured for crossed blue and red wires");
 282                         priv->pixelformats = tilcdc_crossed_formats;
 283                         priv->num_pixelformats =
 284                                 ARRAY_SIZE(tilcdc_crossed_formats);
 285                         bpp = 32; /* Choose bpp with RGB support for fbdef */
 286                 } else if (0 == strcmp(str, "straight")) {
 287                         DBG("Configured for straight blue and red wires");
 288                         priv->pixelformats = tilcdc_straight_formats;
 289                         priv->num_pixelformats =
 290                                 ARRAY_SIZE(tilcdc_straight_formats);
 291                         bpp = 16; /* Choose bpp with RGB support for fbdef */
 292                 } else {
 293                         DBG("Blue and red wiring '%s' unknown, use legacy mode",
 294                             str);
 295                         priv->pixelformats = tilcdc_legacy_formats;
 296                         priv->num_pixelformats =
 297                                 ARRAY_SIZE(tilcdc_legacy_formats);
 298                         bpp = 16; /* This is just a guess */
 299                 }
 300         }
 301
 302         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 303                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 304
 305         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 306
 307         if (of_property_read_u32(node, "max-width", &priv->max_width)) {
 308                 if (priv->rev == 1)
 309                         priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1;
 310                 else
 311                         priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2;
 312         }
 313
 314         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 315
 316         if (of_property_read_u32(node, "max-pixelclock",
 317                                  &priv->max_pixelclock))
 318                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 319
 320         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 321
 322         ret = tilcdc_crtc_create(ddev);
 323         if (ret < 0) {
 324                 dev_err(dev, "failed to create crtc\n");
 325                 goto init_failed;
 326         }
 327         modeset_init(ddev);
 328
 329 #ifdef CONFIG_CPU_FREQ
 330         priv->freq_transition.notifier_call = cpufreq_transition;
 331         ret = cpufreq_register_notifier(&priv->freq_transition,
 332                         CPUFREQ_TRANSITION_NOTIFIER);
 333         if (ret) {
 334                 dev_err(dev, "failed to register cpufreq notifier\n");
 335                 priv->freq_transition.notifier_call = NULL;
 336                 goto init_failed;
 337         }
 338 #endif
 339
 340         if (priv->is_componentized) {
 341                 ret = component_bind_all(dev, ddev);
 342                 if (ret < 0)
 343                         goto init_failed;
 344
 345                 ret = tilcdc_add_component_encoder(ddev);
 346                 if (ret < 0)
 347                         goto init_failed;
 348         } else {
 349                 ret = tilcdc_attach_external_device(ddev);
 350                 if (ret)
 351                         goto init_failed;
 352         }
 353
 354         if (!priv->external_connector &&
 355             ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
 356                 dev_err(dev, "no encoders/connectors found\n");
 357                 ret = -EPROBE_DEFER;
 358                 goto init_failed;
 359         }
 360
 361         ret = drm_vblank_init(ddev, 1);
 362         if (ret < 0) {
 363                 dev_err(dev, "failed to initialize vblank\n");
 364                 goto init_failed;
 365         }
 366
 367         ret = platform_get_irq(pdev, 0);
 368         if (ret < 0)
 369                 goto init_failed;
 370         priv->irq = ret;
 371
 372         ret = tilcdc_irq_install(ddev, priv->irq);
 373         if (ret < 0) {
 374                 dev_err(dev, "failed to install IRQ handler\n");
 375                 goto init_failed;
 376         }
 377
 378         drm_mode_config_reset(ddev);
 379
 380         drm_kms_helper_poll_init(ddev);
 381
 382         ret = drm_dev_register(ddev, 0);
 383         if (ret)
 384                 goto init_failed;
 385         priv->is_registered = true;
 386
 387         drm_fbdev_generic_setup(ddev, bpp);
 388         return 0;
 389
 390 init_failed:
 391         tilcdc_fini(ddev);
 392
 393         return ret;
 394 }
 395
 396 #if defined(CONFIG_DEBUG_FS)
 397 static const struct {
 398         const char *name;
 399         uint8_t  rev;
 400         uint8_t  save;
 401         uint32_t reg;
 402 } registers[] =         {
 403 #define REG(rev, save, reg) { #reg, rev, save, reg }
 404                 /* exists in revision 1: */
 405                 REG(1, false, LCDC_PID_REG),
 406                 REG(1, true,  LCDC_CTRL_REG),
 407                 REG(1, false, LCDC_STAT_REG),
 408                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 409                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 410                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 411                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 412                 REG(1, true,  LCDC_DMA_CTRL_REG),
 413                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 414                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 415                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 416                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 417                 /* new in revision 2: */
 418                 REG(2, false, LCDC_RAW_STAT_REG),
 419                 REG(2, false, LCDC_MASKED_STAT_REG),
 420                 REG(2, true, LCDC_INT_ENABLE_SET_REG),
 421                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 422                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 423                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 424 #undef REG
 425 };
 426
 427 #endif
 428
 429 #ifdef CONFIG_DEBUG_FS
 430 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 431 {
 432         struct drm_info_node *node = (struct drm_info_node *) m->private;
 433         struct drm_device *dev = node->minor->dev;
 434         struct tilcdc_drm_private *priv = dev->dev_private;
 435         unsigned i;
 436
 437         pm_runtime_get_sync(dev->dev);
 438
 439         seq_printf(m, "revision: %d\n", priv->rev);
 440
 441         for (i = 0; i < ARRAY_SIZE(registers); i++)
 442                 if (priv->rev >= registers[i].rev)
 443                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 444                                         tilcdc_read(dev, registers[i].reg));
 445
 446         pm_runtime_put_sync(dev->dev);
 447
 448         return 0;
 449 }
 450
 451 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 452 {
 453         struct drm_info_node *node = (struct drm_info_node *) m->private;
 454         struct drm_device *dev = node->minor->dev;
 455         struct drm_printer p = drm_seq_file_printer(m);
 456         drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
 457         return 0;
 458 }
 459
 460 static struct drm_info_list tilcdc_debugfs_list[] = {
 461                 { "regs", tilcdc_regs_show, 0, NULL },
 462                 { "mm",   tilcdc_mm_show,   0, NULL },
 463 };
 464
 465 static void tilcdc_debugfs_init(struct drm_minor *minor)
 466 {
 467         struct tilcdc_module *mod;
 468
 469         drm_debugfs_create_files(tilcdc_debugfs_list,
 470                                  ARRAY_SIZE(tilcdc_debugfs_list),
 471                                  minor->debugfs_root, minor);
 472
 473         list_for_each_entry(mod, &module_list, list)
 474                 if (mod->funcs->debugfs_init)
 475                         mod->funcs->debugfs_init(mod, minor);
 476 }
 477 #endif
 478
 479 DEFINE_DRM_GEM_CMA_FOPS(fops);
 480
 481 static const struct drm_driver tilcdc_driver = {
 482         .driver_features    = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
 483         DRM_GEM_CMA_DRIVER_OPS,
 484 #ifdef CONFIG_DEBUG_FS
 485         .debugfs_init       = tilcdc_debugfs_init,
 486 #endif
 487         .fops               = &fops,
 488         .name               = "tilcdc",
 489         .desc               = "TI LCD Controller DRM",
 490         .date               = "20121205",
 491         .major              = 1,
 492         .minor              = 0,
 493 };
 494
 495 /*
 496  * Power management:
 497  */
 498
 499 #ifdef CONFIG_PM_SLEEP
 500 static int tilcdc_pm_suspend(struct device *dev)
 501 {
 502         struct drm_device *ddev = dev_get_drvdata(dev);
 503         int ret = 0;
 504
 505         ret = drm_mode_config_helper_suspend(ddev);
 506
 507         /* Select sleep pin state */
 508         pinctrl_pm_select_sleep_state(dev);
 509
 510         return ret;
 511 }
 512
 513 static int tilcdc_pm_resume(struct device *dev)
 514 {
 515         struct drm_device *ddev = dev_get_drvdata(dev);
 516
 517         /* Select default pin state */
 518         pinctrl_pm_select_default_state(dev);
 519         return  drm_mode_config_helper_resume(ddev);
 520 }
 521 #endif
 522
 523 static const struct dev_pm_ops tilcdc_pm_ops = {
 524         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 525 };
 526
 527 /*
 528  * Platform driver:
 529  */
 530 static int tilcdc_bind(struct device *dev)
 531 {
 532         return tilcdc_init(&tilcdc_driver, dev);
 533 }
 534
 535 static void tilcdc_unbind(struct device *dev)
 536 {
 537         struct drm_device *ddev = dev_get_drvdata(dev);
 538
 539         /* Check if a subcomponent has already triggered the unloading. */
 540         if (!ddev->dev_private)
 541                 return;
 542
 543         tilcdc_fini(dev_get_drvdata(dev));
 544 }
 545
 546 static const struct component_master_ops tilcdc_comp_ops = {
 547         .bind = tilcdc_bind,
 548         .unbind = tilcdc_unbind,
 549 };
 550
 551 static int tilcdc_pdev_probe(struct platform_device *pdev)
 552 {
 553         struct component_match *match = NULL;
 554         int ret;
 555
 556         /* bail out early if no DT data: */
 557         if (!pdev->dev.of_node) {
 558                 dev_err(&pdev->dev, "device-tree data is missing\n");
 559                 return -ENXIO;
 560         }
 561
 562         ret = tilcdc_get_external_components(&pdev->dev, &match);
 563         if (ret < 0)
 564                 return ret;
 565         else if (ret == 0)
 566                 return tilcdc_init(&tilcdc_driver, &pdev->dev);
 567         else
 568                 return component_master_add_with_match(&pdev->dev,
 569                                                        &tilcdc_comp_ops,
 570                                                        match);
 571 }
 572
 573 static int tilcdc_pdev_remove(struct platform_device *pdev)
 574 {
 575         int ret;
 576
 577         ret = tilcdc_get_external_components(&pdev->dev, NULL);
 578         if (ret < 0)
 579                 return ret;
 580         else if (ret == 0)
 581                 tilcdc_fini(platform_get_drvdata(pdev));
 582         else
 583                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 584
 585         return 0;
 586 }
 587
 588 static const struct of_device_id tilcdc_of_match[] = {
 589                 { .compatible = "ti,am33xx-tilcdc", },
 590                 { .compatible = "ti,da850-tilcdc", },
 591                 { },
 592 };
 593 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 594
 595 static struct platform_driver tilcdc_platform_driver = {
 596         .probe      = tilcdc_pdev_probe,
 597         .remove     = tilcdc_pdev_remove,
 598         .driver     = {
 599                 .name   = "tilcdc",
 600                 .pm     = &tilcdc_pm_ops,
 601                 .of_match_table = tilcdc_of_match,
 602         },
 603 };
 604
 605 static int __init tilcdc_drm_init(void)
 606 {
 607         if (drm_firmware_drivers_only())
 608                 return -ENODEV;
 609
 610         DBG("init");
 611         tilcdc_panel_init();
 612         return platform_driver_register(&tilcdc_platform_driver);
 613 }
 614
 615 static void __exit tilcdc_drm_fini(void)
 616 {
 617         DBG("fini");
 618         platform_driver_unregister(&tilcdc_platform_driver);
 619         tilcdc_panel_fini();
 620 }
 621
 622 module_init(tilcdc_drm_init);
 623 module_exit(tilcdc_drm_fini);
 624
 625 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 626 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 627 MODULE_LICENSE("GPL");